2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Nathan Binkert
38 #include "config/full_system.hh"
40 #include "arch/vtophys.hh"
41 #include "base/debug.hh"
42 #include "cpu/base.hh"
43 #include "cpu/thread_context.hh"
44 #include "cpu/quiesce_event.hh"
45 #include "params/BaseCPU.hh"
46 #include "sim/pseudo_inst.hh"
47 #include "sim/serialize.hh"
48 #include "sim/sim_events.hh"
49 #include "sim/sim_exit.hh"
50 #include "sim/stat_control.hh"
51 #include "sim/stats.hh"
52 #include "sim/system.hh"
55 #include "arch/kernel_stats.hh"
56 #include "sim/vptr.hh"
61 using namespace Stats
;
62 using namespace TheISA
;
64 namespace PseudoInst
{
69 arm(ThreadContext
*tc
)
71 if (tc
->getKernelStats())
72 tc
->getKernelStats()->arm();
76 quiesce(ThreadContext
*tc
)
78 if (!tc
->getCpuPtr()->params()->do_quiesce
)
81 DPRINTF(Quiesce
, "%s: quiesce()\n", tc
->getCpuPtr()->name());
84 if (tc
->getKernelStats())
85 tc
->getKernelStats()->quiesce();
89 quiesceNs(ThreadContext
*tc
, uint64_t ns
)
91 if (!tc
->getCpuPtr()->params()->do_quiesce
|| ns
== 0)
94 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
96 Tick resume
= curTick
+ Clock::Int::ns
* ns
;
98 mainEventQueue
.reschedule(quiesceEvent
, resume
, true);
100 DPRINTF(Quiesce
, "%s: quiesceNs(%d) until %d\n",
101 tc
->getCpuPtr()->name(), ns
, resume
);
104 if (tc
->getKernelStats())
105 tc
->getKernelStats()->quiesce();
109 quiesceCycles(ThreadContext
*tc
, uint64_t cycles
)
111 if (!tc
->getCpuPtr()->params()->do_quiesce
|| cycles
== 0)
114 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
116 Tick resume
= curTick
+ tc
->getCpuPtr()->ticks(cycles
);
118 mainEventQueue
.reschedule(quiesceEvent
, resume
, true);
120 DPRINTF(Quiesce
, "%s: quiesceCycles(%d) until %d\n",
121 tc
->getCpuPtr()->name(), cycles
, resume
);
124 if (tc
->getKernelStats())
125 tc
->getKernelStats()->quiesce();
129 quiesceTime(ThreadContext
*tc
)
131 return (tc
->readLastActivate() - tc
->readLastSuspend()) / Clock::Int::ns
;
137 rpns(ThreadContext
*tc
)
139 return curTick
/ Clock::Int::ns
;
143 wakeCPU(ThreadContext
*tc
, uint64_t cpuid
)
145 System
*sys
= tc
->getSystemPtr();
146 ThreadContext
*other_tc
= sys
->threadContexts
[cpuid
];
147 if (other_tc
->status() == ThreadContext::Suspended
)
148 other_tc
->activate();
152 m5exit(ThreadContext
*tc
, Tick delay
)
154 Tick when
= curTick
+ delay
* Clock::Int::ns
;
155 Event
*event
= new SimLoopExitEvent("m5_exit instruction encountered", 0);
156 mainEventQueue
.schedule(event
, when
);
162 loadsymbol(ThreadContext
*tc
)
164 const string
&filename
= tc
->getCpuPtr()->system
->params()->symbolfile
;
165 if (filename
.empty()) {
170 ifstream
file(filename
.c_str());
173 fatal("file error: Can't open symbol table file %s\n", filename
);
175 while (!file
.eof()) {
176 getline(file
, buffer
);
181 string::size_type idx
= buffer
.find(' ');
182 if (idx
== string::npos
)
185 string address
= "0x" + buffer
.substr(0, idx
);
190 // Skip over letter and space
191 string symbol
= buffer
.substr(idx
+ 3);
197 if (!to_number(address
, addr
))
200 if (!tc
->getSystemPtr()->kernelSymtab
->insert(addr
, symbol
))
204 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
210 addsymbol(ThreadContext
*tc
, Addr addr
, Addr symbolAddr
)
213 CopyStringOut(tc
, symb
, symbolAddr
, 100);
214 std::string
symbol(symb
);
216 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
218 tc
->getSystemPtr()->kernelSymtab
->insert(addr
,symbol
);
219 debugSymbolTable
->insert(addr
,symbol
);
226 resetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
228 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
232 Tick when
= curTick
+ delay
* Clock::Int::ns
;
233 Tick repeat
= period
* Clock::Int::ns
;
235 Stats::StatEvent(false, true, when
, repeat
);
239 dumpstats(ThreadContext
*tc
, Tick delay
, Tick period
)
241 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
245 Tick when
= curTick
+ delay
* Clock::Int::ns
;
246 Tick repeat
= period
* Clock::Int::ns
;
248 Stats::StatEvent(true, false, when
, repeat
);
252 dumpresetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
254 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
258 Tick when
= curTick
+ delay
* Clock::Int::ns
;
259 Tick repeat
= period
* Clock::Int::ns
;
261 Stats::StatEvent(true, true, when
, repeat
);
265 m5checkpoint(ThreadContext
*tc
, Tick delay
, Tick period
)
267 if (!tc
->getCpuPtr()->params()->do_checkpoint_insts
)
270 Tick when
= curTick
+ delay
* Clock::Int::ns
;
271 Tick repeat
= period
* Clock::Int::ns
;
273 Event
*event
= new SimLoopExitEvent("checkpoint", 0, repeat
);
274 mainEventQueue
.schedule(event
, when
);
280 readfile(ThreadContext
*tc
, Addr vaddr
, uint64_t len
, uint64_t offset
)
282 const string
&file
= tc
->getSystemPtr()->params()->readfile
;
289 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
291 panic("could not open file %s\n", file
);
293 if (::lseek(fd
, offset
, SEEK_SET
) < 0)
294 panic("could not seek: %s", strerror(errno
));
296 char *buf
= new char[len
];
299 int bytes
= ::read(fd
, p
, len
);
309 CopyIn(tc
, vaddr
, buf
, result
);
317 debugbreak(ThreadContext
*tc
)
323 switchcpu(ThreadContext
*tc
)
325 exitSimLoop("switchcpu");
328 /* namespace PseudoInst */ }