Make commenting on close namespace brackets consistent.
[gem5.git] / src / sim / pseudo_inst.cc
1 /*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31 #include <errno.h>
32 #include <fcntl.h>
33 #include <unistd.h>
34
35 #include <fstream>
36 #include <string>
37
38 #include "arch/vtophys.hh"
39 #include "base/debug.hh"
40 #include "config/full_system.hh"
41 #include "config/the_isa.hh"
42 #include "cpu/base.hh"
43 #include "cpu/thread_context.hh"
44 #include "cpu/quiesce_event.hh"
45 #include "params/BaseCPU.hh"
46 #include "sim/pseudo_inst.hh"
47 #include "sim/serialize.hh"
48 #include "sim/sim_events.hh"
49 #include "sim/sim_exit.hh"
50 #include "sim/stat_control.hh"
51 #include "sim/stats.hh"
52 #include "sim/system.hh"
53
54 #if FULL_SYSTEM
55 #include "arch/kernel_stats.hh"
56 #include "sim/vptr.hh"
57 #endif
58
59 using namespace std;
60
61 using namespace Stats;
62 using namespace TheISA;
63
64 namespace PseudoInst {
65
66 #if FULL_SYSTEM
67
68 void
69 arm(ThreadContext *tc)
70 {
71 if (tc->getKernelStats())
72 tc->getKernelStats()->arm();
73 }
74
75 void
76 quiesce(ThreadContext *tc)
77 {
78 if (!tc->getCpuPtr()->params()->do_quiesce)
79 return;
80
81 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
82
83 tc->suspend();
84 if (tc->getKernelStats())
85 tc->getKernelStats()->quiesce();
86 }
87
88 void
89 quiesceNs(ThreadContext *tc, uint64_t ns)
90 {
91 if (!tc->getCpuPtr()->params()->do_quiesce || ns == 0)
92 return;
93
94 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
95
96 Tick resume = curTick + SimClock::Int::ns * ns;
97
98 mainEventQueue.reschedule(quiesceEvent, resume, true);
99
100 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
101 tc->getCpuPtr()->name(), ns, resume);
102
103 tc->suspend();
104 if (tc->getKernelStats())
105 tc->getKernelStats()->quiesce();
106 }
107
108 void
109 quiesceCycles(ThreadContext *tc, uint64_t cycles)
110 {
111 if (!tc->getCpuPtr()->params()->do_quiesce || cycles == 0)
112 return;
113
114 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
115
116 Tick resume = curTick + tc->getCpuPtr()->ticks(cycles);
117
118 mainEventQueue.reschedule(quiesceEvent, resume, true);
119
120 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
121 tc->getCpuPtr()->name(), cycles, resume);
122
123 tc->suspend();
124 if (tc->getKernelStats())
125 tc->getKernelStats()->quiesce();
126 }
127
128 uint64_t
129 quiesceTime(ThreadContext *tc)
130 {
131 return (tc->readLastActivate() - tc->readLastSuspend()) /
132 SimClock::Int::ns;
133 }
134
135 #endif
136
137 uint64_t
138 rpns(ThreadContext *tc)
139 {
140 return curTick / SimClock::Int::ns;
141 }
142
143 void
144 wakeCPU(ThreadContext *tc, uint64_t cpuid)
145 {
146 System *sys = tc->getSystemPtr();
147 ThreadContext *other_tc = sys->threadContexts[cpuid];
148 if (other_tc->status() == ThreadContext::Suspended)
149 other_tc->activate();
150 }
151
152 void
153 m5exit(ThreadContext *tc, Tick delay)
154 {
155 Tick when = curTick + delay * SimClock::Int::ns;
156 Event *event = new SimLoopExitEvent("m5_exit instruction encountered", 0);
157 mainEventQueue.schedule(event, when);
158 }
159
160 #if FULL_SYSTEM
161
162 void
163 loadsymbol(ThreadContext *tc)
164 {
165 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
166 if (filename.empty()) {
167 return;
168 }
169
170 std::string buffer;
171 ifstream file(filename.c_str());
172
173 if (!file)
174 fatal("file error: Can't open symbol table file %s\n", filename);
175
176 while (!file.eof()) {
177 getline(file, buffer);
178
179 if (buffer.empty())
180 continue;
181
182 string::size_type idx = buffer.find(' ');
183 if (idx == string::npos)
184 continue;
185
186 string address = "0x" + buffer.substr(0, idx);
187 eat_white(address);
188 if (address.empty())
189 continue;
190
191 // Skip over letter and space
192 string symbol = buffer.substr(idx + 3);
193 eat_white(symbol);
194 if (symbol.empty())
195 continue;
196
197 Addr addr;
198 if (!to_number(address, addr))
199 continue;
200
201 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
202 continue;
203
204
205 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
206 }
207 file.close();
208 }
209
210 void
211 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
212 {
213 char symb[100];
214 CopyStringOut(tc, symb, symbolAddr, 100);
215 std::string symbol(symb);
216
217 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
218
219 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
220 debugSymbolTable->insert(addr,symbol);
221 }
222
223 #endif
224
225
226 void
227 resetstats(ThreadContext *tc, Tick delay, Tick period)
228 {
229 if (!tc->getCpuPtr()->params()->do_statistics_insts)
230 return;
231
232
233 Tick when = curTick + delay * SimClock::Int::ns;
234 Tick repeat = period * SimClock::Int::ns;
235
236 Stats::StatEvent(false, true, when, repeat);
237 }
238
239 void
240 dumpstats(ThreadContext *tc, Tick delay, Tick period)
241 {
242 if (!tc->getCpuPtr()->params()->do_statistics_insts)
243 return;
244
245
246 Tick when = curTick + delay * SimClock::Int::ns;
247 Tick repeat = period * SimClock::Int::ns;
248
249 Stats::StatEvent(true, false, when, repeat);
250 }
251
252 void
253 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
254 {
255 if (!tc->getCpuPtr()->params()->do_statistics_insts)
256 return;
257
258
259 Tick when = curTick + delay * SimClock::Int::ns;
260 Tick repeat = period * SimClock::Int::ns;
261
262 Stats::StatEvent(true, true, when, repeat);
263 }
264
265 void
266 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
267 {
268 if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
269 return;
270
271 Tick when = curTick + delay * SimClock::Int::ns;
272 Tick repeat = period * SimClock::Int::ns;
273
274 Event *event = new SimLoopExitEvent("checkpoint", 0, repeat);
275 mainEventQueue.schedule(event, when);
276 }
277
278 #if FULL_SYSTEM
279
280 uint64_t
281 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
282 {
283 const string &file = tc->getSystemPtr()->params()->readfile;
284 if (file.empty()) {
285 return ULL(0);
286 }
287
288 uint64_t result = 0;
289
290 int fd = ::open(file.c_str(), O_RDONLY, 0);
291 if (fd < 0)
292 panic("could not open file %s\n", file);
293
294 if (::lseek(fd, offset, SEEK_SET) < 0)
295 panic("could not seek: %s", strerror(errno));
296
297 char *buf = new char[len];
298 char *p = buf;
299 while (len > 0) {
300 int bytes = ::read(fd, p, len);
301 if (bytes <= 0)
302 break;
303
304 p += bytes;
305 result += bytes;
306 len -= bytes;
307 }
308
309 close(fd);
310 CopyIn(tc, vaddr, buf, result);
311 delete [] buf;
312 return result;
313 }
314
315 #endif
316
317 void
318 debugbreak(ThreadContext *tc)
319 {
320 debug_break();
321 }
322
323 void
324 switchcpu(ThreadContext *tc)
325 {
326 exitSimLoop("switchcpu");
327 }
328
329 } // namespace PseudoInst