src/sim/pseudo_inst.cc

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2011 Advanced Micro Devices, Inc.
  15  * Copyright (c) 2003-2006 The Regents of The University of Michigan
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Nathan Binkert
  42  */
  43
  44 #include <fcntl.h>
  45 #include <unistd.h>
  46
  47 #include <cerrno>
  48 #include <fstream>
  49 #include <string>
  50
  51 #include "arch/kernel_stats.hh"
  52 #include "arch/vtophys.hh"
  53 #include "base/debug.hh"
  54 #include "config/full_system.hh"
  55 #include "config/the_isa.hh"
  56 #include "cpu/base.hh"
  57 #include "cpu/quiesce_event.hh"
  58 #include "cpu/thread_context.hh"
  59 #include "debug/Loader.hh"
  60 #include "debug/Quiesce.hh"
  61 #include "debug/WorkItems.hh"
  62 #include "params/BaseCPU.hh"
  63 #include "sim/pseudo_inst.hh"
  64 #include "sim/serialize.hh"
  65 #include "sim/sim_events.hh"
  66 #include "sim/sim_exit.hh"
  67 #include "sim/stat_control.hh"
  68 #include "sim/stats.hh"
  69 #include "sim/system.hh"
  70 #include "sim/vptr.hh"
  71
  72 using namespace std;
  73
  74 using namespace Stats;
  75 using namespace TheISA;
  76
  77 namespace PseudoInst {
  78
  79 #if FULL_SYSTEM
  80
  81 void
  82 arm(ThreadContext *tc)
  83 {
  84     if (tc->getKernelStats())
  85         tc->getKernelStats()->arm();
  86 }
  87
  88 void
  89 quiesce(ThreadContext *tc)
  90 {
  91     if (!tc->getCpuPtr()->params()->do_quiesce)
  92         return;
  93
  94     DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
  95
  96     tc->suspend();
  97     if (tc->getKernelStats())
  98         tc->getKernelStats()->quiesce();
  99 }
 100
 101 void
 102 quiesceSkip(ThreadContext *tc)
 103 {
 104     BaseCPU *cpu = tc->getCpuPtr();
 105
 106     if (!cpu->params()->do_quiesce)
 107         return;
 108
 109     EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 110
 111     Tick resume = curTick() + 1;
 112
 113     cpu->reschedule(quiesceEvent, resume, true);
 114
 115     DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
 116             cpu->name(), resume);
 117
 118     tc->suspend();
 119     if (tc->getKernelStats())
 120         tc->getKernelStats()->quiesce();
 121 }
 122
 123 void
 124 quiesceNs(ThreadContext *tc, uint64_t ns)
 125 {
 126     BaseCPU *cpu = tc->getCpuPtr();
 127
 128     if (!cpu->params()->do_quiesce || ns == 0)
 129         return;
 130
 131     EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 132
 133     Tick resume = curTick() + SimClock::Int::ns * ns;
 134
 135     cpu->reschedule(quiesceEvent, resume, true);
 136
 137     DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
 138             cpu->name(), ns, resume);
 139
 140     tc->suspend();
 141     if (tc->getKernelStats())
 142         tc->getKernelStats()->quiesce();
 143 }
 144
 145 void
 146 quiesceCycles(ThreadContext *tc, uint64_t cycles)
 147 {
 148     BaseCPU *cpu = tc->getCpuPtr();
 149
 150     if (!cpu->params()->do_quiesce || cycles == 0)
 151         return;
 152
 153     EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 154
 155     Tick resume = curTick() + cpu->ticks(cycles);
 156
 157     cpu->reschedule(quiesceEvent, resume, true);
 158
 159     DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
 160             cpu->name(), cycles, resume);
 161
 162     tc->suspend();
 163     if (tc->getKernelStats())
 164         tc->getKernelStats()->quiesce();
 165 }
 166
 167 uint64_t
 168 quiesceTime(ThreadContext *tc)
 169 {
 170     return (tc->readLastActivate() - tc->readLastSuspend()) /
 171         SimClock::Int::ns;
 172 }
 173
 174 #endif
 175
 176 uint64_t
 177 rpns(ThreadContext *tc)
 178 {
 179     return curTick() / SimClock::Int::ns;
 180 }
 181
 182 void
 183 wakeCPU(ThreadContext *tc, uint64_t cpuid)
 184 {
 185     System *sys = tc->getSystemPtr();
 186     ThreadContext *other_tc = sys->threadContexts[cpuid];
 187     if (other_tc->status() == ThreadContext::Suspended)
 188         other_tc->activate();
 189 }
 190
 191 void
 192 m5exit(ThreadContext *tc, Tick delay)
 193 {
 194     Tick when = curTick() + delay * SimClock::Int::ns;
 195     exitSimLoop("m5_exit instruction encountered", 0, when);
 196 }
 197
 198 #if FULL_SYSTEM
 199
 200 void
 201 loadsymbol(ThreadContext *tc)
 202 {
 203     const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
 204     if (filename.empty()) {
 205         return;
 206     }
 207
 208     std::string buffer;
 209     ifstream file(filename.c_str());
 210
 211     if (!file)
 212         fatal("file error: Can't open symbol table file %s\n", filename);
 213
 214     while (!file.eof()) {
 215         getline(file, buffer);
 216
 217         if (buffer.empty())
 218             continue;
 219
 220         string::size_type idx = buffer.find(' ');
 221         if (idx == string::npos)
 222             continue;
 223
 224         string address = "0x" + buffer.substr(0, idx);
 225         eat_white(address);
 226         if (address.empty())
 227             continue;
 228
 229         // Skip over letter and space
 230         string symbol = buffer.substr(idx + 3);
 231         eat_white(symbol);
 232         if (symbol.empty())
 233             continue;
 234
 235         Addr addr;
 236         if (!to_number(address, addr))
 237             continue;
 238
 239         if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
 240             continue;
 241
 242
 243         DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 244     }
 245     file.close();
 246 }
 247
 248 void
 249 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
 250 {
 251     char symb[100];
 252     CopyStringOut(tc, symb, symbolAddr, 100);
 253     std::string symbol(symb);
 254
 255     DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 256
 257     tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
 258     debugSymbolTable->insert(addr,symbol);
 259 }
 260
 261 uint64_t
 262 initParam(ThreadContext *tc)
 263 {
 264     return tc->getCpuPtr()->system->init_param;
 265 }
 266
 267 #endif
 268
 269
 270 void
 271 resetstats(ThreadContext *tc, Tick delay, Tick period)
 272 {
 273     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 274         return;
 275
 276
 277     Tick when = curTick() + delay * SimClock::Int::ns;
 278     Tick repeat = period * SimClock::Int::ns;
 279
 280     Stats::schedStatEvent(false, true, when, repeat);
 281 }
 282
 283 void
 284 dumpstats(ThreadContext *tc, Tick delay, Tick period)
 285 {
 286     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 287         return;
 288
 289
 290     Tick when = curTick() + delay * SimClock::Int::ns;
 291     Tick repeat = period * SimClock::Int::ns;
 292
 293     Stats::schedStatEvent(true, false, when, repeat);
 294 }
 295
 296 void
 297 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
 298 {
 299     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 300         return;
 301
 302
 303     Tick when = curTick() + delay * SimClock::Int::ns;
 304     Tick repeat = period * SimClock::Int::ns;
 305
 306     Stats::schedStatEvent(true, true, when, repeat);
 307 }
 308
 309 void
 310 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
 311 {
 312     if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
 313         return;
 314
 315     Tick when = curTick() + delay * SimClock::Int::ns;
 316     Tick repeat = period * SimClock::Int::ns;
 317
 318     exitSimLoop("checkpoint", 0, when, repeat);
 319 }
 320
 321 #if FULL_SYSTEM
 322
 323 uint64_t
 324 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
 325 {
 326     const string &file = tc->getSystemPtr()->params()->readfile;
 327     if (file.empty()) {
 328         return ULL(0);
 329     }
 330
 331     uint64_t result = 0;
 332
 333     int fd = ::open(file.c_str(), O_RDONLY, 0);
 334     if (fd < 0)
 335         panic("could not open file %s\n", file);
 336
 337     if (::lseek(fd, offset, SEEK_SET) < 0)
 338         panic("could not seek: %s", strerror(errno));
 339
 340     char *buf = new char[len];
 341     char *p = buf;
 342     while (len > 0) {
 343         int bytes = ::read(fd, p, len);
 344         if (bytes <= 0)
 345             break;
 346
 347         p += bytes;
 348         result += bytes;
 349         len -= bytes;
 350     }
 351
 352     close(fd);
 353     CopyIn(tc, vaddr, buf, result);
 354     delete [] buf;
 355     return result;
 356 }
 357
 358 #endif
 359
 360 void
 361 debugbreak(ThreadContext *tc)
 362 {
 363     Debug::breakpoint();
 364 }
 365
 366 void
 367 switchcpu(ThreadContext *tc)
 368 {
 369     exitSimLoop("switchcpu");
 370 }
 371
 372 //
 373 // This function is executed when annotated work items begin.  Depending on
 374 // what the user specified at the command line, the simulation may exit and/or
 375 // take a checkpoint when a certain work item begins.
 376 //
 377 void
 378 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
 379 {
 380     tc->getCpuPtr()->workItemBegin();
 381     System *sys = tc->getSystemPtr();
 382     const System::Params *params = sys->params();
 383
 384     DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
 385             threadid);
 386
 387     //
 388     // If specified, determine if this is the specific work item the user
 389     // identified
 390     //
 391     if (params->work_item_id == -1 || params->work_item_id == workid) {
 392
 393         uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
 394         int cpuId = tc->getCpuPtr()->cpuId();
 395
 396         if (params->work_cpus_ckpt_count != 0 &&
 397             sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
 398             //
 399             // If active cpus equals checkpoint count, create checkpoint
 400             //
 401             exitSimLoop("checkpoint");
 402         }
 403
 404         if (systemWorkBeginCount == params->work_begin_ckpt_count) {
 405             //
 406             // Note: the string specified as the cause of the exit event must
 407             // exactly equal "checkpoint" inorder to create a checkpoint
 408             //
 409             exitSimLoop("checkpoint");
 410         }
 411
 412         if (systemWorkBeginCount == params->work_begin_exit_count) {
 413             //
 414             // If a certain number of work items started, exit simulation
 415             //
 416             exitSimLoop("work started count reach");
 417         }
 418
 419         if (cpuId == params->work_begin_cpu_id_exit) {
 420             //
 421             // If work started on the cpu id specified, exit simulation
 422             //
 423             exitSimLoop("work started on specific cpu");
 424         }
 425     }
 426 }
 427
 428 //
 429 // This function is executed when annotated work items end.  Depending on
 430 // what the user specified at the command line, the simulation may exit and/or
 431 // take a checkpoint when a certain work item ends.
 432 //
 433 void
 434 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
 435 {
 436     tc->getCpuPtr()->workItemEnd();
 437     System *sys = tc->getSystemPtr();
 438     const System::Params *params = sys->params();
 439
 440     DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
 441
 442     //
 443     // If specified, determine if this is the specific work item the user
 444     // identified
 445     //
 446     if (params->work_item_id == -1 || params->work_item_id == workid) {
 447
 448         uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
 449         int cpuId = tc->getCpuPtr()->cpuId();
 450
 451         if (params->work_cpus_ckpt_count != 0 &&
 452             sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
 453             //
 454             // If active cpus equals checkpoint count, create checkpoint
 455             //
 456             exitSimLoop("checkpoint");
 457         }
 458
 459         if (params->work_end_ckpt_count != 0 &&
 460             systemWorkEndCount == params->work_end_ckpt_count) {
 461             //
 462             // If total work items completed equals checkpoint count, create
 463             // checkpoint
 464             //
 465             exitSimLoop("checkpoint");
 466         }
 467
 468         if (params->work_end_exit_count != 0 &&
 469             systemWorkEndCount == params->work_end_exit_count) {
 470             //
 471             // If total work items completed equals exit count, exit simulation
 472             //
 473             exitSimLoop("work items exit count reached");
 474         }
 475     }
 476 }
 477
 478 } // namespace PseudoInst