8a7f0c4696cbd92b8387f735e3a48a2248d72ded
[gem5.git] / src / sim / pseudo_inst.cc
1 /*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2011 Advanced Micro Devices, Inc.
15 * Copyright (c) 2003-2006 The Regents of The University of Michigan
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Nathan Binkert
42 */
43
44 #include <fcntl.h>
45 #include <unistd.h>
46
47 #include <cerrno>
48 #include <fstream>
49 #include <string>
50
51 #include "arch/kernel_stats.hh"
52 #include "arch/vtophys.hh"
53 #include "base/debug.hh"
54 #include "base/output.hh"
55 #include "config/the_isa.hh"
56 #include "cpu/base.hh"
57 #include "cpu/quiesce_event.hh"
58 #include "cpu/thread_context.hh"
59 #include "debug/Loader.hh"
60 #include "debug/Quiesce.hh"
61 #include "debug/WorkItems.hh"
62 #include "params/BaseCPU.hh"
63 #include "sim/full_system.hh"
64 #include "sim/pseudo_inst.hh"
65 #include "sim/serialize.hh"
66 #include "sim/sim_events.hh"
67 #include "sim/sim_exit.hh"
68 #include "sim/stat_control.hh"
69 #include "sim/stats.hh"
70 #include "sim/system.hh"
71 #include "sim/vptr.hh"
72
73 using namespace std;
74
75 using namespace Stats;
76 using namespace TheISA;
77
78 namespace PseudoInst {
79
80 static inline void
81 panicFsOnlyPseudoInst(const char *name)
82 {
83 panic("Pseudo inst \"%s\" is only available in Full System mode.");
84 }
85
86 void
87 arm(ThreadContext *tc)
88 {
89 if (!FullSystem)
90 panicFsOnlyPseudoInst("arm");
91
92 if (tc->getKernelStats())
93 tc->getKernelStats()->arm();
94 }
95
96 void
97 quiesce(ThreadContext *tc)
98 {
99 if (!FullSystem)
100 panicFsOnlyPseudoInst("quiesce");
101
102 if (!tc->getCpuPtr()->params()->do_quiesce)
103 return;
104
105 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
106
107 tc->suspend();
108 if (tc->getKernelStats())
109 tc->getKernelStats()->quiesce();
110 }
111
112 void
113 quiesceSkip(ThreadContext *tc)
114 {
115 if (!FullSystem)
116 panicFsOnlyPseudoInst("quiesceSkip");
117
118 BaseCPU *cpu = tc->getCpuPtr();
119
120 if (!cpu->params()->do_quiesce)
121 return;
122
123 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
124
125 Tick resume = curTick() + 1;
126
127 cpu->reschedule(quiesceEvent, resume, true);
128
129 DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
130 cpu->name(), resume);
131
132 tc->suspend();
133 if (tc->getKernelStats())
134 tc->getKernelStats()->quiesce();
135 }
136
137 void
138 quiesceNs(ThreadContext *tc, uint64_t ns)
139 {
140 if (!FullSystem)
141 panicFsOnlyPseudoInst("quiesceNs");
142
143 BaseCPU *cpu = tc->getCpuPtr();
144
145 if (!cpu->params()->do_quiesce || ns == 0)
146 return;
147
148 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
149
150 Tick resume = curTick() + SimClock::Int::ns * ns;
151
152 cpu->reschedule(quiesceEvent, resume, true);
153
154 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
155 cpu->name(), ns, resume);
156
157 tc->suspend();
158 if (tc->getKernelStats())
159 tc->getKernelStats()->quiesce();
160 }
161
162 void
163 quiesceCycles(ThreadContext *tc, uint64_t cycles)
164 {
165 if (!FullSystem)
166 panicFsOnlyPseudoInst("quiesceCycles");
167
168 BaseCPU *cpu = tc->getCpuPtr();
169
170 if (!cpu->params()->do_quiesce || cycles == 0)
171 return;
172
173 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
174
175 Tick resume = curTick() + cpu->ticks(cycles);
176
177 cpu->reschedule(quiesceEvent, resume, true);
178
179 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
180 cpu->name(), cycles, resume);
181
182 tc->suspend();
183 if (tc->getKernelStats())
184 tc->getKernelStats()->quiesce();
185 }
186
187 uint64_t
188 quiesceTime(ThreadContext *tc)
189 {
190 if (!FullSystem) {
191 panicFsOnlyPseudoInst("quiesceTime");
192 return 0;
193 }
194
195 return (tc->readLastActivate() - tc->readLastSuspend()) /
196 SimClock::Int::ns;
197 }
198
199 uint64_t
200 rpns(ThreadContext *tc)
201 {
202 return curTick() / SimClock::Int::ns;
203 }
204
205 void
206 wakeCPU(ThreadContext *tc, uint64_t cpuid)
207 {
208 System *sys = tc->getSystemPtr();
209 ThreadContext *other_tc = sys->threadContexts[cpuid];
210 if (other_tc->status() == ThreadContext::Suspended)
211 other_tc->activate();
212 }
213
214 void
215 m5exit(ThreadContext *tc, Tick delay)
216 {
217 Tick when = curTick() + delay * SimClock::Int::ns;
218 exitSimLoop("m5_exit instruction encountered", 0, when);
219 }
220
221 void
222 loadsymbol(ThreadContext *tc)
223 {
224 if (!FullSystem)
225 panicFsOnlyPseudoInst("loadsymbol");
226
227 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
228 if (filename.empty()) {
229 return;
230 }
231
232 std::string buffer;
233 ifstream file(filename.c_str());
234
235 if (!file)
236 fatal("file error: Can't open symbol table file %s\n", filename);
237
238 while (!file.eof()) {
239 getline(file, buffer);
240
241 if (buffer.empty())
242 continue;
243
244 string::size_type idx = buffer.find(' ');
245 if (idx == string::npos)
246 continue;
247
248 string address = "0x" + buffer.substr(0, idx);
249 eat_white(address);
250 if (address.empty())
251 continue;
252
253 // Skip over letter and space
254 string symbol = buffer.substr(idx + 3);
255 eat_white(symbol);
256 if (symbol.empty())
257 continue;
258
259 Addr addr;
260 if (!to_number(address, addr))
261 continue;
262
263 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
264 continue;
265
266
267 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
268 }
269 file.close();
270 }
271
272 void
273 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
274 {
275 if (!FullSystem)
276 panicFsOnlyPseudoInst("addSymbol");
277
278 char symb[100];
279 CopyStringOut(tc, symb, symbolAddr, 100);
280 std::string symbol(symb);
281
282 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
283
284 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
285 debugSymbolTable->insert(addr,symbol);
286 }
287
288 uint64_t
289 initParam(ThreadContext *tc)
290 {
291 if (!FullSystem) {
292 panicFsOnlyPseudoInst("initParam");
293 return 0;
294 }
295
296 return tc->getCpuPtr()->system->init_param;
297 }
298
299
300 void
301 resetstats(ThreadContext *tc, Tick delay, Tick period)
302 {
303 if (!tc->getCpuPtr()->params()->do_statistics_insts)
304 return;
305
306
307 Tick when = curTick() + delay * SimClock::Int::ns;
308 Tick repeat = period * SimClock::Int::ns;
309
310 Stats::schedStatEvent(false, true, when, repeat);
311 }
312
313 void
314 dumpstats(ThreadContext *tc, Tick delay, Tick period)
315 {
316 if (!tc->getCpuPtr()->params()->do_statistics_insts)
317 return;
318
319
320 Tick when = curTick() + delay * SimClock::Int::ns;
321 Tick repeat = period * SimClock::Int::ns;
322
323 Stats::schedStatEvent(true, false, when, repeat);
324 }
325
326 void
327 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
328 {
329 if (!tc->getCpuPtr()->params()->do_statistics_insts)
330 return;
331
332
333 Tick when = curTick() + delay * SimClock::Int::ns;
334 Tick repeat = period * SimClock::Int::ns;
335
336 Stats::schedStatEvent(true, true, when, repeat);
337 }
338
339 void
340 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
341 {
342 if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
343 return;
344
345 Tick when = curTick() + delay * SimClock::Int::ns;
346 Tick repeat = period * SimClock::Int::ns;
347
348 exitSimLoop("checkpoint", 0, when, repeat);
349 }
350
351 uint64_t
352 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
353 {
354 if (!FullSystem) {
355 panicFsOnlyPseudoInst("readfile");
356 return 0;
357 }
358
359 const string &file = tc->getSystemPtr()->params()->readfile;
360 if (file.empty()) {
361 return ULL(0);
362 }
363
364 uint64_t result = 0;
365
366 int fd = ::open(file.c_str(), O_RDONLY, 0);
367 if (fd < 0)
368 panic("could not open file %s\n", file);
369
370 if (::lseek(fd, offset, SEEK_SET) < 0)
371 panic("could not seek: %s", strerror(errno));
372
373 char *buf = new char[len];
374 char *p = buf;
375 while (len > 0) {
376 int bytes = ::read(fd, p, len);
377 if (bytes <= 0)
378 break;
379
380 p += bytes;
381 result += bytes;
382 len -= bytes;
383 }
384
385 close(fd);
386 CopyIn(tc, vaddr, buf, result);
387 delete [] buf;
388 return result;
389 }
390
391 uint64_t
392 writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
393 Addr filename_addr)
394 {
395 ostream *os;
396
397 // copy out target filename
398 char fn[100];
399 std::string filename;
400 CopyStringOut(tc, fn, filename_addr, 100);
401 filename = std::string(fn);
402
403 if (offset == 0) {
404 // create a new file (truncate)
405 os = simout.create(filename, true);
406 } else {
407 // do not truncate file if offset is non-zero
408 // (ios::in flag is required as well to keep the existing data
409 // intact, otherwise existing data will be zeroed out.)
410 os = simout.openFile(simout.directory() + filename,
411 ios::in | ios::out | ios::binary);
412 }
413 if (!os)
414 panic("could not open file %s\n", filename);
415
416 // seek to offset
417 os->seekp(offset);
418
419 // copy out data and write to file
420 char *buf = new char[len];
421 CopyOut(tc, buf, vaddr, len);
422 os->write(buf, len);
423 if (os->fail() || os->bad())
424 panic("Error while doing writefile!\n");
425
426 simout.close(os);
427
428 delete [] buf;
429
430 return len;
431 }
432
433 void
434 debugbreak(ThreadContext *tc)
435 {
436 Debug::breakpoint();
437 }
438
439 void
440 switchcpu(ThreadContext *tc)
441 {
442 exitSimLoop("switchcpu");
443 }
444
445 //
446 // This function is executed when annotated work items begin. Depending on
447 // what the user specified at the command line, the simulation may exit and/or
448 // take a checkpoint when a certain work item begins.
449 //
450 void
451 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
452 {
453 tc->getCpuPtr()->workItemBegin();
454 System *sys = tc->getSystemPtr();
455 const System::Params *params = sys->params();
456 sys->workItemBegin(threadid, workid);
457
458 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
459 threadid);
460
461 //
462 // If specified, determine if this is the specific work item the user
463 // identified
464 //
465 if (params->work_item_id == -1 || params->work_item_id == workid) {
466
467 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
468 int cpuId = tc->getCpuPtr()->cpuId();
469
470 if (params->work_cpus_ckpt_count != 0 &&
471 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
472 //
473 // If active cpus equals checkpoint count, create checkpoint
474 //
475 exitSimLoop("checkpoint");
476 }
477
478 if (systemWorkBeginCount == params->work_begin_ckpt_count) {
479 //
480 // Note: the string specified as the cause of the exit event must
481 // exactly equal "checkpoint" inorder to create a checkpoint
482 //
483 exitSimLoop("checkpoint");
484 }
485
486 if (systemWorkBeginCount == params->work_begin_exit_count) {
487 //
488 // If a certain number of work items started, exit simulation
489 //
490 exitSimLoop("work started count reach");
491 }
492
493 if (cpuId == params->work_begin_cpu_id_exit) {
494 //
495 // If work started on the cpu id specified, exit simulation
496 //
497 exitSimLoop("work started on specific cpu");
498 }
499 }
500 }
501
502 //
503 // This function is executed when annotated work items end. Depending on
504 // what the user specified at the command line, the simulation may exit and/or
505 // take a checkpoint when a certain work item ends.
506 //
507 void
508 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
509 {
510 tc->getCpuPtr()->workItemEnd();
511 System *sys = tc->getSystemPtr();
512 const System::Params *params = sys->params();
513 sys->workItemEnd(threadid, workid);
514
515 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
516
517 //
518 // If specified, determine if this is the specific work item the user
519 // identified
520 //
521 if (params->work_item_id == -1 || params->work_item_id == workid) {
522
523 uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
524 int cpuId = tc->getCpuPtr()->cpuId();
525
526 if (params->work_cpus_ckpt_count != 0 &&
527 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
528 //
529 // If active cpus equals checkpoint count, create checkpoint
530 //
531 exitSimLoop("checkpoint");
532 }
533
534 if (params->work_end_ckpt_count != 0 &&
535 systemWorkEndCount == params->work_end_ckpt_count) {
536 //
537 // If total work items completed equals checkpoint count, create
538 // checkpoint
539 //
540 exitSimLoop("checkpoint");
541 }
542
543 if (params->work_end_exit_count != 0 &&
544 systemWorkEndCount == params->work_end_exit_count) {
545 //
546 // If total work items completed equals exit count, exit simulation
547 //
548 exitSimLoop("work items exit count reached");
549 }
550 }
551 }
552
553 } // namespace PseudoInst