arch,base,cpu,sim: Statically allocate debugSymbolTable.
[gem5.git] / src / sim / pseudo_inst.cc
1 /*
2 * Copyright (c) 2010-2012, 2015, 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2011 Advanced Micro Devices, Inc.
15 * Copyright (c) 2003-2006 The Regents of The University of Michigan
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 #include "sim/pseudo_inst.hh"
43
44 #include <fcntl.h>
45 #include <unistd.h>
46
47 #include <array>
48 #include <cerrno>
49 #include <fstream>
50 #include <string>
51 #include <vector>
52
53 #include "base/debug.hh"
54 #include "base/output.hh"
55 #include "config/the_isa.hh"
56 #include "cpu/base.hh"
57 #include "cpu/quiesce_event.hh"
58 #include "cpu/thread_context.hh"
59 #include "debug/Loader.hh"
60 #include "debug/Quiesce.hh"
61 #include "debug/WorkItems.hh"
62 #include "dev/net/dist_iface.hh"
63 #include "kern/kernel_stats.hh"
64 #include "params/BaseCPU.hh"
65 #include "sim/full_system.hh"
66 #include "sim/process.hh"
67 #include "sim/serialize.hh"
68 #include "sim/sim_events.hh"
69 #include "sim/sim_exit.hh"
70 #include "sim/stat_control.hh"
71 #include "sim/stats.hh"
72 #include "sim/system.hh"
73 #include "sim/vptr.hh"
74
75 using namespace std;
76 using namespace Stats;
77
78 namespace PseudoInst
79 {
80
81 /**
82 * Unique keys to retrieve various params by the initParam pseudo inst.
83 *
84 * @note Each key may be at most 16 characters (because we use
85 * two 64-bit registers to pass in the key to the initparam function).
86 */
87 namespace InitParamKey
88 {
89
90 /**
91 * The default key (empty string)
92 */
93 const std::string DEFAULT = "";
94 /**
95 * Unique key for "rank" param (distributed gem5 runs)
96 */
97 const std::string DIST_RANK = "dist-rank";
98 /**
99 * Unique key for "size" param (distributed gem5 runs)
100 */
101 const std::string DIST_SIZE = "dist-size";
102
103 } // namespace InitParamKey
104
105 static inline void
106 panicFsOnlyPseudoInst(const char *name)
107 {
108 panic("Pseudo inst \"%s\" is only available in Full System mode.");
109 }
110
111 void
112 arm(ThreadContext *tc)
113 {
114 DPRINTF(PseudoInst, "PseudoInst::arm()\n");
115 if (!FullSystem)
116 panicFsOnlyPseudoInst("arm");
117
118 if (tc->getKernelStats())
119 tc->getKernelStats()->arm();
120 }
121
122 void
123 quiesce(ThreadContext *tc)
124 {
125 DPRINTF(PseudoInst, "PseudoInst::quiesce()\n");
126 tc->quiesce();
127 }
128
129 void
130 quiesceSkip(ThreadContext *tc)
131 {
132 DPRINTF(PseudoInst, "PseudoInst::quiesceSkip()\n");
133 tc->quiesceTick(tc->getCpuPtr()->nextCycle() + 1);
134 }
135
136 void
137 quiesceNs(ThreadContext *tc, uint64_t ns)
138 {
139 DPRINTF(PseudoInst, "PseudoInst::quiesceNs(%i)\n", ns);
140 tc->quiesceTick(curTick() + SimClock::Int::ns * ns);
141 }
142
143 void
144 quiesceCycles(ThreadContext *tc, uint64_t cycles)
145 {
146 DPRINTF(PseudoInst, "PseudoInst::quiesceCycles(%i)\n", cycles);
147 tc->quiesceTick(tc->getCpuPtr()->clockEdge(Cycles(cycles)));
148 }
149
150 uint64_t
151 quiesceTime(ThreadContext *tc)
152 {
153 DPRINTF(PseudoInst, "PseudoInst::quiesceTime()\n");
154
155 return (tc->readLastActivate() - tc->readLastSuspend()) /
156 SimClock::Int::ns;
157 }
158
159 uint64_t
160 rpns(ThreadContext *tc)
161 {
162 DPRINTF(PseudoInst, "PseudoInst::rpns()\n");
163 return curTick() / SimClock::Int::ns;
164 }
165
166 void
167 wakeCPU(ThreadContext *tc, uint64_t cpuid)
168 {
169 DPRINTF(PseudoInst, "PseudoInst::wakeCPU(%i)\n", cpuid);
170 System *sys = tc->getSystemPtr();
171
172 if (sys->numContexts() <= cpuid) {
173 warn("PseudoInst::wakeCPU(%i), cpuid greater than number of contexts"
174 "(%i)\n",cpuid, sys->numContexts());
175 return;
176 }
177
178 ThreadContext *other_tc = sys->threadContexts[cpuid];
179 if (other_tc->status() == ThreadContext::Suspended)
180 other_tc->activate();
181 }
182
183 void
184 m5exit(ThreadContext *tc, Tick delay)
185 {
186 DPRINTF(PseudoInst, "PseudoInst::m5exit(%i)\n", delay);
187 if (DistIface::readyToExit(delay)) {
188 Tick when = curTick() + delay * SimClock::Int::ns;
189 exitSimLoop("m5_exit instruction encountered", 0, when, 0, true);
190 }
191 }
192
193 void
194 m5fail(ThreadContext *tc, Tick delay, uint64_t code)
195 {
196 DPRINTF(PseudoInst, "PseudoInst::m5fail(%i, %i)\n", delay, code);
197 Tick when = curTick() + delay * SimClock::Int::ns;
198 exitSimLoop("m5_fail instruction encountered", code, when, 0, true);
199 }
200
201 void
202 loadsymbol(ThreadContext *tc)
203 {
204 DPRINTF(PseudoInst, "PseudoInst::loadsymbol()\n");
205 if (!FullSystem)
206 panicFsOnlyPseudoInst("loadsymbol");
207
208 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
209 if (filename.empty()) {
210 return;
211 }
212
213 std::string buffer;
214 ifstream file(filename.c_str());
215
216 if (!file)
217 fatal("file error: Can't open symbol table file %s\n", filename);
218
219 while (!file.eof()) {
220 getline(file, buffer);
221
222 if (buffer.empty())
223 continue;
224
225 string::size_type idx = buffer.find(' ');
226 if (idx == string::npos)
227 continue;
228
229 string address = "0x" + buffer.substr(0, idx);
230 eat_white(address);
231 if (address.empty())
232 continue;
233
234 // Skip over letter and space
235 string symbol = buffer.substr(idx + 3);
236 eat_white(symbol);
237 if (symbol.empty())
238 continue;
239
240 Addr addr;
241 if (!to_number(address, addr))
242 continue;
243
244 if (!tc->getSystemPtr()->workload->insertSymbol(
245 { Loader::Symbol::Binding::Global, symbol, addr })) {
246 continue;
247 }
248
249
250 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
251 }
252 file.close();
253 }
254
255 void
256 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
257 {
258 DPRINTF(PseudoInst, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
259 addr, symbolAddr);
260 if (!FullSystem)
261 panicFsOnlyPseudoInst("addSymbol");
262
263 std::string symbol;
264 tc->getVirtProxy().readString(symbol, symbolAddr);
265
266 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
267
268 tc->getSystemPtr()->workload->insertSymbol(
269 { Loader::Symbol::Binding::Global, symbol, addr });
270 Loader::debugSymbolTable.insert(
271 { Loader::Symbol::Binding::Global, symbol, addr });
272 }
273
274 uint64_t
275 initParam(ThreadContext *tc, uint64_t key_str1, uint64_t key_str2)
276 {
277 DPRINTF(PseudoInst, "PseudoInst::initParam() key:%s%s\n", (char *)&key_str1,
278 (char *)&key_str2);
279 if (!FullSystem) {
280 panicFsOnlyPseudoInst("initParam");
281 return 0;
282 }
283
284 // The key parameter string is passed in via two 64-bit registers. We copy
285 // out the characters from the 64-bit integer variables here, and
286 // concatenate them in the key character buffer
287 const int len = 2 * sizeof(uint64_t) + 1;
288 char key[len];
289 memset(key, '\0', len);
290
291 std::array<uint64_t, 2> key_regs = { key_str1, key_str2 };
292 key_regs = letoh(key_regs);
293 memcpy(key, key_regs.data(), sizeof(key_regs));
294
295 // Check key parameter to figure out what to return.
296 const std::string key_str(key);
297 if (key == InitParamKey::DEFAULT)
298 return tc->getCpuPtr()->system->init_param;
299 else if (key == InitParamKey::DIST_RANK)
300 return DistIface::rankParam();
301 else if (key == InitParamKey::DIST_SIZE)
302 return DistIface::sizeParam();
303 else
304 panic("Unknown key for initparam pseudo instruction:\"%s\"", key_str);
305 }
306
307
308 void
309 resetstats(ThreadContext *tc, Tick delay, Tick period)
310 {
311 DPRINTF(PseudoInst, "PseudoInst::resetstats(%i, %i)\n", delay, period);
312 if (!tc->getCpuPtr()->params()->do_statistics_insts)
313 return;
314
315
316 Tick when = curTick() + delay * SimClock::Int::ns;
317 Tick repeat = period * SimClock::Int::ns;
318
319 Stats::schedStatEvent(false, true, when, repeat);
320 }
321
322 void
323 dumpstats(ThreadContext *tc, Tick delay, Tick period)
324 {
325 DPRINTF(PseudoInst, "PseudoInst::dumpstats(%i, %i)\n", delay, period);
326 if (!tc->getCpuPtr()->params()->do_statistics_insts)
327 return;
328
329
330 Tick when = curTick() + delay * SimClock::Int::ns;
331 Tick repeat = period * SimClock::Int::ns;
332
333 Stats::schedStatEvent(true, false, when, repeat);
334 }
335
336 void
337 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
338 {
339 DPRINTF(PseudoInst, "PseudoInst::dumpresetstats(%i, %i)\n", delay, period);
340 if (!tc->getCpuPtr()->params()->do_statistics_insts)
341 return;
342
343
344 Tick when = curTick() + delay * SimClock::Int::ns;
345 Tick repeat = period * SimClock::Int::ns;
346
347 Stats::schedStatEvent(true, true, when, repeat);
348 }
349
350 void
351 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
352 {
353 DPRINTF(PseudoInst, "PseudoInst::m5checkpoint(%i, %i)\n", delay, period);
354 if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
355 return;
356
357 if (DistIface::readyToCkpt(delay, period)) {
358 Tick when = curTick() + delay * SimClock::Int::ns;
359 Tick repeat = period * SimClock::Int::ns;
360 exitSimLoop("checkpoint", 0, when, repeat);
361 }
362 }
363
364 uint64_t
365 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
366 {
367 DPRINTF(PseudoInst, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
368 vaddr, len, offset);
369 if (!FullSystem) {
370 panicFsOnlyPseudoInst("readfile");
371 return 0;
372 }
373
374 const string &file = tc->getSystemPtr()->params()->readfile;
375 if (file.empty()) {
376 return ULL(0);
377 }
378
379 uint64_t result = 0;
380
381 int fd = ::open(file.c_str(), O_RDONLY, 0);
382 if (fd < 0)
383 panic("could not open file %s\n", file);
384
385 if (::lseek(fd, offset, SEEK_SET) < 0)
386 panic("could not seek: %s", strerror(errno));
387
388 char *buf = new char[len];
389 char *p = buf;
390 while (len > 0) {
391 int bytes = ::read(fd, p, len);
392 if (bytes <= 0)
393 break;
394
395 p += bytes;
396 result += bytes;
397 len -= bytes;
398 }
399
400 close(fd);
401 tc->getVirtProxy().writeBlob(vaddr, buf, result);
402 delete [] buf;
403 return result;
404 }
405
406 uint64_t
407 writefile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset,
408 Addr filename_addr)
409 {
410 DPRINTF(PseudoInst, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
411 vaddr, len, offset, filename_addr);
412
413 // copy out target filename
414 std::string filename;
415 tc->getVirtProxy().readString(filename, filename_addr);
416
417 OutputStream *out;
418 if (offset == 0) {
419 // create a new file (truncate)
420 out = simout.create(filename, true, true);
421 } else {
422 // do not truncate file if offset is non-zero
423 // (ios::in flag is required as well to keep the existing data
424 // intact, otherwise existing data will be zeroed out.)
425 out = simout.open(filename, ios::in | ios::out | ios::binary, true);
426 }
427
428 ostream *os(out->stream());
429 if (!os)
430 panic("could not open file %s\n", filename);
431
432 // seek to offset
433 os->seekp(offset);
434
435 // copy out data and write to file
436 char *buf = new char[len];
437 tc->getVirtProxy().readBlob(vaddr, buf, len);
438 os->write(buf, len);
439 if (os->fail() || os->bad())
440 panic("Error while doing writefile!\n");
441
442 simout.close(out);
443
444 delete [] buf;
445
446 return len;
447 }
448
449 void
450 debugbreak(ThreadContext *tc)
451 {
452 DPRINTF(PseudoInst, "PseudoInst::debugbreak()\n");
453 Debug::breakpoint();
454 }
455
456 void
457 switchcpu(ThreadContext *tc)
458 {
459 DPRINTF(PseudoInst, "PseudoInst::switchcpu()\n");
460 exitSimLoop("switchcpu");
461 }
462
463 /*
464 * This function is executed when the simulation is executing the syscall
465 * handler in System Emulation mode.
466 */
467 void
468 m5Syscall(ThreadContext *tc)
469 {
470 DPRINTF(PseudoInst, "PseudoInst::m5Syscall()\n");
471 Fault fault;
472 tc->syscall(&fault);
473 }
474
475 void
476 togglesync(ThreadContext *tc)
477 {
478 DPRINTF(PseudoInst, "PseudoInst::togglesync()\n");
479 DistIface::toggleSync(tc);
480 }
481
482 //
483 // This function is executed when annotated work items begin. Depending on
484 // what the user specified at the command line, the simulation may exit and/or
485 // take a checkpoint when a certain work item begins.
486 //
487 void
488 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
489 {
490 DPRINTF(PseudoInst, "PseudoInst::workbegin(%i, %i)\n", workid, threadid);
491 System *sys = tc->getSystemPtr();
492 const System::Params *params = sys->params();
493
494 if (params->exit_on_work_items) {
495 exitSimLoop("workbegin", static_cast<int>(workid));
496 return;
497 }
498
499 DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
500 threadid);
501 tc->getCpuPtr()->workItemBegin();
502 sys->workItemBegin(threadid, workid);
503
504 //
505 // If specified, determine if this is the specific work item the user
506 // identified
507 //
508 if (params->work_item_id == -1 || params->work_item_id == workid) {
509
510 uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
511 int cpuId = tc->getCpuPtr()->cpuId();
512
513 if (params->work_cpus_ckpt_count != 0 &&
514 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
515 //
516 // If active cpus equals checkpoint count, create checkpoint
517 //
518 exitSimLoop("checkpoint");
519 }
520
521 if (systemWorkBeginCount == params->work_begin_ckpt_count) {
522 //
523 // Note: the string specified as the cause of the exit event must
524 // exactly equal "checkpoint" inorder to create a checkpoint
525 //
526 exitSimLoop("checkpoint");
527 }
528
529 if (systemWorkBeginCount == params->work_begin_exit_count) {
530 //
531 // If a certain number of work items started, exit simulation
532 //
533 exitSimLoop("work started count reach");
534 }
535
536 if (cpuId == params->work_begin_cpu_id_exit) {
537 //
538 // If work started on the cpu id specified, exit simulation
539 //
540 exitSimLoop("work started on specific cpu");
541 }
542 }
543 }
544
545 //
546 // This function is executed when annotated work items end. Depending on
547 // what the user specified at the command line, the simulation may exit and/or
548 // take a checkpoint when a certain work item ends.
549 //
550 void
551 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
552 {
553 DPRINTF(PseudoInst, "PseudoInst::workend(%i, %i)\n", workid, threadid);
554 System *sys = tc->getSystemPtr();
555 const System::Params *params = sys->params();
556
557 if (params->exit_on_work_items) {
558 exitSimLoop("workend", static_cast<int>(workid));
559 return;
560 }
561
562 DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
563 tc->getCpuPtr()->workItemEnd();
564 sys->workItemEnd(threadid, workid);
565
566 //
567 // If specified, determine if this is the specific work item the user
568 // identified
569 //
570 if (params->work_item_id == -1 || params->work_item_id == workid) {
571
572 uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
573 int cpuId = tc->getCpuPtr()->cpuId();
574
575 if (params->work_cpus_ckpt_count != 0 &&
576 sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
577 //
578 // If active cpus equals checkpoint count, create checkpoint
579 //
580 exitSimLoop("checkpoint");
581 }
582
583 if (params->work_end_ckpt_count != 0 &&
584 systemWorkEndCount == params->work_end_ckpt_count) {
585 //
586 // If total work items completed equals checkpoint count, create
587 // checkpoint
588 //
589 exitSimLoop("checkpoint");
590 }
591
592 if (params->work_end_exit_count != 0 &&
593 systemWorkEndCount == params->work_end_exit_count) {
594 //
595 // If total work items completed equals exit count, exit simulation
596 //
597 exitSimLoop("work items exit count reached");
598 }
599 }
600 }
601
602 } // namespace PseudoInst