2 * Copyright (c) 2010-2012 ARM Limited
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
14 * Copyright (c) 2011 Advanced Micro Devices, Inc.
15 * Copyright (c) 2003-2006 The Regents of The University of Michigan
16 * All rights reserved.
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 * Authors: Nathan Binkert
52 #include "arch/kernel_stats.hh"
53 #include "arch/utility.hh"
54 #include "arch/vtophys.hh"
55 #include "base/debug.hh"
56 #include "base/output.hh"
57 #include "config/the_isa.hh"
58 #include "cpu/base.hh"
59 #include "cpu/quiesce_event.hh"
60 #include "cpu/thread_context.hh"
61 #include "debug/Loader.hh"
62 #include "debug/PseudoInst.hh"
63 #include "debug/Quiesce.hh"
64 #include "debug/WorkItems.hh"
65 #include "params/BaseCPU.hh"
66 #include "sim/full_system.hh"
67 #include "sim/pseudo_inst.hh"
68 #include "sim/serialize.hh"
69 #include "sim/sim_events.hh"
70 #include "sim/sim_exit.hh"
71 #include "sim/stat_control.hh"
72 #include "sim/stats.hh"
73 #include "sim/system.hh"
74 #include "sim/vptr.hh"
78 using namespace Stats
;
79 using namespace TheISA
;
81 namespace PseudoInst
{
84 panicFsOnlyPseudoInst(const char *name
)
86 panic("Pseudo inst \"%s\" is only available in Full System mode.");
90 pseudoInst(ThreadContext
*tc
, uint8_t func
, uint8_t subfunc
)
94 DPRINTF(PseudoInst
, "PseudoInst::pseudoInst(%i, %i)\n", func
, subfunc
);
96 // We need to do this in a slightly convoluted way since
97 // getArgument() might have side-effects on arg_num. We could have
98 // used the Argument class, but due to the possible side effects
99 // from getArgument, it'd most likely break.
101 for (int i
= 0; i
< sizeof(args
) / sizeof(*args
); ++i
) {
102 args
[arg_num
] = getArgument(tc
, arg_num
, sizeof(uint64_t), false);
107 case 0x00: // arm_func
111 case 0x01: // quiesce_func
115 case 0x02: // quiescens_func
119 case 0x03: // quiescecycle_func
120 quiesceNs(tc
, args
[0]);
123 case 0x04: // quiescetime_func
124 return quiesceTime(tc
);
126 case 0x07: // rpns_func
129 case 0x09: // wakecpu_func
130 wakeCPU(tc
, args
[0]);
133 case 0x21: // exit_func
138 m5fail(tc
, args
[0], args
[1]);
141 case 0x30: // initparam_func
142 return initParam(tc
);
144 case 0x31: // loadsymbol_func
148 case 0x40: // resetstats_func
149 resetstats(tc
, args
[0], args
[1]);
152 case 0x41: // dumpstats_func
153 dumpstats(tc
, args
[0], args
[1]);
156 case 0x42: // dumprststats_func
157 dumpresetstats(tc
, args
[0], args
[1]);
160 case 0x43: // ckpt_func
161 m5checkpoint(tc
, args
[0], args
[1]);
164 case 0x4f: // writefile_func
165 return writefile(tc
, args
[0], args
[1], args
[2], args
[3]);
167 case 0x50: // readfile_func
168 return readfile(tc
, args
[0], args
[1], args
[2]);
170 case 0x51: // debugbreak_func
174 case 0x52: // switchcpu_func
178 case 0x53: // addsymbol_func
179 addsymbol(tc
, args
[0], args
[1]);
182 case 0x54: // panic_func
183 panic("M5 panic instruction called at %s\n", tc
->pcState());
185 case 0x5a: // work_begin_func
186 workbegin(tc
, args
[0], args
[1]);
189 case 0x5b: // work_end_func
190 workend(tc
, args
[0], args
[1]);
193 case 0x55: // annotate_func
194 case 0x56: // reserved2_func
195 case 0x57: // reserved3_func
196 case 0x58: // reserved4_func
197 case 0x59: // reserved5_func
198 warn("Unimplemented m5 op (0x%x)\n", func
);
202 warn("Unhandled m5 op: 0x%x\n", func
);
210 arm(ThreadContext
*tc
)
212 DPRINTF(PseudoInst
, "PseudoInst::arm()\n");
214 panicFsOnlyPseudoInst("arm");
216 if (tc
->getKernelStats())
217 tc
->getKernelStats()->arm();
221 quiesce(ThreadContext
*tc
)
223 DPRINTF(PseudoInst
, "PseudoInst::quiesce()\n");
225 panicFsOnlyPseudoInst("quiesce");
227 if (!tc
->getCpuPtr()->params()->do_quiesce
)
230 DPRINTF(Quiesce
, "%s: quiesce()\n", tc
->getCpuPtr()->name());
233 if (tc
->getKernelStats())
234 tc
->getKernelStats()->quiesce();
238 quiesceSkip(ThreadContext
*tc
)
240 DPRINTF(PseudoInst
, "PseudoInst::quiesceSkip()\n");
242 panicFsOnlyPseudoInst("quiesceSkip");
244 BaseCPU
*cpu
= tc
->getCpuPtr();
246 if (!cpu
->params()->do_quiesce
)
249 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
251 Tick resume
= curTick() + 1;
253 cpu
->reschedule(quiesceEvent
, resume
, true);
255 DPRINTF(Quiesce
, "%s: quiesceSkip() until %d\n",
256 cpu
->name(), resume
);
259 if (tc
->getKernelStats())
260 tc
->getKernelStats()->quiesce();
264 quiesceNs(ThreadContext
*tc
, uint64_t ns
)
266 DPRINTF(PseudoInst
, "PseudoInst::quiesceNs(%i)\n", ns
);
268 panicFsOnlyPseudoInst("quiesceNs");
270 BaseCPU
*cpu
= tc
->getCpuPtr();
272 if (!cpu
->params()->do_quiesce
|| ns
== 0)
275 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
277 Tick resume
= curTick() + SimClock::Int::ns
* ns
;
279 cpu
->reschedule(quiesceEvent
, resume
, true);
281 DPRINTF(Quiesce
, "%s: quiesceNs(%d) until %d\n",
282 cpu
->name(), ns
, resume
);
285 if (tc
->getKernelStats())
286 tc
->getKernelStats()->quiesce();
290 quiesceCycles(ThreadContext
*tc
, uint64_t cycles
)
292 DPRINTF(PseudoInst
, "PseudoInst::quiesceCycles(%i)\n", cycles
);
294 panicFsOnlyPseudoInst("quiesceCycles");
296 BaseCPU
*cpu
= tc
->getCpuPtr();
298 if (!cpu
->params()->do_quiesce
|| cycles
== 0)
301 EndQuiesceEvent
*quiesceEvent
= tc
->getQuiesceEvent();
303 Tick resume
= cpu
->clockEdge(Cycles(cycles
));
305 cpu
->reschedule(quiesceEvent
, resume
, true);
307 DPRINTF(Quiesce
, "%s: quiesceCycles(%d) until %d\n",
308 cpu
->name(), cycles
, resume
);
311 if (tc
->getKernelStats())
312 tc
->getKernelStats()->quiesce();
316 quiesceTime(ThreadContext
*tc
)
318 DPRINTF(PseudoInst
, "PseudoInst::quiesceTime()\n");
320 panicFsOnlyPseudoInst("quiesceTime");
324 return (tc
->readLastActivate() - tc
->readLastSuspend()) /
329 rpns(ThreadContext
*tc
)
331 DPRINTF(PseudoInst
, "PseudoInst::rpns()\n");
332 return curTick() / SimClock::Int::ns
;
336 wakeCPU(ThreadContext
*tc
, uint64_t cpuid
)
338 DPRINTF(PseudoInst
, "PseudoInst::wakeCPU(%i)\n", cpuid
);
339 System
*sys
= tc
->getSystemPtr();
340 ThreadContext
*other_tc
= sys
->threadContexts
[cpuid
];
341 if (other_tc
->status() == ThreadContext::Suspended
)
342 other_tc
->activate();
346 m5exit(ThreadContext
*tc
, Tick delay
)
348 DPRINTF(PseudoInst
, "PseudoInst::m5exit(%i)\n", delay
);
349 Tick when
= curTick() + delay
* SimClock::Int::ns
;
350 exitSimLoop("m5_exit instruction encountered", 0, when
, 0, true);
354 m5fail(ThreadContext
*tc
, Tick delay
, uint64_t code
)
356 DPRINTF(PseudoInst
, "PseudoInst::m5fail(%i, %i)\n", delay
, code
);
357 Tick when
= curTick() + delay
* SimClock::Int::ns
;
358 exitSimLoop("m5_fail instruction encountered", code
, when
, 0, true);
362 loadsymbol(ThreadContext
*tc
)
364 DPRINTF(PseudoInst
, "PseudoInst::loadsymbol()\n");
366 panicFsOnlyPseudoInst("loadsymbol");
368 const string
&filename
= tc
->getCpuPtr()->system
->params()->symbolfile
;
369 if (filename
.empty()) {
374 ifstream
file(filename
.c_str());
377 fatal("file error: Can't open symbol table file %s\n", filename
);
379 while (!file
.eof()) {
380 getline(file
, buffer
);
385 string::size_type idx
= buffer
.find(' ');
386 if (idx
== string::npos
)
389 string address
= "0x" + buffer
.substr(0, idx
);
394 // Skip over letter and space
395 string symbol
= buffer
.substr(idx
+ 3);
401 if (!to_number(address
, addr
))
404 if (!tc
->getSystemPtr()->kernelSymtab
->insert(addr
, symbol
))
408 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
414 addsymbol(ThreadContext
*tc
, Addr addr
, Addr symbolAddr
)
416 DPRINTF(PseudoInst
, "PseudoInst::addsymbol(0x%x, 0x%x)\n",
419 panicFsOnlyPseudoInst("addSymbol");
422 CopyStringOut(tc
, symb
, symbolAddr
, 100);
423 std::string
symbol(symb
);
425 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
427 tc
->getSystemPtr()->kernelSymtab
->insert(addr
,symbol
);
428 debugSymbolTable
->insert(addr
,symbol
);
432 initParam(ThreadContext
*tc
)
434 DPRINTF(PseudoInst
, "PseudoInst::initParam()\n");
436 panicFsOnlyPseudoInst("initParam");
440 return tc
->getCpuPtr()->system
->init_param
;
445 resetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
447 DPRINTF(PseudoInst
, "PseudoInst::resetstats(%i, %i)\n", delay
, period
);
448 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
452 Tick when
= curTick() + delay
* SimClock::Int::ns
;
453 Tick repeat
= period
* SimClock::Int::ns
;
455 Stats::schedStatEvent(false, true, when
, repeat
);
459 dumpstats(ThreadContext
*tc
, Tick delay
, Tick period
)
461 DPRINTF(PseudoInst
, "PseudoInst::dumpstats(%i, %i)\n", delay
, period
);
462 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
466 Tick when
= curTick() + delay
* SimClock::Int::ns
;
467 Tick repeat
= period
* SimClock::Int::ns
;
469 Stats::schedStatEvent(true, false, when
, repeat
);
473 dumpresetstats(ThreadContext
*tc
, Tick delay
, Tick period
)
475 DPRINTF(PseudoInst
, "PseudoInst::dumpresetstats(%i, %i)\n", delay
, period
);
476 if (!tc
->getCpuPtr()->params()->do_statistics_insts
)
480 Tick when
= curTick() + delay
* SimClock::Int::ns
;
481 Tick repeat
= period
* SimClock::Int::ns
;
483 Stats::schedStatEvent(true, true, when
, repeat
);
487 m5checkpoint(ThreadContext
*tc
, Tick delay
, Tick period
)
489 DPRINTF(PseudoInst
, "PseudoInst::m5checkpoint(%i, %i)\n", delay
, period
);
490 if (!tc
->getCpuPtr()->params()->do_checkpoint_insts
)
493 Tick when
= curTick() + delay
* SimClock::Int::ns
;
494 Tick repeat
= period
* SimClock::Int::ns
;
496 exitSimLoop("checkpoint", 0, when
, repeat
);
500 readfile(ThreadContext
*tc
, Addr vaddr
, uint64_t len
, uint64_t offset
)
502 DPRINTF(PseudoInst
, "PseudoInst::readfile(0x%x, 0x%x, 0x%x)\n",
505 panicFsOnlyPseudoInst("readfile");
509 const string
&file
= tc
->getSystemPtr()->params()->readfile
;
516 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
518 panic("could not open file %s\n", file
);
520 if (::lseek(fd
, offset
, SEEK_SET
) < 0)
521 panic("could not seek: %s", strerror(errno
));
523 char *buf
= new char[len
];
526 int bytes
= ::read(fd
, p
, len
);
536 CopyIn(tc
, vaddr
, buf
, result
);
542 writefile(ThreadContext
*tc
, Addr vaddr
, uint64_t len
, uint64_t offset
,
545 DPRINTF(PseudoInst
, "PseudoInst::writefile(0x%x, 0x%x, 0x%x, 0x%x)\n",
546 vaddr
, len
, offset
, filename_addr
);
549 // copy out target filename
551 std::string filename
;
552 CopyStringOut(tc
, fn
, filename_addr
, 100);
553 filename
= std::string(fn
);
556 // create a new file (truncate)
557 os
= simout
.create(filename
, true);
559 // do not truncate file if offset is non-zero
560 // (ios::in flag is required as well to keep the existing data
561 // intact, otherwise existing data will be zeroed out.)
562 os
= simout
.openFile(simout
.directory() + filename
,
563 ios::in
| ios::out
| ios::binary
);
566 panic("could not open file %s\n", filename
);
571 // copy out data and write to file
572 char *buf
= new char[len
];
573 CopyOut(tc
, buf
, vaddr
, len
);
575 if (os
->fail() || os
->bad())
576 panic("Error while doing writefile!\n");
586 debugbreak(ThreadContext
*tc
)
588 DPRINTF(PseudoInst
, "PseudoInst::debugbreak()\n");
593 switchcpu(ThreadContext
*tc
)
595 DPRINTF(PseudoInst
, "PseudoInst::switchcpu()\n");
596 exitSimLoop("switchcpu");
600 // This function is executed when annotated work items begin. Depending on
601 // what the user specified at the command line, the simulation may exit and/or
602 // take a checkpoint when a certain work item begins.
605 workbegin(ThreadContext
*tc
, uint64_t workid
, uint64_t threadid
)
607 DPRINTF(PseudoInst
, "PseudoInst::workbegin(%i, %i)\n", workid
, threadid
);
608 tc
->getCpuPtr()->workItemBegin();
609 System
*sys
= tc
->getSystemPtr();
610 const System::Params
*params
= sys
->params();
611 sys
->workItemBegin(threadid
, workid
);
613 DPRINTF(WorkItems
, "Work Begin workid: %d, threadid %d\n", workid
,
617 // If specified, determine if this is the specific work item the user
620 if (params
->work_item_id
== -1 || params
->work_item_id
== workid
) {
622 uint64_t systemWorkBeginCount
= sys
->incWorkItemsBegin();
623 int cpuId
= tc
->getCpuPtr()->cpuId();
625 if (params
->work_cpus_ckpt_count
!= 0 &&
626 sys
->markWorkItem(cpuId
) >= params
->work_cpus_ckpt_count
) {
628 // If active cpus equals checkpoint count, create checkpoint
630 exitSimLoop("checkpoint");
633 if (systemWorkBeginCount
== params
->work_begin_ckpt_count
) {
635 // Note: the string specified as the cause of the exit event must
636 // exactly equal "checkpoint" inorder to create a checkpoint
638 exitSimLoop("checkpoint");
641 if (systemWorkBeginCount
== params
->work_begin_exit_count
) {
643 // If a certain number of work items started, exit simulation
645 exitSimLoop("work started count reach");
648 if (cpuId
== params
->work_begin_cpu_id_exit
) {
650 // If work started on the cpu id specified, exit simulation
652 exitSimLoop("work started on specific cpu");
658 // This function is executed when annotated work items end. Depending on
659 // what the user specified at the command line, the simulation may exit and/or
660 // take a checkpoint when a certain work item ends.
663 workend(ThreadContext
*tc
, uint64_t workid
, uint64_t threadid
)
665 DPRINTF(PseudoInst
, "PseudoInst::workend(%i, %i)\n", workid
, threadid
);
666 tc
->getCpuPtr()->workItemEnd();
667 System
*sys
= tc
->getSystemPtr();
668 const System::Params
*params
= sys
->params();
669 sys
->workItemEnd(threadid
, workid
);
671 DPRINTF(WorkItems
, "Work End workid: %d, threadid %d\n", workid
, threadid
);
674 // If specified, determine if this is the specific work item the user
677 if (params
->work_item_id
== -1 || params
->work_item_id
== workid
) {
679 uint64_t systemWorkEndCount
= sys
->incWorkItemsEnd();
680 int cpuId
= tc
->getCpuPtr()->cpuId();
682 if (params
->work_cpus_ckpt_count
!= 0 &&
683 sys
->markWorkItem(cpuId
) >= params
->work_cpus_ckpt_count
) {
685 // If active cpus equals checkpoint count, create checkpoint
687 exitSimLoop("checkpoint");
690 if (params
->work_end_ckpt_count
!= 0 &&
691 systemWorkEndCount
== params
->work_end_ckpt_count
) {
693 // If total work items completed equals checkpoint count, create
696 exitSimLoop("checkpoint");
699 if (params
->work_end_exit_count
!= 0 &&
700 systemWorkEndCount
== params
->work_end_exit_count
) {
702 // If total work items completed equals exit count, exit simulation
704 exitSimLoop("work items exit count reached");
709 } // namespace PseudoInst