src/sim/pseudo_inst.cc

   1 /*
   2  * Copyright (c) 2010 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2011 Advanced Micro Devices, Inc.
  15  * Copyright (c) 2003-2006 The Regents of The University of Michigan
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Nathan Binkert
  42  */
  43
  44 #include <fcntl.h>
  45 #include <unistd.h>
  46
  47 #include <cerrno>
  48 #include <fstream>
  49 #include <string>
  50
  51 #include "arch/kernel_stats.hh"
  52 #include "arch/vtophys.hh"
  53 #include "base/debug.hh"
  54 #include "config/full_system.hh"
  55 #include "config/the_isa.hh"
  56 #include "cpu/base.hh"
  57 #include "cpu/quiesce_event.hh"
  58 #include "cpu/thread_context.hh"
  59 #include "debug/Loader.hh"
  60 #include "debug/Quiesce.hh"
  61 #include "debug/WorkItems.hh"
  62 #include "params/BaseCPU.hh"
  63 #include "sim/full_system.hh"
  64 #include "sim/pseudo_inst.hh"
  65 #include "sim/serialize.hh"
  66 #include "sim/sim_events.hh"
  67 #include "sim/sim_exit.hh"
  68 #include "sim/stat_control.hh"
  69 #include "sim/stats.hh"
  70 #include "sim/system.hh"
  71 #include "sim/vptr.hh"
  72
  73 using namespace std;
  74
  75 using namespace Stats;
  76 using namespace TheISA;
  77
  78 namespace PseudoInst {
  79
  80 static inline void
  81 panicFsOnlyPseudoInst(const char *name)
  82 {
  83     panic("Pseudo inst \"%s\" is only available in Full System mode.");
  84 }
  85
  86 void
  87 arm(ThreadContext *tc)
  88 {
  89     if (FullSystem) {
  90         if (tc->getKernelStats())
  91             tc->getKernelStats()->arm();
  92     } else {
  93         panicFsOnlyPseudoInst("arm");
  94     }
  95 }
  96
  97 void
  98 quiesce(ThreadContext *tc)
  99 {
 100     if (FullSystem) {
 101         if (!tc->getCpuPtr()->params()->do_quiesce)
 102             return;
 103
 104         DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
 105
 106         tc->suspend();
 107         if (tc->getKernelStats())
 108             tc->getKernelStats()->quiesce();
 109     } else {
 110         panicFsOnlyPseudoInst("quiesce");
 111     }
 112 }
 113
 114 void
 115 quiesceSkip(ThreadContext *tc)
 116 {
 117     if (FullSystem) {
 118         BaseCPU *cpu = tc->getCpuPtr();
 119
 120         if (!cpu->params()->do_quiesce)
 121             return;
 122
 123         EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 124
 125         Tick resume = curTick() + 1;
 126
 127         cpu->reschedule(quiesceEvent, resume, true);
 128
 129         DPRINTF(Quiesce, "%s: quiesceSkip() until %d\n",
 130                 cpu->name(), resume);
 131
 132         tc->suspend();
 133         if (tc->getKernelStats())
 134             tc->getKernelStats()->quiesce();
 135     } else {
 136         panicFsOnlyPseudoInst("quiesceSkip");
 137     }
 138 }
 139
 140 void
 141 quiesceNs(ThreadContext *tc, uint64_t ns)
 142 {
 143     if (FullSystem) {
 144         BaseCPU *cpu = tc->getCpuPtr();
 145
 146         if (!cpu->params()->do_quiesce || ns == 0)
 147             return;
 148
 149         EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 150
 151         Tick resume = curTick() + SimClock::Int::ns * ns;
 152
 153         cpu->reschedule(quiesceEvent, resume, true);
 154
 155         DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
 156                 cpu->name(), ns, resume);
 157
 158         tc->suspend();
 159         if (tc->getKernelStats())
 160             tc->getKernelStats()->quiesce();
 161     } else {
 162         panicFsOnlyPseudoInst("quiesceNs");
 163     }
 164 }
 165
 166 void
 167 quiesceCycles(ThreadContext *tc, uint64_t cycles)
 168 {
 169     if (FullSystem) {
 170         BaseCPU *cpu = tc->getCpuPtr();
 171
 172         if (!cpu->params()->do_quiesce || cycles == 0)
 173             return;
 174
 175         EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
 176
 177         Tick resume = curTick() + cpu->ticks(cycles);
 178
 179         cpu->reschedule(quiesceEvent, resume, true);
 180
 181         DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
 182                 cpu->name(), cycles, resume);
 183
 184         tc->suspend();
 185         if (tc->getKernelStats())
 186             tc->getKernelStats()->quiesce();
 187     } else {
 188         panicFsOnlyPseudoInst("quiesceCycles");
 189     }
 190 }
 191
 192 uint64_t
 193 quiesceTime(ThreadContext *tc)
 194 {
 195     if (FullSystem) {
 196         return (tc->readLastActivate() - tc->readLastSuspend()) /
 197             SimClock::Int::ns;
 198     } else {
 199         panicFsOnlyPseudoInst("quiesceTime");
 200         return 0;
 201     }
 202 }
 203
 204 uint64_t
 205 rpns(ThreadContext *tc)
 206 {
 207     return curTick() / SimClock::Int::ns;
 208 }
 209
 210 void
 211 wakeCPU(ThreadContext *tc, uint64_t cpuid)
 212 {
 213     System *sys = tc->getSystemPtr();
 214     ThreadContext *other_tc = sys->threadContexts[cpuid];
 215     if (other_tc->status() == ThreadContext::Suspended)
 216         other_tc->activate();
 217 }
 218
 219 void
 220 m5exit(ThreadContext *tc, Tick delay)
 221 {
 222     Tick when = curTick() + delay * SimClock::Int::ns;
 223     exitSimLoop("m5_exit instruction encountered", 0, when);
 224 }
 225
 226 void
 227 loadsymbol(ThreadContext *tc)
 228 {
 229     if (FullSystem) {
 230         const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
 231         if (filename.empty()) {
 232             return;
 233         }
 234
 235         std::string buffer;
 236         ifstream file(filename.c_str());
 237
 238         if (!file)
 239             fatal("file error: Can't open symbol table file %s\n", filename);
 240
 241         while (!file.eof()) {
 242             getline(file, buffer);
 243
 244             if (buffer.empty())
 245                 continue;
 246
 247             string::size_type idx = buffer.find(' ');
 248             if (idx == string::npos)
 249                 continue;
 250
 251             string address = "0x" + buffer.substr(0, idx);
 252             eat_white(address);
 253             if (address.empty())
 254                 continue;
 255
 256             // Skip over letter and space
 257             string symbol = buffer.substr(idx + 3);
 258             eat_white(symbol);
 259             if (symbol.empty())
 260                 continue;
 261
 262             Addr addr;
 263             if (!to_number(address, addr))
 264                 continue;
 265
 266             if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
 267                 continue;
 268
 269
 270             DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 271         }
 272         file.close();
 273     } else {
 274         panicFsOnlyPseudoInst("loadsymbol");
 275     }
 276 }
 277
 278 void
 279 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
 280 {
 281     if (FullSystem) {
 282         char symb[100];
 283         CopyStringOut(tc, symb, symbolAddr, 100);
 284         std::string symbol(symb);
 285
 286         DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
 287
 288         tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
 289         debugSymbolTable->insert(addr,symbol);
 290     } else {
 291         panicFsOnlyPseudoInst("addSymbol");
 292     }
 293 }
 294
 295 uint64_t
 296 initParam(ThreadContext *tc)
 297 {
 298     if (FullSystem) {
 299         return tc->getCpuPtr()->system->init_param;
 300     } else {
 301         panicFsOnlyPseudoInst("initParam");
 302         return 0;
 303     }
 304 }
 305
 306
 307 void
 308 resetstats(ThreadContext *tc, Tick delay, Tick period)
 309 {
 310     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 311         return;
 312
 313
 314     Tick when = curTick() + delay * SimClock::Int::ns;
 315     Tick repeat = period * SimClock::Int::ns;
 316
 317     Stats::schedStatEvent(false, true, when, repeat);
 318 }
 319
 320 void
 321 dumpstats(ThreadContext *tc, Tick delay, Tick period)
 322 {
 323     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 324         return;
 325
 326
 327     Tick when = curTick() + delay * SimClock::Int::ns;
 328     Tick repeat = period * SimClock::Int::ns;
 329
 330     Stats::schedStatEvent(true, false, when, repeat);
 331 }
 332
 333 void
 334 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
 335 {
 336     if (!tc->getCpuPtr()->params()->do_statistics_insts)
 337         return;
 338
 339
 340     Tick when = curTick() + delay * SimClock::Int::ns;
 341     Tick repeat = period * SimClock::Int::ns;
 342
 343     Stats::schedStatEvent(true, true, when, repeat);
 344 }
 345
 346 void
 347 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
 348 {
 349     if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
 350         return;
 351
 352     Tick when = curTick() + delay * SimClock::Int::ns;
 353     Tick repeat = period * SimClock::Int::ns;
 354
 355     exitSimLoop("checkpoint", 0, when, repeat);
 356 }
 357
 358 uint64_t
 359 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
 360 {
 361     if (FullSystem) {
 362         const string &file = tc->getSystemPtr()->params()->readfile;
 363         if (file.empty()) {
 364             return ULL(0);
 365         }
 366
 367         uint64_t result = 0;
 368
 369         int fd = ::open(file.c_str(), O_RDONLY, 0);
 370         if (fd < 0)
 371             panic("could not open file %s\n", file);
 372
 373         if (::lseek(fd, offset, SEEK_SET) < 0)
 374             panic("could not seek: %s", strerror(errno));
 375
 376         char *buf = new char[len];
 377         char *p = buf;
 378         while (len > 0) {
 379             int bytes = ::read(fd, p, len);
 380             if (bytes <= 0)
 381                 break;
 382
 383             p += bytes;
 384             result += bytes;
 385             len -= bytes;
 386         }
 387
 388         close(fd);
 389         CopyIn(tc, vaddr, buf, result);
 390         delete [] buf;
 391         return result;
 392     } else {
 393         panicFsOnlyPseudoInst("readfile");
 394         return 0;
 395     }
 396 }
 397
 398 void
 399 debugbreak(ThreadContext *tc)
 400 {
 401     Debug::breakpoint();
 402 }
 403
 404 void
 405 switchcpu(ThreadContext *tc)
 406 {
 407     exitSimLoop("switchcpu");
 408 }
 409
 410 //
 411 // This function is executed when annotated work items begin.  Depending on
 412 // what the user specified at the command line, the simulation may exit and/or
 413 // take a checkpoint when a certain work item begins.
 414 //
 415 void
 416 workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid)
 417 {
 418     tc->getCpuPtr()->workItemBegin();
 419     System *sys = tc->getSystemPtr();
 420     const System::Params *params = sys->params();
 421
 422     DPRINTF(WorkItems, "Work Begin workid: %d, threadid %d\n", workid,
 423             threadid);
 424
 425     //
 426     // If specified, determine if this is the specific work item the user
 427     // identified
 428     //
 429     if (params->work_item_id == -1 || params->work_item_id == workid) {
 430
 431         uint64_t systemWorkBeginCount = sys->incWorkItemsBegin();
 432         int cpuId = tc->getCpuPtr()->cpuId();
 433
 434         if (params->work_cpus_ckpt_count != 0 &&
 435             sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
 436             //
 437             // If active cpus equals checkpoint count, create checkpoint
 438             //
 439             exitSimLoop("checkpoint");
 440         }
 441
 442         if (systemWorkBeginCount == params->work_begin_ckpt_count) {
 443             //
 444             // Note: the string specified as the cause of the exit event must
 445             // exactly equal "checkpoint" inorder to create a checkpoint
 446             //
 447             exitSimLoop("checkpoint");
 448         }
 449
 450         if (systemWorkBeginCount == params->work_begin_exit_count) {
 451             //
 452             // If a certain number of work items started, exit simulation
 453             //
 454             exitSimLoop("work started count reach");
 455         }
 456
 457         if (cpuId == params->work_begin_cpu_id_exit) {
 458             //
 459             // If work started on the cpu id specified, exit simulation
 460             //
 461             exitSimLoop("work started on specific cpu");
 462         }
 463     }
 464 }
 465
 466 //
 467 // This function is executed when annotated work items end.  Depending on
 468 // what the user specified at the command line, the simulation may exit and/or
 469 // take a checkpoint when a certain work item ends.
 470 //
 471 void
 472 workend(ThreadContext *tc, uint64_t workid, uint64_t threadid)
 473 {
 474     tc->getCpuPtr()->workItemEnd();
 475     System *sys = tc->getSystemPtr();
 476     const System::Params *params = sys->params();
 477
 478     DPRINTF(WorkItems, "Work End workid: %d, threadid %d\n", workid, threadid);
 479
 480     //
 481     // If specified, determine if this is the specific work item the user
 482     // identified
 483     //
 484     if (params->work_item_id == -1 || params->work_item_id == workid) {
 485
 486         uint64_t systemWorkEndCount = sys->incWorkItemsEnd();
 487         int cpuId = tc->getCpuPtr()->cpuId();
 488
 489         if (params->work_cpus_ckpt_count != 0 &&
 490             sys->markWorkItem(cpuId) >= params->work_cpus_ckpt_count) {
 491             //
 492             // If active cpus equals checkpoint count, create checkpoint
 493             //
 494             exitSimLoop("checkpoint");
 495         }
 496
 497         if (params->work_end_ckpt_count != 0 &&
 498             systemWorkEndCount == params->work_end_ckpt_count) {
 499             //
 500             // If total work items completed equals checkpoint count, create
 501             // checkpoint
 502             //
 503             exitSimLoop("checkpoint");
 504         }
 505
 506         if (params->work_end_exit_count != 0 &&
 507             systemWorkEndCount == params->work_end_exit_count) {
 508             //
 509             // If total work items completed equals exit count, exit simulation
 510             //
 511             exitSimLoop("work items exit count reached");
 512         }
 513     }
 514 }
 515
 516 } // namespace PseudoInst