debug: Move debug_break into src/base
[gem5.git] / src / sim / pseudo_inst.cc
1 /*
2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Nathan Binkert
29 */
30
31 #include <errno.h>
32 #include <fcntl.h>
33 #include <unistd.h>
34
35 #include <fstream>
36 #include <string>
37
38 #include "arch/kernel_stats.hh"
39 #include "arch/vtophys.hh"
40 #include "base/annotate.hh"
41 #include "base/debug.hh"
42 #include "cpu/base.hh"
43 #include "cpu/thread_context.hh"
44 #include "cpu/quiesce_event.hh"
45 #include "params/BaseCPU.hh"
46 #include "sim/pseudo_inst.hh"
47 #include "sim/serialize.hh"
48 #include "sim/sim_events.hh"
49 #include "sim/sim_exit.hh"
50 #include "sim/stat_control.hh"
51 #include "sim/stats.hh"
52 #include "sim/system.hh"
53 #if FULL_SYSTEM
54 #include "sim/vptr.hh"
55 #endif
56
57 using namespace std;
58
59 using namespace Stats;
60 using namespace TheISA;
61
62 namespace PseudoInst {
63
64 #if FULL_SYSTEM
65
66 void
67 arm(ThreadContext *tc)
68 {
69 if (tc->getKernelStats())
70 tc->getKernelStats()->arm();
71 }
72
73 void
74 quiesce(ThreadContext *tc)
75 {
76 if (!tc->getCpuPtr()->params()->do_quiesce)
77 return;
78
79 DPRINTF(Quiesce, "%s: quiesce()\n", tc->getCpuPtr()->name());
80
81 tc->suspend();
82 if (tc->getKernelStats())
83 tc->getKernelStats()->quiesce();
84 }
85
86 void
87 quiesceNs(ThreadContext *tc, uint64_t ns)
88 {
89 if (!tc->getCpuPtr()->params()->do_quiesce || ns == 0)
90 return;
91
92 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
93
94 Tick resume = curTick + Clock::Int::ns * ns;
95
96 mainEventQueue.reschedule(quiesceEvent, resume, true);
97
98 DPRINTF(Quiesce, "%s: quiesceNs(%d) until %d\n",
99 tc->getCpuPtr()->name(), ns, resume);
100
101 tc->suspend();
102 if (tc->getKernelStats())
103 tc->getKernelStats()->quiesce();
104 }
105
106 void
107 quiesceCycles(ThreadContext *tc, uint64_t cycles)
108 {
109 if (!tc->getCpuPtr()->params()->do_quiesce || cycles == 0)
110 return;
111
112 EndQuiesceEvent *quiesceEvent = tc->getQuiesceEvent();
113
114 Tick resume = curTick + tc->getCpuPtr()->ticks(cycles);
115
116 mainEventQueue.reschedule(quiesceEvent, resume, true);
117
118 DPRINTF(Quiesce, "%s: quiesceCycles(%d) until %d\n",
119 tc->getCpuPtr()->name(), cycles, resume);
120
121 tc->suspend();
122 if (tc->getKernelStats())
123 tc->getKernelStats()->quiesce();
124 }
125
126 uint64_t
127 quiesceTime(ThreadContext *tc)
128 {
129 return (tc->readLastActivate() - tc->readLastSuspend()) / Clock::Int::ns;
130 }
131
132 #endif
133
134 uint64_t
135 rpns(ThreadContext *tc)
136 {
137 return curTick / Clock::Int::ns;
138 }
139
140 void
141 wakeCPU(ThreadContext *tc, uint64_t cpuid)
142 {
143 System *sys = tc->getSystemPtr();
144 ThreadContext *other_tc = sys->threadContexts[cpuid];
145 if (other_tc->status() == ThreadContext::Suspended)
146 other_tc->activate();
147 }
148
149 void
150 m5exit(ThreadContext *tc, Tick delay)
151 {
152 Tick when = curTick + delay * Clock::Int::ns;
153 Event *event = new SimLoopExitEvent("m5_exit instruction encountered", 0);
154 mainEventQueue.schedule(event, when);
155 }
156
157 #if FULL_SYSTEM
158
159 void
160 loadsymbol(ThreadContext *tc)
161 {
162 const string &filename = tc->getCpuPtr()->system->params()->symbolfile;
163 if (filename.empty()) {
164 return;
165 }
166
167 std::string buffer;
168 ifstream file(filename.c_str());
169
170 if (!file)
171 fatal("file error: Can't open symbol table file %s\n", filename);
172
173 while (!file.eof()) {
174 getline(file, buffer);
175
176 if (buffer.empty())
177 continue;
178
179 int idx = buffer.find(' ');
180 if (idx == string::npos)
181 continue;
182
183 string address = "0x" + buffer.substr(0, idx);
184 eat_white(address);
185 if (address.empty())
186 continue;
187
188 // Skip over letter and space
189 string symbol = buffer.substr(idx + 3);
190 eat_white(symbol);
191 if (symbol.empty())
192 continue;
193
194 Addr addr;
195 if (!to_number(address, addr))
196 continue;
197
198 if (!tc->getSystemPtr()->kernelSymtab->insert(addr, symbol))
199 continue;
200
201
202 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
203 }
204 file.close();
205 }
206
207 void
208 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
209 {
210 char symb[100];
211 CopyStringOut(tc, symb, symbolAddr, 100);
212 std::string symbol(symb);
213
214 DPRINTF(Loader, "Loaded symbol: %s @ %#llx\n", symbol, addr);
215
216 tc->getSystemPtr()->kernelSymtab->insert(addr,symbol);
217 }
218
219 #endif
220
221
222 void
223 resetstats(ThreadContext *tc, Tick delay, Tick period)
224 {
225 if (!tc->getCpuPtr()->params()->do_statistics_insts)
226 return;
227
228
229 Tick when = curTick + delay * Clock::Int::ns;
230 Tick repeat = period * Clock::Int::ns;
231
232 Stats::StatEvent(false, true, when, repeat);
233 }
234
235 void
236 dumpstats(ThreadContext *tc, Tick delay, Tick period)
237 {
238 if (!tc->getCpuPtr()->params()->do_statistics_insts)
239 return;
240
241
242 Tick when = curTick + delay * Clock::Int::ns;
243 Tick repeat = period * Clock::Int::ns;
244
245 Stats::StatEvent(true, false, when, repeat);
246 }
247
248 void
249 dumpresetstats(ThreadContext *tc, Tick delay, Tick period)
250 {
251 if (!tc->getCpuPtr()->params()->do_statistics_insts)
252 return;
253
254
255 Tick when = curTick + delay * Clock::Int::ns;
256 Tick repeat = period * Clock::Int::ns;
257
258 Stats::StatEvent(true, true, when, repeat);
259 }
260
261 void
262 m5checkpoint(ThreadContext *tc, Tick delay, Tick period)
263 {
264 if (!tc->getCpuPtr()->params()->do_checkpoint_insts)
265 return;
266
267 Tick when = curTick + delay * Clock::Int::ns;
268 Tick repeat = period * Clock::Int::ns;
269
270 Event *event = new SimLoopExitEvent("checkpoint", 0, repeat);
271 mainEventQueue.schedule(event, when);
272 }
273
274 #if FULL_SYSTEM
275
276 uint64_t
277 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
278 {
279 const string &file = tc->getSystemPtr()->params()->readfile;
280 if (file.empty()) {
281 return ULL(0);
282 }
283
284 uint64_t result = 0;
285
286 int fd = ::open(file.c_str(), O_RDONLY, 0);
287 if (fd < 0)
288 panic("could not open file %s\n", file);
289
290 if (::lseek(fd, offset, SEEK_SET) < 0)
291 panic("could not seek: %s", strerror(errno));
292
293 char *buf = new char[len];
294 char *p = buf;
295 while (len > 0) {
296 int bytes = ::read(fd, p, len);
297 if (bytes <= 0)
298 break;
299
300 p += bytes;
301 result += bytes;
302 len -= bytes;
303 }
304
305 close(fd);
306 CopyIn(tc, vaddr, buf, result);
307 delete [] buf;
308 return result;
309 }
310
311 #endif
312
313 void
314 debugbreak(ThreadContext *tc)
315 {
316 debug_break();
317 }
318
319 void
320 switchcpu(ThreadContext *tc)
321 {
322 exitSimLoop("switchcpu");
323 }
324
325 /* namespace PseudoInst */ }