2 * Copyright (c) 2003-2006 The Regents of The University of Michigan
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * Authors: Nathan Binkert
37 #include "sim/pseudo_inst.hh"
38 #include "arch/vtophys.hh"
39 #include "cpu/base.hh"
40 #include "cpu/sampler/sampler.hh"
41 #include "cpu/exec_context.hh"
42 #include "kern/kernel_stats.hh"
43 #include "sim/param.hh"
44 #include "sim/serialize.hh"
45 #include "sim/sim_exit.hh"
46 #include "sim/stat_control.hh"
47 #include "sim/stats.hh"
48 #include "sim/system.hh"
49 #include "sim/debug.hh"
50 #include "sim/vptr.hh"
54 extern Sampler
*SampCPU
;
56 using namespace Stats
;
57 using namespace TheISA
;
61 bool doStatisticsInsts
;
62 bool doCheckpointInsts
;
68 xc
->getCpuPtr()->kernelStats
->arm();
72 quiesce(ExecContext
*xc
)
78 xc
->getCpuPtr()->kernelStats
->quiesce();
82 quiesceNs(ExecContext
*xc
, uint64_t ns
)
84 if (!doQuiesce
|| ns
== 0)
87 Event
*quiesceEvent
= xc
->getQuiesceEvent();
89 if (quiesceEvent
->scheduled())
90 quiesceEvent
->reschedule(curTick
+ Clock::Int::ns
* ns
);
92 quiesceEvent
->schedule(curTick
+ Clock::Int::ns
* ns
);
95 xc
->getCpuPtr()->kernelStats
->quiesce();
99 quiesceCycles(ExecContext
*xc
, uint64_t cycles
)
101 if (!doQuiesce
|| cycles
== 0)
104 Event
*quiesceEvent
= xc
->getQuiesceEvent();
106 if (quiesceEvent
->scheduled())
107 quiesceEvent
->reschedule(curTick
+
108 xc
->getCpuPtr()->cycles(cycles
));
110 quiesceEvent
->schedule(curTick
+
111 xc
->getCpuPtr()->cycles(cycles
));
114 xc
->getCpuPtr()->kernelStats
->quiesce();
118 quiesceTime(ExecContext
*xc
)
120 return (xc
->readLastActivate() - xc
->readLastSuspend()) / Clock::Int::ns
;
124 ivlb(ExecContext
*xc
)
126 xc
->getCpuPtr()->kernelStats
->ivlb();
130 ivle(ExecContext
*xc
)
135 m5exit_old(ExecContext
*xc
)
137 SimExit(curTick
, "m5_exit_old instruction encountered");
141 m5exit(ExecContext
*xc
, Tick delay
)
143 Tick when
= curTick
+ delay
* Clock::Int::ns
;
144 SimExit(when
, "m5_exit instruction encountered");
148 resetstats(ExecContext
*xc
, Tick delay
, Tick period
)
150 if (!doStatisticsInsts
)
154 Tick when
= curTick
+ delay
* Clock::Int::ns
;
155 Tick repeat
= period
* Clock::Int::ns
;
157 using namespace Stats
;
158 SetupEvent(Reset
, when
, repeat
);
162 dumpstats(ExecContext
*xc
, Tick delay
, Tick period
)
164 if (!doStatisticsInsts
)
168 Tick when
= curTick
+ delay
* Clock::Int::ns
;
169 Tick repeat
= period
* Clock::Int::ns
;
171 using namespace Stats
;
172 SetupEvent(Dump
, when
, repeat
);
176 addsymbol(ExecContext
*xc
, Addr addr
, Addr symbolAddr
)
179 CopyStringOut(xc
, symb
, symbolAddr
, 100);
180 std::string
symbol(symb
);
182 DPRINTF(Loader
, "Loaded symbol: %s @ %#llx\n", symbol
, addr
);
184 xc
->getSystemPtr()->kernelSymtab
->insert(addr
,symbol
);
188 dumpresetstats(ExecContext
*xc
, Tick delay
, Tick period
)
190 if (!doStatisticsInsts
)
194 Tick when
= curTick
+ delay
* Clock::Int::ns
;
195 Tick repeat
= period
* Clock::Int::ns
;
197 using namespace Stats
;
198 SetupEvent(Dump
|Reset
, when
, repeat
);
202 m5checkpoint(ExecContext
*xc
, Tick delay
, Tick period
)
204 if (!doCheckpointInsts
)
208 Tick when
= curTick
+ delay
* Clock::Int::ns
;
209 Tick repeat
= period
* Clock::Int::ns
;
211 Checkpoint::setup(when
, repeat
);
215 readfile(ExecContext
*xc
, Addr vaddr
, uint64_t len
, uint64_t offset
)
217 const string
&file
= xc
->getCpuPtr()->system
->params()->readfile
;
224 int fd
= ::open(file
.c_str(), O_RDONLY
, 0);
226 panic("could not open file %s\n", file
);
228 if (::lseek(fd
, offset
, SEEK_SET
) < 0)
229 panic("could not seek: %s", strerror(errno
));
231 char *buf
= new char[len
];
234 int bytes
= ::read(fd
, p
, len
);
244 CopyIn(xc
, vaddr
, buf
, result
);
249 class Context
: public ParamContext
252 Context(const string
§ion
) : ParamContext(section
) {}
256 Context
context("pseudo_inst");
258 Param
<bool> __quiesce(&context
, "quiesce",
259 "enable quiesce instructions",
261 Param
<bool> __statistics(&context
, "statistics",
262 "enable statistics pseudo instructions",
264 Param
<bool> __checkpoint(&context
, "checkpoint",
265 "enable checkpoint pseudo instructions",
269 Context::checkParams()
271 doQuiesce
= __quiesce
;
272 doStatisticsInsts
= __statistics
;
273 doCheckpointInsts
= __checkpoint
;
276 void debugbreak(ExecContext
*xc
)
281 void switchcpu(ExecContext
*xc
)
284 SampCPU
->switchCPUs();