src/sim/pseudo_inst.hh

   1 /*
   2  * Copyright (c) 2003-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  */
  30
  31 #ifndef __SIM_PSEUDO_INST_HH__
  32 #define __SIM_PSEUDO_INST_HH__
  33
  34 class ThreadContext;
  35
  36 //We need the "Tick" and "Addr" data types from here
  37 #include "base/types.hh"
  38
  39 namespace PseudoInst {
  40
  41 /**
  42  * @todo these externs are only here for a hack in fullCPU::takeOver...
  43  */
  44 extern bool doStatisticsInsts;
  45 extern bool doCheckpointInsts;
  46 extern bool doQuiesce;
  47
  48 #if FULL_SYSTEM
  49
  50 void arm(ThreadContext *tc);
  51 void quiesce(ThreadContext *tc);
  52 void quiesceSkip(ThreadContext *tc);
  53 void quiesceNs(ThreadContext *tc, uint64_t ns);
  54 void quiesceCycles(ThreadContext *tc, uint64_t cycles);
  55 uint64_t quiesceTime(ThreadContext *tc);
  56 uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len,
  57     uint64_t offset);
  58 void loadsymbol(ThreadContext *xc);
  59 void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
  60 uint64_t initParam(ThreadContext *xc);
  61
  62 #else
  63
  64 static inline void
  65 panicFsOnlyPseudoInst(const char *name)
  66 {
  67     panic("Pseudo inst \"%s\" is only available in Full System mode.");
  68 }
  69
  70 static inline void
  71 arm(ThreadContext *tc)
  72 {
  73     panicFsOnlyPseudoInst("arm");
  74 }
  75 static inline void
  76 quiesce(ThreadContext *tc)
  77 {
  78     panicFsOnlyPseudoInst("quiesce");
  79 }
  80 static inline void
  81 quiesceSkip(ThreadContext *tc)
  82 {
  83     panicFsOnlyPseudoInst("quiesceSkip");
  84 }
  85 static inline void
  86 quiesceNs(ThreadContext *tc, uint64_t ns)
  87 {
  88     panicFsOnlyPseudoInst("quiesceNs");
  89 }
  90 static inline void
  91 quiesceCycles(ThreadContext *tc, uint64_t cycles)
  92 {
  93     panicFsOnlyPseudoInst("quiesceCycles");
  94 }
  95 static inline uint64_t
  96 quiesceTime(ThreadContext *tc)
  97 {
  98     panicFsOnlyPseudoInst("quiesceTime");
  99     return 0;
 100 }
 101 static inline uint64_t
 102 readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset)
 103 {
 104     panicFsOnlyPseudoInst("readFile");
 105     return 0;
 106 }
 107 static inline void
 108 loadsymbol(ThreadContext *xc)
 109 {
 110     panicFsOnlyPseudoInst("loadSymbol");
 111 }
 112 static inline void
 113 addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr)
 114 {
 115     panicFsOnlyPseudoInst("addSymbol");
 116 }
 117 static inline uint64_t
 118 initParam(ThreadContext *tc)
 119 {
 120     panicFsOnlyPseudoInst("initParam");
 121     return 0;
 122 }
 123
 124 #endif
 125
 126 uint64_t rpns(ThreadContext *tc);
 127 void wakeCPU(ThreadContext *tc, uint64_t cpuid);
 128 void m5exit(ThreadContext *tc, Tick delay);
 129 void resetstats(ThreadContext *tc, Tick delay, Tick period);
 130 void dumpstats(ThreadContext *tc, Tick delay, Tick period);
 131 void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
 132 void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
 133 void debugbreak(ThreadContext *tc);
 134 void switchcpu(ThreadContext *tc);
 135 void workbegin(ThreadContext *tc, uint64_t workid, uint64_t threadid);
 136 void workend(ThreadContext *tc, uint64_t workid, uint64_t threadid);
 137
 138 } // namespace PseudoInst
 139
 140 #endif // __SIM_PSEUDO_INST_HH__