src/sim/pseudo_inst.hh

   1 /*
   2  * Copyright (c) 2003-2006 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  */
  30
  31 class ThreadContext;
  32
  33 //We need the "Tick" and "Addr" data types from here
  34 #include "sim/host.hh"
  35
  36 namespace AlphaPseudo
  37 {
  38     /**
  39      * @todo these externs are only here for a hack in fullCPU::takeOver...
  40      */
  41     extern bool doStatisticsInsts;
  42     extern bool doCheckpointInsts;
  43     extern bool doQuiesce;
  44
  45     void arm(ThreadContext *tc);
  46     void quiesce(ThreadContext *tc);
  47     void quiesceNs(ThreadContext *tc, uint64_t ns);
  48     void quiesceCycles(ThreadContext *tc, uint64_t cycles);
  49     uint64_t quiesceTime(ThreadContext *tc);
  50     void ivlb(ThreadContext *tc);
  51     void ivle(ThreadContext *tc);
  52     void m5exit(ThreadContext *tc, Tick delay);
  53     void m5exit_old(ThreadContext *tc);
  54     void resetstats(ThreadContext *tc, Tick delay, Tick period);
  55     void dumpstats(ThreadContext *tc, Tick delay, Tick period);
  56     void dumpresetstats(ThreadContext *tc, Tick delay, Tick period);
  57     void m5checkpoint(ThreadContext *tc, Tick delay, Tick period);
  58     uint64_t readfile(ThreadContext *tc, Addr vaddr, uint64_t len, uint64_t offset);
  59     void debugbreak(ThreadContext *tc);
  60     void switchcpu(ThreadContext *tc);
  61     void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
  62     void anBegin(ThreadContext *tc, uint64_t cur);
  63     void anWait(ThreadContext *tc, uint64_t cur, uint64_t wait);
  64 }