src/sim/sim_object.cc

   1 /*
   2  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Nathan Binkert
  30  */
  31
  32 #include <assert.h>
  33
  34 #include "base/callback.hh"
  35 #include "base/inifile.hh"
  36 #include "base/match.hh"
  37 #include "base/misc.hh"
  38 #include "base/trace.hh"
  39 #include "base/stats/events.hh"
  40 #include "sim/host.hh"
  41 #include "sim/sim_object.hh"
  42 #include "sim/stats.hh"
  43 #include "sim/param.hh"
  44
  45 using namespace std;
  46
  47
  48 ////////////////////////////////////////////////////////////////////////
  49 //
  50 // SimObject member definitions
  51 //
  52 ////////////////////////////////////////////////////////////////////////
  53
  54 //
  55 // static list of all SimObjects, used for initialization etc.
  56 //
  57 SimObject::SimObjectList SimObject::simObjectList;
  58
  59 namespace Stats {
  60     extern ObjectMatch event_ignore;
  61 }
  62
  63 //
  64 // SimObject constructor: used to maintain static simObjectList
  65 //
  66 SimObject::SimObject(Params *p)
  67     : _params(p)
  68 {
  69 #ifdef DEBUG
  70     doDebugBreak = false;
  71 #endif
  72
  73     doRecordEvent = !Stats::event_ignore.match(name());
  74     simObjectList.push_back(this);
  75     state = Atomic;
  76 }
  77
  78 //
  79 // SimObject constructor: used to maintain static simObjectList
  80 //
  81 SimObject::SimObject(const string &_name)
  82     : _params(new Params)
  83 {
  84     _params->name = _name;
  85 #ifdef DEBUG
  86     doDebugBreak = false;
  87 #endif
  88
  89     doRecordEvent = !Stats::event_ignore.match(name());
  90     simObjectList.push_back(this);
  91     state = Atomic;
  92 }
  93
  94 void
  95 SimObject::connect()
  96 {
  97 }
  98
  99 void
 100 SimObject::init()
 101 {
 102 }
 103
 104 //
 105 // no default statistics, so nothing to do in base implementation
 106 //
 107 void
 108 SimObject::regStats()
 109 {
 110 }
 111
 112 void
 113 SimObject::regFormulas()
 114 {
 115 }
 116
 117 void
 118 SimObject::resetStats()
 119 {
 120 }
 121
 122 //
 123 // static function:
 124 //   call regStats() on all SimObjects and then regFormulas() on all
 125 //   SimObjects.
 126 //
 127 struct SimObjectResetCB : public Callback
 128 {
 129     virtual void process() { SimObject::resetAllStats(); }
 130 };
 131
 132 namespace {
 133     static SimObjectResetCB StatResetCB;
 134 }
 135
 136 void
 137 SimObject::regAllStats()
 138 {
 139     SimObjectList::iterator i;
 140     SimObjectList::iterator end = simObjectList.end();
 141
 142     /**
 143      * @todo change cprintfs to DPRINTFs
 144      */
 145     for (i = simObjectList.begin(); i != end; ++i) {
 146 #ifdef STAT_DEBUG
 147         cprintf("registering stats for %s\n", (*i)->name());
 148 #endif
 149         (*i)->regStats();
 150     }
 151
 152     for (i = simObjectList.begin(); i != end; ++i) {
 153 #ifdef STAT_DEBUG
 154         cprintf("registering formulas for %s\n", (*i)->name());
 155 #endif
 156         (*i)->regFormulas();
 157     }
 158
 159     Stats::registerResetCallback(&StatResetCB);
 160 }
 161
 162 //
 163 // static function: call connect() on all SimObjects.
 164 //
 165 void
 166 SimObject::connectAll()
 167 {
 168     SimObjectList::iterator i = simObjectList.begin();
 169     SimObjectList::iterator end = simObjectList.end();
 170
 171     for (; i != end; ++i) {
 172         SimObject *obj = *i;
 173         obj->connect();
 174     }
 175 }
 176
 177 //
 178 // static function: call init() on all SimObjects.
 179 //
 180 void
 181 SimObject::initAll()
 182 {
 183     SimObjectList::iterator i = simObjectList.begin();
 184     SimObjectList::iterator end = simObjectList.end();
 185
 186     for (; i != end; ++i) {
 187         SimObject *obj = *i;
 188         obj->init();
 189     }
 190 }
 191
 192 //
 193 // static function: call resetStats() on all SimObjects.
 194 //
 195 void
 196 SimObject::resetAllStats()
 197 {
 198     SimObjectList::iterator i = simObjectList.begin();
 199     SimObjectList::iterator end = simObjectList.end();
 200
 201     for (; i != end; ++i) {
 202         SimObject *obj = *i;
 203         obj->resetStats();
 204     }
 205 }
 206
 207 //
 208 // static function: serialize all SimObjects.
 209 //
 210 void
 211 SimObject::serializeAll(ostream &os)
 212 {
 213     SimObjectList::reverse_iterator ri = simObjectList.rbegin();
 214     SimObjectList::reverse_iterator rend = simObjectList.rend();
 215
 216     for (; ri != rend; ++ri) {
 217         SimObject *obj = *ri;
 218         obj->nameOut(os);
 219         obj->serialize(os);
 220    }
 221 }
 222
 223 void
 224 SimObject::unserializeAll(Checkpoint *cp)
 225 {
 226     SimObjectList::reverse_iterator ri = simObjectList.rbegin();
 227     SimObjectList::reverse_iterator rend = simObjectList.rend();
 228
 229     for (; ri != rend; ++ri) {
 230         SimObject *obj = *ri;
 231         DPRINTFR(Config, "Unserializing '%s'\n",
 232                  obj->name());
 233         if(cp->sectionExists(obj->name()))
 234             obj->unserialize(cp, obj->name());
 235         else
 236             warn("Not unserializing '%s': no section found in checkpoint.\n",
 237                  obj->name());
 238    }
 239 }
 240
 241 #ifdef DEBUG
 242 //
 243 // static function: flag which objects should have the debugger break
 244 //
 245 void
 246 SimObject::debugObjectBreak(const string &objs)
 247 {
 248     SimObjectList::const_iterator i = simObjectList.begin();
 249     SimObjectList::const_iterator end = simObjectList.end();
 250
 251     ObjectMatch match(objs);
 252     for (; i != end; ++i) {
 253         SimObject *obj = *i;
 254         obj->doDebugBreak = match.match(obj->name());
 255    }
 256 }
 257
 258 void
 259 debugObjectBreak(const char *objs)
 260 {
 261     SimObject::debugObjectBreak(string(objs));
 262 }
 263 #endif
 264
 265 void
 266 SimObject::recordEvent(const std::string &stat)
 267 {
 268     if (doRecordEvent)
 269         Stats::recordEvent(stat);
 270 }
 271
 272 bool
 273 SimObject::drain(Event *drain_event)
 274 {
 275     if (state != DrainedAtomic && state != Atomic) {
 276         panic("Must implement your own drain function if it is to be used "
 277               "in timing mode!");
 278     }
 279     state = DrainedAtomic;
 280     return false;
 281 }
 282
 283 void
 284 SimObject::resume()
 285 {
 286     if (state == DrainedAtomic) {
 287         state = Atomic;
 288     } else if (state == DrainedTiming) {
 289         state = Timing;
 290     }
 291 }
 292
 293 void
 294 SimObject::setMemoryMode(State new_mode)
 295 {
 296     assert(new_mode == Timing || new_mode == Atomic);
 297     if (state == DrainedAtomic && new_mode == Timing) {
 298         state = DrainedTiming;
 299     } else if (state == DrainedTiming && new_mode == Atomic) {
 300         state = DrainedAtomic;
 301     } else {
 302         state = new_mode;
 303     }
 304 }
 305
 306 void
 307 SimObject::switchOut()
 308 {
 309     panic("Unimplemented!");
 310 }
 311
 312 void
 313 SimObject::takeOverFrom(BaseCPU *cpu)
 314 {
 315     panic("Unimplemented!");
 316 }
 317
 318 DEFINE_SIM_OBJECT_CLASS_NAME("SimObject", SimObject)