2 * Copyright (c) 2001-2005 The Regents of The University of Michigan
3 * Copyright (c) 2010 Advanced Micro Devices, Inc.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * Authors: Steve Reinhardt
33 #include "sim/sim_object.hh"
35 #include "base/logging.hh"
36 #include "base/match.hh"
37 #include "base/trace.hh"
38 #include "debug/Checkpoint.hh"
39 #include "sim/probe/probe.hh"
44 ////////////////////////////////////////////////////////////////////////
46 // SimObject member definitions
48 ////////////////////////////////////////////////////////////////////////
51 // static list of all SimObjects, used for initialization etc.
53 SimObject::SimObjectList
SimObject::simObjectList
;
56 // SimObject constructor: used to maintain static simObjectList
58 SimObject::SimObject(const Params
*p
)
59 : EventManager(getEventQueue(p
->eventq_index
)),
60 Stats::Group(nullptr),
66 simObjectList
.push_back(this);
67 probeManager
= new ProbeManager(this);
70 SimObject::~SimObject()
81 SimObject::loadState(CheckpointIn
&cp
)
83 if (cp
.sectionExists(name())) {
84 DPRINTF(Checkpoint
, "unserializing\n");
85 // This works despite name() returning a fully qualified name
86 // since we are at the top level.
87 unserializeSection(cp
, name());
89 DPRINTF(Checkpoint
, "no checkpoint section found\n");
94 SimObject::initState()
104 * No probe points by default, so do nothing in base.
107 SimObject::regProbePoints()
112 * No probe listeners by default, so do nothing in base.
115 SimObject::regProbeListeners()
120 SimObject::getProbeManager()
126 SimObject::getPort(const std::string
&if_name
, PortID idx
)
128 fatal("%s does not have any port named %s\n", name(), if_name
);
132 // static function: serialize all SimObjects.
135 SimObject::serializeAll(CheckpointOut
&cp
)
137 SimObjectList::reverse_iterator ri
= simObjectList
.rbegin();
138 SimObjectList::reverse_iterator rend
= simObjectList
.rend();
140 for (; ri
!= rend
; ++ri
) {
141 SimObject
*obj
= *ri
;
142 // This works despite name() returning a fully qualified name
143 // since we are at the top level.
144 obj
->serializeSection(cp
, obj
->name());
151 // static function: flag which objects should have the debugger break
154 SimObject::debugObjectBreak(const string
&objs
)
156 SimObjectList::const_iterator i
= simObjectList
.begin();
157 SimObjectList::const_iterator end
= simObjectList
.end();
159 ObjectMatch
match(objs
);
160 for (; i
!= end
; ++i
) {
162 obj
->doDebugBreak
= match
.match(obj
->name());
167 debugObjectBreak(const char *objs
)
169 SimObject::debugObjectBreak(string(objs
));
174 SimObject::find(const char *name
)
176 SimObjectList::const_iterator i
= simObjectList
.begin();
177 SimObjectList::const_iterator end
= simObjectList
.end();
179 for (; i
!= end
; ++i
) {
181 if (obj
->name() == name
)