05c1b3e0ac89f1e11fcaec665ae2d9866f18a19b
[gem5.git] / src / sim / sim_object.hh
1 /*
2 * Copyright (c) 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2001-2005 The Regents of The University of Michigan
15 * Copyright (c) 2010 Advanced Micro Devices, Inc.
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 /* @file
43 * User Console Definitions
44 */
45
46 #ifndef __SIM_OBJECT_HH__
47 #define __SIM_OBJECT_HH__
48
49 #include <string>
50 #include <vector>
51
52 #include "base/stats/group.hh"
53 #include "params/SimObject.hh"
54 #include "sim/drain.hh"
55 #include "sim/eventq.hh"
56 #include "sim/eventq_impl.hh"
57 #include "sim/port.hh"
58 #include "sim/serialize.hh"
59
60 class EventManager;
61 class ProbeManager;
62
63 /**
64 * Abstract superclass for simulation objects. Represents things that
65 * correspond to physical components and can be specified via the
66 * config file (CPUs, caches, etc.).
67 *
68 * SimObject initialization is controlled by the instantiate method in
69 * src/python/m5/simulate.py. There are slightly different
70 * initialization paths when starting the simulation afresh and when
71 * loading from a checkpoint. After instantiation and connecting
72 * ports, simulate.py initializes the object using the following call
73 * sequence:
74 *
75 * <ol>
76 * <li>SimObject::init()
77 * <li>SimObject::regStats()
78 * <li><ul>
79 * <li>SimObject::initState() if starting afresh.
80 * <li>SimObject::loadState() if restoring from a checkpoint.
81 * </ul>
82 * <li>SimObject::resetStats()
83 * <li>SimObject::startup()
84 * <li>Drainable::drainResume() if resuming from a checkpoint.
85 * </ol>
86 *
87 * @note Whenever a method is called on all objects in the simulator's
88 * object tree (e.g., init(), startup(), or loadState()), a pre-order
89 * depth-first traversal is performed (see descendants() in
90 * SimObject.py). This has the effect of calling the method on the
91 * parent node <i>before</i> its children.
92 */
93 class SimObject : public EventManager, public Serializable, public Drainable,
94 public Stats::Group
95 {
96 private:
97 typedef std::vector<SimObject *> SimObjectList;
98
99 /** List of all instantiated simulation objects. */
100 static SimObjectList simObjectList;
101
102 /** Manager coordinates hooking up probe points with listeners. */
103 ProbeManager *probeManager;
104
105 protected:
106 /** Cached copy of the object parameters. */
107 const SimObjectParams *_params;
108
109 public:
110 typedef SimObjectParams Params;
111 const Params *params() const { return _params; }
112 SimObject(const Params *_params);
113 virtual ~SimObject();
114
115 public:
116
117 virtual const std::string name() const { return params()->name; }
118
119 /**
120 * init() is called after all C++ SimObjects have been created and
121 * all ports are connected. Initializations that are independent
122 * of unserialization but rely on a fully instantiated and
123 * connected SimObject graph should be done here.
124 */
125 virtual void init();
126
127 /**
128 * loadState() is called on each SimObject when restoring from a
129 * checkpoint. The default implementation simply calls
130 * unserialize() if there is a corresponding section in the
131 * checkpoint. However, objects can override loadState() to get
132 * other behaviors, e.g., doing other programmed initializations
133 * after unserialize(), or complaining if no checkpoint section is
134 * found.
135 *
136 * @param cp Checkpoint to restore the state from.
137 */
138 virtual void loadState(CheckpointIn &cp);
139
140 /**
141 * initState() is called on each SimObject when *not* restoring
142 * from a checkpoint. This provides a hook for state
143 * initializations that are only required for a "cold start".
144 */
145 virtual void initState();
146
147 /**
148 * Register probe points for this object.
149 */
150 virtual void regProbePoints();
151
152 /**
153 * Register probe listeners for this object.
154 */
155 virtual void regProbeListeners();
156
157 /**
158 * Get the probe manager for this object.
159 */
160 ProbeManager *getProbeManager();
161
162 /**
163 * Get a port with a given name and index. This is used at binding time
164 * and returns a reference to a protocol-agnostic port.
165 *
166 * @param if_name Port name
167 * @param idx Index in the case of a VectorPort
168 *
169 * @return A reference to the given port
170 */
171 virtual Port &getPort(const std::string &if_name,
172 PortID idx=InvalidPortID);
173
174 /**
175 * startup() is the final initialization call before simulation.
176 * All state is initialized (including unserialized state, if any,
177 * such as the curTick() value), so this is the appropriate place to
178 * schedule initial event(s) for objects that need them.
179 */
180 virtual void startup();
181
182 /**
183 * Provide a default implementation of the drain interface for
184 * objects that don't need draining.
185 */
186 DrainState drain() override { return DrainState::Drained; }
187
188 /**
189 * Write back dirty buffers to memory using functional writes.
190 *
191 * After returning, an object implementing this method should have
192 * written all its dirty data back to memory. This method is
193 * typically used to prepare a system with caches for
194 * checkpointing.
195 */
196 virtual void memWriteback() {};
197
198 /**
199 * Invalidate the contents of memory buffers.
200 *
201 * When the switching to hardware virtualized CPU models, we need
202 * to make sure that we don't have any cached state in the system
203 * that might become stale when we return. This method is used to
204 * flush all such state back to main memory.
205 *
206 * @warn This does <i>not</i> cause any dirty state to be written
207 * back to memory.
208 */
209 virtual void memInvalidate() {};
210
211 void serialize(CheckpointOut &cp) const override {};
212 void unserialize(CheckpointIn &cp) override {};
213
214 /**
215 * Serialize all SimObjects in the system.
216 */
217 static void serializeAll(CheckpointOut &cp);
218
219 #ifdef DEBUG
220 public:
221 bool doDebugBreak;
222 static void debugObjectBreak(const std::string &objs);
223 #endif
224
225 /**
226 * Find the SimObject with the given name and return a pointer to
227 * it. Primarily used for interactive debugging. Argument is
228 * char* rather than std::string to make it callable from gdb.
229 */
230 static SimObject *find(const char *name);
231 };
232
233 /**
234 * Base class to wrap object resolving functionality.
235 *
236 * This can be provided to the serialization framework to allow it to
237 * map object names onto C++ objects.
238 */
239 class SimObjectResolver
240 {
241 public:
242 virtual ~SimObjectResolver() { }
243
244 // Find a SimObject given a full path name
245 virtual SimObject *resolveSimObject(const std::string &name) = 0;
246 };
247
248 #ifdef DEBUG
249 void debugObjectBreak(const char *objs);
250 #endif
251
252 #endif // __SIM_OBJECT_HH__