src/sim/sim_object.hh

   1 /*
   2  * Copyright (c) 2001-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Steve Reinhardt
  29  *          Nathan Binkert
  30  */
  31
  32 /* @file
  33  * User Console Definitions
  34  */
  35
  36 #ifndef __SIM_OBJECT_HH__
  37 #define __SIM_OBJECT_HH__
  38
  39 #include <map>
  40 #include <list>
  41 #include <vector>
  42 #include <iostream>
  43
  44 #include "sim/serialize.hh"
  45 #include "sim/startup.hh"
  46
  47 class BaseCPU;
  48 class Event;
  49
  50 /*
  51  * Abstract superclass for simulation objects.  Represents things that
  52  * correspond to physical components and can be specified via the
  53  * config file (CPUs, caches, etc.).
  54  */
  55 class SimObject : public Serializable, protected StartupCallback
  56 {
  57   public:
  58     struct Params {
  59         std::string name;
  60     };
  61
  62     enum State {
  63         Running,
  64         Draining,
  65         Drained
  66     };
  67
  68     enum MemoryMode {
  69         Invalid=0,
  70         Atomic,
  71         Timing
  72     };
  73
  74   private:
  75     State state;
  76
  77   protected:
  78     Params *_params;
  79
  80     void changeState(State new_state) { state = new_state; }
  81
  82   public:
  83     const Params *params() const { return _params; }
  84
  85     State getState() { return state; }
  86
  87   private:
  88     typedef std::vector<SimObject *> SimObjectList;
  89
  90     // list of all instantiated simulation objects
  91     static SimObjectList simObjectList;
  92
  93   public:
  94     SimObject(Params *_params);
  95     SimObject(const std::string &_name);
  96
  97     virtual ~SimObject() {}
  98
  99     virtual const std::string name() const { return params()->name; }
 100
 101     // initialization pass of all objects.
 102     // Gets invoked after construction, before unserialize.
 103     virtual void init();
 104     virtual void connect();
 105     static void initAll();
 106     static void connectAll();
 107
 108     // register statistics for this object
 109     virtual void regStats();
 110     virtual void regFormulas();
 111     virtual void resetStats();
 112
 113     // static: call reg_stats on all SimObjects
 114     static void regAllStats();
 115
 116     // static: call resetStats on all SimObjects
 117     static void resetAllStats();
 118
 119     // static: call nameOut() & serialize() on all SimObjects
 120     static void serializeAll(std::ostream &);
 121     static void unserializeAll(Checkpoint *cp);
 122
 123     // Methods to drain objects in order to take checkpoints
 124     // Or switch from timing -> atomic memory model
 125     // Drain returns 0 if the simobject can drain immediately or
 126     // the number of times the drain_event's process function will be called
 127     // before the object will be done draining. Normally this should be 1
 128     virtual unsigned int drain(Event *drain_event);
 129     virtual void resume();
 130     virtual void setMemoryMode(State new_mode);
 131     virtual void switchOut();
 132     virtual void takeOverFrom(BaseCPU *cpu);
 133
 134 #ifdef DEBUG
 135   public:
 136     bool doDebugBreak;
 137     static void debugObjectBreak(const std::string &objs);
 138 #endif
 139
 140   public:
 141     bool doRecordEvent;
 142     void recordEvent(const std::string &stat);
 143 };
 144
 145 #endif // __SIM_OBJECT_HH__