src/sim/stat_control.cc

   1 /*
   2  * Copyright (c) 2012 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2004-2005 The Regents of The University of Michigan
  15  * Copyright (c) 2013 Advanced Micro Devices, Inc.
  16  * Copyright (c) 2013 Mark D. Hill and David A. Wood
  17  * All rights reserved.
  18  *
  19  * Redistribution and use in source and binary forms, with or without
  20  * modification, are permitted provided that the following conditions are
  21  * met: redistributions of source code must retain the above copyright
  22  * notice, this list of conditions and the following disclaimer;
  23  * redistributions in binary form must reproduce the above copyright
  24  * notice, this list of conditions and the following disclaimer in the
  25  * documentation and/or other materials provided with the distribution;
  26  * neither the name of the copyright holders nor the names of its
  27  * contributors may be used to endorse or promote products derived from
  28  * this software without specific prior written permission.
  29  *
  30  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  31  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  32  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  33  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  34  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  35  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  36  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  37  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  38  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  39  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  40  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  41  *
  42  * Authors: Nathan Binkert
  43  *          Sascha Bischoff
  44  */
  45
  46 // This file will contain default statistics for the simulator that
  47 // don't really belong to a specific simulator object
  48
  49 #include <fstream>
  50 #include <iostream>
  51 #include <list>
  52
  53 #include "base/callback.hh"
  54 #include "base/hostinfo.hh"
  55 #include "base/statistics.hh"
  56 #include "base/time.hh"
  57 #include "cpu/base.hh"
  58 #include "sim/global_event.hh"
  59 #include "sim/stat_control.hh"
  60
  61 using namespace std;
  62
  63 Stats::Formula simSeconds;
  64 Stats::Value simTicks;
  65 Stats::Value finalTick;
  66 Stats::Value simFreq;
  67
  68 namespace Stats {
  69
  70 Time statTime(true);
  71 Tick startTick;
  72
  73 GlobalEvent *dumpEvent;
  74
  75 struct SimTicksReset : public Callback
  76 {
  77     void process()
  78     {
  79         statTime.setTimer();
  80         startTick = curTick();
  81     }
  82 };
  83
  84 double
  85 statElapsedTime()
  86 {
  87     Time now;
  88     now.setTimer();
  89
  90     Time elapsed = now - statTime;
  91     return elapsed;
  92 }
  93
  94 Tick
  95 statElapsedTicks()
  96 {
  97     return curTick() - startTick;
  98 }
  99
 100 Tick
 101 statFinalTick()
 102 {
 103     return curTick();
 104 }
 105
 106 SimTicksReset simTicksReset;
 107
 108 struct Global
 109 {
 110     Stats::Formula hostInstRate;
 111     Stats::Formula hostOpRate;
 112     Stats::Formula hostTickRate;
 113     Stats::Value hostMemory;
 114     Stats::Value hostSeconds;
 115
 116     Stats::Value simInsts;
 117     Stats::Value simOps;
 118
 119     Global();
 120 };
 121
 122 Global::Global()
 123 {
 124     simInsts
 125         .functor(BaseCPU::numSimulatedInsts)
 126         .name("sim_insts")
 127         .desc("Number of instructions simulated")
 128         .precision(0)
 129         .prereq(simInsts)
 130         ;
 131
 132     simOps
 133         .functor(BaseCPU::numSimulatedOps)
 134         .name("sim_ops")
 135         .desc("Number of ops (including micro ops) simulated")
 136         .precision(0)
 137         .prereq(simOps)
 138         ;
 139
 140     simSeconds
 141         .name("sim_seconds")
 142         .desc("Number of seconds simulated")
 143         ;
 144
 145     simFreq
 146         .scalar(SimClock::Frequency)
 147         .name("sim_freq")
 148         .desc("Frequency of simulated ticks")
 149         ;
 150
 151     simTicks
 152         .functor(statElapsedTicks)
 153         .name("sim_ticks")
 154         .desc("Number of ticks simulated")
 155         ;
 156
 157     finalTick
 158         .functor(statFinalTick)
 159         .name("final_tick")
 160         .desc("Number of ticks from beginning of simulation "
 161               "(restored from checkpoints and never reset)")
 162         ;
 163
 164     hostInstRate
 165         .name("host_inst_rate")
 166         .desc("Simulator instruction rate (inst/s)")
 167         .precision(0)
 168         .prereq(simInsts)
 169         ;
 170
 171     hostOpRate
 172         .name("host_op_rate")
 173         .desc("Simulator op (including micro ops) rate (op/s)")
 174         .precision(0)
 175         .prereq(simOps)
 176         ;
 177
 178     hostMemory
 179         .functor(memUsage)
 180         .name("host_mem_usage")
 181         .desc("Number of bytes of host memory used")
 182         .prereq(hostMemory)
 183         ;
 184
 185     hostSeconds
 186         .functor(statElapsedTime)
 187         .name("host_seconds")
 188         .desc("Real time elapsed on the host")
 189         .precision(2)
 190         ;
 191
 192     hostTickRate
 193         .name("host_tick_rate")
 194         .desc("Simulator tick rate (ticks/s)")
 195         .precision(0)
 196         ;
 197
 198     simSeconds = simTicks / simFreq;
 199     hostInstRate = simInsts / hostSeconds;
 200     hostOpRate = simOps / hostSeconds;
 201     hostTickRate = simTicks / hostSeconds;
 202
 203     registerResetCallback(&simTicksReset);
 204 }
 205
 206 void
 207 initSimStats()
 208 {
 209     static Global global;
 210 }
 211
 212 /**
 213  * Event to dump and/or reset the statistics.
 214  */
 215 class StatEvent : public GlobalEvent
 216 {
 217   private:
 218     bool dump;
 219     bool reset;
 220     Tick repeat;
 221
 222   public:
 223     StatEvent(Tick _when, bool _dump, bool _reset, Tick _repeat)
 224         : GlobalEvent(_when, Stat_Event_Pri, 0),
 225           dump(_dump), reset(_reset), repeat(_repeat)
 226     {
 227     }
 228
 229     virtual void
 230     process()
 231     {
 232         if (dump)
 233             Stats::dump();
 234
 235         if (reset)
 236             Stats::reset();
 237
 238         if (repeat) {
 239             Stats::schedStatEvent(dump, reset, curTick() + repeat, repeat);
 240         }
 241     }
 242
 243     const char *description() const { return "GlobalStatEvent"; }
 244 };
 245
 246 void
 247 schedStatEvent(bool dump, bool reset, Tick when, Tick repeat)
 248 {
 249     // simQuantum is being added to the time when the stats would be
 250     // dumped so as to ensure that this event happens only after the next
 251     // sync amongst the event queues.  Asingle event queue simulation
 252     // should remain unaffected.
 253     dumpEvent = new StatEvent(when + simQuantum, dump, reset, repeat);
 254 }
 255
 256 void
 257 periodicStatDump(Tick period)
 258 {
 259     /*
 260      * If the period is set to 0, then we do not want to dump periodically,
 261      * thus we deschedule the event. Else, if the period is not 0, but the event
 262      * has already been scheduled, we need to get rid of the old event before we
 263      * create a new one, as the old event will no longer be moved forward in the
 264      * event that we resume from a checkpoint.
 265      */
 266     if (dumpEvent != NULL && (period == 0 || dumpEvent->scheduled())) {
 267         // Event should AutoDelete, so we do not need to free it.
 268         dumpEvent->deschedule();
 269     }
 270
 271     /*
 272      * If the period is not 0, we schedule the event. If this is called with a
 273      * period that is less than the current tick, then we shift the first dump
 274      * by curTick. This ensures that we do not schedule the event is the past.
 275      */
 276     if (period != 0) {
 277         // Schedule the event
 278         if (period >= curTick()) {
 279             schedStatEvent(true, true, (Tick)period, (Tick)period);
 280         } else {
 281             schedStatEvent(true, true, (Tick)period + curTick(), (Tick)period);
 282         }
 283     }
 284 }
 285
 286 void
 287 updateEvents()
 288 {
 289     /*
 290      * If the dumpEvent has been scheduled, but is scheduled in the past, then
 291      * we need to shift the event to be at a valid point in time. Therefore, we
 292      * shift the event by curTick.
 293      */
 294     if (dumpEvent != NULL &&
 295         (dumpEvent->scheduled() && dumpEvent->when() < curTick())) {
 296         // shift by curTick() and reschedule
 297         Tick _when = dumpEvent->when();
 298         dumpEvent->reschedule(_when + curTick());
 299     }
 300 }
 301
 302 } // namespace Stats