src/sim/stat_control.cc

   1 /*
   2  * Copyright (c) 2004-2005 The Regents of The University of Michigan
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are
   7  * met: redistributions of source code must retain the above copyright
   8  * notice, this list of conditions and the following disclaimer;
   9  * redistributions in binary form must reproduce the above copyright
  10  * notice, this list of conditions and the following disclaimer in the
  11  * documentation and/or other materials provided with the distribution;
  12  * neither the name of the copyright holders nor the names of its
  13  * contributors may be used to endorse or promote products derived from
  14  * this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * Authors: Nathan Binkert
  29  */
  30
  31 // This file will contain default statistics for the simulator that
  32 // don't really belong to a specific simulator object
  33
  34 #include <fstream>
  35 #include <iostream>
  36 #include <list>
  37
  38 #include "base/callback.hh"
  39 #include "base/hostinfo.hh"
  40 #include "base/statistics.hh"
  41 #include "base/time.hh"
  42 #include "config/the_isa.hh"
  43 #if THE_ISA == NO_ISA
  44 #include "arch/noisa/cpu_dummy.hh"
  45 #else
  46 #include "cpu/base.hh"
  47 #endif
  48
  49 #include "sim/eventq.hh"
  50 #include "sim/stat_control.hh"
  51
  52 using namespace std;
  53
  54 Stats::Formula simSeconds;
  55 Stats::Value simTicks;
  56 Stats::Value simFreq;
  57
  58 namespace Stats {
  59
  60 Time statTime(true);
  61 Tick startTick;
  62
  63 struct SimTicksReset : public Callback
  64 {
  65     void process()
  66     {
  67         statTime.setTimer();
  68         startTick = curTick();
  69     }
  70 };
  71
  72 double
  73 statElapsedTime()
  74 {
  75     Time now;
  76     now.setTimer();
  77
  78     Time elapsed = now - statTime;
  79     return elapsed;
  80 }
  81
  82 Tick
  83 statElapsedTicks()
  84 {
  85     return curTick() - startTick;
  86 }
  87
  88 SimTicksReset simTicksReset;
  89
  90 struct Global
  91 {
  92     Stats::Formula hostInstRate;
  93     Stats::Formula hostTickRate;
  94     Stats::Value hostMemory;
  95     Stats::Value hostSeconds;
  96
  97     Stats::Value simInsts;
  98
  99     Global();
 100 };
 101
 102 Global::Global()
 103 {
 104     simInsts
 105         .functor(BaseCPU::numSimulatedInstructions)
 106         .name("sim_insts")
 107         .desc("Number of instructions simulated")
 108         .precision(0)
 109         .prereq(simInsts)
 110         ;
 111
 112     simSeconds
 113         .name("sim_seconds")
 114         .desc("Number of seconds simulated")
 115         ;
 116
 117     simFreq
 118         .scalar(SimClock::Frequency)
 119         .name("sim_freq")
 120         .desc("Frequency of simulated ticks")
 121         ;
 122
 123     simTicks
 124         .functor(statElapsedTicks)
 125         .name("sim_ticks")
 126         .desc("Number of ticks simulated")
 127         ;
 128
 129     hostInstRate
 130         .name("host_inst_rate")
 131         .desc("Simulator instruction rate (inst/s)")
 132         .precision(0)
 133         .prereq(simInsts)
 134         ;
 135
 136     hostMemory
 137         .functor(memUsage)
 138         .name("host_mem_usage")
 139         .desc("Number of bytes of host memory used")
 140         .prereq(hostMemory)
 141         ;
 142
 143     hostSeconds
 144         .functor(statElapsedTime)
 145         .name("host_seconds")
 146         .desc("Real time elapsed on the host")
 147         .precision(2)
 148         ;
 149
 150     hostTickRate
 151         .name("host_tick_rate")
 152         .desc("Simulator tick rate (ticks/s)")
 153         .precision(0)
 154         ;
 155
 156     simSeconds = simTicks / simFreq;
 157     hostInstRate = simInsts / hostSeconds;
 158     hostTickRate = simTicks / hostSeconds;
 159
 160     registerResetCallback(&simTicksReset);
 161 }
 162
 163 void
 164 initSimStats()
 165 {
 166     static Global global;
 167 }
 168
 169 class StatEvent : public Event
 170 {
 171   private:
 172     bool dump;
 173     bool reset;
 174     Tick repeat;
 175
 176   public:
 177     StatEvent(bool _dump, bool _reset, Tick _repeat)
 178         : Event(Stat_Event_Pri, AutoDelete),
 179           dump(_dump), reset(_reset), repeat(_repeat)
 180     {
 181     }
 182
 183     virtual void
 184     process()
 185     {
 186         if (dump)
 187             Stats::dump();
 188
 189         if (reset)
 190             Stats::reset();
 191
 192         if (repeat) {
 193             Stats::schedStatEvent(dump, reset, curTick() + repeat, repeat);
 194         }
 195     }
 196 };
 197
 198 void
 199 schedStatEvent(bool dump, bool reset, Tick when, Tick repeat)
 200 {
 201     Event *event = new StatEvent(dump, reset, repeat);
 202     mainEventQueue.schedule(event, when);
 203 }
 204
 205 } // namespace Stats