MEM: Introduce the master/slave port sub-classes in C++
[gem5.git] / src / sim / system.cc
1 /*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * Authors: Steve Reinhardt
42 * Lisa Hsu
43 * Nathan Binkert
44 * Ali Saidi
45 * Rick Strong
46 */
47
48 #include "arch/isa_traits.hh"
49 #include "arch/remote_gdb.hh"
50 #include "arch/utility.hh"
51 #include "arch/vtophys.hh"
52 #include "base/loader/object_file.hh"
53 #include "base/loader/symtab.hh"
54 #include "base/trace.hh"
55 #include "config/the_isa.hh"
56 #include "cpu/thread_context.hh"
57 #include "debug/Loader.hh"
58 #include "debug/WorkItems.hh"
59 #include "kern/kernel_stats.hh"
60 #include "mem/physical.hh"
61 #include "params/System.hh"
62 #include "sim/byteswap.hh"
63 #include "sim/debug.hh"
64 #include "sim/full_system.hh"
65 #include "sim/system.hh"
66
67 using namespace std;
68 using namespace TheISA;
69
70 vector<System *> System::systemList;
71
72 int System::numSystemsRunning = 0;
73
74 System::System(Params *p)
75 : MemObject(p), _systemPort("system_port", this),
76 physmem(p->physmem),
77 _numContexts(0),
78 pagePtr(0),
79 init_param(p->init_param),
80 physProxy(_systemPort),
81 virtProxy(_systemPort),
82 loadAddrMask(p->load_addr_mask),
83 nextPID(0),
84 memoryMode(p->mem_mode),
85 workItemsBegin(0),
86 workItemsEnd(0),
87 numWorkIds(p->num_work_ids),
88 _params(p),
89 totalNumInsts(0),
90 instEventQueue("system instruction-based event queue")
91 {
92 // add self to global system list
93 systemList.push_back(this);
94
95 /** Keep track of all memories we can execute code out of
96 * in our system
97 */
98 for (int x = 0; x < p->memories.size(); x++) {
99 if (!p->memories[x])
100 continue;
101 memRanges.push_back(RangeSize(p->memories[x]->start(),
102 p->memories[x]->size()));
103 }
104
105 if (FullSystem) {
106 kernelSymtab = new SymbolTable;
107 if (!debugSymbolTable)
108 debugSymbolTable = new SymbolTable;
109 }
110
111 // Get the generic system master IDs
112 MasterID tmp_id M5_VAR_USED;
113 tmp_id = getMasterId("writebacks");
114 assert(tmp_id == Request::wbMasterId);
115 tmp_id = getMasterId("functional");
116 assert(tmp_id == Request::funcMasterId);
117 tmp_id = getMasterId("interrupt");
118 assert(tmp_id == Request::intMasterId);
119
120 if (FullSystem) {
121 if (params()->kernel == "") {
122 inform("No kernel set for full system simulation. "
123 "Assuming you know what you're doing if not SPARC ISA\n");
124 } else {
125 // Get the kernel code
126 kernel = createObjectFile(params()->kernel);
127 inform("kernel located at: %s", params()->kernel);
128
129 if (kernel == NULL)
130 fatal("Could not load kernel file %s", params()->kernel);
131
132 // setup entry points
133 kernelStart = kernel->textBase();
134 kernelEnd = kernel->bssBase() + kernel->bssSize();
135 kernelEntry = kernel->entryPoint();
136
137 // load symbols
138 if (!kernel->loadGlobalSymbols(kernelSymtab))
139 fatal("could not load kernel symbols\n");
140
141 if (!kernel->loadLocalSymbols(kernelSymtab))
142 fatal("could not load kernel local symbols\n");
143
144 if (!kernel->loadGlobalSymbols(debugSymbolTable))
145 fatal("could not load kernel symbols\n");
146
147 if (!kernel->loadLocalSymbols(debugSymbolTable))
148 fatal("could not load kernel local symbols\n");
149
150 // Loading only needs to happen once and after memory system is
151 // connected so it will happen in initState()
152 }
153 }
154
155 // increment the number of running systms
156 numSystemsRunning++;
157
158 }
159
160 System::~System()
161 {
162 delete kernelSymtab;
163 delete kernel;
164
165 for (uint32_t j = 0; j < numWorkIds; j++)
166 delete workItemStats[j];
167 }
168
169 void
170 System::init()
171 {
172 // check that the system port is connected
173 if (!_systemPort.isConnected())
174 panic("System port on %s is not connected.\n", name());
175 }
176
177 MasterPort&
178 System::getMasterPort(const std::string &if_name, int idx)
179 {
180 // no need to distinguish at the moment (besides checking)
181 return _systemPort;
182 }
183
184 void
185 System::setMemoryMode(Enums::MemoryMode mode)
186 {
187 assert(getState() == Drained);
188 memoryMode = mode;
189 }
190
191 bool System::breakpoint()
192 {
193 if (remoteGDB.size())
194 return remoteGDB[0]->breakpoint();
195 return false;
196 }
197
198 /**
199 * Setting rgdb_wait to a positive integer waits for a remote debugger to
200 * connect to that context ID before continuing. This should really
201 be a parameter on the CPU object or something...
202 */
203 int rgdb_wait = -1;
204
205 int
206 System::registerThreadContext(ThreadContext *tc, int assigned)
207 {
208 int id;
209 if (assigned == -1) {
210 for (id = 0; id < threadContexts.size(); id++) {
211 if (!threadContexts[id])
212 break;
213 }
214
215 if (threadContexts.size() <= id)
216 threadContexts.resize(id + 1);
217 } else {
218 if (threadContexts.size() <= assigned)
219 threadContexts.resize(assigned + 1);
220 id = assigned;
221 }
222
223 if (threadContexts[id])
224 fatal("Cannot have two CPUs with the same id (%d)\n", id);
225
226 threadContexts[id] = tc;
227 _numContexts++;
228
229 int port = getRemoteGDBPort();
230 if (port) {
231 RemoteGDB *rgdb = new RemoteGDB(this, tc);
232 GDBListener *gdbl = new GDBListener(rgdb, port + id);
233 gdbl->listen();
234
235 if (rgdb_wait != -1 && rgdb_wait == id)
236 gdbl->accept();
237
238 if (remoteGDB.size() <= id) {
239 remoteGDB.resize(id + 1);
240 }
241
242 remoteGDB[id] = rgdb;
243 }
244
245 activeCpus.push_back(false);
246
247 return id;
248 }
249
250 int
251 System::numRunningContexts()
252 {
253 int running = 0;
254 for (int i = 0; i < _numContexts; ++i) {
255 if (threadContexts[i]->status() != ThreadContext::Halted)
256 ++running;
257 }
258 return running;
259 }
260
261 void
262 System::initState()
263 {
264 int i;
265 if (FullSystem) {
266 for (i = 0; i < threadContexts.size(); i++)
267 TheISA::startupCPU(threadContexts[i], i);
268 // Moved from the constructor to here since it relies on the
269 // address map being resolved in the interconnect
270 /**
271 * Load the kernel code into memory
272 */
273 if (params()->kernel != "") {
274 // Load program sections into memory
275 kernel->loadSections(physProxy, loadAddrMask);
276
277 DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
278 DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
279 DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
280 DPRINTF(Loader, "Kernel loaded...\n");
281 }
282 }
283
284 activeCpus.clear();
285
286 if (!FullSystem)
287 return;
288
289 for (i = 0; i < threadContexts.size(); i++)
290 TheISA::startupCPU(threadContexts[i], i);
291 }
292
293 void
294 System::replaceThreadContext(ThreadContext *tc, int context_id)
295 {
296 if (context_id >= threadContexts.size()) {
297 panic("replaceThreadContext: bad id, %d >= %d\n",
298 context_id, threadContexts.size());
299 }
300
301 threadContexts[context_id] = tc;
302 if (context_id < remoteGDB.size())
303 remoteGDB[context_id]->replaceThreadContext(tc);
304 }
305
306 Addr
307 System::allocPhysPages(int npages)
308 {
309 Addr return_addr = pagePtr << LogVMPageSize;
310 pagePtr += npages;
311 if (pagePtr > physmem->size())
312 fatal("Out of memory, please increase size of physical memory.");
313 return return_addr;
314 }
315
316 Addr
317 System::memSize()
318 {
319 return physmem->size();
320 }
321
322 Addr
323 System::freeMemSize()
324 {
325 return physmem->size() - (pagePtr << LogVMPageSize);
326 }
327
328 bool
329 System::isMemory(const Addr addr) const
330 {
331 std::list<Range<Addr> >::const_iterator i;
332 for (i = memRanges.begin(); i != memRanges.end(); i++) {
333 if (*i == addr)
334 return true;
335 }
336 return false;
337 }
338
339 void
340 System::resume()
341 {
342 SimObject::resume();
343 totalNumInsts = 0;
344 }
345
346 void
347 System::serialize(ostream &os)
348 {
349 if (FullSystem)
350 kernelSymtab->serialize("kernel_symtab", os);
351 SERIALIZE_SCALAR(pagePtr);
352 SERIALIZE_SCALAR(nextPID);
353 }
354
355
356 void
357 System::unserialize(Checkpoint *cp, const string &section)
358 {
359 if (FullSystem)
360 kernelSymtab->unserialize("kernel_symtab", cp, section);
361 UNSERIALIZE_SCALAR(pagePtr);
362 UNSERIALIZE_SCALAR(nextPID);
363 }
364
365 void
366 System::regStats()
367 {
368 for (uint32_t j = 0; j < numWorkIds ; j++) {
369 workItemStats[j] = new Stats::Histogram();
370 stringstream namestr;
371 ccprintf(namestr, "work_item_type%d", j);
372 workItemStats[j]->init(20)
373 .name(name() + "." + namestr.str())
374 .desc("Run time stat for" + namestr.str())
375 .prereq(*workItemStats[j]);
376 }
377 }
378
379 void
380 System::workItemEnd(uint32_t tid, uint32_t workid)
381 {
382 std::pair<uint32_t,uint32_t> p(tid, workid);
383 if (!lastWorkItemStarted.count(p))
384 return;
385
386 Tick samp = curTick() - lastWorkItemStarted[p];
387 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
388
389 if (workid >= numWorkIds)
390 fatal("Got workid greater than specified in system configuration\n");
391
392 workItemStats[workid]->sample(samp);
393 lastWorkItemStarted.erase(p);
394 }
395
396 void
397 System::printSystems()
398 {
399 vector<System *>::iterator i = systemList.begin();
400 vector<System *>::iterator end = systemList.end();
401 for (; i != end; ++i) {
402 System *sys = *i;
403 cerr << "System " << sys->name() << ": " << hex << sys << endl;
404 }
405 }
406
407 void
408 printSystems()
409 {
410 System::printSystems();
411 }
412
413 MasterID
414 System::getMasterId(std::string master_name)
415 {
416 // strip off system name if the string starts with it
417 if (master_name.size() > name().size() &&
418 master_name.compare(0, name().size(), name()) == 0)
419 master_name = master_name.erase(0, name().size() + 1);
420
421 // CPUs in switch_cpus ask for ids again after switching
422 for (int i = 0; i < masterIds.size(); i++) {
423 if (masterIds[i] == master_name) {
424 return i;
425 }
426 }
427
428 // todo: Check if stats are enabled yet
429 // I just don't know a good way to do it
430
431 if (false)
432 fatal("Can't request a masterId after regStats(). \
433 You must do so in init().\n");
434
435 masterIds.push_back(master_name);
436
437 return masterIds.size() - 1;
438 }
439
440 std::string
441 System::getMasterName(MasterID master_id)
442 {
443 if (master_id >= masterIds.size())
444 fatal("Invalid master_id passed to getMasterName()\n");
445
446 return masterIds[master_id];
447 }
448
449 const char *System::MemoryModeStrings[3] = {"invalid", "atomic",
450 "timing"};
451
452 System *
453 SystemParams::create()
454 {
455 return new System(this);
456 }