cb412a866339d7502510a53a519476e10f03d03d
[gem5.git] / src / sim / system.cc
1 /*
2 * Copyright (c) 2011-2014,2017-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2003-2006 The Regents of The University of Michigan
15 * Copyright (c) 2011 Regents of the University of California
16 * All rights reserved.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions are
20 * met: redistributions of source code must retain the above copyright
21 * notice, this list of conditions and the following disclaimer;
22 * redistributions in binary form must reproduce the above copyright
23 * notice, this list of conditions and the following disclaimer in the
24 * documentation and/or other materials provided with the distribution;
25 * neither the name of the copyright holders nor the names of its
26 * contributors may be used to endorse or promote products derived from
27 * this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 #include "sim/system.hh"
43
44 #include <algorithm>
45
46 #include "arch/remote_gdb.hh"
47 #include "arch/utility.hh"
48 #include "base/compiler.hh"
49 #include "base/loader/object_file.hh"
50 #include "base/loader/symtab.hh"
51 #include "base/str.hh"
52 #include "base/trace.hh"
53 #include "config/use_kvm.hh"
54 #if USE_KVM
55 #include "cpu/kvm/base.hh"
56 #include "cpu/kvm/vm.hh"
57 #endif
58 #include "cpu/base.hh"
59 #include "cpu/thread_context.hh"
60 #include "debug/Loader.hh"
61 #include "debug/Quiesce.hh"
62 #include "debug/WorkItems.hh"
63 #include "mem/abstract_mem.hh"
64 #include "mem/physical.hh"
65 #include "params/System.hh"
66 #include "sim/byteswap.hh"
67 #include "sim/debug.hh"
68 #include "sim/full_system.hh"
69 #include "sim/redirect_path.hh"
70
71 using namespace std;
72 using namespace TheISA;
73
74 vector<System *> System::systemList;
75
76 void
77 System::Threads::Thread::resume()
78 {
79 # if THE_ISA != NULL_ISA
80 DPRINTFS(Quiesce, context->getCpuPtr(), "activating\n");
81 context->activate();
82 # endif
83 }
84
85 std::string
86 System::Threads::Thread::name() const
87 {
88 assert(context);
89 return csprintf("%s.threads[%d]", context->getSystemPtr()->name(),
90 context->contextId());
91 }
92
93 void
94 System::Threads::Thread::quiesce() const
95 {
96 context->suspend();
97 auto *workload = context->getSystemPtr()->workload;
98 if (workload)
99 workload->recordQuiesce();
100 }
101
102 ContextID
103 System::Threads::insert(ThreadContext *tc, ContextID id)
104 {
105 if (id == InvalidContextID) {
106 for (id = 0; id < size(); id++) {
107 if (!threads[id].context)
108 break;
109 }
110 }
111
112 if (id >= size())
113 threads.resize(id + 1);
114
115 fatal_if(threads[id].context,
116 "Cannot have two thread contexts with the same id (%d).", id);
117
118 auto *sys = tc->getSystemPtr();
119
120 auto &t = thread(id);
121 t.context = tc;
122 // Look up this thread again on resume, in case the threads vector has
123 // been reallocated.
124 t.resumeEvent = new EventFunctionWrapper(
125 [this, id](){ thread(id).resume(); }, sys->name());
126 # if THE_ISA != NULL_ISA
127 int port = getRemoteGDBPort();
128 if (port) {
129 t.gdb = new RemoteGDB(sys, tc, port + id);
130 t.gdb->listen();
131 }
132 # endif
133
134 return id;
135 }
136
137 void
138 System::Threads::replace(ThreadContext *tc, ContextID id)
139 {
140 auto &t = thread(id);
141 panic_if(!t.context, "Can't replace a context which doesn't exist.");
142 if (t.gdb)
143 t.gdb->replaceThreadContext(tc);
144 # if THE_ISA != NULL_ISA
145 if (t.resumeEvent->scheduled()) {
146 Tick when = t.resumeEvent->when();
147 t.context->getCpuPtr()->deschedule(t.resumeEvent);
148 tc->getCpuPtr()->schedule(t.resumeEvent, when);
149 }
150 # endif
151 t.context = tc;
152 }
153
154 ThreadContext *
155 System::Threads::findFree()
156 {
157 for (auto &thread: threads) {
158 if (thread.context->status() == ThreadContext::Halted)
159 return thread.context;
160 }
161 return nullptr;
162 }
163
164 int
165 System::Threads::numRunning() const
166 {
167 int count = 0;
168 for (auto &thread: threads) {
169 auto status = thread.context->status();
170 if (status != ThreadContext::Halted &&
171 status != ThreadContext::Halting) {
172 count++;
173 }
174 }
175 return count;
176 }
177
178 void
179 System::Threads::quiesce(ContextID id)
180 {
181 auto &t = thread(id);
182 # if THE_ISA != NULL_ISA
183 BaseCPU M5_VAR_USED *cpu = t.context->getCpuPtr();
184 DPRINTFS(Quiesce, cpu, "quiesce()\n");
185 # endif
186 t.quiesce();
187 }
188
189 void
190 System::Threads::quiesceTick(ContextID id, Tick when)
191 {
192 # if THE_ISA != NULL_ISA
193 auto &t = thread(id);
194 BaseCPU *cpu = t.context->getCpuPtr();
195
196 DPRINTFS(Quiesce, cpu, "quiesceTick until %u\n", when);
197 t.quiesce();
198
199 cpu->reschedule(t.resumeEvent, when, true);
200 # endif
201 }
202
203 int System::numSystemsRunning = 0;
204
205 System::System(Params *p)
206 : SimObject(p), _systemPort("system_port", this),
207 multiThread(p->multi_thread),
208 pagePtr(0),
209 init_param(p->init_param),
210 physProxy(_systemPort, p->cache_line_size),
211 workload(p->workload),
212 #if USE_KVM
213 kvmVM(p->kvm_vm),
214 #else
215 kvmVM(nullptr),
216 #endif
217 physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve,
218 p->shared_backstore),
219 memoryMode(p->mem_mode),
220 _cacheLineSize(p->cache_line_size),
221 workItemsBegin(0),
222 workItemsEnd(0),
223 numWorkIds(p->num_work_ids),
224 thermalModel(p->thermal_model),
225 _params(p),
226 _m5opRange(p->m5ops_base ?
227 RangeSize(p->m5ops_base, 0x10000) :
228 AddrRange(1, 0)), // Create an empty range if disabled
229 totalNumInsts(0),
230 redirectPaths(p->redirect_paths)
231 {
232 if (workload)
233 workload->system = this;
234
235 // add self to global system list
236 systemList.push_back(this);
237
238 #if USE_KVM
239 if (kvmVM) {
240 kvmVM->setSystem(this);
241 }
242 #endif
243
244 // check if the cache line size is a value known to work
245 if (!(_cacheLineSize == 16 || _cacheLineSize == 32 ||
246 _cacheLineSize == 64 || _cacheLineSize == 128))
247 warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n");
248
249 // Get the generic system requestor IDs
250 RequestorID tmp_id M5_VAR_USED;
251 tmp_id = getRequestorId(this, "writebacks");
252 assert(tmp_id == Request::wbRequestorId);
253 tmp_id = getRequestorId(this, "functional");
254 assert(tmp_id == Request::funcRequestorId);
255 tmp_id = getRequestorId(this, "interrupt");
256 assert(tmp_id == Request::intRequestorId);
257
258 // increment the number of running systems
259 numSystemsRunning++;
260
261 // Set back pointers to the system in all memories
262 for (int x = 0; x < params()->memories.size(); x++)
263 params()->memories[x]->system(this);
264 }
265
266 System::~System()
267 {
268 for (uint32_t j = 0; j < numWorkIds; j++)
269 delete workItemStats[j];
270 }
271
272 void
273 System::init()
274 {
275 // check that the system port is connected
276 if (!_systemPort.isConnected())
277 panic("System port on %s is not connected.\n", name());
278 }
279
280 void
281 System::startup()
282 {
283 SimObject::startup();
284
285 // Now that we're about to start simulation, wait for GDB connections if
286 // requested.
287 #if THE_ISA != NULL_ISA
288 for (int i = 0; i < threads.size(); i++) {
289 auto *gdb = threads.thread(i).gdb;
290 auto *cpu = threads[i]->getCpuPtr();
291 if (gdb && cpu->waitForRemoteGDB()) {
292 inform("%s: Waiting for a remote GDB connection on port %d.",
293 cpu->name(), gdb->port());
294 gdb->connect();
295 }
296 }
297 #endif
298 }
299
300 Port &
301 System::getPort(const std::string &if_name, PortID idx)
302 {
303 // no need to distinguish at the moment (besides checking)
304 return _systemPort;
305 }
306
307 void
308 System::setMemoryMode(Enums::MemoryMode mode)
309 {
310 assert(drainState() == DrainState::Drained);
311 memoryMode = mode;
312 }
313
314 bool System::breakpoint()
315 {
316 if (!threads.size())
317 return false;
318 auto *gdb = threads.thread(0).gdb;
319 if (!gdb)
320 return false;
321 return gdb->breakpoint();
322 }
323
324 ContextID
325 System::registerThreadContext(ThreadContext *tc, ContextID assigned)
326 {
327 ContextID id = threads.insert(tc, assigned);
328
329 for (auto *e: liveEvents)
330 tc->schedule(e);
331
332 return id;
333 }
334
335 bool
336 System::schedule(PCEvent *event)
337 {
338 bool all = true;
339 liveEvents.push_back(event);
340 for (auto *tc: threads)
341 all = tc->schedule(event) && all;
342 return all;
343 }
344
345 bool
346 System::remove(PCEvent *event)
347 {
348 bool all = true;
349 liveEvents.remove(event);
350 for (auto *tc: threads)
351 all = tc->remove(event) && all;
352 return all;
353 }
354
355 void
356 System::replaceThreadContext(ThreadContext *tc, ContextID context_id)
357 {
358 auto *otc = threads[context_id];
359 threads.replace(tc, context_id);
360
361 for (auto *e: liveEvents) {
362 otc->remove(e);
363 tc->schedule(e);
364 }
365 }
366
367 bool
368 System::validKvmEnvironment() const
369 {
370 #if USE_KVM
371 if (threads.empty())
372 return false;
373
374 for (auto *tc: threads) {
375 if (!dynamic_cast<BaseKvmCPU *>(tc->getCpuPtr()))
376 return false;
377 }
378
379 return true;
380 #else
381 return false;
382 #endif
383 }
384
385 Addr
386 System::allocPhysPages(int npages)
387 {
388 Addr return_addr = pagePtr << PageShift;
389 pagePtr += npages;
390
391 Addr next_return_addr = pagePtr << PageShift;
392
393 if (_m5opRange.contains(next_return_addr)) {
394 warn("Reached m5ops MMIO region\n");
395 return_addr = 0xffffffff;
396 pagePtr = 0xffffffff >> PageShift;
397 }
398
399 if ((pagePtr << PageShift) > physmem.totalSize())
400 fatal("Out of memory, please increase size of physical memory.");
401 return return_addr;
402 }
403
404 Addr
405 System::memSize() const
406 {
407 return physmem.totalSize();
408 }
409
410 Addr
411 System::freeMemSize() const
412 {
413 return physmem.totalSize() - (pagePtr << PageShift);
414 }
415
416 bool
417 System::isMemAddr(Addr addr) const
418 {
419 return physmem.isMemAddr(addr);
420 }
421
422 void
423 System::addDeviceMemory(RequestorID requestor_id, AbstractMemory *deviceMemory)
424 {
425 if (!deviceMemMap.count(requestor_id)) {
426 deviceMemMap.insert(std::make_pair(requestor_id, deviceMemory));
427 }
428 }
429
430 bool
431 System::isDeviceMemAddr(PacketPtr pkt) const
432 {
433 const RequestorID& id = pkt->requestorId();
434
435 return (deviceMemMap.count(id) &&
436 deviceMemMap.at(id)->getAddrRange().contains(pkt->getAddr()));
437 }
438
439 AbstractMemory *
440 System::getDeviceMemory(RequestorID id) const
441 {
442 panic_if(!deviceMemMap.count(id),
443 "No device memory found for RequestorID %d\n", id);
444 return deviceMemMap.at(id);
445 }
446
447 void
448 System::drainResume()
449 {
450 totalNumInsts = 0;
451 }
452
453 void
454 System::serialize(CheckpointOut &cp) const
455 {
456 SERIALIZE_SCALAR(pagePtr);
457
458 for (auto &t: threads.threads) {
459 Tick when = 0;
460 if (t.resumeEvent && t.resumeEvent->scheduled())
461 when = t.resumeEvent->when();
462 ContextID id = t.context->contextId();
463 paramOut(cp, csprintf("quiesceEndTick_%d", id), when);
464 }
465
466 // also serialize the memories in the system
467 physmem.serializeSection(cp, "physmem");
468 }
469
470
471 void
472 System::unserialize(CheckpointIn &cp)
473 {
474 UNSERIALIZE_SCALAR(pagePtr);
475
476 for (auto &t: threads.threads) {
477 Tick when = 0;
478 ContextID id = t.context->contextId();
479 if (!optParamIn(cp, csprintf("quiesceEndTick_%d", id), when) ||
480 !when || !t.resumeEvent) {
481 continue;
482 }
483 # if THE_ISA != NULL_ISA
484 t.context->getCpuPtr()->schedule(t.resumeEvent, when);
485 # endif
486 }
487
488 // also unserialize the memories in the system
489 physmem.unserializeSection(cp, "physmem");
490 }
491
492 void
493 System::regStats()
494 {
495 SimObject::regStats();
496
497 for (uint32_t j = 0; j < numWorkIds ; j++) {
498 workItemStats[j] = new Stats::Histogram();
499 stringstream namestr;
500 ccprintf(namestr, "work_item_type%d", j);
501 workItemStats[j]->init(20)
502 .name(name() + "." + namestr.str())
503 .desc("Run time stat for" + namestr.str())
504 .prereq(*workItemStats[j]);
505 }
506 }
507
508 void
509 System::workItemEnd(uint32_t tid, uint32_t workid)
510 {
511 std::pair<uint32_t,uint32_t> p(tid, workid);
512 if (!lastWorkItemStarted.count(p))
513 return;
514
515 Tick samp = curTick() - lastWorkItemStarted[p];
516 DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
517
518 if (workid >= numWorkIds)
519 fatal("Got workid greater than specified in system configuration\n");
520
521 workItemStats[workid]->sample(samp);
522 lastWorkItemStarted.erase(p);
523 }
524
525 void
526 System::printSystems()
527 {
528 ios::fmtflags flags(cerr.flags());
529
530 vector<System *>::iterator i = systemList.begin();
531 vector<System *>::iterator end = systemList.end();
532 for (; i != end; ++i) {
533 System *sys = *i;
534 cerr << "System " << sys->name() << ": " << hex << sys << endl;
535 }
536
537 cerr.flags(flags);
538 }
539
540 void
541 printSystems()
542 {
543 System::printSystems();
544 }
545
546 std::string
547 System::stripSystemName(const std::string& requestor_name) const
548 {
549 if (startswith(requestor_name, name())) {
550 return requestor_name.substr(name().size());
551 } else {
552 return requestor_name;
553 }
554 }
555
556 RequestorID
557 System::lookupRequestorId(const SimObject* obj) const
558 {
559 RequestorID id = Request::invldRequestorId;
560
561 // number of occurrences of the SimObject pointer
562 // in the requestor list.
563 auto obj_number = 0;
564
565 for (int i = 0; i < requestors.size(); i++) {
566 if (requestors[i].obj == obj) {
567 id = i;
568 obj_number++;
569 }
570 }
571
572 fatal_if(obj_number > 1,
573 "Cannot lookup RequestorID by SimObject pointer: "
574 "More than one requestor is sharing the same SimObject\n");
575
576 return id;
577 }
578
579 RequestorID
580 System::lookupRequestorId(const std::string& requestor_name) const
581 {
582 std::string name = stripSystemName(requestor_name);
583
584 for (int i = 0; i < requestors.size(); i++) {
585 if (requestors[i].req_name == name) {
586 return i;
587 }
588 }
589
590 return Request::invldRequestorId;
591 }
592
593 RequestorID
594 System::getGlobalRequestorId(const std::string& requestor_name)
595 {
596 return _getRequestorId(nullptr, requestor_name);
597 }
598
599 RequestorID
600 System::getRequestorId(const SimObject* requestor, std::string subrequestor)
601 {
602 auto requestor_name = leafRequestorName(requestor, subrequestor);
603 return _getRequestorId(requestor, requestor_name);
604 }
605
606 RequestorID
607 System::_getRequestorId(const SimObject* requestor,
608 const std::string& requestor_name)
609 {
610 std::string name = stripSystemName(requestor_name);
611
612 // CPUs in switch_cpus ask for ids again after switching
613 for (int i = 0; i < requestors.size(); i++) {
614 if (requestors[i].req_name == name) {
615 return i;
616 }
617 }
618
619 // Verify that the statistics haven't been enabled yet
620 // Otherwise objects will have sized their stat buckets and
621 // they will be too small
622
623 if (Stats::enabled()) {
624 fatal("Can't request a requestorId after regStats(). "
625 "You must do so in init().\n");
626 }
627
628 // Generate a new RequestorID incrementally
629 RequestorID requestor_id = requestors.size();
630
631 // Append the new Requestor metadata to the group of system Requestors.
632 requestors.emplace_back(requestor, name, requestor_id);
633
634 return requestors.back().id;
635 }
636
637 std::string
638 System::leafRequestorName(const SimObject* requestor,
639 const std::string& subrequestor)
640 {
641 if (subrequestor.empty()) {
642 return requestor->name();
643 } else {
644 // Get the full requestor name by appending the subrequestor name to
645 // the root SimObject requestor name
646 return requestor->name() + "." + subrequestor;
647 }
648 }
649
650 std::string
651 System::getRequestorName(RequestorID requestor_id)
652 {
653 if (requestor_id >= requestors.size())
654 fatal("Invalid requestor_id passed to getRequestorName()\n");
655
656 const auto& requestor_info = requestors[requestor_id];
657 return requestor_info.req_name;
658 }
659
660 System *
661 SystemParams::create()
662 {
663 return new System(this);
664 }