src/sim/system.cc

   1 /*
   2  * Copyright (c) 2011-2014,2017 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2003-2006 The Regents of The University of Michigan
  15  * Copyright (c) 2011 Regents of the University of California
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Steve Reinhardt
  42  *          Lisa Hsu
  43  *          Nathan Binkert
  44  *          Ali Saidi
  45  *          Rick Strong
  46  */
  47
  48 #include "sim/system.hh"
  49
  50 #include "arch/remote_gdb.hh"
  51 #include "arch/utility.hh"
  52 #include "base/loader/object_file.hh"
  53 #include "base/loader/symtab.hh"
  54 #include "base/str.hh"
  55 #include "base/trace.hh"
  56 #include "config/use_kvm.hh"
  57 #if USE_KVM
  58 #include "cpu/kvm/base.hh"
  59 #include "cpu/kvm/vm.hh"
  60 #endif
  61 #include "cpu/base.hh"
  62 #include "cpu/thread_context.hh"
  63 #include "debug/Loader.hh"
  64 #include "debug/WorkItems.hh"
  65 #include "mem/abstract_mem.hh"
  66 #include "mem/physical.hh"
  67 #include "params/System.hh"
  68 #include "sim/byteswap.hh"
  69 #include "sim/debug.hh"
  70 #include "sim/full_system.hh"
  71
  72 /**
  73  * To avoid linking errors with LTO, only include the header if we
  74  * actually have a definition.
  75  */
  76 #if THE_ISA != NULL_ISA
  77 #include "kern/kernel_stats.hh"
  78
  79 #endif
  80
  81 using namespace std;
  82 using namespace TheISA;
  83
  84 vector<System *> System::systemList;
  85
  86 int System::numSystemsRunning = 0;
  87
  88 System::System(Params *p)
  89     : MemObject(p), _systemPort("system_port", this),
  90       _numContexts(0),
  91       multiThread(p->multi_thread),
  92       pagePtr(0),
  93       init_param(p->init_param),
  94       physProxy(_systemPort, p->cache_line_size),
  95       kernelSymtab(nullptr),
  96       kernel(nullptr),
  97       loadAddrMask(p->load_addr_mask),
  98       loadAddrOffset(p->load_offset),
  99 #if USE_KVM
 100       kvmVM(p->kvm_vm),
 101 #else
 102       kvmVM(nullptr),
 103 #endif
 104       physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve),
 105       memoryMode(p->mem_mode),
 106       _cacheLineSize(p->cache_line_size),
 107       workItemsBegin(0),
 108       workItemsEnd(0),
 109       numWorkIds(p->num_work_ids),
 110       thermalModel(p->thermal_model),
 111       _params(p),
 112       totalNumInsts(0),
 113       instEventQueue("system instruction-based event queue")
 114 {
 115     // add self to global system list
 116     systemList.push_back(this);
 117
 118 #if USE_KVM
 119     if (kvmVM) {
 120         kvmVM->setSystem(this);
 121     }
 122 #endif
 123
 124     if (FullSystem) {
 125         kernelSymtab = new SymbolTable;
 126         if (!debugSymbolTable)
 127             debugSymbolTable = new SymbolTable;
 128     }
 129
 130     // check if the cache line size is a value known to work
 131     if (!(_cacheLineSize == 16 || _cacheLineSize == 32 ||
 132           _cacheLineSize == 64 || _cacheLineSize == 128))
 133         warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n");
 134
 135     // Get the generic system master IDs
 136     MasterID tmp_id M5_VAR_USED;
 137     tmp_id = getMasterId("writebacks");
 138     assert(tmp_id == Request::wbMasterId);
 139     tmp_id = getMasterId("functional");
 140     assert(tmp_id == Request::funcMasterId);
 141     tmp_id = getMasterId("interrupt");
 142     assert(tmp_id == Request::intMasterId);
 143
 144     if (FullSystem) {
 145         if (params()->kernel == "") {
 146             inform("No kernel set for full system simulation. "
 147                    "Assuming you know what you're doing\n");
 148         } else {
 149             // Get the kernel code
 150             kernel = createObjectFile(params()->kernel);
 151             inform("kernel located at: %s", params()->kernel);
 152
 153             if (kernel == NULL)
 154                 fatal("Could not load kernel file %s", params()->kernel);
 155
 156             // setup entry points
 157             kernelStart = kernel->textBase();
 158             kernelEnd = kernel->bssBase() + kernel->bssSize();
 159             kernelEntry = kernel->entryPoint();
 160
 161             // If load_addr_mask is set to 0x0, then auto-calculate
 162             // the smallest mask to cover all kernel addresses so gem5
 163             // can relocate the kernel to a new offset.
 164             if (loadAddrMask == 0) {
 165                 Addr shift_amt = findMsbSet(kernelEnd - kernelStart) + 1;
 166                 loadAddrMask = ((Addr)1 << shift_amt) - 1;
 167             }
 168
 169             // load symbols
 170             if (!kernel->loadGlobalSymbols(kernelSymtab))
 171                 fatal("could not load kernel symbols\n");
 172
 173             if (!kernel->loadLocalSymbols(kernelSymtab))
 174                 fatal("could not load kernel local symbols\n");
 175
 176             if (!kernel->loadGlobalSymbols(debugSymbolTable))
 177                 fatal("could not load kernel symbols\n");
 178
 179             if (!kernel->loadLocalSymbols(debugSymbolTable))
 180                 fatal("could not load kernel local symbols\n");
 181
 182             // Loading only needs to happen once and after memory system is
 183             // connected so it will happen in initState()
 184         }
 185
 186         for (const auto &obj_name : p->kernel_extras) {
 187             inform("Loading additional kernel object: %s", obj_name);
 188             ObjectFile *obj = createObjectFile(obj_name);
 189             fatal_if(!obj, "Failed to additional kernel object '%s'.\n",
 190                      obj_name);
 191             kernelExtras.push_back(obj);
 192         }
 193     }
 194
 195     // increment the number of running systems
 196     numSystemsRunning++;
 197
 198     // Set back pointers to the system in all memories
 199     for (int x = 0; x < params()->memories.size(); x++)
 200         params()->memories[x]->system(this);
 201 }
 202
 203 System::~System()
 204 {
 205     delete kernelSymtab;
 206     delete kernel;
 207
 208     for (uint32_t j = 0; j < numWorkIds; j++)
 209         delete workItemStats[j];
 210 }
 211
 212 void
 213 System::init()
 214 {
 215     // check that the system port is connected
 216     if (!_systemPort.isConnected())
 217         panic("System port on %s is not connected.\n", name());
 218 }
 219
 220 BaseMasterPort&
 221 System::getMasterPort(const std::string &if_name, PortID idx)
 222 {
 223     // no need to distinguish at the moment (besides checking)
 224     return _systemPort;
 225 }
 226
 227 void
 228 System::setMemoryMode(Enums::MemoryMode mode)
 229 {
 230     assert(drainState() == DrainState::Drained);
 231     memoryMode = mode;
 232 }
 233
 234 bool System::breakpoint()
 235 {
 236     if (remoteGDB.size())
 237         return remoteGDB[0]->breakpoint();
 238     return false;
 239 }
 240
 241 ContextID
 242 System::registerThreadContext(ThreadContext *tc, ContextID assigned)
 243 {
 244     int id;
 245     if (assigned == InvalidContextID) {
 246         for (id = 0; id < threadContexts.size(); id++) {
 247             if (!threadContexts[id])
 248                 break;
 249         }
 250
 251         if (threadContexts.size() <= id)
 252             threadContexts.resize(id + 1);
 253     } else {
 254         if (threadContexts.size() <= assigned)
 255             threadContexts.resize(assigned + 1);
 256         id = assigned;
 257     }
 258
 259     if (threadContexts[id])
 260         fatal("Cannot have two CPUs with the same id (%d)\n", id);
 261
 262     threadContexts[id] = tc;
 263     _numContexts++;
 264
 265 #if THE_ISA != NULL_ISA
 266     int port = getRemoteGDBPort();
 267     if (port) {
 268         RemoteGDB *rgdb = new RemoteGDB(this, tc);
 269         GDBListener *gdbl = new GDBListener(rgdb, port + id);
 270         gdbl->listen();
 271
 272         BaseCPU *cpu = tc->getCpuPtr();
 273         if (cpu->waitForRemoteGDB()) {
 274             inform("%s: Waiting for a remote GDB connection on port %d.\n",
 275                    cpu->name(), gdbl->getPort());
 276
 277             gdbl->accept();
 278         }
 279         if (remoteGDB.size() <= id) {
 280             remoteGDB.resize(id + 1);
 281         }
 282
 283         remoteGDB[id] = rgdb;
 284     }
 285 #endif
 286
 287     activeCpus.push_back(false);
 288
 289     return id;
 290 }
 291
 292 int
 293 System::numRunningContexts()
 294 {
 295     int running = 0;
 296     for (int i = 0; i < _numContexts; ++i) {
 297         if (threadContexts[i]->status() != ThreadContext::Halted)
 298             ++running;
 299     }
 300     return running;
 301 }
 302
 303 void
 304 System::initState()
 305 {
 306     if (FullSystem) {
 307         for (int i = 0; i < threadContexts.size(); i++)
 308             TheISA::startupCPU(threadContexts[i], i);
 309         // Moved from the constructor to here since it relies on the
 310         // address map being resolved in the interconnect
 311         /**
 312          * Load the kernel code into memory
 313          */
 314         if (params()->kernel != "")  {
 315             if (params()->kernel_addr_check) {
 316                 // Validate kernel mapping before loading binary
 317                 if (!(isMemAddr((kernelStart & loadAddrMask) +
 318                                 loadAddrOffset) &&
 319                       isMemAddr((kernelEnd & loadAddrMask) +
 320                                 loadAddrOffset))) {
 321                     fatal("Kernel is mapped to invalid location (not memory). "
 322                           "kernelStart 0x(%x) - kernelEnd 0x(%x) %#x:%#x\n",
 323                           kernelStart,
 324                           kernelEnd, (kernelStart & loadAddrMask) +
 325                           loadAddrOffset,
 326                           (kernelEnd & loadAddrMask) + loadAddrOffset);
 327                 }
 328             }
 329             // Load program sections into memory
 330             kernel->loadSections(physProxy, loadAddrMask, loadAddrOffset);
 331             for (const auto &extra_kernel : kernelExtras) {
 332                 extra_kernel->loadSections(physProxy, loadAddrMask,
 333                                            loadAddrOffset);
 334             }
 335
 336             DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
 337             DPRINTF(Loader, "Kernel end   = %#x\n", kernelEnd);
 338             DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
 339             DPRINTF(Loader, "Kernel loaded...\n");
 340         }
 341     }
 342 }
 343
 344 void
 345 System::replaceThreadContext(ThreadContext *tc, ContextID context_id)
 346 {
 347     if (context_id >= threadContexts.size()) {
 348         panic("replaceThreadContext: bad id, %d >= %d\n",
 349               context_id, threadContexts.size());
 350     }
 351
 352     threadContexts[context_id] = tc;
 353     if (context_id < remoteGDB.size())
 354         remoteGDB[context_id]->replaceThreadContext(tc);
 355 }
 356
 357 bool
 358 System::validKvmEnvironment() const
 359 {
 360 #if USE_KVM
 361     if (threadContexts.empty())
 362         return false;
 363
 364     for (auto tc : threadContexts) {
 365         if (dynamic_cast<BaseKvmCPU*>(tc->getCpuPtr()) == nullptr) {
 366             return false;
 367         }
 368     }
 369     return true;
 370 #else
 371     return false;
 372 #endif
 373 }
 374
 375 Addr
 376 System::allocPhysPages(int npages)
 377 {
 378     Addr return_addr = pagePtr << PageShift;
 379     pagePtr += npages;
 380
 381     Addr next_return_addr = pagePtr << PageShift;
 382
 383     AddrRange m5opRange(0xffff0000, 0xffffffff);
 384     if (m5opRange.contains(next_return_addr)) {
 385         warn("Reached m5ops MMIO region\n");
 386         return_addr = 0xffffffff;
 387         pagePtr = 0xffffffff >> PageShift;
 388     }
 389
 390     if ((pagePtr << PageShift) > physmem.totalSize())
 391         fatal("Out of memory, please increase size of physical memory.");
 392     return return_addr;
 393 }
 394
 395 Addr
 396 System::memSize() const
 397 {
 398     return physmem.totalSize();
 399 }
 400
 401 Addr
 402 System::freeMemSize() const
 403 {
 404    return physmem.totalSize() - (pagePtr << PageShift);
 405 }
 406
 407 bool
 408 System::isMemAddr(Addr addr) const
 409 {
 410     return physmem.isMemAddr(addr);
 411 }
 412
 413 void
 414 System::drainResume()
 415 {
 416     totalNumInsts = 0;
 417 }
 418
 419 void
 420 System::serialize(CheckpointOut &cp) const
 421 {
 422     if (FullSystem)
 423         kernelSymtab->serialize("kernel_symtab", cp);
 424     SERIALIZE_SCALAR(pagePtr);
 425     serializeSymtab(cp);
 426
 427     // also serialize the memories in the system
 428     physmem.serializeSection(cp, "physmem");
 429 }
 430
 431
 432 void
 433 System::unserialize(CheckpointIn &cp)
 434 {
 435     if (FullSystem)
 436         kernelSymtab->unserialize("kernel_symtab", cp);
 437     UNSERIALIZE_SCALAR(pagePtr);
 438     unserializeSymtab(cp);
 439
 440     // also unserialize the memories in the system
 441     physmem.unserializeSection(cp, "physmem");
 442 }
 443
 444 void
 445 System::regStats()
 446 {
 447     MemObject::regStats();
 448
 449     for (uint32_t j = 0; j < numWorkIds ; j++) {
 450         workItemStats[j] = new Stats::Histogram();
 451         stringstream namestr;
 452         ccprintf(namestr, "work_item_type%d", j);
 453         workItemStats[j]->init(20)
 454                          .name(name() + "." + namestr.str())
 455                          .desc("Run time stat for" + namestr.str())
 456                          .prereq(*workItemStats[j]);
 457     }
 458 }
 459
 460 void
 461 System::workItemEnd(uint32_t tid, uint32_t workid)
 462 {
 463     std::pair<uint32_t,uint32_t> p(tid, workid);
 464     if (!lastWorkItemStarted.count(p))
 465         return;
 466
 467     Tick samp = curTick() - lastWorkItemStarted[p];
 468     DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
 469
 470     if (workid >= numWorkIds)
 471         fatal("Got workid greater than specified in system configuration\n");
 472
 473     workItemStats[workid]->sample(samp);
 474     lastWorkItemStarted.erase(p);
 475 }
 476
 477 void
 478 System::printSystems()
 479 {
 480     ios::fmtflags flags(cerr.flags());
 481
 482     vector<System *>::iterator i = systemList.begin();
 483     vector<System *>::iterator end = systemList.end();
 484     for (; i != end; ++i) {
 485         System *sys = *i;
 486         cerr << "System " << sys->name() << ": " << hex << sys << endl;
 487     }
 488
 489     cerr.flags(flags);
 490 }
 491
 492 void
 493 printSystems()
 494 {
 495     System::printSystems();
 496 }
 497
 498 MasterID
 499 System::getMasterId(std::string master_name)
 500 {
 501     // strip off system name if the string starts with it
 502     if (startswith(master_name, name()))
 503         master_name = master_name.erase(0, name().size() + 1);
 504
 505     // CPUs in switch_cpus ask for ids again after switching
 506     for (int i = 0; i < masterIds.size(); i++) {
 507         if (masterIds[i] == master_name) {
 508             return i;
 509         }
 510     }
 511
 512     // Verify that the statistics haven't been enabled yet
 513     // Otherwise objects will have sized their stat buckets and
 514     // they will be too small
 515
 516     if (Stats::enabled()) {
 517         fatal("Can't request a masterId after regStats(). "
 518                 "You must do so in init().\n");
 519     }
 520
 521     masterIds.push_back(master_name);
 522
 523     return masterIds.size() - 1;
 524 }
 525
 526 std::string
 527 System::getMasterName(MasterID master_id)
 528 {
 529     if (master_id >= masterIds.size())
 530         fatal("Invalid master_id passed to getMasterName()\n");
 531
 532     return masterIds[master_id];
 533 }
 534
 535 System *
 536 SystemParams::create()
 537 {
 538     return new System(this);
 539 }