src/sim/system.cc

   1 /*
   2  * Copyright (c) 2011-2014,2017 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2003-2006 The Regents of The University of Michigan
  15  * Copyright (c) 2011 Regents of the University of California
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Steve Reinhardt
  42  *          Lisa Hsu
  43  *          Nathan Binkert
  44  *          Ali Saidi
  45  *          Rick Strong
  46  */
  47
  48 #include "sim/system.hh"
  49
  50 #include <algorithm>
  51
  52 #include "arch/remote_gdb.hh"
  53 #include "arch/utility.hh"
  54 #include "base/loader/object_file.hh"
  55 #include "base/loader/symtab.hh"
  56 #include "base/str.hh"
  57 #include "base/trace.hh"
  58 #include "config/use_kvm.hh"
  59 #if USE_KVM
  60 #include "cpu/kvm/base.hh"
  61 #include "cpu/kvm/vm.hh"
  62 #endif
  63 #include "cpu/base.hh"
  64 #include "cpu/thread_context.hh"
  65 #include "debug/Loader.hh"
  66 #include "debug/WorkItems.hh"
  67 #include "mem/abstract_mem.hh"
  68 #include "mem/physical.hh"
  69 #include "params/System.hh"
  70 #include "sim/byteswap.hh"
  71 #include "sim/debug.hh"
  72 #include "sim/full_system.hh"
  73
  74 /**
  75  * To avoid linking errors with LTO, only include the header if we
  76  * actually have a definition.
  77  */
  78 #if THE_ISA != NULL_ISA
  79 #include "kern/kernel_stats.hh"
  80
  81 #endif
  82
  83 using namespace std;
  84 using namespace TheISA;
  85
  86 vector<System *> System::systemList;
  87
  88 int System::numSystemsRunning = 0;
  89
  90 System::System(Params *p)
  91     : MemObject(p), _systemPort("system_port", this),
  92       multiThread(p->multi_thread),
  93       pagePtr(0),
  94       init_param(p->init_param),
  95       physProxy(_systemPort, p->cache_line_size),
  96       kernelSymtab(nullptr),
  97       kernel(nullptr),
  98       loadAddrMask(p->load_addr_mask),
  99       loadAddrOffset(p->load_offset),
 100 #if USE_KVM
 101       kvmVM(p->kvm_vm),
 102 #else
 103       kvmVM(nullptr),
 104 #endif
 105       physmem(name() + ".physmem", p->memories, p->mmap_using_noreserve),
 106       memoryMode(p->mem_mode),
 107       _cacheLineSize(p->cache_line_size),
 108       workItemsBegin(0),
 109       workItemsEnd(0),
 110       numWorkIds(p->num_work_ids),
 111       thermalModel(p->thermal_model),
 112       _params(p),
 113       totalNumInsts(0),
 114       instEventQueue("system instruction-based event queue")
 115 {
 116     // add self to global system list
 117     systemList.push_back(this);
 118
 119 #if USE_KVM
 120     if (kvmVM) {
 121         kvmVM->setSystem(this);
 122     }
 123 #endif
 124
 125     if (FullSystem) {
 126         kernelSymtab = new SymbolTable;
 127         if (!debugSymbolTable)
 128             debugSymbolTable = new SymbolTable;
 129     }
 130
 131     // check if the cache line size is a value known to work
 132     if (!(_cacheLineSize == 16 || _cacheLineSize == 32 ||
 133           _cacheLineSize == 64 || _cacheLineSize == 128))
 134         warn_once("Cache line size is neither 16, 32, 64 nor 128 bytes.\n");
 135
 136     // Get the generic system master IDs
 137     MasterID tmp_id M5_VAR_USED;
 138     tmp_id = getMasterId("writebacks");
 139     assert(tmp_id == Request::wbMasterId);
 140     tmp_id = getMasterId("functional");
 141     assert(tmp_id == Request::funcMasterId);
 142     tmp_id = getMasterId("interrupt");
 143     assert(tmp_id == Request::intMasterId);
 144
 145     if (FullSystem) {
 146         if (params()->kernel == "") {
 147             inform("No kernel set for full system simulation. "
 148                    "Assuming you know what you're doing\n");
 149         } else {
 150             // Get the kernel code
 151             kernel = createObjectFile(params()->kernel);
 152             inform("kernel located at: %s", params()->kernel);
 153
 154             if (kernel == NULL)
 155                 fatal("Could not load kernel file %s", params()->kernel);
 156
 157             // setup entry points
 158             kernelStart = kernel->textBase();
 159             kernelEnd = kernel->bssBase() + kernel->bssSize();
 160             kernelEntry = kernel->entryPoint();
 161
 162             // If load_addr_mask is set to 0x0, then auto-calculate
 163             // the smallest mask to cover all kernel addresses so gem5
 164             // can relocate the kernel to a new offset.
 165             if (loadAddrMask == 0) {
 166                 Addr shift_amt = findMsbSet(kernelEnd - kernelStart) + 1;
 167                 loadAddrMask = ((Addr)1 << shift_amt) - 1;
 168             }
 169
 170             // load symbols
 171             if (!kernel->loadGlobalSymbols(kernelSymtab))
 172                 fatal("could not load kernel symbols\n");
 173
 174             if (!kernel->loadLocalSymbols(kernelSymtab))
 175                 fatal("could not load kernel local symbols\n");
 176
 177             if (!kernel->loadGlobalSymbols(debugSymbolTable))
 178                 fatal("could not load kernel symbols\n");
 179
 180             if (!kernel->loadLocalSymbols(debugSymbolTable))
 181                 fatal("could not load kernel local symbols\n");
 182
 183             // Loading only needs to happen once and after memory system is
 184             // connected so it will happen in initState()
 185         }
 186
 187         for (const auto &obj_name : p->kernel_extras) {
 188             inform("Loading additional kernel object: %s", obj_name);
 189             ObjectFile *obj = createObjectFile(obj_name);
 190             fatal_if(!obj, "Failed to additional kernel object '%s'.\n",
 191                      obj_name);
 192             kernelExtras.push_back(obj);
 193         }
 194     }
 195
 196     // increment the number of running systems
 197     numSystemsRunning++;
 198
 199     // Set back pointers to the system in all memories
 200     for (int x = 0; x < params()->memories.size(); x++)
 201         params()->memories[x]->system(this);
 202 }
 203
 204 System::~System()
 205 {
 206     delete kernelSymtab;
 207     delete kernel;
 208
 209     for (uint32_t j = 0; j < numWorkIds; j++)
 210         delete workItemStats[j];
 211 }
 212
 213 void
 214 System::init()
 215 {
 216     // check that the system port is connected
 217     if (!_systemPort.isConnected())
 218         panic("System port on %s is not connected.\n", name());
 219 }
 220
 221 BaseMasterPort&
 222 System::getMasterPort(const std::string &if_name, PortID idx)
 223 {
 224     // no need to distinguish at the moment (besides checking)
 225     return _systemPort;
 226 }
 227
 228 void
 229 System::setMemoryMode(Enums::MemoryMode mode)
 230 {
 231     assert(drainState() == DrainState::Drained);
 232     memoryMode = mode;
 233 }
 234
 235 bool System::breakpoint()
 236 {
 237     if (remoteGDB.size())
 238         return remoteGDB[0]->breakpoint();
 239     return false;
 240 }
 241
 242 ContextID
 243 System::registerThreadContext(ThreadContext *tc, ContextID assigned)
 244 {
 245     int id = assigned;
 246     if (id == InvalidContextID) {
 247         // Find an unused context ID for this thread.
 248         id = 0;
 249         while (id < threadContexts.size() && threadContexts[id])
 250             id++;
 251     }
 252
 253     if (threadContexts.size() <= id)
 254         threadContexts.resize(id + 1);
 255
 256     fatal_if(threadContexts[id],
 257              "Cannot have two CPUs with the same id (%d)\n", id);
 258
 259     threadContexts[id] = tc;
 260
 261 #if THE_ISA != NULL_ISA
 262     int port = getRemoteGDBPort();
 263     if (port) {
 264         RemoteGDB *rgdb = new RemoteGDB(this, tc, port + id);
 265         rgdb->listen();
 266
 267         BaseCPU *cpu = tc->getCpuPtr();
 268         if (cpu->waitForRemoteGDB()) {
 269             inform("%s: Waiting for a remote GDB connection on port %d.\n",
 270                    cpu->name(), rgdb->port());
 271
 272             rgdb->connect();
 273         }
 274         if (remoteGDB.size() <= id) {
 275             remoteGDB.resize(id + 1);
 276         }
 277
 278         remoteGDB[id] = rgdb;
 279     }
 280 #endif
 281
 282     activeCpus.push_back(false);
 283
 284     return id;
 285 }
 286
 287 int
 288 System::numRunningContexts()
 289 {
 290     return std::count_if(
 291         threadContexts.cbegin(),
 292         threadContexts.cend(),
 293         [] (ThreadContext* tc) {
 294             return tc->status() != ThreadContext::Halted;
 295         }
 296     );
 297 }
 298
 299 void
 300 System::initState()
 301 {
 302     if (FullSystem) {
 303         for (int i = 0; i < threadContexts.size(); i++)
 304             TheISA::startupCPU(threadContexts[i], i);
 305         // Moved from the constructor to here since it relies on the
 306         // address map being resolved in the interconnect
 307         /**
 308          * Load the kernel code into memory
 309          */
 310         if (params()->kernel != "")  {
 311             if (params()->kernel_addr_check) {
 312                 // Validate kernel mapping before loading binary
 313                 if (!(isMemAddr((kernelStart & loadAddrMask) +
 314                                 loadAddrOffset) &&
 315                       isMemAddr((kernelEnd & loadAddrMask) +
 316                                 loadAddrOffset))) {
 317                     fatal("Kernel is mapped to invalid location (not memory). "
 318                           "kernelStart 0x(%x) - kernelEnd 0x(%x) %#x:%#x\n",
 319                           kernelStart,
 320                           kernelEnd, (kernelStart & loadAddrMask) +
 321                           loadAddrOffset,
 322                           (kernelEnd & loadAddrMask) + loadAddrOffset);
 323                 }
 324             }
 325             // Load program sections into memory
 326             kernel->loadSections(physProxy, loadAddrMask, loadAddrOffset);
 327             for (const auto &extra_kernel : kernelExtras) {
 328                 extra_kernel->loadSections(physProxy, loadAddrMask,
 329                                            loadAddrOffset);
 330             }
 331
 332             DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
 333             DPRINTF(Loader, "Kernel end   = %#x\n", kernelEnd);
 334             DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);
 335             DPRINTF(Loader, "Kernel loaded...\n");
 336         }
 337     }
 338 }
 339
 340 void
 341 System::replaceThreadContext(ThreadContext *tc, ContextID context_id)
 342 {
 343     if (context_id >= threadContexts.size()) {
 344         panic("replaceThreadContext: bad id, %d >= %d\n",
 345               context_id, threadContexts.size());
 346     }
 347
 348     threadContexts[context_id] = tc;
 349     if (context_id < remoteGDB.size())
 350         remoteGDB[context_id]->replaceThreadContext(tc);
 351 }
 352
 353 bool
 354 System::validKvmEnvironment() const
 355 {
 356 #if USE_KVM
 357     if (threadContexts.empty())
 358         return false;
 359
 360     for (auto tc : threadContexts) {
 361         if (dynamic_cast<BaseKvmCPU*>(tc->getCpuPtr()) == nullptr) {
 362             return false;
 363         }
 364     }
 365     return true;
 366 #else
 367     return false;
 368 #endif
 369 }
 370
 371 Addr
 372 System::allocPhysPages(int npages)
 373 {
 374     Addr return_addr = pagePtr << PageShift;
 375     pagePtr += npages;
 376
 377     Addr next_return_addr = pagePtr << PageShift;
 378
 379     AddrRange m5opRange(0xffff0000, 0xffffffff);
 380     if (m5opRange.contains(next_return_addr)) {
 381         warn("Reached m5ops MMIO region\n");
 382         return_addr = 0xffffffff;
 383         pagePtr = 0xffffffff >> PageShift;
 384     }
 385
 386     if ((pagePtr << PageShift) > physmem.totalSize())
 387         fatal("Out of memory, please increase size of physical memory.");
 388     return return_addr;
 389 }
 390
 391 Addr
 392 System::memSize() const
 393 {
 394     return physmem.totalSize();
 395 }
 396
 397 Addr
 398 System::freeMemSize() const
 399 {
 400    return physmem.totalSize() - (pagePtr << PageShift);
 401 }
 402
 403 bool
 404 System::isMemAddr(Addr addr) const
 405 {
 406     return physmem.isMemAddr(addr);
 407 }
 408
 409 void
 410 System::drainResume()
 411 {
 412     totalNumInsts = 0;
 413 }
 414
 415 void
 416 System::serialize(CheckpointOut &cp) const
 417 {
 418     if (FullSystem)
 419         kernelSymtab->serialize("kernel_symtab", cp);
 420     SERIALIZE_SCALAR(pagePtr);
 421     serializeSymtab(cp);
 422
 423     // also serialize the memories in the system
 424     physmem.serializeSection(cp, "physmem");
 425 }
 426
 427
 428 void
 429 System::unserialize(CheckpointIn &cp)
 430 {
 431     if (FullSystem)
 432         kernelSymtab->unserialize("kernel_symtab", cp);
 433     UNSERIALIZE_SCALAR(pagePtr);
 434     unserializeSymtab(cp);
 435
 436     // also unserialize the memories in the system
 437     physmem.unserializeSection(cp, "physmem");
 438 }
 439
 440 void
 441 System::regStats()
 442 {
 443     MemObject::regStats();
 444
 445     for (uint32_t j = 0; j < numWorkIds ; j++) {
 446         workItemStats[j] = new Stats::Histogram();
 447         stringstream namestr;
 448         ccprintf(namestr, "work_item_type%d", j);
 449         workItemStats[j]->init(20)
 450                          .name(name() + "." + namestr.str())
 451                          .desc("Run time stat for" + namestr.str())
 452                          .prereq(*workItemStats[j]);
 453     }
 454 }
 455
 456 void
 457 System::workItemEnd(uint32_t tid, uint32_t workid)
 458 {
 459     std::pair<uint32_t,uint32_t> p(tid, workid);
 460     if (!lastWorkItemStarted.count(p))
 461         return;
 462
 463     Tick samp = curTick() - lastWorkItemStarted[p];
 464     DPRINTF(WorkItems, "Work item end: %d\t%d\t%lld\n", tid, workid, samp);
 465
 466     if (workid >= numWorkIds)
 467         fatal("Got workid greater than specified in system configuration\n");
 468
 469     workItemStats[workid]->sample(samp);
 470     lastWorkItemStarted.erase(p);
 471 }
 472
 473 void
 474 System::printSystems()
 475 {
 476     ios::fmtflags flags(cerr.flags());
 477
 478     vector<System *>::iterator i = systemList.begin();
 479     vector<System *>::iterator end = systemList.end();
 480     for (; i != end; ++i) {
 481         System *sys = *i;
 482         cerr << "System " << sys->name() << ": " << hex << sys << endl;
 483     }
 484
 485     cerr.flags(flags);
 486 }
 487
 488 void
 489 printSystems()
 490 {
 491     System::printSystems();
 492 }
 493
 494 MasterID
 495 System::getMasterId(std::string master_name)
 496 {
 497     // strip off system name if the string starts with it
 498     if (startswith(master_name, name()))
 499         master_name = master_name.erase(0, name().size() + 1);
 500
 501     // CPUs in switch_cpus ask for ids again after switching
 502     for (int i = 0; i < masterIds.size(); i++) {
 503         if (masterIds[i] == master_name) {
 504             return i;
 505         }
 506     }
 507
 508     // Verify that the statistics haven't been enabled yet
 509     // Otherwise objects will have sized their stat buckets and
 510     // they will be too small
 511
 512     if (Stats::enabled()) {
 513         fatal("Can't request a masterId after regStats(). "
 514                 "You must do so in init().\n");
 515     }
 516
 517     masterIds.push_back(master_name);
 518
 519     return masterIds.size() - 1;
 520 }
 521
 522 std::string
 523 System::getMasterName(MasterID master_id)
 524 {
 525     if (master_id >= masterIds.size())
 526         fatal("Invalid master_id passed to getMasterName()\n");
 527
 528     return masterIds[master_id];
 529 }
 530
 531 System *
 532 SystemParams::create()
 533 {
 534     return new System(this);
 535 }