src/sim/system.hh

   1 /*
   2  * Copyright (c) 2012 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  15  * Copyright (c) 2011 Regents of the University of California
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Steve Reinhardt
  42  *          Lisa Hsu
  43  *          Nathan Binkert
  44  *          Rick Strong
  45  */
  46
  47 #ifndef __SYSTEM_HH__
  48 #define __SYSTEM_HH__
  49
  50 #include <string>
  51 #include <vector>
  52
  53 #include "base/loader/symtab.hh"
  54 #include "base/misc.hh"
  55 #include "base/statistics.hh"
  56 #include "config/full_system.hh"
  57 #include "cpu/pc_event.hh"
  58 #include "enums/MemoryMode.hh"
  59 #include "mem/mem_object.hh"
  60 #include "mem/port.hh"
  61 #include "params/System.hh"
  62
  63 #if FULL_SYSTEM
  64 #include "kern/system_events.hh"
  65 #endif
  66
  67 class BaseCPU;
  68 class ThreadContext;
  69 class ObjectFile;
  70 class PhysicalMemory;
  71
  72 #if FULL_SYSTEM
  73 class Platform;
  74 class PortProxy;
  75 class FSTranslatingPortProxy;
  76 #endif
  77 class GDBListener;
  78 class BaseRemoteGDB;
  79
  80 class System : public MemObject
  81 {
  82   private:
  83
  84     /**
  85      * Private class for the system port which is only used as a
  86      * master for debug access and for non-structural entities that do
  87      * not have a port of their own.
  88      */
  89     class SystemPort : public Port
  90     {
  91       public:
  92
  93         /**
  94          * Create a system port with a name and an owner.
  95          */
  96         SystemPort(const std::string &_name, MemObject *_owner)
  97             : Port(_name, _owner)
  98         { }
  99         bool recvTiming(PacketPtr pkt)
 100         { panic("SystemPort does not receive timing!\n"); return false; }
 101         Tick recvAtomic(PacketPtr pkt)
 102         { panic("SystemPort does not receive atomic!\n"); return 0; }
 103         void recvFunctional(PacketPtr pkt)
 104         { panic("SystemPort does not receive functional!\n"); }
 105
 106         /**
 107          * The system port is a master port connected to a single
 108          * slave and thus do not care about what ranges the slave
 109          * covers (as there is nothing to choose from).
 110          */
 111         void recvRangeChange() { }
 112
 113     };
 114
 115     SystemPort _systemPort;
 116
 117   public:
 118
 119     /**
 120      * After all objects have been created and all ports are
 121      * connected, check that the system port is connected.
 122      */
 123     virtual void init();
 124
 125     /**
 126      * Get a pointer to the system port that can be used by
 127      * non-structural simulation objects like processes or threads, or
 128      * external entities like loaders and debuggers, etc, to access
 129      * the memory system.
 130      *
 131      * @return a pointer to the system port we own
 132      */
 133     Port* getSystemPort() { return &_systemPort; }
 134
 135     /**
 136      * Additional function to return the Port of a memory object.
 137      */
 138     Port *getPort(const std::string &if_name, int idx = -1);
 139
 140     static const char *MemoryModeStrings[3];
 141
 142     Enums::MemoryMode
 143     getMemoryMode()
 144     {
 145         assert(memoryMode);
 146         return memoryMode;
 147     }
 148
 149     /** Change the memory mode of the system. This should only be called by the
 150      * python!!
 151      * @param mode Mode to change to (atomic/timing)
 152      */
 153     void setMemoryMode(Enums::MemoryMode mode);
 154
 155     PhysicalMemory *physmem;
 156     PCEventQueue pcEventQueue;
 157
 158     std::vector<ThreadContext *> threadContexts;
 159     int _numContexts;
 160
 161     ThreadContext *getThreadContext(ThreadID tid)
 162     {
 163         return threadContexts[tid];
 164     }
 165
 166     int numContexts()
 167     {
 168         assert(_numContexts == (int)threadContexts.size());
 169         return _numContexts;
 170     }
 171
 172     /** Return number of running (non-halted) thread contexts in
 173      * system.  These threads could be Active or Suspended. */
 174     int numRunningContexts();
 175
 176     /** List to store ranges of memories in this system */
 177     AddrRangeList memRanges;
 178
 179     /** check if an address points to valid system memory
 180      * and thus we can fetch instructions out of it
 181      */
 182     bool isMemory(const Addr addr) const;
 183
 184 #if FULL_SYSTEM
 185     Platform *platform;
 186     uint64_t init_param;
 187
 188     /** Port to physical memory used for writing object files into ram at
 189      * boot.*/
 190     PortProxy* physProxy;
 191     FSTranslatingPortProxy* virtProxy;
 192
 193     /** kernel symbol table */
 194     SymbolTable *kernelSymtab;
 195
 196     /** Object pointer for the kernel code */
 197     ObjectFile *kernel;
 198
 199     /** Begining of kernel code */
 200     Addr kernelStart;
 201
 202     /** End of kernel code */
 203     Addr kernelEnd;
 204
 205     /** Entry point in the kernel to start at */
 206     Addr kernelEntry;
 207
 208     /** Mask that should be anded for binary/symbol loading.
 209      * This allows one two different OS requirements for the same ISA to be
 210      * handled.  Some OSes are compiled for a virtual address and need to be
 211      * loaded into physical memory that starts at address 0, while other
 212      * bare metal tools generate images that start at address 0.
 213      */
 214     Addr loadAddrMask;
 215
 216 #else
 217
 218     Addr pagePtr;
 219
 220   protected:
 221     uint64_t nextPID;
 222
 223   public:
 224     uint64_t allocatePID()
 225     {
 226         return nextPID++;
 227     }
 228
 229     /** Amount of physical memory that is still free */
 230     Addr freeMemSize();
 231
 232     /** Amount of physical memory that exists */
 233     Addr memSize();
 234
 235
 236 #endif // FULL_SYSTEM
 237
 238   protected:
 239     Enums::MemoryMode memoryMode;
 240     uint64_t workItemsBegin;
 241     uint64_t workItemsEnd;
 242     uint32_t numWorkIds;
 243     std::vector<bool> activeCpus;
 244
 245   public:
 246     virtual void regStats();
 247     /**
 248      * Called by pseudo_inst to track the number of work items started by this
 249      * system.
 250      */
 251     uint64_t
 252     incWorkItemsBegin()
 253     {
 254         return ++workItemsBegin;
 255     }
 256
 257     /**
 258      * Called by pseudo_inst to track the number of work items completed by
 259      * this system.
 260      */
 261     uint64_t
 262     incWorkItemsEnd()
 263     {
 264         return ++workItemsEnd;
 265     }
 266
 267     /**
 268      * Called by pseudo_inst to mark the cpus actively executing work items.
 269      * Returns the total number of cpus that have executed work item begin or
 270      * ends.
 271      */
 272     int
 273     markWorkItem(int index)
 274     {
 275         int count = 0;
 276         assert(index < activeCpus.size());
 277         activeCpus[index] = true;
 278         for (std::vector<bool>::iterator i = activeCpus.begin();
 279              i < activeCpus.end(); i++) {
 280             if (*i) count++;
 281         }
 282         return count;
 283     }
 284
 285     inline void workItemBegin(uint32_t tid, uint32_t workid)
 286     {
 287         std::pair<uint32_t,uint32_t> p(tid, workid);
 288         lastWorkItemStarted[p] = curTick();
 289     }
 290
 291     void workItemEnd(uint32_t tid, uint32_t workid);
 292
 293 #if FULL_SYSTEM
 294     /**
 295      * Fix up an address used to match PCs for hooking simulator
 296      * events on to target function executions.  See comment in
 297      * system.cc for details.
 298      */
 299     virtual Addr fixFuncEventAddr(Addr addr) = 0;
 300
 301     /**
 302      * Add a function-based event to the given function, to be looked
 303      * up in the specified symbol table.
 304      */
 305     template <class T>
 306     T *addFuncEvent(SymbolTable *symtab, const char *lbl)
 307     {
 308         Addr addr = 0; // initialize only to avoid compiler warning
 309
 310         if (symtab->findAddress(lbl, addr)) {
 311             T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr));
 312             return ev;
 313         }
 314
 315         return NULL;
 316     }
 317
 318     /** Add a function-based event to kernel code. */
 319     template <class T>
 320     T *addKernelFuncEvent(const char *lbl)
 321     {
 322         return addFuncEvent<T>(kernelSymtab, lbl);
 323     }
 324
 325 #endif
 326   public:
 327     std::vector<BaseRemoteGDB *> remoteGDB;
 328     std::vector<GDBListener *> gdbListen;
 329     bool breakpoint();
 330
 331   public:
 332     typedef SystemParams Params;
 333
 334   protected:
 335     Params *_params;
 336
 337   public:
 338     System(Params *p);
 339     ~System();
 340
 341     void initState();
 342
 343     const Params *params() const { return (const Params *)_params; }
 344
 345   public:
 346
 347 #if FULL_SYSTEM
 348     /**
 349      * Returns the addess the kernel starts at.
 350      * @return address the kernel starts at
 351      */
 352     Addr getKernelStart() const { return kernelStart; }
 353
 354     /**
 355      * Returns the addess the kernel ends at.
 356      * @return address the kernel ends at
 357      */
 358     Addr getKernelEnd() const { return kernelEnd; }
 359
 360     /**
 361      * Returns the addess the entry point to the kernel code.
 362      * @return entry point of the kernel code
 363      */
 364     Addr getKernelEntry() const { return kernelEntry; }
 365
 366 #else
 367
 368     /// Allocate npages contiguous unused physical pages
 369     /// @return Starting address of first page
 370     Addr allocPhysPages(int npages);
 371
 372 #endif // FULL_SYSTEM
 373
 374     int registerThreadContext(ThreadContext *tc, int assigned=-1);
 375     void replaceThreadContext(ThreadContext *tc, int context_id);
 376
 377     void serialize(std::ostream &os);
 378     void unserialize(Checkpoint *cp, const std::string &section);
 379     virtual void resume();
 380
 381   public:
 382     Counter totalNumInsts;
 383     EventQueue instEventQueue;
 384     std::map<std::pair<uint32_t,uint32_t>, Tick>  lastWorkItemStarted;
 385     std::map<uint32_t, Stats::Histogram*> workItemStats;
 386
 387     ////////////////////////////////////////////
 388     //
 389     // STATIC GLOBAL SYSTEM LIST
 390     //
 391     ////////////////////////////////////////////
 392
 393     static std::vector<System *> systemList;
 394     static int numSystemsRunning;
 395
 396     static void printSystems();
 397
 398
 399 };
 400
 401 #endif // __SYSTEM_HH__