src/sim/system.hh

   1 /*
   2  * Copyright (c) 2012 ARM Limited
   3  * All rights reserved
   4  *
   5  * The license below extends only to copyright in the software and shall
   6  * not be construed as granting a license to any other intellectual
   7  * property including but not limited to intellectual property relating
   8  * to a hardware implementation of the functionality of the software
   9  * licensed hereunder.  You may use the software subject to the license
  10  * terms below provided that you ensure that this notice is replicated
  11  * unmodified and in its entirety in all distributions of the software,
  12  * modified or unmodified, in source code or in binary form.
  13  *
  14  * Copyright (c) 2002-2005 The Regents of The University of Michigan
  15  * Copyright (c) 2011 Regents of the University of California
  16  * All rights reserved.
  17  *
  18  * Redistribution and use in source and binary forms, with or without
  19  * modification, are permitted provided that the following conditions are
  20  * met: redistributions of source code must retain the above copyright
  21  * notice, this list of conditions and the following disclaimer;
  22  * redistributions in binary form must reproduce the above copyright
  23  * notice, this list of conditions and the following disclaimer in the
  24  * documentation and/or other materials provided with the distribution;
  25  * neither the name of the copyright holders nor the names of its
  26  * contributors may be used to endorse or promote products derived from
  27  * this software without specific prior written permission.
  28  *
  29  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  30  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  31  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  32  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  33  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  34  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  35  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  36  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  37  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  38  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  39  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  40  *
  41  * Authors: Steve Reinhardt
  42  *          Lisa Hsu
  43  *          Nathan Binkert
  44  *          Rick Strong
  45  */
  46
  47 #ifndef __SYSTEM_HH__
  48 #define __SYSTEM_HH__
  49
  50 #include <string>
  51 #include <vector>
  52
  53 #include "base/loader/symtab.hh"
  54 #include "base/misc.hh"
  55 #include "base/statistics.hh"
  56 #include "cpu/pc_event.hh"
  57 #include "enums/MemoryMode.hh"
  58 #include "kern/system_events.hh"
  59 #include "mem/mem_object.hh"
  60 #include "mem/port.hh"
  61 #include "params/System.hh"
  62
  63 class BaseCPU;
  64 class BaseRemoteGDB;
  65 class FSTranslatingPortProxy;
  66 class GDBListener;
  67 class ObjectFile;
  68 class PhysicalMemory;
  69 class Platform;
  70 class PortProxy;
  71 class ThreadContext;
  72 class VirtualPort;
  73
  74 class System : public MemObject
  75 {
  76   private:
  77
  78     /**
  79      * Private class for the system port which is only used as a
  80      * master for debug access and for non-structural entities that do
  81      * not have a port of their own.
  82      */
  83     class SystemPort : public Port
  84     {
  85       public:
  86
  87         /**
  88          * Create a system port with a name and an owner.
  89          */
  90         SystemPort(const std::string &_name, MemObject *_owner)
  91             : Port(_name, _owner)
  92         { }
  93         bool recvTiming(PacketPtr pkt)
  94         { panic("SystemPort does not receive timing!\n"); return false; }
  95         Tick recvAtomic(PacketPtr pkt)
  96         { panic("SystemPort does not receive atomic!\n"); return 0; }
  97         void recvFunctional(PacketPtr pkt)
  98         { panic("SystemPort does not receive functional!\n"); }
  99
 100         /**
 101          * The system port is a master port connected to a single
 102          * slave and thus do not care about what ranges the slave
 103          * covers (as there is nothing to choose from).
 104          */
 105         void recvRangeChange() { }
 106
 107     };
 108
 109     SystemPort _systemPort;
 110
 111   public:
 112
 113     /**
 114      * After all objects have been created and all ports are
 115      * connected, check that the system port is connected.
 116      */
 117     virtual void init();
 118
 119     /**
 120      * Get a pointer to the system port that can be used by
 121      * non-structural simulation objects like processes or threads, or
 122      * external entities like loaders and debuggers, etc, to access
 123      * the memory system.
 124      *
 125      * @return a pointer to the system port we own
 126      */
 127     Port* getSystemPort() { return &_systemPort; }
 128
 129     /**
 130      * Additional function to return the Port of a memory object.
 131      */
 132     Port *getPort(const std::string &if_name, int idx = -1);
 133
 134     static const char *MemoryModeStrings[3];
 135
 136     Enums::MemoryMode
 137     getMemoryMode()
 138     {
 139         assert(memoryMode);
 140         return memoryMode;
 141     }
 142
 143     /** Change the memory mode of the system. This should only be called by the
 144      * python!!
 145      * @param mode Mode to change to (atomic/timing)
 146      */
 147     void setMemoryMode(Enums::MemoryMode mode);
 148
 149     PhysicalMemory *physmem;
 150     PCEventQueue pcEventQueue;
 151
 152     std::vector<ThreadContext *> threadContexts;
 153     int _numContexts;
 154
 155     ThreadContext *getThreadContext(ThreadID tid)
 156     {
 157         return threadContexts[tid];
 158     }
 159
 160     int numContexts()
 161     {
 162         assert(_numContexts == (int)threadContexts.size());
 163         return _numContexts;
 164     }
 165
 166     /** Return number of running (non-halted) thread contexts in
 167      * system.  These threads could be Active or Suspended. */
 168     int numRunningContexts();
 169
 170     /** List to store ranges of memories in this system */
 171     AddrRangeList memRanges;
 172
 173     /** check if an address points to valid system memory
 174      * and thus we can fetch instructions out of it
 175      */
 176     bool isMemory(const Addr addr) const;
 177
 178     Addr pagePtr;
 179
 180     uint64_t init_param;
 181
 182     /** Port to physical memory used for writing object files into ram at
 183      * boot.*/
 184     PortProxy* physProxy;
 185     FSTranslatingPortProxy* virtProxy;
 186
 187     /** kernel symbol table */
 188     SymbolTable *kernelSymtab;
 189
 190     /** Object pointer for the kernel code */
 191     ObjectFile *kernel;
 192
 193     /** Begining of kernel code */
 194     Addr kernelStart;
 195
 196     /** End of kernel code */
 197     Addr kernelEnd;
 198
 199     /** Entry point in the kernel to start at */
 200     Addr kernelEntry;
 201
 202     /** Mask that should be anded for binary/symbol loading.
 203      * This allows one two different OS requirements for the same ISA to be
 204      * handled.  Some OSes are compiled for a virtual address and need to be
 205      * loaded into physical memory that starts at address 0, while other
 206      * bare metal tools generate images that start at address 0.
 207      */
 208     Addr loadAddrMask;
 209
 210   protected:
 211     uint64_t nextPID;
 212
 213   public:
 214     uint64_t allocatePID()
 215     {
 216         return nextPID++;
 217     }
 218
 219     /** Amount of physical memory that is still free */
 220     Addr freeMemSize();
 221
 222     /** Amount of physical memory that exists */
 223     Addr memSize();
 224
 225   protected:
 226     Enums::MemoryMode memoryMode;
 227     uint64_t workItemsBegin;
 228     uint64_t workItemsEnd;
 229     uint32_t numWorkIds;
 230     std::vector<bool> activeCpus;
 231
 232   public:
 233     virtual void regStats();
 234     /**
 235      * Called by pseudo_inst to track the number of work items started by this
 236      * system.
 237      */
 238     uint64_t
 239     incWorkItemsBegin()
 240     {
 241         return ++workItemsBegin;
 242     }
 243
 244     /**
 245      * Called by pseudo_inst to track the number of work items completed by
 246      * this system.
 247      */
 248     uint64_t
 249     incWorkItemsEnd()
 250     {
 251         return ++workItemsEnd;
 252     }
 253
 254     /**
 255      * Called by pseudo_inst to mark the cpus actively executing work items.
 256      * Returns the total number of cpus that have executed work item begin or
 257      * ends.
 258      */
 259     int
 260     markWorkItem(int index)
 261     {
 262         int count = 0;
 263         assert(index < activeCpus.size());
 264         activeCpus[index] = true;
 265         for (std::vector<bool>::iterator i = activeCpus.begin();
 266              i < activeCpus.end(); i++) {
 267             if (*i) count++;
 268         }
 269         return count;
 270     }
 271
 272     inline void workItemBegin(uint32_t tid, uint32_t workid)
 273     {
 274         std::pair<uint32_t,uint32_t> p(tid, workid);
 275         lastWorkItemStarted[p] = curTick();
 276     }
 277
 278     void workItemEnd(uint32_t tid, uint32_t workid);
 279
 280     /**
 281      * Fix up an address used to match PCs for hooking simulator
 282      * events on to target function executions.  See comment in
 283      * system.cc for details.
 284      */
 285     virtual Addr fixFuncEventAddr(Addr addr)
 286     {
 287         panic("Base fixFuncEventAddr not implemented.\n");
 288     }
 289
 290     /**
 291      * Add a function-based event to the given function, to be looked
 292      * up in the specified symbol table.
 293      */
 294     template <class T>
 295     T *addFuncEvent(SymbolTable *symtab, const char *lbl)
 296     {
 297         Addr addr = 0; // initialize only to avoid compiler warning
 298
 299         if (symtab->findAddress(lbl, addr)) {
 300             T *ev = new T(&pcEventQueue, lbl, fixFuncEventAddr(addr));
 301             return ev;
 302         }
 303
 304         return NULL;
 305     }
 306
 307     /** Add a function-based event to kernel code. */
 308     template <class T>
 309     T *addKernelFuncEvent(const char *lbl)
 310     {
 311         return addFuncEvent<T>(kernelSymtab, lbl);
 312     }
 313
 314   public:
 315     std::vector<BaseRemoteGDB *> remoteGDB;
 316     std::vector<GDBListener *> gdbListen;
 317     bool breakpoint();
 318
 319   public:
 320     typedef SystemParams Params;
 321
 322   protected:
 323     Params *_params;
 324
 325   public:
 326     System(Params *p);
 327     ~System();
 328
 329     void initState();
 330
 331     const Params *params() const { return (const Params *)_params; }
 332
 333   public:
 334
 335     /**
 336      * Returns the addess the kernel starts at.
 337      * @return address the kernel starts at
 338      */
 339     Addr getKernelStart() const { return kernelStart; }
 340
 341     /**
 342      * Returns the addess the kernel ends at.
 343      * @return address the kernel ends at
 344      */
 345     Addr getKernelEnd() const { return kernelEnd; }
 346
 347     /**
 348      * Returns the addess the entry point to the kernel code.
 349      * @return entry point of the kernel code
 350      */
 351     Addr getKernelEntry() const { return kernelEntry; }
 352
 353     /// Allocate npages contiguous unused physical pages
 354     /// @return Starting address of first page
 355     Addr allocPhysPages(int npages);
 356
 357     int registerThreadContext(ThreadContext *tc, int assigned=-1);
 358     void replaceThreadContext(ThreadContext *tc, int context_id);
 359
 360     void serialize(std::ostream &os);
 361     void unserialize(Checkpoint *cp, const std::string &section);
 362     virtual void resume();
 363
 364   public:
 365     Counter totalNumInsts;
 366     EventQueue instEventQueue;
 367     std::map<std::pair<uint32_t,uint32_t>, Tick>  lastWorkItemStarted;
 368     std::map<uint32_t, Stats::Histogram*> workItemStats;
 369
 370     ////////////////////////////////////////////
 371     //
 372     // STATIC GLOBAL SYSTEM LIST
 373     //
 374     ////////////////////////////////////////////
 375
 376     static std::vector<System *> systemList;
 377     static int numSystemsRunning;
 378
 379     static void printSystems();
 380
 381
 382 };
 383
 384 #endif // __SYSTEM_HH__