Merge ARM into the head. ARM will compile but may not actually work.
[gem5.git] / src / sim / tlb.hh
1 /*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31 #ifndef __SIM_TLB_HH__
32 #define __SIM_TLB_HH__
33
34 #include "base/misc.hh"
35 #include "mem/request.hh"
36 #include "sim/faults.hh"
37 #include "sim/sim_object.hh"
38
39 class ThreadContext;
40 class Packet;
41
42 class BaseTLB : public SimObject
43 {
44 protected:
45 BaseTLB(const Params *p) : SimObject(p)
46 {}
47
48 public:
49 virtual void demapPage(Addr vaddr, uint64_t asn) = 0;
50
51 class Translation
52 {
53 public:
54 virtual ~Translation()
55 {}
56
57 /*
58 * The memory for this object may be dynamically allocated, and it may
59 * be responsible for cleaning itself up which will happen in this
60 * function. Once it's called, the object is no longer valid.
61 */
62 virtual void finish(Fault fault, RequestPtr req,
63 ThreadContext *tc, bool write=false) = 0;
64 };
65 };
66
67 class GenericTLB : public BaseTLB
68 {
69 protected:
70 GenericTLB(const Params *p) : BaseTLB(p)
71 {}
72
73 public:
74 void demapPage(Addr vaddr, uint64_t asn);
75
76 Fault translateAtomic(RequestPtr req, ThreadContext *tc, bool=false);
77 void translateTiming(RequestPtr req, ThreadContext *tc,
78 Translation *translation, bool=false);
79 };
80
81 #endif // __ARCH_SPARC_TLB_HH__