1 from nmigen
import Module
, Elaboratable
, Memory
4 class TestMemory(Elaboratable
):
5 def __init__(self
, regwid
, addrw
, granularity
=None, init
=True,
7 self
.readonly
= readonly
8 self
.ddepth
= 1 # regwid //8
9 depth
= (1 << addrw
) // self
.ddepth
12 print("test memory width depth", regwid
, depth
)
14 init
= range(0, depth
*2, 2)
17 self
.mem
= Memory(width
=regwid
, depth
=depth
, init
=init
)
18 self
.rdport
= self
.mem
.read_port() # not now transparent=False)
21 self
.wrport
= self
.mem
.write_port(granularity
=granularity
)
23 def elaborate(self
, platform
):
25 m
.submodules
.rdport
= self
.rdport
28 m
.submodules
.wrport
= self
.wrport
32 yield self
.rdport
.addr
33 yield self
.rdport
.data
34 # yield self.rdport.en
37 yield self
.wrport
.addr
38 yield self
.wrport
.data