2 * Copyright (c) 2016, Dresden University of Technology (TU Dresden)
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
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10 * this list of conditions and the following disclaimer.
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18 * this software without specific prior written permission.
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER
24 * OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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32 * Authors: Christian Menard
35 #include "systemc/tlm_bridge/master_transactor.hh"
37 #include "systemc/ext/utils/sc_report_handler.hh"
38 #include "systemc/tlm_bridge/sc_master_port.hh"
39 #include "systemc/tlm_bridge/sim_control_if.hh"
44 Gem5MasterTransactor::Gem5MasterTransactor(sc_core::sc_module_name name
,
45 const std::string
& portName
)
46 : sc_core::sc_module(name
),
47 socket(portName
.c_str()),
48 sim_control("sim_control"),
51 if (portName
.empty()) {
52 SC_REPORT_ERROR(name
, "No port name specified!\n");
57 Gem5MasterTransactor::before_end_of_elaboration()
59 auto *port
= sim_control
->getMasterPort(portName
);
61 port
->bindToTransactor(this);
64 } // namespace Gem5SystemC