2 * Mesa 3-D graphics library
4 * Copyright (C) 1999-2007 Brian Paul All Rights Reserved.
5 * Copyright 2015 Philip Taylor <philip@zaynar.co.uk>
6 * Copyright 2018 Advanced Micro Devices, Inc.
7 * Copyright (C) 2018-2019 Intel Corporation
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included
17 * in all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
30 #include "half_float.h"
31 #include "util/u_half.h"
33 #include "softfloat.h"
36 typedef union { float f
; int32_t i
; uint32_t u
; } fi_type
;
39 * Convert a 4-byte float to a 2-byte half float.
41 * Not all float32 values can be represented exactly as a float16 value. We
42 * round such intermediate float32 values to the nearest float16. When the
43 * float32 lies exactly between to float16 values, we round to the one with
46 * This rounding behavior has several benefits:
47 * - It has no sign bias.
49 * - It reproduces the behavior of real hardware: opcode F32TO16 in Intel's
52 * - By reproducing the behavior of the GPU (at least on Intel hardware),
53 * compile-time evaluation of constant packHalf2x16 GLSL expressions will
54 * result in the same value as if the expression were executed on the GPU.
57 _mesa_float_to_half(float val
)
59 const fi_type fi
= {val
};
60 const int flt_m
= fi
.i
& 0x7fffff;
61 const int flt_e
= (fi
.i
>> 23) & 0xff;
62 const int flt_s
= (fi
.i
>> 31) & 0x1;
69 /* handle special cases */
70 if ((flt_e
== 0) && (flt_m
== 0)) {
72 /* m = 0; - already set */
75 else if ((flt_e
== 0) && (flt_m
!= 0)) {
76 /* denorm -- denorm float maps to 0 half */
77 /* m = 0; - already set */
80 else if ((flt_e
== 0xff) && (flt_m
== 0)) {
82 /* m = 0; - already set */
85 else if ((flt_e
== 0xff) && (flt_m
!= 0)) {
92 const int new_exp
= flt_e
- 127;
94 /* The float32 lies in the range (0.0, min_normal16) and is rounded
95 * to a nearby float16 value. The result will be either zero, subnormal,
99 m
= _mesa_lroundevenf((1 << 24) * fabsf(fi
.f
));
101 else if (new_exp
> 15) {
102 /* map this value to infinity */
103 /* m = 0; - already set */
107 /* The float32 lies in the range
108 * [min_normal16, max_normal16 + max_step16)
109 * and is rounded to a nearby float16 value. The result will be
110 * either normal or infinite.
113 m
= _mesa_lroundevenf(flt_m
/ (float) (1 << 13));
117 assert(0 <= m
&& m
<= 1024);
119 /* The float32 was rounded upwards into the range of the next exponent,
120 * so bump the exponent. This correctly handles the case where f32
121 * should be rounded up to float16 infinity.
127 result
= (s
<< 15) | (e
<< 10) | m
;
132 _mesa_float_to_float16_rtz(float val
)
134 return _mesa_float_to_half_rtz(val
);
138 * Convert a 2-byte half float to a 4-byte float.
139 * Based on code from:
140 * http://www.opengl.org/discussion_boards/ubb/Forum3/HTML/008786.html
143 _mesa_half_to_float(uint16_t val
)
145 return util_half_to_float(val
);
149 * Convert 0.0 to 0x00, 1.0 to 0xff.
150 * Values outside the range [0.0, 1.0] will give undefined results.
152 uint8_t _mesa_half_to_unorm8(uint16_t val
)
154 const int m
= val
& 0x3ff;
155 const int e
= (val
>> 10) & 0x1f;
156 ASSERTED
const int s
= (val
>> 15) & 0x1;
158 /* v = round_to_nearest(1.mmmmmmmmmm * 2^(e-15) * 255)
159 * = round_to_nearest((1.mmmmmmmmmm * 255) * 2^(e-15))
160 * = round_to_nearest((1mmmmmmmmmm * 255) * 2^(e-25))
161 * = round_to_zero((1mmmmmmmmmm * 255) * 2^(e-25) + 0.5)
162 * = round_to_zero(((1mmmmmmmmmm * 255) * 2^(e-24) + 1) / 2)
164 * This happens to give the correct answer for zero/subnormals too
166 assert(s
== 0 && val
<= FP16_ONE
); /* check 0 <= this <= 1 */
167 /* (implies e <= 15, which means the bit-shifts below are safe) */
169 uint32_t v
= ((1 << 10) | m
) * 255;
170 v
= ((v
>> (24 - e
)) + 1) >> 1;
175 * Takes a uint16_t, divides by 65536, converts the infinite-precision
176 * result to fp16 with round-to-zero. Used by the ASTC decoder.
178 uint16_t _mesa_uint16_div_64k_to_half(uint16_t v
)
180 /* Zero or subnormal. Set the mantissa to (v << 8) and return. */
184 /* Count the leading 0s in the uint16_t */
185 #ifdef HAVE___BUILTIN_CLZ
186 int n
= __builtin_clz(v
) - 16;
189 for (int i
= 15; i
>= 0; i
--) {
197 /* Shift the mantissa up so bit 16 is the hidden 1 bit,
198 * mask it off, then shift back down to 10 bits
200 int m
= ( ((uint32_t)v
<< (n
+ 1)) & 0xffff ) >> 6;
202 /* (0{n} 1 X{15-n}) * 2^-16
203 * = 1.X * 2^(15-n-16)
204 * = 1.X * 2^(14-n - 15)
205 * which is the FP16 form with e = 14 - n
209 assert(e
>= 1 && e
<= 30);
210 assert(m
>= 0 && m
< 0x400);
212 return (e
<< 10) | m
;