1 /**************************************************************************
3 * Copyright 2008 Dennis Smit
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * on the rights to use, copy, modify, merge, publish, distribute, sub
10 * license, and/or sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 **************************************************************************/
29 * CPU feature detection.
32 * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
35 #include "pipe/p_config.h"
36 #include "pipe/p_compiler.h"
38 #include "util/u_debug.h"
39 #include "u_cpu_detect.h"
40 #include "c11/threads.h"
42 #if defined(PIPE_ARCH_PPC)
43 #if defined(PIPE_OS_APPLE)
44 #include <sys/sysctl.h>
51 #if defined(PIPE_OS_BSD)
52 #include <sys/param.h>
53 #include <sys/sysctl.h>
54 #include <machine/cpu.h>
57 #if defined(PIPE_OS_FREEBSD)
58 #if __has_include(<sys/auxv.h>)
60 #define HAVE_ELF_AUX_INFO
64 #if defined(PIPE_OS_LINUX)
74 #if defined(HAS_ANDROID_CPUFEATURES)
75 #include <cpu-features.h>
78 #if defined(PIPE_OS_WINDOWS)
80 #if defined(PIPE_CC_MSVC)
87 DEBUG_GET_ONCE_BOOL_OPTION(dump_cpu
, "GALLIUM_DUMP_CPU", false)
91 struct util_cpu_caps util_cpu_caps
;
93 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
94 static int has_cpuid(void);
98 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_APPLE) && !defined(PIPE_OS_BSD) && !defined(PIPE_OS_LINUX)
99 static jmp_buf __lv_powerpc_jmpbuf
;
100 static volatile sig_atomic_t __lv_powerpc_canjump
= 0;
103 sigill_handler(int sig
)
105 if (!__lv_powerpc_canjump
) {
106 signal (sig
, SIG_DFL
);
110 __lv_powerpc_canjump
= 0;
111 longjmp(__lv_powerpc_jmpbuf
, 1);
115 #if defined(PIPE_ARCH_PPC)
117 check_os_altivec_support(void)
119 #if defined(__ALTIVEC__)
120 util_cpu_caps
.has_altivec
= 1;
123 util_cpu_caps
.has_vsx
= 1;
125 #if defined(__ALTIVEC__) && defined(__VSX__)
127 #elif defined(PIPE_OS_APPLE) || defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
129 int sels
[2] = {CTL_HW
, HW_VECTORUNIT
};
131 int sels
[2] = {CTL_MACHDEP
, CPU_ALTIVEC
};
134 int len
= sizeof (has_vu
);
137 err
= sysctl(sels
, 2, &has_vu
, &len
, NULL
, 0);
141 util_cpu_caps
.has_altivec
= 1;
144 #elif defined(PIPE_OS_FREEBSD) /* !PIPE_OS_APPLE && !PIPE_OS_NETBSD && !PIPE_OS_OPENBSD */
145 unsigned long hwcap
= 0;
146 #ifdef HAVE_ELF_AUX_INFO
147 elf_aux_info(AT_HWCAP
, &hwcap
, sizeof(hwcap
));
149 size_t len
= sizeof(hwcap
);
150 sysctlbyname("hw.cpu_features", &hwcap
, &len
, NULL
, 0);
152 if (hwcap
& PPC_FEATURE_HAS_ALTIVEC
)
153 util_cpu_caps
.has_altivec
= 1;
154 if (hwcap
& PPC_FEATURE_HAS_VSX
)
155 util_cpu_caps
.has_vsx
= 1;
156 #elif defined(PIPE_OS_LINUX) /* !PIPE_OS_FREEBSD */
157 #if defined(PIPE_ARCH_PPC_64)
162 int fd
= open("/proc/self/auxv", O_RDONLY
| O_CLOEXEC
);
164 while (read(fd
, &aux
, sizeof(aux
)) == sizeof(aux
)) {
165 if (aux
.a_type
== AT_HWCAP
) {
166 char *env_vsx
= getenv("GALLIVM_VSX");
167 uint64_t hwcap
= aux
.a_un
.a_val
;
168 util_cpu_caps
.has_altivec
= (hwcap
>> 28) & 1;
169 if (!env_vsx
|| env_vsx
[0] != '0') {
170 util_cpu_caps
.has_vsx
= (hwcap
>> 7) & 1;
177 #else /* !PIPE_OS_APPLE && !PIPE_OS_BSD && !PIPE_OS_LINUX */
178 /* not on Apple/Darwin or Linux, do it the brute-force way */
179 /* this is borrowed from the libmpeg2 library */
180 signal(SIGILL
, sigill_handler
);
181 if (setjmp(__lv_powerpc_jmpbuf
)) {
182 signal(SIGILL
, SIG_DFL
);
184 boolean enable_altivec
= TRUE
; /* Default: enable if available, and if not overridden */
185 boolean enable_vsx
= TRUE
;
187 /* Disabling Altivec code generation is not the same as disabling VSX code generation,
188 * which can be done simply by passing -mattr=-vsx to the LLVM compiler; cf.
189 * lp_build_create_jit_compiler_for_module().
190 * If you want to disable Altivec code generation, the best place to do it is here.
192 char *env_control
= getenv("GALLIVM_ALTIVEC"); /* 1=enable (default); 0=disable */
193 if (env_control
&& env_control
[0] == '0') {
194 enable_altivec
= FALSE
;
197 /* VSX instructions can be explicitly enabled/disabled via GALLIVM_VSX=1 or 0 */
198 char *env_vsx
= getenv("GALLIVM_VSX");
199 if (env_vsx
&& env_vsx
[0] == '0') {
202 if (enable_altivec
) {
203 __lv_powerpc_canjump
= 1;
207 "vand %%v0, %%v0, %%v0"
211 util_cpu_caps
.has_altivec
= 1;
214 __asm
__volatile("xxland %vs0, %vs0, %vs0");
215 util_cpu_caps
.has_vsx
= 1;
217 signal(SIGILL
, SIG_DFL
);
219 util_cpu_caps
.has_altivec
= 0;
222 #endif /* !PIPE_OS_APPLE && !PIPE_OS_LINUX */
224 #endif /* PIPE_ARCH_PPC */
227 #if defined(PIPE_ARCH_X86) || defined (PIPE_ARCH_X86_64)
228 static int has_cpuid(void)
230 #if defined(PIPE_ARCH_X86)
231 #if defined(PIPE_OS_GCC)
238 "xorl $0x200000, %0\n"
252 #elif defined(PIPE_ARCH_X86_64)
261 * @sa cpuid.h included in gcc-4.3 onwards.
262 * @sa http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
265 cpuid(uint32_t ax
, uint32_t *p
)
267 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
269 "xchgl %%ebx, %1\n\t"
278 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
287 #elif defined(PIPE_CC_MSVC)
298 * @sa cpuid.h included in gcc-4.4 onwards.
299 * @sa http://msdn.microsoft.com/en-us/library/hskdteyh%28v=vs.90%29.aspx
302 cpuid_count(uint32_t ax
, uint32_t cx
, uint32_t *p
)
304 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
306 "xchgl %%ebx, %1\n\t"
315 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
324 #elif defined(PIPE_CC_MSVC)
325 __cpuidex(p
, ax
, cx
);
335 static inline uint64_t xgetbv(void)
337 #if defined(PIPE_CC_GCC)
341 ".byte 0x0f, 0x01, 0xd0" // xgetbv isn't supported on gcc < 4.4
347 return ((uint64_t)edx
<< 32) | eax
;
348 #elif defined(PIPE_CC_MSVC) && defined(_MSC_FULL_VER) && defined(_XCR_XFEATURE_ENABLED_MASK)
349 return _xgetbv(_XCR_XFEATURE_ENABLED_MASK
);
356 #if defined(PIPE_ARCH_X86)
357 PIPE_ALIGN_STACK
static inline boolean
sse2_has_daz(void)
362 uint32_t pad2
[128-8];
363 } PIPE_ALIGN_VAR(16) fxarea
;
365 fxarea
.mxcsr_mask
= 0;
366 #if defined(PIPE_CC_GCC)
367 __asm
__volatile ("fxsave %0" : "+m" (fxarea
));
368 #elif defined(PIPE_CC_MSVC) || defined(PIPE_CC_ICL)
371 fxarea
.mxcsr_mask
= 0;
373 return !!(fxarea
.mxcsr_mask
& (1 << 6));
377 #endif /* X86 or X86_64 */
379 #if defined(PIPE_ARCH_ARM)
381 check_os_arm_support(void)
384 * On Android, the cpufeatures library is preferred way of checking
385 * CPU capabilities. However, it is not available for standalone Mesa
386 * builds, i.e. when Android build system (Android.mk-based) is not
387 * used. Because of this we cannot use PIPE_OS_ANDROID here, but rather
388 * have a separate macro that only gets enabled from respective Android.mk.
390 #if defined(__ARM_NEON) || defined(__ARM_NEON__)
391 util_cpu_caps
.has_neon
= 1;
392 #elif defined(PIPE_OS_FREEBSD) && defined(HAVE_ELF_AUX_INFO)
393 unsigned long hwcap
= 0;
394 elf_aux_info(AT_HWCAP
, &hwcap
, sizeof(hwcap
));
395 if (hwcap
& HWCAP_NEON
)
396 util_cpu_caps
.has_neon
= 1;
397 #elif defined(HAS_ANDROID_CPUFEATURES)
398 AndroidCpuFamily cpu_family
= android_getCpuFamily();
399 uint64_t cpu_features
= android_getCpuFeatures();
401 if (cpu_family
== ANDROID_CPU_FAMILY_ARM
) {
402 if (cpu_features
& ANDROID_CPU_ARM_FEATURE_NEON
)
403 util_cpu_caps
.has_neon
= 1;
405 #elif defined(PIPE_OS_LINUX)
409 fd
= open("/proc/self/auxv", O_RDONLY
| O_CLOEXEC
);
411 while (read(fd
, &aux
, sizeof(Elf32_auxv_t
)) == sizeof(Elf32_auxv_t
)) {
412 if (aux
.a_type
== AT_HWCAP
) {
413 uint32_t hwcap
= aux
.a_un
.a_val
;
415 util_cpu_caps
.has_neon
= (hwcap
>> 12) & 1;
421 #endif /* PIPE_OS_LINUX */
424 #elif defined(PIPE_ARCH_AARCH64)
426 check_os_arm_support(void)
428 util_cpu_caps
.has_neon
= true;
430 #endif /* PIPE_ARCH_ARM || PIPE_ARCH_AARCH64 */
433 get_cpu_topology(void)
435 /* Default. This is correct if L3 is not present or there is only one. */
436 util_cpu_caps
.cores_per_L3
= util_cpu_caps
.nr_cpus
;
438 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
440 if (util_cpu_caps
.x86_cpu_type
== 0x17) {
443 /* Query the L3 cache topology information. */
444 cpuid_count(0x8000001D, 3, regs
);
445 unsigned cache_level
= (regs
[0] >> 5) & 0x7;
446 unsigned cores_per_cache
= ((regs
[0] >> 14) & 0xfff) + 1;
448 if (cache_level
== 3)
449 util_cpu_caps
.cores_per_L3
= cores_per_cache
;
455 util_cpu_detect_once(void)
457 memset(&util_cpu_caps
, 0, sizeof util_cpu_caps
);
459 /* Count the number of CPUs in system */
460 #if defined(PIPE_OS_WINDOWS)
462 SYSTEM_INFO system_info
;
463 GetSystemInfo(&system_info
);
464 util_cpu_caps
.nr_cpus
= system_info
.dwNumberOfProcessors
;
466 #elif defined(PIPE_OS_UNIX) && defined(_SC_NPROCESSORS_ONLN)
467 util_cpu_caps
.nr_cpus
= sysconf(_SC_NPROCESSORS_ONLN
);
468 if (util_cpu_caps
.nr_cpus
== ~0)
469 util_cpu_caps
.nr_cpus
= 1;
470 #elif defined(PIPE_OS_BSD)
479 sysctl(mib
, 2, &ncpu
, &len
, NULL
, 0);
480 util_cpu_caps
.nr_cpus
= ncpu
;
483 util_cpu_caps
.nr_cpus
= 1;
486 /* Make the fallback cacheline size nonzero so that it can be
487 * safely passed to align().
489 util_cpu_caps
.cacheline
= sizeof(void *);
491 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
496 util_cpu_caps
.cacheline
= 32;
498 /* Get max cpuid level */
499 cpuid(0x00000000, regs
);
501 if (regs
[0] >= 0x00000001) {
502 unsigned int cacheline
;
504 cpuid (0x00000001, regs2
);
506 util_cpu_caps
.x86_cpu_type
= (regs2
[0] >> 8) & 0xf;
507 /* Add "extended family". */
508 if (util_cpu_caps
.x86_cpu_type
== 0xf)
509 util_cpu_caps
.x86_cpu_type
+= ((regs2
[0] >> 20) & 0xff);
511 /* general feature flags */
512 util_cpu_caps
.has_tsc
= (regs2
[3] >> 4) & 1; /* 0x0000010 */
513 util_cpu_caps
.has_mmx
= (regs2
[3] >> 23) & 1; /* 0x0800000 */
514 util_cpu_caps
.has_sse
= (regs2
[3] >> 25) & 1; /* 0x2000000 */
515 util_cpu_caps
.has_sse2
= (regs2
[3] >> 26) & 1; /* 0x4000000 */
516 util_cpu_caps
.has_sse3
= (regs2
[2] >> 0) & 1; /* 0x0000001 */
517 util_cpu_caps
.has_ssse3
= (regs2
[2] >> 9) & 1; /* 0x0000020 */
518 util_cpu_caps
.has_sse4_1
= (regs2
[2] >> 19) & 1;
519 util_cpu_caps
.has_sse4_2
= (regs2
[2] >> 20) & 1;
520 util_cpu_caps
.has_popcnt
= (regs2
[2] >> 23) & 1;
521 util_cpu_caps
.has_avx
= ((regs2
[2] >> 28) & 1) && // AVX
522 ((regs2
[2] >> 27) & 1) && // OSXSAVE
523 ((xgetbv() & 6) == 6); // XMM & YMM
524 util_cpu_caps
.has_f16c
= ((regs2
[2] >> 29) & 1) && util_cpu_caps
.has_avx
;
525 util_cpu_caps
.has_fma
= ((regs2
[2] >> 12) & 1) && util_cpu_caps
.has_avx
;
526 util_cpu_caps
.has_mmx2
= util_cpu_caps
.has_sse
; /* SSE cpus supports mmxext too */
527 #if defined(PIPE_ARCH_X86_64)
528 util_cpu_caps
.has_daz
= 1;
530 util_cpu_caps
.has_daz
= util_cpu_caps
.has_sse3
||
531 (util_cpu_caps
.has_sse2
&& sse2_has_daz());
534 cacheline
= ((regs2
[1] >> 8) & 0xFF) * 8;
536 util_cpu_caps
.cacheline
= cacheline
;
538 if (util_cpu_caps
.has_avx
&& regs
[0] >= 0x00000007) {
540 cpuid_count(0x00000007, 0x00000000, regs7
);
541 util_cpu_caps
.has_avx2
= (regs7
[1] >> 5) & 1;
545 if (((regs2
[2] >> 27) & 1) && // OSXSAVE
546 (xgetbv() & (0x7 << 5)) && // OPMASK: upper-256 enabled by OS
547 ((xgetbv() & 6) == 6)) { // XMM/YMM enabled by OS
549 cpuid_count(0x00000007, 0x00000000, regs3
);
550 util_cpu_caps
.has_avx512f
= (regs3
[1] >> 16) & 1;
551 util_cpu_caps
.has_avx512dq
= (regs3
[1] >> 17) & 1;
552 util_cpu_caps
.has_avx512ifma
= (regs3
[1] >> 21) & 1;
553 util_cpu_caps
.has_avx512pf
= (regs3
[1] >> 26) & 1;
554 util_cpu_caps
.has_avx512er
= (regs3
[1] >> 27) & 1;
555 util_cpu_caps
.has_avx512cd
= (regs3
[1] >> 28) & 1;
556 util_cpu_caps
.has_avx512bw
= (regs3
[1] >> 30) & 1;
557 util_cpu_caps
.has_avx512vl
= (regs3
[1] >> 31) & 1;
558 util_cpu_caps
.has_avx512vbmi
= (regs3
[2] >> 1) & 1;
561 if (regs
[1] == 0x756e6547 && regs
[2] == 0x6c65746e && regs
[3] == 0x49656e69) {
563 util_cpu_caps
.has_intel
= 1;
566 cpuid(0x80000000, regs
);
568 if (regs
[0] >= 0x80000001) {
570 cpuid(0x80000001, regs2
);
572 util_cpu_caps
.has_mmx
|= (regs2
[3] >> 23) & 1;
573 util_cpu_caps
.has_mmx2
|= (regs2
[3] >> 22) & 1;
574 util_cpu_caps
.has_3dnow
= (regs2
[3] >> 31) & 1;
575 util_cpu_caps
.has_3dnow_ext
= (regs2
[3] >> 30) & 1;
577 util_cpu_caps
.has_xop
= util_cpu_caps
.has_avx
&&
578 ((regs2
[2] >> 11) & 1);
581 if (regs
[0] >= 0x80000006) {
582 /* should we really do this if the clflush size above worked? */
583 unsigned int cacheline
;
584 cpuid(0x80000006, regs2
);
585 cacheline
= regs2
[2] & 0xFF;
587 util_cpu_caps
.cacheline
= cacheline
;
590 if (!util_cpu_caps
.has_sse
) {
591 util_cpu_caps
.has_sse2
= 0;
592 util_cpu_caps
.has_sse3
= 0;
593 util_cpu_caps
.has_ssse3
= 0;
594 util_cpu_caps
.has_sse4_1
= 0;
597 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
599 #if defined(PIPE_ARCH_ARM) || defined(PIPE_ARCH_AARCH64)
600 check_os_arm_support();
603 #if defined(PIPE_ARCH_PPC)
604 check_os_altivec_support();
605 #endif /* PIPE_ARCH_PPC */
610 if (debug_get_option_dump_cpu()) {
611 debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps
.nr_cpus
);
613 debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps
.x86_cpu_type
);
614 debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps
.cacheline
);
616 debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps
.has_tsc
);
617 debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps
.has_mmx
);
618 debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps
.has_mmx2
);
619 debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps
.has_sse
);
620 debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps
.has_sse2
);
621 debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps
.has_sse3
);
622 debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps
.has_ssse3
);
623 debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps
.has_sse4_1
);
624 debug_printf("util_cpu_caps.has_sse4_2 = %u\n", util_cpu_caps
.has_sse4_2
);
625 debug_printf("util_cpu_caps.has_avx = %u\n", util_cpu_caps
.has_avx
);
626 debug_printf("util_cpu_caps.has_avx2 = %u\n", util_cpu_caps
.has_avx2
);
627 debug_printf("util_cpu_caps.has_f16c = %u\n", util_cpu_caps
.has_f16c
);
628 debug_printf("util_cpu_caps.has_popcnt = %u\n", util_cpu_caps
.has_popcnt
);
629 debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps
.has_3dnow
);
630 debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps
.has_3dnow_ext
);
631 debug_printf("util_cpu_caps.has_xop = %u\n", util_cpu_caps
.has_xop
);
632 debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps
.has_altivec
);
633 debug_printf("util_cpu_caps.has_vsx = %u\n", util_cpu_caps
.has_vsx
);
634 debug_printf("util_cpu_caps.has_neon = %u\n", util_cpu_caps
.has_neon
);
635 debug_printf("util_cpu_caps.has_daz = %u\n", util_cpu_caps
.has_daz
);
636 debug_printf("util_cpu_caps.has_avx512f = %u\n", util_cpu_caps
.has_avx512f
);
637 debug_printf("util_cpu_caps.has_avx512dq = %u\n", util_cpu_caps
.has_avx512dq
);
638 debug_printf("util_cpu_caps.has_avx512ifma = %u\n", util_cpu_caps
.has_avx512ifma
);
639 debug_printf("util_cpu_caps.has_avx512pf = %u\n", util_cpu_caps
.has_avx512pf
);
640 debug_printf("util_cpu_caps.has_avx512er = %u\n", util_cpu_caps
.has_avx512er
);
641 debug_printf("util_cpu_caps.has_avx512cd = %u\n", util_cpu_caps
.has_avx512cd
);
642 debug_printf("util_cpu_caps.has_avx512bw = %u\n", util_cpu_caps
.has_avx512bw
);
643 debug_printf("util_cpu_caps.has_avx512vl = %u\n", util_cpu_caps
.has_avx512vl
);
644 debug_printf("util_cpu_caps.has_avx512vbmi = %u\n", util_cpu_caps
.has_avx512vbmi
);
649 static once_flag cpu_once_flag
= ONCE_FLAG_INIT
;
652 util_cpu_detect(void)
654 call_once(&cpu_once_flag
, util_cpu_detect_once
);