vk/0.210.0: Rework dynamic states
[mesa.git] / src / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 /** \file anv_cmd_buffer.c
33 *
34 * This file contains all of the stuff for emitting commands into a command
35 * buffer. This includes implementations of most of the vkCmd*
36 * entrypoints. This file is concerned entirely with state emission and
37 * not with the command buffer data structure itself. As far as this file
38 * is concerned, most of anv_cmd_buffer is magic.
39 */
40
41 /* TODO: These are taken from GLES. We should check the Vulkan spec */
42 const struct anv_dynamic_state default_dynamic_state = {
43 .viewport = {
44 .count = 0,
45 },
46 .scissor = {
47 .count = 0,
48 },
49 .line_width = 1.0f,
50 .depth_bias = {
51 .bias = 0.0f,
52 .clamp = 0.0f,
53 .slope = 0.0f,
54 },
55 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
56 .depth_bounds = {
57 .min = 0.0f,
58 .max = 1.0f,
59 },
60 .stencil_compare_mask = {
61 .front = ~0u,
62 .back = ~0u,
63 },
64 .stencil_write_mask = {
65 .front = ~0u,
66 .back = ~0u,
67 },
68 .stencil_reference = {
69 .front = 0u,
70 .back = 0u,
71 },
72 };
73
74 void
75 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
76 const struct anv_dynamic_state *src,
77 uint32_t copy_mask)
78 {
79 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
80 dest->viewport.count = src->viewport.count;
81 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
82 src->viewport.count);
83 }
84
85 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
86 dest->scissor.count = src->scissor.count;
87 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
88 src->scissor.count);
89 }
90
91 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
92 dest->line_width = src->line_width;
93
94 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
95 dest->depth_bias = src->depth_bias;
96
97 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
98 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
99
100 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
101 dest->depth_bounds = src->depth_bounds;
102
103 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
104 dest->stencil_compare_mask = src->stencil_compare_mask;
105
106 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
107 dest->stencil_write_mask = src->stencil_write_mask;
108
109 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
110 dest->stencil_reference = src->stencil_reference;
111 }
112
113 static void
114 anv_cmd_state_init(struct anv_cmd_state *state)
115 {
116 memset(&state->descriptors, 0, sizeof(state->descriptors));
117 memset(&state->push_constants, 0, sizeof(state->push_constants));
118
119 state->dirty = ~0;
120 state->vb_dirty = 0;
121 state->descriptors_dirty = 0;
122 state->push_constants_dirty = 0;
123 state->pipeline = NULL;
124 state->restart_index = UINT32_MAX;
125 state->dynamic = default_dynamic_state;
126
127 state->gen7.index_buffer = NULL;
128 }
129
130 static VkResult
131 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
132 VkShaderStage stage, uint32_t size)
133 {
134 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
135
136 if (*ptr == NULL) {
137 *ptr = anv_device_alloc(cmd_buffer->device, size, 8,
138 VK_SYSTEM_ALLOC_TYPE_INTERNAL);
139 if (*ptr == NULL)
140 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
141 (*ptr)->size = size;
142 } else if ((*ptr)->size < size) {
143 void *new_data = anv_device_alloc(cmd_buffer->device, size, 8,
144 VK_SYSTEM_ALLOC_TYPE_INTERNAL);
145 if (new_data == NULL)
146 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
147
148 memcpy(new_data, *ptr, (*ptr)->size);
149 anv_device_free(cmd_buffer->device, *ptr);
150
151 *ptr = new_data;
152 (*ptr)->size = size;
153 }
154
155 return VK_SUCCESS;
156 }
157
158 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
159 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
160 (offsetof(struct anv_push_constants, field) + \
161 sizeof(cmd_buffer->state.push_constants[0]->field)))
162
163 VkResult anv_CreateCommandBuffer(
164 VkDevice _device,
165 const VkCommandBufferCreateInfo* pCreateInfo,
166 VkCommandBuffer* pCommandBuffer)
167 {
168 ANV_FROM_HANDLE(anv_device, device, _device);
169 ANV_FROM_HANDLE(anv_cmd_pool, pool, pCreateInfo->commandPool);
170 struct anv_cmd_buffer *cmd_buffer;
171 VkResult result;
172
173 cmd_buffer = anv_device_alloc(device, sizeof(*cmd_buffer), 8,
174 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
175 if (cmd_buffer == NULL)
176 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
177
178 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
179 cmd_buffer->device = device;
180
181 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
182 if (result != VK_SUCCESS)
183 goto fail;
184
185 anv_state_stream_init(&cmd_buffer->surface_state_stream,
186 &device->surface_state_block_pool);
187 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
188 &device->dynamic_state_block_pool);
189
190 cmd_buffer->level = pCreateInfo->level;
191 cmd_buffer->opt_flags = 0;
192
193 anv_cmd_state_init(&cmd_buffer->state);
194
195 if (pool) {
196 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
197 } else {
198 /* Init the pool_link so we can safefly call list_del when we destroy
199 * the command buffer
200 */
201 list_inithead(&cmd_buffer->pool_link);
202 }
203
204 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
205
206 return VK_SUCCESS;
207
208 fail: anv_device_free(device, cmd_buffer);
209
210 return result;
211 }
212
213 void anv_DestroyCommandBuffer(
214 VkDevice _device,
215 VkCommandBuffer _cmd_buffer)
216 {
217 ANV_FROM_HANDLE(anv_device, device, _device);
218 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, _cmd_buffer);
219
220 list_del(&cmd_buffer->pool_link);
221
222 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
223
224 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
225 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
226 anv_device_free(device, cmd_buffer);
227 }
228
229 VkResult anv_ResetCommandBuffer(
230 VkCommandBuffer commandBuffer,
231 VkCommandBufferResetFlags flags)
232 {
233 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
234
235 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
236
237 anv_cmd_state_init(&cmd_buffer->state);
238
239 return VK_SUCCESS;
240 }
241
242 void
243 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
244 {
245 switch (cmd_buffer->device->info.gen) {
246 case 7:
247 if (cmd_buffer->device->info.is_haswell)
248 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
249 else
250 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
251 case 8:
252 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
253 case 9:
254 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
255 default:
256 unreachable("unsupported gen\n");
257 }
258 }
259
260 VkResult anv_BeginCommandBuffer(
261 VkCommandBuffer commandBuffer,
262 const VkCommandBufferBeginInfo* pBeginInfo)
263 {
264 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
265
266 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
267
268 cmd_buffer->opt_flags = pBeginInfo->flags;
269
270 if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY) {
271 cmd_buffer->state.framebuffer =
272 anv_framebuffer_from_handle(pBeginInfo->framebuffer);
273 cmd_buffer->state.pass =
274 anv_render_pass_from_handle(pBeginInfo->renderPass);
275
276 struct anv_subpass *subpass =
277 &cmd_buffer->state.pass->subpasses[pBeginInfo->subpass];
278
279 anv_cmd_buffer_begin_subpass(cmd_buffer, subpass);
280 }
281
282 anv_cmd_buffer_emit_state_base_address(cmd_buffer);
283 cmd_buffer->state.current_pipeline = UINT32_MAX;
284
285 return VK_SUCCESS;
286 }
287
288 VkResult anv_EndCommandBuffer(
289 VkCommandBuffer commandBuffer)
290 {
291 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
292 struct anv_device *device = cmd_buffer->device;
293
294 anv_cmd_buffer_end_batch_buffer(cmd_buffer);
295
296 if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
297 /* The algorithm used to compute the validate list is not threadsafe as
298 * it uses the bo->index field. We have to lock the device around it.
299 * Fortunately, the chances for contention here are probably very low.
300 */
301 pthread_mutex_lock(&device->mutex);
302 anv_cmd_buffer_prepare_execbuf(cmd_buffer);
303 pthread_mutex_unlock(&device->mutex);
304 }
305
306 return VK_SUCCESS;
307 }
308
309 void anv_CmdBindPipeline(
310 VkCommandBuffer commandBuffer,
311 VkPipelineBindPoint pipelineBindPoint,
312 VkPipeline _pipeline)
313 {
314 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
315 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
316
317 switch (pipelineBindPoint) {
318 case VK_PIPELINE_BIND_POINT_COMPUTE:
319 cmd_buffer->state.compute_pipeline = pipeline;
320 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
321 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
322 break;
323
324 case VK_PIPELINE_BIND_POINT_GRAPHICS:
325 cmd_buffer->state.pipeline = pipeline;
326 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
327 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
328 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
329
330 /* Apply the dynamic state from the pipeline */
331 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
332 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
333 &pipeline->dynamic_state,
334 pipeline->dynamic_state_mask);
335 break;
336
337 default:
338 assert(!"invalid bind point");
339 break;
340 }
341 }
342
343 void anv_CmdSetViewport(
344 VkCommandBuffer commandBuffer,
345 uint32_t viewportCount,
346 const VkViewport* pViewports)
347 {
348 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
349
350 cmd_buffer->state.dynamic.viewport.count = viewportCount;
351 memcpy(cmd_buffer->state.dynamic.viewport.viewports,
352 pViewports, viewportCount * sizeof(*pViewports));
353
354 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
355 }
356
357 void anv_CmdSetScissor(
358 VkCommandBuffer commandBuffer,
359 uint32_t scissorCount,
360 const VkRect2D* pScissors)
361 {
362 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
363
364 cmd_buffer->state.dynamic.scissor.count = scissorCount;
365 memcpy(cmd_buffer->state.dynamic.scissor.scissors,
366 pScissors, scissorCount * sizeof(*pScissors));
367
368 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
369 }
370
371 void anv_CmdSetLineWidth(
372 VkCommandBuffer commandBuffer,
373 float lineWidth)
374 {
375 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
376
377 cmd_buffer->state.dynamic.line_width = lineWidth;
378 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
379 }
380
381 void anv_CmdSetDepthBias(
382 VkCommandBuffer commandBuffer,
383 float depthBiasConstantFactor,
384 float depthBiasClamp,
385 float depthBiasSlopeFactor)
386 {
387 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
388
389 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
390 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
391 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
392
393 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
394 }
395
396 void anv_CmdSetBlendConstants(
397 VkCommandBuffer commandBuffer,
398 const float blendConstants[4])
399 {
400 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
401
402 memcpy(cmd_buffer->state.dynamic.blend_constants,
403 blendConstants, sizeof(float) * 4);
404
405 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
406 }
407
408 void anv_CmdSetDepthBounds(
409 VkCommandBuffer commandBuffer,
410 float minDepthBounds,
411 float maxDepthBounds)
412 {
413 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
414
415 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
416 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
417
418 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
419 }
420
421 void anv_CmdSetStencilCompareMask(
422 VkCommandBuffer commandBuffer,
423 VkStencilFaceFlags faceMask,
424 uint32_t compareMask)
425 {
426 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
427
428 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
429 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
430 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
431 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
432
433 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
434 }
435
436 void anv_CmdSetStencilWriteMask(
437 VkCommandBuffer commandBuffer,
438 VkStencilFaceFlags faceMask,
439 uint32_t writeMask)
440 {
441 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
442
443 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
444 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
445 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
446 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
447
448 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
449 }
450
451 void anv_CmdSetStencilReference(
452 VkCommandBuffer commandBuffer,
453 VkStencilFaceFlags faceMask,
454 uint32_t reference)
455 {
456 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
457
458 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
459 cmd_buffer->state.dynamic.stencil_reference.front = reference;
460 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
461 cmd_buffer->state.dynamic.stencil_reference.back = reference;
462
463 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
464 }
465
466 void anv_CmdBindDescriptorSets(
467 VkCommandBuffer commandBuffer,
468 VkPipelineBindPoint pipelineBindPoint,
469 VkPipelineLayout _layout,
470 uint32_t firstSet,
471 uint32_t setCount,
472 const VkDescriptorSet* pDescriptorSets,
473 uint32_t dynamicOffsetCount,
474 const uint32_t* pDynamicOffsets)
475 {
476 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
477 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
478 struct anv_descriptor_set_layout *set_layout;
479
480 assert(firstSet + setCount < MAX_SETS);
481
482 uint32_t dynamic_slot = 0;
483 for (uint32_t i = 0; i < setCount; i++) {
484 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
485 set_layout = layout->set[firstSet + i].layout;
486
487 if (cmd_buffer->state.descriptors[firstSet + i] != set) {
488 cmd_buffer->state.descriptors[firstSet + i] = set;
489 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
490 }
491
492 if (set_layout->dynamic_offset_count > 0) {
493 VkShaderStage s;
494 for_each_bit(s, set_layout->shader_stages) {
495 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, s, dynamic);
496
497 struct anv_push_constants *push =
498 cmd_buffer->state.push_constants[s];
499
500 unsigned d = layout->set[firstSet + i].dynamic_offset_start;
501 const uint32_t *offsets = pDynamicOffsets + dynamic_slot;
502 struct anv_descriptor *desc = set->descriptors;
503
504 for (unsigned b = 0; b < set_layout->binding_count; b++) {
505 if (set_layout->binding[b].dynamic_offset_index < 0)
506 continue;
507
508 unsigned array_size = set_layout->binding[b].array_size;
509 for (unsigned j = 0; j < array_size; j++) {
510 push->dynamic[d].offset = *(offsets++);
511 push->dynamic[d].range = (desc++)->range;
512 d++;
513 }
514 }
515 }
516 cmd_buffer->state.push_constants_dirty |= set_layout->shader_stages;
517 }
518 }
519 }
520
521 void anv_CmdBindVertexBuffers(
522 VkCommandBuffer commandBuffer,
523 uint32_t startBinding,
524 uint32_t bindingCount,
525 const VkBuffer* pBuffers,
526 const VkDeviceSize* pOffsets)
527 {
528 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
529 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
530
531 /* We have to defer setting up vertex buffer since we need the buffer
532 * stride from the pipeline. */
533
534 assert(startBinding + bindingCount < MAX_VBS);
535 for (uint32_t i = 0; i < bindingCount; i++) {
536 vb[startBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
537 vb[startBinding + i].offset = pOffsets[i];
538 cmd_buffer->state.vb_dirty |= 1 << (startBinding + i);
539 }
540 }
541
542 static void
543 add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer,
544 struct anv_state state, struct anv_bo *bo, uint32_t offset)
545 {
546 /* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and
547 * 9 for gen8+. We only write the first dword for gen8+ here and rely on
548 * the initial state to set the high bits to 0. */
549
550 const uint32_t dword = cmd_buffer->device->info.gen < 8 ? 1 : 8;
551
552 anv_reloc_list_add(&cmd_buffer->surface_relocs, cmd_buffer->device,
553 state.offset + dword * 4, bo, offset);
554 }
555
556 static void
557 fill_descriptor_buffer_surface_state(struct anv_device *device, void *state,
558 VkShaderStage stage, VkDescriptorType type,
559 uint32_t offset, uint32_t range)
560 {
561 VkFormat format;
562 uint32_t stride;
563
564 switch (type) {
565 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
566 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
567 if (anv_is_scalar_shader_stage(device->instance->physicalDevice.compiler,
568 stage)) {
569 stride = 4;
570 } else {
571 stride = 16;
572 }
573 format = VK_FORMAT_R32G32B32A32_SFLOAT;
574 break;
575
576 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
577 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
578 stride = 1;
579 format = VK_FORMAT_UNDEFINED;
580 break;
581
582 default:
583 unreachable("Invalid descriptor type");
584 }
585
586 anv_fill_buffer_surface_state(device, state,
587 anv_format_for_vk_format(format),
588 offset, range, stride);
589 }
590
591 VkResult
592 anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
593 VkShaderStage stage, struct anv_state *bt_state)
594 {
595 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
596 struct anv_subpass *subpass = cmd_buffer->state.subpass;
597 struct anv_pipeline_layout *layout;
598 uint32_t color_count, bias, state_offset;
599
600 if (stage == VK_SHADER_STAGE_COMPUTE)
601 layout = cmd_buffer->state.compute_pipeline->layout;
602 else
603 layout = cmd_buffer->state.pipeline->layout;
604
605 if (stage == VK_SHADER_STAGE_FRAGMENT) {
606 bias = MAX_RTS;
607 color_count = subpass->color_count;
608 } else {
609 bias = 0;
610 color_count = 0;
611 }
612
613 /* This is a little awkward: layout can be NULL but we still have to
614 * allocate and set a binding table for the PS stage for render
615 * targets. */
616 uint32_t surface_count = layout ? layout->stage[stage].surface_count : 0;
617
618 if (color_count + surface_count == 0)
619 return VK_SUCCESS;
620
621 *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer,
622 bias + surface_count,
623 &state_offset);
624 uint32_t *bt_map = bt_state->map;
625
626 if (bt_state->map == NULL)
627 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
628
629 for (uint32_t a = 0; a < color_count; a++) {
630 const struct anv_image_view *iview =
631 fb->attachments[subpass->color_attachments[a]];
632
633 bt_map[a] = iview->color_rt_surface_state.offset + state_offset;
634 add_surface_state_reloc(cmd_buffer, iview->color_rt_surface_state,
635 iview->bo, iview->offset);
636 }
637
638 if (layout == NULL)
639 return VK_SUCCESS;
640
641 for (uint32_t s = 0; s < layout->stage[stage].surface_count; s++) {
642 struct anv_pipeline_binding *binding =
643 &layout->stage[stage].surface_to_descriptor[s];
644 struct anv_descriptor_set *set =
645 cmd_buffer->state.descriptors[binding->set];
646 struct anv_descriptor *desc = &set->descriptors[binding->offset];
647
648 struct anv_state surface_state;
649 struct anv_bo *bo;
650 uint32_t bo_offset;
651
652 switch (desc->type) {
653 case VK_DESCRIPTOR_TYPE_SAMPLER:
654 /* Nothing for us to do here */
655 continue;
656
657 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
658 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
659 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
660 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC: {
661 bo = desc->buffer->bo;
662 bo_offset = desc->buffer->offset + desc->offset;
663
664 surface_state =
665 anv_cmd_buffer_alloc_surface_state(cmd_buffer);
666
667 fill_descriptor_buffer_surface_state(cmd_buffer->device,
668 surface_state.map,
669 stage, desc->type,
670 bo_offset, desc->range);
671 break;
672 }
673
674 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
675 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
676 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
677 surface_state = desc->image_view->nonrt_surface_state;
678 bo = desc->image_view->bo;
679 bo_offset = desc->image_view->offset;
680 break;
681
682 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
683 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
684 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
685 assert(!"Unsupported descriptor type");
686 break;
687
688 default:
689 assert(!"Invalid descriptor type");
690 continue;
691 }
692
693 bt_map[bias + s] = surface_state.offset + state_offset;
694 add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset);
695 }
696
697 return VK_SUCCESS;
698 }
699
700 VkResult
701 anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
702 VkShaderStage stage, struct anv_state *state)
703 {
704 struct anv_pipeline_layout *layout;
705 uint32_t sampler_count;
706
707 if (stage == VK_SHADER_STAGE_COMPUTE)
708 layout = cmd_buffer->state.compute_pipeline->layout;
709 else
710 layout = cmd_buffer->state.pipeline->layout;
711
712 sampler_count = layout ? layout->stage[stage].sampler_count : 0;
713 if (sampler_count == 0)
714 return VK_SUCCESS;
715
716 uint32_t size = sampler_count * 16;
717 *state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 32);
718
719 if (state->map == NULL)
720 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
721
722 for (uint32_t s = 0; s < layout->stage[stage].sampler_count; s++) {
723 struct anv_pipeline_binding *binding =
724 &layout->stage[stage].sampler_to_descriptor[s];
725 struct anv_descriptor_set *set =
726 cmd_buffer->state.descriptors[binding->set];
727 struct anv_descriptor *desc = &set->descriptors[binding->offset];
728
729 if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
730 desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
731 continue;
732
733 struct anv_sampler *sampler = desc->sampler;
734
735 /* This can happen if we have an unfilled slot since TYPE_SAMPLER
736 * happens to be zero.
737 */
738 if (sampler == NULL)
739 continue;
740
741 memcpy(state->map + (s * 16),
742 sampler->state, sizeof(sampler->state));
743 }
744
745 return VK_SUCCESS;
746 }
747
748 struct anv_state
749 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
750 uint32_t *a, uint32_t dwords, uint32_t alignment)
751 {
752 struct anv_state state;
753
754 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
755 dwords * 4, alignment);
756 memcpy(state.map, a, dwords * 4);
757
758 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, dwords * 4));
759
760 return state;
761 }
762
763 struct anv_state
764 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
765 uint32_t *a, uint32_t *b,
766 uint32_t dwords, uint32_t alignment)
767 {
768 struct anv_state state;
769 uint32_t *p;
770
771 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
772 dwords * 4, alignment);
773 p = state.map;
774 for (uint32_t i = 0; i < dwords; i++)
775 p[i] = a[i] | b[i];
776
777 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
778
779 return state;
780 }
781
782 void
783 anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
784 struct anv_subpass *subpass)
785 {
786 switch (cmd_buffer->device->info.gen) {
787 case 7:
788 gen7_cmd_buffer_begin_subpass(cmd_buffer, subpass);
789 break;
790 case 8:
791 gen8_cmd_buffer_begin_subpass(cmd_buffer, subpass);
792 break;
793 case 9:
794 gen9_cmd_buffer_begin_subpass(cmd_buffer, subpass);
795 break;
796 default:
797 unreachable("unsupported gen\n");
798 }
799 }
800
801 void anv_CmdSetEvent(
802 VkCommandBuffer commandBuffer,
803 VkEvent event,
804 VkPipelineStageFlags stageMask)
805 {
806 stub();
807 }
808
809 void anv_CmdResetEvent(
810 VkCommandBuffer commandBuffer,
811 VkEvent event,
812 VkPipelineStageFlags stageMask)
813 {
814 stub();
815 }
816
817 void anv_CmdWaitEvents(
818 VkCommandBuffer commandBuffer,
819 uint32_t eventCount,
820 const VkEvent* pEvents,
821 VkPipelineStageFlags srcStageMask,
822 VkPipelineStageFlags destStageMask,
823 uint32_t memBarrierCount,
824 const void* const* ppMemBarriers)
825 {
826 stub();
827 }
828
829 struct anv_state
830 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
831 VkShaderStage stage)
832 {
833 struct anv_push_constants *data =
834 cmd_buffer->state.push_constants[stage];
835 struct brw_stage_prog_data *prog_data =
836 cmd_buffer->state.pipeline->prog_data[stage];
837
838 /* If we don't actually have any push constants, bail. */
839 if (data == NULL || prog_data->nr_params == 0)
840 return (struct anv_state) { .offset = 0 };
841
842 struct anv_state state =
843 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
844 prog_data->nr_params * sizeof(float),
845 32 /* bottom 5 bits MBZ */);
846
847 /* Walk through the param array and fill the buffer with data */
848 uint32_t *u32_map = state.map;
849 for (unsigned i = 0; i < prog_data->nr_params; i++) {
850 uint32_t offset = (uintptr_t)prog_data->param[i];
851 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
852 }
853
854 return state;
855 }
856
857 void anv_CmdPushConstants(
858 VkCommandBuffer commandBuffer,
859 VkPipelineLayout layout,
860 VkShaderStageFlags stageFlags,
861 uint32_t start,
862 uint32_t length,
863 const void* values)
864 {
865 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
866 VkShaderStage stage;
867
868 for_each_bit(stage, stageFlags) {
869 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
870
871 memcpy(cmd_buffer->state.push_constants[stage]->client_data + start,
872 values, length);
873 }
874
875 cmd_buffer->state.push_constants_dirty |= stageFlags;
876 }
877
878 void anv_CmdExecuteCommands(
879 VkCommandBuffer commandBuffer,
880 uint32_t commandBuffersCount,
881 const VkCommandBuffer* pCmdBuffers)
882 {
883 ANV_FROM_HANDLE(anv_cmd_buffer, primary, commandBuffer);
884
885 assert(primary->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY);
886
887 anv_assert(primary->state.subpass == &primary->state.pass->subpasses[0]);
888
889 for (uint32_t i = 0; i < commandBuffersCount; i++) {
890 ANV_FROM_HANDLE(anv_cmd_buffer, secondary, pCmdBuffers[i]);
891
892 assert(secondary->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY);
893
894 anv_cmd_buffer_add_secondary(primary, secondary);
895 }
896 }
897
898 VkResult anv_CreateCommandPool(
899 VkDevice _device,
900 const VkCommandPoolCreateInfo* pCreateInfo,
901 VkCommandPool* pCmdPool)
902 {
903 ANV_FROM_HANDLE(anv_device, device, _device);
904 struct anv_cmd_pool *pool;
905
906 pool = anv_device_alloc(device, sizeof(*pool), 8,
907 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
908 if (pool == NULL)
909 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
910
911 list_inithead(&pool->cmd_buffers);
912
913 *pCmdPool = anv_cmd_pool_to_handle(pool);
914
915 return VK_SUCCESS;
916 }
917
918 void anv_DestroyCommandPool(
919 VkDevice _device,
920 VkCommandPool commandPool)
921 {
922 ANV_FROM_HANDLE(anv_device, device, _device);
923 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
924
925 anv_ResetCommandPool(_device, commandPool, 0);
926
927 anv_device_free(device, pool);
928 }
929
930 VkResult anv_ResetCommandPool(
931 VkDevice device,
932 VkCommandPool commandPool,
933 VkCommandPoolResetFlags flags)
934 {
935 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
936
937 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
938 &pool->cmd_buffers, pool_link) {
939 anv_DestroyCommandBuffer(device, anv_cmd_buffer_to_handle(cmd_buffer));
940 }
941
942 return VK_SUCCESS;
943 }
944
945 /**
946 * Return NULL if the current subpass has no depthstencil attachment.
947 */
948 const struct anv_image_view *
949 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
950 {
951 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
952 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
953
954 if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED)
955 return NULL;
956
957 const struct anv_image_view *iview =
958 fb->attachments[subpass->depth_stencil_attachment];
959
960 assert(anv_format_is_depth_or_stencil(iview->format));
961
962 return iview;
963 }