vulkan-1.0.0: Re-order some structs in the header
[mesa.git] / src / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 /** \file anv_cmd_buffer.c
33 *
34 * This file contains all of the stuff for emitting commands into a command
35 * buffer. This includes implementations of most of the vkCmd*
36 * entrypoints. This file is concerned entirely with state emission and
37 * not with the command buffer data structure itself. As far as this file
38 * is concerned, most of anv_cmd_buffer is magic.
39 */
40
41 /* TODO: These are taken from GLES. We should check the Vulkan spec */
42 const struct anv_dynamic_state default_dynamic_state = {
43 .viewport = {
44 .count = 0,
45 },
46 .scissor = {
47 .count = 0,
48 },
49 .line_width = 1.0f,
50 .depth_bias = {
51 .bias = 0.0f,
52 .clamp = 0.0f,
53 .slope = 0.0f,
54 },
55 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
56 .depth_bounds = {
57 .min = 0.0f,
58 .max = 1.0f,
59 },
60 .stencil_compare_mask = {
61 .front = ~0u,
62 .back = ~0u,
63 },
64 .stencil_write_mask = {
65 .front = ~0u,
66 .back = ~0u,
67 },
68 .stencil_reference = {
69 .front = 0u,
70 .back = 0u,
71 },
72 };
73
74 void
75 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
76 const struct anv_dynamic_state *src,
77 uint32_t copy_mask)
78 {
79 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
80 dest->viewport.count = src->viewport.count;
81 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
82 src->viewport.count);
83 }
84
85 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
86 dest->scissor.count = src->scissor.count;
87 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
88 src->scissor.count);
89 }
90
91 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
92 dest->line_width = src->line_width;
93
94 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
95 dest->depth_bias = src->depth_bias;
96
97 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
98 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
99
100 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
101 dest->depth_bounds = src->depth_bounds;
102
103 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
104 dest->stencil_compare_mask = src->stencil_compare_mask;
105
106 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
107 dest->stencil_write_mask = src->stencil_write_mask;
108
109 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
110 dest->stencil_reference = src->stencil_reference;
111 }
112
113 static void
114 anv_cmd_state_init(struct anv_cmd_state *state)
115 {
116 memset(&state->descriptors, 0, sizeof(state->descriptors));
117 memset(&state->push_constants, 0, sizeof(state->push_constants));
118
119 state->dirty = ~0;
120 state->vb_dirty = 0;
121 state->descriptors_dirty = 0;
122 state->push_constants_dirty = 0;
123 state->pipeline = NULL;
124 state->restart_index = UINT32_MAX;
125 state->dynamic = default_dynamic_state;
126 state->need_query_wa = true;
127
128 state->gen7.index_buffer = NULL;
129 }
130
131 static VkResult
132 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
133 gl_shader_stage stage, uint32_t size)
134 {
135 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
136
137 if (*ptr == NULL) {
138 *ptr = anv_alloc(&cmd_buffer->pool->alloc, size, 8,
139 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
140 if (*ptr == NULL)
141 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
142 } else if ((*ptr)->size < size) {
143 *ptr = anv_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
144 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
145 if (*ptr == NULL)
146 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
147 }
148 (*ptr)->size = size;
149
150 return VK_SUCCESS;
151 }
152
153 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
154 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
155 (offsetof(struct anv_push_constants, field) + \
156 sizeof(cmd_buffer->state.push_constants[0]->field)))
157
158 static VkResult anv_create_cmd_buffer(
159 struct anv_device * device,
160 struct anv_cmd_pool * pool,
161 VkCommandBufferLevel level,
162 VkCommandBuffer* pCommandBuffer)
163 {
164 struct anv_cmd_buffer *cmd_buffer;
165 VkResult result;
166
167 cmd_buffer = anv_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
168 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
169 if (cmd_buffer == NULL)
170 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
171
172 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
173 cmd_buffer->device = device;
174 cmd_buffer->pool = pool;
175
176 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
177 if (result != VK_SUCCESS)
178 goto fail;
179
180 anv_state_stream_init(&cmd_buffer->surface_state_stream,
181 &device->surface_state_block_pool);
182 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
183 &device->dynamic_state_block_pool);
184
185 cmd_buffer->level = level;
186 cmd_buffer->usage_flags = 0;
187
188 anv_cmd_state_init(&cmd_buffer->state);
189
190 if (pool) {
191 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
192 } else {
193 /* Init the pool_link so we can safefly call list_del when we destroy
194 * the command buffer
195 */
196 list_inithead(&cmd_buffer->pool_link);
197 }
198
199 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
200
201 return VK_SUCCESS;
202
203 fail:
204 anv_free(&cmd_buffer->pool->alloc, cmd_buffer);
205
206 return result;
207 }
208
209 VkResult anv_AllocateCommandBuffers(
210 VkDevice _device,
211 const VkCommandBufferAllocateInfo* pAllocateInfo,
212 VkCommandBuffer* pCommandBuffers)
213 {
214 ANV_FROM_HANDLE(anv_device, device, _device);
215 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
216
217 VkResult result = VK_SUCCESS;
218 uint32_t i;
219
220 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
221 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
222 &pCommandBuffers[i]);
223 if (result != VK_SUCCESS)
224 break;
225 }
226
227 if (result != VK_SUCCESS)
228 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
229 i, pCommandBuffers);
230
231 return result;
232 }
233
234 static void
235 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
236 {
237 list_del(&cmd_buffer->pool_link);
238
239 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
240
241 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
242 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
243
244 anv_free(&cmd_buffer->pool->alloc, cmd_buffer);
245 }
246
247 void anv_FreeCommandBuffers(
248 VkDevice device,
249 VkCommandPool commandPool,
250 uint32_t commandBufferCount,
251 const VkCommandBuffer* pCommandBuffers)
252 {
253 for (uint32_t i = 0; i < commandBufferCount; i++) {
254 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
255
256 anv_cmd_buffer_destroy(cmd_buffer);
257 }
258 }
259
260 VkResult anv_ResetCommandBuffer(
261 VkCommandBuffer commandBuffer,
262 VkCommandBufferResetFlags flags)
263 {
264 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
265
266 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
267
268 anv_cmd_state_init(&cmd_buffer->state);
269
270 return VK_SUCCESS;
271 }
272
273 void
274 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
275 {
276 switch (cmd_buffer->device->info.gen) {
277 case 7:
278 if (cmd_buffer->device->info.is_haswell)
279 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
280 else
281 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
282 case 8:
283 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
284 case 9:
285 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
286 default:
287 unreachable("unsupported gen\n");
288 }
289 }
290
291 VkResult anv_BeginCommandBuffer(
292 VkCommandBuffer commandBuffer,
293 const VkCommandBufferBeginInfo* pBeginInfo)
294 {
295 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
296
297 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
298
299 cmd_buffer->usage_flags = pBeginInfo->flags;
300
301 assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY ||
302 !(cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT));
303
304 if (cmd_buffer->usage_flags &
305 VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) {
306 cmd_buffer->state.framebuffer =
307 anv_framebuffer_from_handle(pBeginInfo->framebuffer);
308 cmd_buffer->state.pass =
309 anv_render_pass_from_handle(pBeginInfo->renderPass);
310
311 struct anv_subpass *subpass =
312 &cmd_buffer->state.pass->subpasses[pBeginInfo->subpass];
313
314 anv_cmd_buffer_begin_subpass(cmd_buffer, subpass);
315 }
316
317 anv_cmd_buffer_emit_state_base_address(cmd_buffer);
318 cmd_buffer->state.current_pipeline = UINT32_MAX;
319
320 return VK_SUCCESS;
321 }
322
323 VkResult anv_EndCommandBuffer(
324 VkCommandBuffer commandBuffer)
325 {
326 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
327 struct anv_device *device = cmd_buffer->device;
328
329 anv_cmd_buffer_end_batch_buffer(cmd_buffer);
330
331 if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
332 /* The algorithm used to compute the validate list is not threadsafe as
333 * it uses the bo->index field. We have to lock the device around it.
334 * Fortunately, the chances for contention here are probably very low.
335 */
336 pthread_mutex_lock(&device->mutex);
337 anv_cmd_buffer_prepare_execbuf(cmd_buffer);
338 pthread_mutex_unlock(&device->mutex);
339 }
340
341 return VK_SUCCESS;
342 }
343
344 void anv_CmdBindPipeline(
345 VkCommandBuffer commandBuffer,
346 VkPipelineBindPoint pipelineBindPoint,
347 VkPipeline _pipeline)
348 {
349 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
350 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
351
352 switch (pipelineBindPoint) {
353 case VK_PIPELINE_BIND_POINT_COMPUTE:
354 cmd_buffer->state.compute_pipeline = pipeline;
355 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
356 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
357 break;
358
359 case VK_PIPELINE_BIND_POINT_GRAPHICS:
360 cmd_buffer->state.pipeline = pipeline;
361 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
362 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
363 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
364
365 /* Apply the dynamic state from the pipeline */
366 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
367 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
368 &pipeline->dynamic_state,
369 pipeline->dynamic_state_mask);
370 break;
371
372 default:
373 assert(!"invalid bind point");
374 break;
375 }
376 }
377
378 void anv_CmdSetViewport(
379 VkCommandBuffer commandBuffer,
380 uint32_t firstViewport,
381 uint32_t viewportCount,
382 const VkViewport* pViewports)
383 {
384 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
385
386 const uint32_t total_count = firstViewport + viewportCount;
387 if (cmd_buffer->state.dynamic.viewport.count < total_count);
388 cmd_buffer->state.dynamic.viewport.count = total_count;
389
390 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
391 pViewports, viewportCount * sizeof(*pViewports));
392
393 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
394 }
395
396 void anv_CmdSetScissor(
397 VkCommandBuffer commandBuffer,
398 uint32_t firstScissor,
399 uint32_t scissorCount,
400 const VkRect2D* pScissors)
401 {
402 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
403
404 const uint32_t total_count = firstScissor + scissorCount;
405 if (cmd_buffer->state.dynamic.scissor.count < total_count);
406 cmd_buffer->state.dynamic.scissor.count = total_count;
407
408 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
409 pScissors, scissorCount * sizeof(*pScissors));
410
411 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
412 }
413
414 void anv_CmdSetLineWidth(
415 VkCommandBuffer commandBuffer,
416 float lineWidth)
417 {
418 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
419
420 cmd_buffer->state.dynamic.line_width = lineWidth;
421 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
422 }
423
424 void anv_CmdSetDepthBias(
425 VkCommandBuffer commandBuffer,
426 float depthBiasConstantFactor,
427 float depthBiasClamp,
428 float depthBiasSlopeFactor)
429 {
430 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
431
432 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
433 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
434 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
435
436 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
437 }
438
439 void anv_CmdSetBlendConstants(
440 VkCommandBuffer commandBuffer,
441 const float blendConstants[4])
442 {
443 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
444
445 memcpy(cmd_buffer->state.dynamic.blend_constants,
446 blendConstants, sizeof(float) * 4);
447
448 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
449 }
450
451 void anv_CmdSetDepthBounds(
452 VkCommandBuffer commandBuffer,
453 float minDepthBounds,
454 float maxDepthBounds)
455 {
456 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
457
458 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
459 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
460
461 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
462 }
463
464 void anv_CmdSetStencilCompareMask(
465 VkCommandBuffer commandBuffer,
466 VkStencilFaceFlags faceMask,
467 uint32_t compareMask)
468 {
469 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
470
471 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
472 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
473 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
474 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
475
476 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
477 }
478
479 void anv_CmdSetStencilWriteMask(
480 VkCommandBuffer commandBuffer,
481 VkStencilFaceFlags faceMask,
482 uint32_t writeMask)
483 {
484 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
485
486 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
487 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
488 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
489 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
490
491 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
492 }
493
494 void anv_CmdSetStencilReference(
495 VkCommandBuffer commandBuffer,
496 VkStencilFaceFlags faceMask,
497 uint32_t reference)
498 {
499 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
500
501 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
502 cmd_buffer->state.dynamic.stencil_reference.front = reference;
503 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
504 cmd_buffer->state.dynamic.stencil_reference.back = reference;
505
506 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
507 }
508
509 void anv_CmdBindDescriptorSets(
510 VkCommandBuffer commandBuffer,
511 VkPipelineBindPoint pipelineBindPoint,
512 VkPipelineLayout _layout,
513 uint32_t firstSet,
514 uint32_t descriptorSetCount,
515 const VkDescriptorSet* pDescriptorSets,
516 uint32_t dynamicOffsetCount,
517 const uint32_t* pDynamicOffsets)
518 {
519 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
520 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
521 struct anv_descriptor_set_layout *set_layout;
522
523 assert(firstSet + descriptorSetCount < MAX_SETS);
524
525 uint32_t dynamic_slot = 0;
526 for (uint32_t i = 0; i < descriptorSetCount; i++) {
527 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
528 set_layout = layout->set[firstSet + i].layout;
529
530 if (cmd_buffer->state.descriptors[firstSet + i] != set) {
531 cmd_buffer->state.descriptors[firstSet + i] = set;
532 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
533 }
534
535 if (set_layout->dynamic_offset_count > 0) {
536 anv_foreach_stage(s, set_layout->shader_stages) {
537 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, s, dynamic);
538
539 struct anv_push_constants *push =
540 cmd_buffer->state.push_constants[s];
541
542 unsigned d = layout->set[firstSet + i].dynamic_offset_start;
543 const uint32_t *offsets = pDynamicOffsets + dynamic_slot;
544 struct anv_descriptor *desc = set->descriptors;
545
546 for (unsigned b = 0; b < set_layout->binding_count; b++) {
547 if (set_layout->binding[b].dynamic_offset_index < 0)
548 continue;
549
550 unsigned array_size = set_layout->binding[b].array_size;
551 for (unsigned j = 0; j < array_size; j++) {
552 uint32_t range = 0;
553 if (desc->buffer_view)
554 range = desc->buffer_view->range;
555 push->dynamic[d].offset = *(offsets++);
556 push->dynamic[d].range = range;
557 desc++;
558 d++;
559 }
560 }
561 }
562 cmd_buffer->state.push_constants_dirty |= set_layout->shader_stages;
563 }
564 }
565 }
566
567 void anv_CmdBindVertexBuffers(
568 VkCommandBuffer commandBuffer,
569 uint32_t firstBinding,
570 uint32_t bindingCount,
571 const VkBuffer* pBuffers,
572 const VkDeviceSize* pOffsets)
573 {
574 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
575 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
576
577 /* We have to defer setting up vertex buffer since we need the buffer
578 * stride from the pipeline. */
579
580 assert(firstBinding + bindingCount < MAX_VBS);
581 for (uint32_t i = 0; i < bindingCount; i++) {
582 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
583 vb[firstBinding + i].offset = pOffsets[i];
584 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
585 }
586 }
587
588 static void
589 add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer,
590 struct anv_state state, struct anv_bo *bo, uint32_t offset)
591 {
592 /* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and
593 * 9 for gen8+. We only write the first dword for gen8+ here and rely on
594 * the initial state to set the high bits to 0. */
595
596 const uint32_t dword = cmd_buffer->device->info.gen < 8 ? 1 : 8;
597
598 anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc,
599 state.offset + dword * 4, bo, offset);
600 }
601
602 const struct anv_format *
603 anv_format_for_descriptor_type(VkDescriptorType type)
604 {
605 switch (type) {
606 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
607 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
608 return anv_format_for_vk_format(VK_FORMAT_R32G32B32A32_SFLOAT);
609
610 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
611 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
612 return anv_format_for_vk_format(VK_FORMAT_UNDEFINED);
613
614 default:
615 unreachable("Invalid descriptor type");
616 }
617 }
618
619 VkResult
620 anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
621 gl_shader_stage stage,
622 struct anv_state *bt_state)
623 {
624 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
625 struct anv_subpass *subpass = cmd_buffer->state.subpass;
626 struct anv_pipeline_layout *layout;
627 uint32_t color_count, bias, state_offset;
628
629 switch (stage) {
630 case MESA_SHADER_FRAGMENT:
631 layout = cmd_buffer->state.pipeline->layout;
632 bias = MAX_RTS;
633 color_count = subpass->color_count;
634 break;
635 case MESA_SHADER_COMPUTE:
636 layout = cmd_buffer->state.compute_pipeline->layout;
637 bias = 1;
638 color_count = 0;
639 break;
640 default:
641 layout = cmd_buffer->state.pipeline->layout;
642 bias = 0;
643 color_count = 0;
644 break;
645 }
646
647 /* This is a little awkward: layout can be NULL but we still have to
648 * allocate and set a binding table for the PS stage for render
649 * targets. */
650 uint32_t surface_count = layout ? layout->stage[stage].surface_count : 0;
651
652 if (color_count + surface_count == 0) {
653 *bt_state = (struct anv_state) { 0, };
654 return VK_SUCCESS;
655 }
656
657 *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer,
658 bias + surface_count,
659 &state_offset);
660 uint32_t *bt_map = bt_state->map;
661
662 if (bt_state->map == NULL)
663 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
664
665 for (uint32_t a = 0; a < color_count; a++) {
666 const struct anv_image_view *iview =
667 fb->attachments[subpass->color_attachments[a]];
668
669 assert(iview->color_rt_surface_state.alloc_size);
670 bt_map[a] = iview->color_rt_surface_state.offset + state_offset;
671 add_surface_state_reloc(cmd_buffer, iview->color_rt_surface_state,
672 iview->bo, iview->offset);
673 }
674
675 if (stage == MESA_SHADER_COMPUTE &&
676 cmd_buffer->state.compute_pipeline->cs_prog_data.uses_num_work_groups) {
677 struct anv_bo *bo = cmd_buffer->state.num_workgroups_bo;
678 uint32_t bo_offset = cmd_buffer->state.num_workgroups_offset;
679
680 struct anv_state surface_state;
681 surface_state =
682 anv_cmd_buffer_alloc_surface_state(cmd_buffer);
683
684 const struct anv_format *format =
685 anv_format_for_descriptor_type(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER);
686 anv_fill_buffer_surface_state(cmd_buffer->device, surface_state.map,
687 format->surface_format, bo_offset, 12, 1);
688
689 if (!cmd_buffer->device->info.has_llc)
690 anv_state_clflush(surface_state);
691
692 bt_map[0] = surface_state.offset + state_offset;
693 add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset);
694 }
695
696 if (layout == NULL)
697 goto out;
698
699 if (layout->stage[stage].image_count > 0) {
700 VkResult result =
701 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, images);
702 if (result != VK_SUCCESS)
703 return result;
704
705 cmd_buffer->state.push_constants_dirty |= 1 << stage;
706 }
707
708 uint32_t image = 0;
709 for (uint32_t s = 0; s < layout->stage[stage].surface_count; s++) {
710 struct anv_pipeline_binding *binding =
711 &layout->stage[stage].surface_to_descriptor[s];
712 struct anv_descriptor_set *set =
713 cmd_buffer->state.descriptors[binding->set];
714 struct anv_descriptor *desc = &set->descriptors[binding->offset];
715
716 struct anv_state surface_state;
717 struct anv_bo *bo;
718 uint32_t bo_offset;
719
720 switch (desc->type) {
721 case VK_DESCRIPTOR_TYPE_SAMPLER:
722 /* Nothing for us to do here */
723 continue;
724
725 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
726 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
727 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
728 surface_state = desc->image_view->nonrt_surface_state;
729 assert(surface_state.alloc_size);
730 bo = desc->image_view->bo;
731 bo_offset = desc->image_view->offset;
732 break;
733
734 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: {
735 surface_state = desc->image_view->storage_surface_state;
736 assert(surface_state.alloc_size);
737 bo = desc->image_view->bo;
738 bo_offset = desc->image_view->offset;
739
740 struct brw_image_param *image_param =
741 &cmd_buffer->state.push_constants[stage]->images[image++];
742
743 anv_image_view_fill_image_param(cmd_buffer->device, desc->image_view,
744 image_param);
745 image_param->surface_idx = bias + s;
746 break;
747 }
748
749 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
750 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
751 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
752 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
753 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
754 surface_state = desc->buffer_view->surface_state;
755 assert(surface_state.alloc_size);
756 bo = desc->buffer_view->bo;
757 bo_offset = desc->buffer_view->offset;
758 break;
759
760 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
761 surface_state = desc->buffer_view->storage_surface_state;
762 assert(surface_state.alloc_size);
763 bo = desc->buffer_view->bo;
764 bo_offset = desc->buffer_view->offset;
765
766 struct brw_image_param *image_param =
767 &cmd_buffer->state.push_constants[stage]->images[image++];
768
769 anv_buffer_view_fill_image_param(cmd_buffer->device, desc->buffer_view,
770 image_param);
771 image_param->surface_idx = bias + s;
772 break;
773
774 default:
775 assert(!"Invalid descriptor type");
776 continue;
777 }
778
779 bt_map[bias + s] = surface_state.offset + state_offset;
780 add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset);
781 }
782 assert(image == layout->stage[stage].image_count);
783
784 out:
785 if (!cmd_buffer->device->info.has_llc)
786 anv_state_clflush(*bt_state);
787
788 return VK_SUCCESS;
789 }
790
791 VkResult
792 anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
793 gl_shader_stage stage, struct anv_state *state)
794 {
795 struct anv_pipeline_layout *layout;
796 uint32_t sampler_count;
797
798 if (stage == MESA_SHADER_COMPUTE)
799 layout = cmd_buffer->state.compute_pipeline->layout;
800 else
801 layout = cmd_buffer->state.pipeline->layout;
802
803 sampler_count = layout ? layout->stage[stage].sampler_count : 0;
804 if (sampler_count == 0) {
805 *state = (struct anv_state) { 0, };
806 return VK_SUCCESS;
807 }
808
809 uint32_t size = sampler_count * 16;
810 *state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 32);
811
812 if (state->map == NULL)
813 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
814
815 for (uint32_t s = 0; s < layout->stage[stage].sampler_count; s++) {
816 struct anv_pipeline_binding *binding =
817 &layout->stage[stage].sampler_to_descriptor[s];
818 struct anv_descriptor_set *set =
819 cmd_buffer->state.descriptors[binding->set];
820 struct anv_descriptor *desc = &set->descriptors[binding->offset];
821
822 if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
823 desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
824 continue;
825
826 struct anv_sampler *sampler = desc->sampler;
827
828 /* This can happen if we have an unfilled slot since TYPE_SAMPLER
829 * happens to be zero.
830 */
831 if (sampler == NULL)
832 continue;
833
834 memcpy(state->map + (s * 16),
835 sampler->state, sizeof(sampler->state));
836 }
837
838 if (!cmd_buffer->device->info.has_llc)
839 anv_state_clflush(*state);
840
841 return VK_SUCCESS;
842 }
843
844 struct anv_state
845 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
846 const void *data, uint32_t size, uint32_t alignment)
847 {
848 struct anv_state state;
849
850 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
851 memcpy(state.map, data, size);
852
853 if (!cmd_buffer->device->info.has_llc)
854 anv_state_clflush(state);
855
856 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
857
858 return state;
859 }
860
861 struct anv_state
862 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
863 uint32_t *a, uint32_t *b,
864 uint32_t dwords, uint32_t alignment)
865 {
866 struct anv_state state;
867 uint32_t *p;
868
869 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
870 dwords * 4, alignment);
871 p = state.map;
872 for (uint32_t i = 0; i < dwords; i++)
873 p[i] = a[i] | b[i];
874
875 if (!cmd_buffer->device->info.has_llc)
876 anv_state_clflush(state);
877
878 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
879
880 return state;
881 }
882
883 void
884 anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
885 struct anv_subpass *subpass)
886 {
887 switch (cmd_buffer->device->info.gen) {
888 case 7:
889 gen7_cmd_buffer_begin_subpass(cmd_buffer, subpass);
890 break;
891 case 8:
892 gen8_cmd_buffer_begin_subpass(cmd_buffer, subpass);
893 break;
894 case 9:
895 gen9_cmd_buffer_begin_subpass(cmd_buffer, subpass);
896 break;
897 default:
898 unreachable("unsupported gen\n");
899 }
900 }
901
902 struct anv_state
903 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
904 gl_shader_stage stage)
905 {
906 struct anv_push_constants *data =
907 cmd_buffer->state.push_constants[stage];
908 struct brw_stage_prog_data *prog_data =
909 cmd_buffer->state.pipeline->prog_data[stage];
910
911 /* If we don't actually have any push constants, bail. */
912 if (data == NULL || prog_data->nr_params == 0)
913 return (struct anv_state) { .offset = 0 };
914
915 struct anv_state state =
916 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
917 prog_data->nr_params * sizeof(float),
918 32 /* bottom 5 bits MBZ */);
919
920 /* Walk through the param array and fill the buffer with data */
921 uint32_t *u32_map = state.map;
922 for (unsigned i = 0; i < prog_data->nr_params; i++) {
923 uint32_t offset = (uintptr_t)prog_data->param[i];
924 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
925 }
926
927 if (!cmd_buffer->device->info.has_llc)
928 anv_state_clflush(state);
929
930 return state;
931 }
932
933 struct anv_state
934 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
935 {
936 struct anv_push_constants *data =
937 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
938 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
939 const struct brw_cs_prog_data *cs_prog_data = &pipeline->cs_prog_data;
940 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
941
942 const unsigned local_id_dwords = cs_prog_data->local_invocation_id_regs * 8;
943 const unsigned push_constant_data_size =
944 (local_id_dwords + prog_data->nr_params) * 4;
945 const unsigned reg_aligned_constant_size = ALIGN(push_constant_data_size, 32);
946 const unsigned param_aligned_count =
947 reg_aligned_constant_size / sizeof(uint32_t);
948
949 /* If we don't actually have any push constants, bail. */
950 if (reg_aligned_constant_size == 0)
951 return (struct anv_state) { .offset = 0 };
952
953 const unsigned threads = pipeline->cs_thread_width_max;
954 const unsigned total_push_constants_size =
955 reg_aligned_constant_size * threads;
956 const unsigned push_constant_alignment =
957 cmd_buffer->device->info.gen < 8 ? 32 : 64;
958 const unsigned aligned_total_push_constants_size =
959 ALIGN(total_push_constants_size, push_constant_alignment);
960 struct anv_state state =
961 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
962 aligned_total_push_constants_size,
963 push_constant_alignment);
964
965 /* Walk through the param array and fill the buffer with data */
966 uint32_t *u32_map = state.map;
967
968 brw_cs_fill_local_id_payload(cs_prog_data, u32_map, threads,
969 reg_aligned_constant_size);
970
971 /* Setup uniform data for the first thread */
972 for (unsigned i = 0; i < prog_data->nr_params; i++) {
973 uint32_t offset = (uintptr_t)prog_data->param[i];
974 u32_map[local_id_dwords + i] = *(uint32_t *)((uint8_t *)data + offset);
975 }
976
977 /* Copy uniform data from the first thread to every other thread */
978 const size_t uniform_data_size = prog_data->nr_params * sizeof(uint32_t);
979 for (unsigned t = 1; t < threads; t++) {
980 memcpy(&u32_map[t * param_aligned_count + local_id_dwords],
981 &u32_map[local_id_dwords],
982 uniform_data_size);
983 }
984
985 if (!cmd_buffer->device->info.has_llc)
986 anv_state_clflush(state);
987
988 return state;
989 }
990
991 void anv_CmdPushConstants(
992 VkCommandBuffer commandBuffer,
993 VkPipelineLayout layout,
994 VkShaderStageFlags stageFlags,
995 uint32_t offset,
996 uint32_t size,
997 const void* pValues)
998 {
999 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1000
1001 anv_foreach_stage(stage, stageFlags) {
1002 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
1003
1004 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
1005 pValues, size);
1006 }
1007
1008 cmd_buffer->state.push_constants_dirty |= stageFlags;
1009 }
1010
1011 void anv_CmdExecuteCommands(
1012 VkCommandBuffer commandBuffer,
1013 uint32_t commandBufferCount,
1014 const VkCommandBuffer* pCmdBuffers)
1015 {
1016 ANV_FROM_HANDLE(anv_cmd_buffer, primary, commandBuffer);
1017
1018 assert(primary->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY);
1019
1020 anv_assert(primary->state.subpass == &primary->state.pass->subpasses[0]);
1021
1022 for (uint32_t i = 0; i < commandBufferCount; i++) {
1023 ANV_FROM_HANDLE(anv_cmd_buffer, secondary, pCmdBuffers[i]);
1024
1025 assert(secondary->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY);
1026
1027 anv_cmd_buffer_add_secondary(primary, secondary);
1028 }
1029 }
1030
1031 VkResult anv_CreateCommandPool(
1032 VkDevice _device,
1033 const VkCommandPoolCreateInfo* pCreateInfo,
1034 const VkAllocationCallbacks* pAllocator,
1035 VkCommandPool* pCmdPool)
1036 {
1037 ANV_FROM_HANDLE(anv_device, device, _device);
1038 struct anv_cmd_pool *pool;
1039
1040 pool = anv_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
1041 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1042 if (pool == NULL)
1043 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1044
1045 if (pAllocator)
1046 pool->alloc = *pAllocator;
1047 else
1048 pool->alloc = device->alloc;
1049
1050 list_inithead(&pool->cmd_buffers);
1051
1052 *pCmdPool = anv_cmd_pool_to_handle(pool);
1053
1054 return VK_SUCCESS;
1055 }
1056
1057 void anv_DestroyCommandPool(
1058 VkDevice _device,
1059 VkCommandPool commandPool,
1060 const VkAllocationCallbacks* pAllocator)
1061 {
1062 ANV_FROM_HANDLE(anv_device, device, _device);
1063 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
1064
1065 anv_ResetCommandPool(_device, commandPool, 0);
1066
1067 anv_free2(&device->alloc, pAllocator, pool);
1068 }
1069
1070 VkResult anv_ResetCommandPool(
1071 VkDevice device,
1072 VkCommandPool commandPool,
1073 VkCommandPoolResetFlags flags)
1074 {
1075 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
1076
1077 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
1078 &pool->cmd_buffers, pool_link) {
1079 anv_cmd_buffer_destroy(cmd_buffer);
1080 }
1081
1082 return VK_SUCCESS;
1083 }
1084
1085 /**
1086 * Return NULL if the current subpass has no depthstencil attachment.
1087 */
1088 const struct anv_image_view *
1089 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
1090 {
1091 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
1092 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
1093
1094 if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED)
1095 return NULL;
1096
1097 const struct anv_image_view *iview =
1098 fb->attachments[subpass->depth_stencil_attachment];
1099
1100 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
1101 VK_IMAGE_ASPECT_STENCIL_BIT));
1102
1103 return iview;
1104 }