2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 /** \file anv_cmd_buffer.c
34 * This file contains all of the stuff for emitting commands into a command
35 * buffer. This includes implementations of most of the vkCmd*
36 * entrypoints. This file is concerned entirely with state emission and
37 * not with the command buffer data structure itself. As far as this file
38 * is concerned, most of anv_cmd_buffer is magic.
41 /* TODO: These are taken from GLES. We should check the Vulkan spec */
42 const struct anv_dynamic_state default_dynamic_state
= {
55 .blend_constants
= { 0.0f
, 0.0f
, 0.0f
, 0.0f
},
60 .stencil_compare_mask
= {
64 .stencil_write_mask
= {
68 .stencil_reference
= {
75 anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
76 const struct anv_dynamic_state
*src
,
79 if (copy_mask
& (1 << VK_DYNAMIC_STATE_VIEWPORT
)) {
80 dest
->viewport
.count
= src
->viewport
.count
;
81 typed_memcpy(dest
->viewport
.viewports
, src
->viewport
.viewports
,
85 if (copy_mask
& (1 << VK_DYNAMIC_STATE_SCISSOR
)) {
86 dest
->scissor
.count
= src
->scissor
.count
;
87 typed_memcpy(dest
->scissor
.scissors
, src
->scissor
.scissors
,
91 if (copy_mask
& (1 << VK_DYNAMIC_STATE_LINE_WIDTH
))
92 dest
->line_width
= src
->line_width
;
94 if (copy_mask
& (1 << VK_DYNAMIC_STATE_DEPTH_BIAS
))
95 dest
->depth_bias
= src
->depth_bias
;
97 if (copy_mask
& (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS
))
98 typed_memcpy(dest
->blend_constants
, src
->blend_constants
, 4);
100 if (copy_mask
& (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS
))
101 dest
->depth_bounds
= src
->depth_bounds
;
103 if (copy_mask
& (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK
))
104 dest
->stencil_compare_mask
= src
->stencil_compare_mask
;
106 if (copy_mask
& (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK
))
107 dest
->stencil_write_mask
= src
->stencil_write_mask
;
109 if (copy_mask
& (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE
))
110 dest
->stencil_reference
= src
->stencil_reference
;
114 anv_cmd_state_init(struct anv_cmd_state
*state
)
116 memset(&state
->descriptors
, 0, sizeof(state
->descriptors
));
117 memset(&state
->push_constants
, 0, sizeof(state
->push_constants
));
121 state
->descriptors_dirty
= 0;
122 state
->push_constants_dirty
= 0;
123 state
->pipeline
= NULL
;
124 state
->restart_index
= UINT32_MAX
;
125 state
->dynamic
= default_dynamic_state
;
127 state
->gen7
.index_buffer
= NULL
;
131 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer
*cmd_buffer
,
132 gl_shader_stage stage
, uint32_t size
)
134 struct anv_push_constants
**ptr
= &cmd_buffer
->state
.push_constants
[stage
];
137 *ptr
= anv_alloc(&cmd_buffer
->pool
->alloc
, size
, 8,
138 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
140 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
141 } else if ((*ptr
)->size
< size
) {
142 *ptr
= anv_realloc(&cmd_buffer
->pool
->alloc
, *ptr
, size
, 8,
143 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
145 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
152 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
153 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
154 (offsetof(struct anv_push_constants, field) + \
155 sizeof(cmd_buffer->state.push_constants[0]->field)))
157 static VkResult
anv_create_cmd_buffer(
158 struct anv_device
* device
,
159 struct anv_cmd_pool
* pool
,
160 VkCommandBufferLevel level
,
161 VkCommandBuffer
* pCommandBuffer
)
163 struct anv_cmd_buffer
*cmd_buffer
;
166 cmd_buffer
= anv_alloc(&pool
->alloc
, sizeof(*cmd_buffer
), 8,
167 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
168 if (cmd_buffer
== NULL
)
169 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
171 cmd_buffer
->_loader_data
.loaderMagic
= ICD_LOADER_MAGIC
;
172 cmd_buffer
->device
= device
;
173 cmd_buffer
->pool
= pool
;
175 result
= anv_cmd_buffer_init_batch_bo_chain(cmd_buffer
);
176 if (result
!= VK_SUCCESS
)
179 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
180 &device
->surface_state_block_pool
);
181 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
182 &device
->dynamic_state_block_pool
);
184 cmd_buffer
->level
= level
;
185 cmd_buffer
->usage_flags
= 0;
187 anv_cmd_state_init(&cmd_buffer
->state
);
190 list_addtail(&cmd_buffer
->pool_link
, &pool
->cmd_buffers
);
192 /* Init the pool_link so we can safefly call list_del when we destroy
195 list_inithead(&cmd_buffer
->pool_link
);
198 *pCommandBuffer
= anv_cmd_buffer_to_handle(cmd_buffer
);
203 anv_free(&cmd_buffer
->pool
->alloc
, cmd_buffer
);
208 VkResult
anv_AllocateCommandBuffers(
210 const VkCommandBufferAllocateInfo
* pAllocateInfo
,
211 VkCommandBuffer
* pCommandBuffers
)
213 ANV_FROM_HANDLE(anv_device
, device
, _device
);
214 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, pAllocateInfo
->commandPool
);
216 VkResult result
= VK_SUCCESS
;
219 for (i
= 0; i
< pAllocateInfo
->bufferCount
; i
++) {
220 result
= anv_create_cmd_buffer(device
, pool
, pAllocateInfo
->level
,
221 &pCommandBuffers
[i
]);
222 if (result
!= VK_SUCCESS
)
226 if (result
!= VK_SUCCESS
)
227 anv_FreeCommandBuffers(_device
, pAllocateInfo
->commandPool
,
234 anv_cmd_buffer_destroy(struct anv_cmd_buffer
*cmd_buffer
)
236 list_del(&cmd_buffer
->pool_link
);
238 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer
);
240 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
241 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
243 anv_free(&cmd_buffer
->pool
->alloc
, cmd_buffer
);
246 void anv_FreeCommandBuffers(
248 VkCommandPool commandPool
,
249 uint32_t commandBufferCount
,
250 const VkCommandBuffer
* pCommandBuffers
)
252 for (uint32_t i
= 0; i
< commandBufferCount
; i
++) {
253 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, pCommandBuffers
[i
]);
255 anv_cmd_buffer_destroy(cmd_buffer
);
259 VkResult
anv_ResetCommandBuffer(
260 VkCommandBuffer commandBuffer
,
261 VkCommandBufferResetFlags flags
)
263 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
265 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer
);
267 anv_cmd_state_init(&cmd_buffer
->state
);
273 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
)
275 switch (cmd_buffer
->device
->info
.gen
) {
277 if (cmd_buffer
->device
->info
.is_haswell
)
278 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer
);
280 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer
);
282 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer
);
284 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer
);
286 unreachable("unsupported gen\n");
290 VkResult
anv_BeginCommandBuffer(
291 VkCommandBuffer commandBuffer
,
292 const VkCommandBufferBeginInfo
* pBeginInfo
)
294 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
296 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer
);
298 cmd_buffer
->usage_flags
= pBeginInfo
->flags
;
300 if (cmd_buffer
->level
== VK_COMMAND_BUFFER_LEVEL_SECONDARY
) {
301 cmd_buffer
->state
.framebuffer
=
302 anv_framebuffer_from_handle(pBeginInfo
->framebuffer
);
303 cmd_buffer
->state
.pass
=
304 anv_render_pass_from_handle(pBeginInfo
->renderPass
);
306 struct anv_subpass
*subpass
=
307 &cmd_buffer
->state
.pass
->subpasses
[pBeginInfo
->subpass
];
309 anv_cmd_buffer_begin_subpass(cmd_buffer
, subpass
);
312 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
313 cmd_buffer
->state
.current_pipeline
= UINT32_MAX
;
318 VkResult
anv_EndCommandBuffer(
319 VkCommandBuffer commandBuffer
)
321 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
322 struct anv_device
*device
= cmd_buffer
->device
;
324 anv_cmd_buffer_end_batch_buffer(cmd_buffer
);
326 if (cmd_buffer
->level
== VK_COMMAND_BUFFER_LEVEL_PRIMARY
) {
327 /* The algorithm used to compute the validate list is not threadsafe as
328 * it uses the bo->index field. We have to lock the device around it.
329 * Fortunately, the chances for contention here are probably very low.
331 pthread_mutex_lock(&device
->mutex
);
332 anv_cmd_buffer_prepare_execbuf(cmd_buffer
);
333 pthread_mutex_unlock(&device
->mutex
);
339 void anv_CmdBindPipeline(
340 VkCommandBuffer commandBuffer
,
341 VkPipelineBindPoint pipelineBindPoint
,
342 VkPipeline _pipeline
)
344 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
345 ANV_FROM_HANDLE(anv_pipeline
, pipeline
, _pipeline
);
347 switch (pipelineBindPoint
) {
348 case VK_PIPELINE_BIND_POINT_COMPUTE
:
349 cmd_buffer
->state
.compute_pipeline
= pipeline
;
350 cmd_buffer
->state
.compute_dirty
|= ANV_CMD_DIRTY_PIPELINE
;
351 cmd_buffer
->state
.push_constants_dirty
|= VK_SHADER_STAGE_COMPUTE_BIT
;
354 case VK_PIPELINE_BIND_POINT_GRAPHICS
:
355 cmd_buffer
->state
.pipeline
= pipeline
;
356 cmd_buffer
->state
.vb_dirty
|= pipeline
->vb_used
;
357 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_PIPELINE
;
358 cmd_buffer
->state
.push_constants_dirty
|= pipeline
->active_stages
;
360 /* Apply the dynamic state from the pipeline */
361 cmd_buffer
->state
.dirty
|= pipeline
->dynamic_state_mask
;
362 anv_dynamic_state_copy(&cmd_buffer
->state
.dynamic
,
363 &pipeline
->dynamic_state
,
364 pipeline
->dynamic_state_mask
);
368 assert(!"invalid bind point");
373 void anv_CmdSetViewport(
374 VkCommandBuffer commandBuffer
,
375 uint32_t viewportCount
,
376 const VkViewport
* pViewports
)
378 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
380 cmd_buffer
->state
.dynamic
.viewport
.count
= viewportCount
;
381 memcpy(cmd_buffer
->state
.dynamic
.viewport
.viewports
,
382 pViewports
, viewportCount
* sizeof(*pViewports
));
384 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
;
387 void anv_CmdSetScissor(
388 VkCommandBuffer commandBuffer
,
389 uint32_t scissorCount
,
390 const VkRect2D
* pScissors
)
392 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
394 cmd_buffer
->state
.dynamic
.scissor
.count
= scissorCount
;
395 memcpy(cmd_buffer
->state
.dynamic
.scissor
.scissors
,
396 pScissors
, scissorCount
* sizeof(*pScissors
));
398 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_SCISSOR
;
401 void anv_CmdSetLineWidth(
402 VkCommandBuffer commandBuffer
,
405 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
407 cmd_buffer
->state
.dynamic
.line_width
= lineWidth
;
408 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
;
411 void anv_CmdSetDepthBias(
412 VkCommandBuffer commandBuffer
,
413 float depthBiasConstantFactor
,
414 float depthBiasClamp
,
415 float depthBiasSlopeFactor
)
417 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
419 cmd_buffer
->state
.dynamic
.depth_bias
.bias
= depthBiasConstantFactor
;
420 cmd_buffer
->state
.dynamic
.depth_bias
.clamp
= depthBiasClamp
;
421 cmd_buffer
->state
.dynamic
.depth_bias
.slope
= depthBiasSlopeFactor
;
423 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
;
426 void anv_CmdSetBlendConstants(
427 VkCommandBuffer commandBuffer
,
428 const float blendConstants
[4])
430 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
432 memcpy(cmd_buffer
->state
.dynamic
.blend_constants
,
433 blendConstants
, sizeof(float) * 4);
435 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
;
438 void anv_CmdSetDepthBounds(
439 VkCommandBuffer commandBuffer
,
440 float minDepthBounds
,
441 float maxDepthBounds
)
443 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
445 cmd_buffer
->state
.dynamic
.depth_bounds
.min
= minDepthBounds
;
446 cmd_buffer
->state
.dynamic
.depth_bounds
.max
= maxDepthBounds
;
448 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
;
451 void anv_CmdSetStencilCompareMask(
452 VkCommandBuffer commandBuffer
,
453 VkStencilFaceFlags faceMask
,
454 uint32_t compareMask
)
456 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
458 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
459 cmd_buffer
->state
.dynamic
.stencil_compare_mask
.front
= compareMask
;
460 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
461 cmd_buffer
->state
.dynamic
.stencil_compare_mask
.back
= compareMask
;
463 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
;
466 void anv_CmdSetStencilWriteMask(
467 VkCommandBuffer commandBuffer
,
468 VkStencilFaceFlags faceMask
,
471 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
473 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
474 cmd_buffer
->state
.dynamic
.stencil_write_mask
.front
= writeMask
;
475 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
476 cmd_buffer
->state
.dynamic
.stencil_write_mask
.back
= writeMask
;
478 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
;
481 void anv_CmdSetStencilReference(
482 VkCommandBuffer commandBuffer
,
483 VkStencilFaceFlags faceMask
,
486 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
488 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
489 cmd_buffer
->state
.dynamic
.stencil_reference
.front
= reference
;
490 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
491 cmd_buffer
->state
.dynamic
.stencil_reference
.back
= reference
;
493 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
;
496 void anv_CmdBindDescriptorSets(
497 VkCommandBuffer commandBuffer
,
498 VkPipelineBindPoint pipelineBindPoint
,
499 VkPipelineLayout _layout
,
501 uint32_t descriptorSetCount
,
502 const VkDescriptorSet
* pDescriptorSets
,
503 uint32_t dynamicOffsetCount
,
504 const uint32_t* pDynamicOffsets
)
506 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
507 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
508 struct anv_descriptor_set_layout
*set_layout
;
510 assert(firstSet
+ descriptorSetCount
< MAX_SETS
);
512 uint32_t dynamic_slot
= 0;
513 for (uint32_t i
= 0; i
< descriptorSetCount
; i
++) {
514 ANV_FROM_HANDLE(anv_descriptor_set
, set
, pDescriptorSets
[i
]);
515 set_layout
= layout
->set
[firstSet
+ i
].layout
;
517 if (cmd_buffer
->state
.descriptors
[firstSet
+ i
] != set
) {
518 cmd_buffer
->state
.descriptors
[firstSet
+ i
] = set
;
519 cmd_buffer
->state
.descriptors_dirty
|= set_layout
->shader_stages
;
522 if (set_layout
->dynamic_offset_count
> 0) {
523 anv_foreach_stage(s
, set_layout
->shader_stages
) {
524 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer
, s
, dynamic
);
526 struct anv_push_constants
*push
=
527 cmd_buffer
->state
.push_constants
[s
];
529 unsigned d
= layout
->set
[firstSet
+ i
].dynamic_offset_start
;
530 const uint32_t *offsets
= pDynamicOffsets
+ dynamic_slot
;
531 struct anv_descriptor
*desc
= set
->descriptors
;
533 for (unsigned b
= 0; b
< set_layout
->binding_count
; b
++) {
534 if (set_layout
->binding
[b
].dynamic_offset_index
< 0)
537 unsigned array_size
= set_layout
->binding
[b
].array_size
;
538 for (unsigned j
= 0; j
< array_size
; j
++) {
539 push
->dynamic
[d
].offset
= *(offsets
++);
540 push
->dynamic
[d
].range
= (desc
++)->range
;
545 cmd_buffer
->state
.push_constants_dirty
|= set_layout
->shader_stages
;
550 void anv_CmdBindVertexBuffers(
551 VkCommandBuffer commandBuffer
,
552 uint32_t startBinding
,
553 uint32_t bindingCount
,
554 const VkBuffer
* pBuffers
,
555 const VkDeviceSize
* pOffsets
)
557 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
558 struct anv_vertex_binding
*vb
= cmd_buffer
->state
.vertex_bindings
;
560 /* We have to defer setting up vertex buffer since we need the buffer
561 * stride from the pipeline. */
563 assert(startBinding
+ bindingCount
< MAX_VBS
);
564 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
565 vb
[startBinding
+ i
].buffer
= anv_buffer_from_handle(pBuffers
[i
]);
566 vb
[startBinding
+ i
].offset
= pOffsets
[i
];
567 cmd_buffer
->state
.vb_dirty
|= 1 << (startBinding
+ i
);
572 add_surface_state_reloc(struct anv_cmd_buffer
*cmd_buffer
,
573 struct anv_state state
, struct anv_bo
*bo
, uint32_t offset
)
575 /* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and
576 * 9 for gen8+. We only write the first dword for gen8+ here and rely on
577 * the initial state to set the high bits to 0. */
579 const uint32_t dword
= cmd_buffer
->device
->info
.gen
< 8 ? 1 : 8;
581 anv_reloc_list_add(&cmd_buffer
->surface_relocs
, &cmd_buffer
->pool
->alloc
,
582 state
.offset
+ dword
* 4, bo
, offset
);
586 fill_descriptor_buffer_surface_state(struct anv_device
*device
, void *state
,
587 gl_shader_stage stage
,
588 VkDescriptorType type
,
589 uint32_t offset
, uint32_t range
)
593 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
594 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
595 format
= VK_FORMAT_R32G32B32A32_SFLOAT
;
598 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
599 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
600 format
= VK_FORMAT_UNDEFINED
;
604 unreachable("Invalid descriptor type");
607 anv_fill_buffer_surface_state(device
, state
,
608 anv_format_for_vk_format(format
),
613 anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
614 gl_shader_stage stage
,
615 struct anv_state
*bt_state
)
617 struct anv_framebuffer
*fb
= cmd_buffer
->state
.framebuffer
;
618 struct anv_subpass
*subpass
= cmd_buffer
->state
.subpass
;
619 struct anv_pipeline_layout
*layout
;
620 uint32_t color_count
, bias
, state_offset
;
622 if (stage
== MESA_SHADER_COMPUTE
)
623 layout
= cmd_buffer
->state
.compute_pipeline
->layout
;
625 layout
= cmd_buffer
->state
.pipeline
->layout
;
627 if (stage
== MESA_SHADER_FRAGMENT
) {
629 color_count
= subpass
->color_count
;
635 /* This is a little awkward: layout can be NULL but we still have to
636 * allocate and set a binding table for the PS stage for render
638 uint32_t surface_count
= layout
? layout
->stage
[stage
].surface_count
: 0;
640 if (color_count
+ surface_count
== 0)
643 *bt_state
= anv_cmd_buffer_alloc_binding_table(cmd_buffer
,
644 bias
+ surface_count
,
646 uint32_t *bt_map
= bt_state
->map
;
648 if (bt_state
->map
== NULL
)
649 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
651 for (uint32_t a
= 0; a
< color_count
; a
++) {
652 const struct anv_image_view
*iview
=
653 fb
->attachments
[subpass
->color_attachments
[a
]];
655 bt_map
[a
] = iview
->color_rt_surface_state
.offset
+ state_offset
;
656 add_surface_state_reloc(cmd_buffer
, iview
->color_rt_surface_state
,
657 iview
->bo
, iview
->offset
);
663 if (layout
->stage
[stage
].image_count
> 0) {
665 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer
, stage
, images
);
666 if (result
!= VK_SUCCESS
)
669 cmd_buffer
->state
.push_constants_dirty
|= 1 << stage
;
673 for (uint32_t s
= 0; s
< layout
->stage
[stage
].surface_count
; s
++) {
674 struct anv_pipeline_binding
*binding
=
675 &layout
->stage
[stage
].surface_to_descriptor
[s
];
676 struct anv_descriptor_set
*set
=
677 cmd_buffer
->state
.descriptors
[binding
->set
];
678 struct anv_descriptor
*desc
= &set
->descriptors
[binding
->offset
];
680 struct anv_state surface_state
;
684 switch (desc
->type
) {
685 case VK_DESCRIPTOR_TYPE_SAMPLER
:
686 /* Nothing for us to do here */
689 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
690 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
691 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
692 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
: {
693 bo
= desc
->buffer
->bo
;
694 bo_offset
= desc
->buffer
->offset
+ desc
->offset
;
697 anv_cmd_buffer_alloc_surface_state(cmd_buffer
);
699 fill_descriptor_buffer_surface_state(cmd_buffer
->device
,
702 bo_offset
, desc
->range
);
704 if (!cmd_buffer
->device
->info
.has_llc
)
705 anv_state_clflush(surface_state
);
710 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
711 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
712 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT
:
713 surface_state
= desc
->image_view
->nonrt_surface_state
;
714 bo
= desc
->image_view
->bo
;
715 bo_offset
= desc
->image_view
->offset
;
718 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
: {
719 surface_state
= desc
->image_view
->storage_surface_state
;
720 bo
= desc
->image_view
->bo
;
721 bo_offset
= desc
->image_view
->offset
;
723 struct brw_image_param
*image_param
=
724 &cmd_buffer
->state
.push_constants
[stage
]->images
[image
++];
726 anv_image_view_fill_image_param(cmd_buffer
->device
, desc
->image_view
,
728 image_param
->surface_idx
= bias
+ s
;
732 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
733 surface_state
= desc
->buffer_view
->surface_state
;
734 bo
= desc
->buffer_view
->bo
;
735 bo_offset
= desc
->buffer_view
->offset
;
738 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
739 assert(!"Unsupported descriptor type");
743 assert(!"Invalid descriptor type");
747 bt_map
[bias
+ s
] = surface_state
.offset
+ state_offset
;
748 add_surface_state_reloc(cmd_buffer
, surface_state
, bo
, bo_offset
);
750 assert(image
== layout
->stage
[stage
].image_count
);
753 if (!cmd_buffer
->device
->info
.has_llc
)
754 anv_state_clflush(*bt_state
);
760 anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
761 gl_shader_stage stage
, struct anv_state
*state
)
763 struct anv_pipeline_layout
*layout
;
764 uint32_t sampler_count
;
766 if (stage
== MESA_SHADER_COMPUTE
)
767 layout
= cmd_buffer
->state
.compute_pipeline
->layout
;
769 layout
= cmd_buffer
->state
.pipeline
->layout
;
771 sampler_count
= layout
? layout
->stage
[stage
].sampler_count
: 0;
772 if (sampler_count
== 0)
775 uint32_t size
= sampler_count
* 16;
776 *state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
, size
, 32);
778 if (state
->map
== NULL
)
779 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
781 for (uint32_t s
= 0; s
< layout
->stage
[stage
].sampler_count
; s
++) {
782 struct anv_pipeline_binding
*binding
=
783 &layout
->stage
[stage
].sampler_to_descriptor
[s
];
784 struct anv_descriptor_set
*set
=
785 cmd_buffer
->state
.descriptors
[binding
->set
];
786 struct anv_descriptor
*desc
= &set
->descriptors
[binding
->offset
];
788 if (desc
->type
!= VK_DESCRIPTOR_TYPE_SAMPLER
&&
789 desc
->type
!= VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
792 struct anv_sampler
*sampler
= desc
->sampler
;
794 /* This can happen if we have an unfilled slot since TYPE_SAMPLER
795 * happens to be zero.
800 memcpy(state
->map
+ (s
* 16),
801 sampler
->state
, sizeof(sampler
->state
));
804 if (!cmd_buffer
->device
->info
.has_llc
)
805 anv_state_clflush(*state
);
811 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
812 const void *data
, uint32_t size
, uint32_t alignment
)
814 struct anv_state state
;
816 state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
, size
, alignment
);
817 memcpy(state
.map
, data
, size
);
819 if (!cmd_buffer
->device
->info
.has_llc
)
820 anv_state_clflush(state
);
822 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state
.map
, size
));
828 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
829 uint32_t *a
, uint32_t *b
,
830 uint32_t dwords
, uint32_t alignment
)
832 struct anv_state state
;
835 state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
836 dwords
* 4, alignment
);
838 for (uint32_t i
= 0; i
< dwords
; i
++)
841 if (!cmd_buffer
->device
->info
.has_llc
)
842 anv_state_clflush(state
);
844 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p
, dwords
* 4));
850 anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer
*cmd_buffer
,
851 struct anv_subpass
*subpass
)
853 switch (cmd_buffer
->device
->info
.gen
) {
855 gen7_cmd_buffer_begin_subpass(cmd_buffer
, subpass
);
858 gen8_cmd_buffer_begin_subpass(cmd_buffer
, subpass
);
861 gen9_cmd_buffer_begin_subpass(cmd_buffer
, subpass
);
864 unreachable("unsupported gen\n");
868 void anv_CmdSetEvent(
869 VkCommandBuffer commandBuffer
,
871 VkPipelineStageFlags stageMask
)
876 void anv_CmdResetEvent(
877 VkCommandBuffer commandBuffer
,
879 VkPipelineStageFlags stageMask
)
884 void anv_CmdWaitEvents(
885 VkCommandBuffer commandBuffer
,
887 const VkEvent
* pEvents
,
888 VkPipelineStageFlags srcStageMask
,
889 VkPipelineStageFlags destStageMask
,
890 uint32_t memBarrierCount
,
891 const void* const* ppMemBarriers
)
897 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
898 gl_shader_stage stage
)
900 struct anv_push_constants
*data
=
901 cmd_buffer
->state
.push_constants
[stage
];
902 struct brw_stage_prog_data
*prog_data
=
903 cmd_buffer
->state
.pipeline
->prog_data
[stage
];
905 /* If we don't actually have any push constants, bail. */
906 if (data
== NULL
|| prog_data
->nr_params
== 0)
907 return (struct anv_state
) { .offset
= 0 };
909 struct anv_state state
=
910 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
911 prog_data
->nr_params
* sizeof(float),
912 32 /* bottom 5 bits MBZ */);
914 /* Walk through the param array and fill the buffer with data */
915 uint32_t *u32_map
= state
.map
;
916 for (unsigned i
= 0; i
< prog_data
->nr_params
; i
++) {
917 uint32_t offset
= (uintptr_t)prog_data
->param
[i
];
918 u32_map
[i
] = *(uint32_t *)((uint8_t *)data
+ offset
);
921 if (!cmd_buffer
->device
->info
.has_llc
)
922 anv_state_clflush(state
);
928 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
)
930 struct anv_push_constants
*data
=
931 cmd_buffer
->state
.push_constants
[MESA_SHADER_COMPUTE
];
932 struct anv_pipeline
*pipeline
= cmd_buffer
->state
.compute_pipeline
;
933 const struct brw_cs_prog_data
*cs_prog_data
= &pipeline
->cs_prog_data
;
934 const struct brw_stage_prog_data
*prog_data
= &cs_prog_data
->base
;
936 const unsigned local_id_dwords
= cs_prog_data
->local_invocation_id_regs
* 8;
937 const unsigned push_constant_data_size
=
938 (local_id_dwords
+ prog_data
->nr_params
) * 4;
939 const unsigned reg_aligned_constant_size
= ALIGN(push_constant_data_size
, 32);
940 const unsigned param_aligned_count
=
941 reg_aligned_constant_size
/ sizeof(uint32_t);
943 /* If we don't actually have any push constants, bail. */
944 if (reg_aligned_constant_size
== 0)
945 return (struct anv_state
) { .offset
= 0 };
947 const unsigned threads
= pipeline
->cs_thread_width_max
;
948 const unsigned total_push_constants_size
=
949 reg_aligned_constant_size
* threads
;
950 struct anv_state state
=
951 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
952 total_push_constants_size
,
953 32 /* bottom 5 bits MBZ */);
955 /* Walk through the param array and fill the buffer with data */
956 uint32_t *u32_map
= state
.map
;
958 brw_cs_fill_local_id_payload(cs_prog_data
, u32_map
, threads
,
959 reg_aligned_constant_size
);
961 /* Setup uniform data for the first thread */
962 for (unsigned i
= 0; i
< prog_data
->nr_params
; i
++) {
963 uint32_t offset
= (uintptr_t)prog_data
->param
[i
];
964 u32_map
[local_id_dwords
+ i
] = *(uint32_t *)((uint8_t *)data
+ offset
);
967 /* Copy uniform data from the first thread to every other thread */
968 const size_t uniform_data_size
= prog_data
->nr_params
* sizeof(uint32_t);
969 for (unsigned t
= 1; t
< threads
; t
++) {
970 memcpy(&u32_map
[t
* param_aligned_count
+ local_id_dwords
],
971 &u32_map
[local_id_dwords
],
975 if (!cmd_buffer
->device
->info
.has_llc
)
976 anv_state_clflush(state
);
981 void anv_CmdPushConstants(
982 VkCommandBuffer commandBuffer
,
983 VkPipelineLayout layout
,
984 VkShaderStageFlags stageFlags
,
989 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
991 anv_foreach_stage(stage
, stageFlags
) {
992 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer
, stage
, client_data
);
994 memcpy(cmd_buffer
->state
.push_constants
[stage
]->client_data
+ offset
,
998 cmd_buffer
->state
.push_constants_dirty
|= stageFlags
;
1001 void anv_CmdExecuteCommands(
1002 VkCommandBuffer commandBuffer
,
1003 uint32_t commandBuffersCount
,
1004 const VkCommandBuffer
* pCmdBuffers
)
1006 ANV_FROM_HANDLE(anv_cmd_buffer
, primary
, commandBuffer
);
1008 assert(primary
->level
== VK_COMMAND_BUFFER_LEVEL_PRIMARY
);
1010 anv_assert(primary
->state
.subpass
== &primary
->state
.pass
->subpasses
[0]);
1012 for (uint32_t i
= 0; i
< commandBuffersCount
; i
++) {
1013 ANV_FROM_HANDLE(anv_cmd_buffer
, secondary
, pCmdBuffers
[i
]);
1015 assert(secondary
->level
== VK_COMMAND_BUFFER_LEVEL_SECONDARY
);
1017 anv_cmd_buffer_add_secondary(primary
, secondary
);
1021 VkResult
anv_CreateCommandPool(
1023 const VkCommandPoolCreateInfo
* pCreateInfo
,
1024 const VkAllocationCallbacks
* pAllocator
,
1025 VkCommandPool
* pCmdPool
)
1027 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1028 struct anv_cmd_pool
*pool
;
1030 pool
= anv_alloc2(&device
->alloc
, pAllocator
, sizeof(*pool
), 8,
1031 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1033 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1036 pool
->alloc
= *pAllocator
;
1038 pool
->alloc
= device
->alloc
;
1040 list_inithead(&pool
->cmd_buffers
);
1042 *pCmdPool
= anv_cmd_pool_to_handle(pool
);
1047 void anv_DestroyCommandPool(
1049 VkCommandPool commandPool
,
1050 const VkAllocationCallbacks
* pAllocator
)
1052 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1053 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, commandPool
);
1055 anv_ResetCommandPool(_device
, commandPool
, 0);
1057 anv_free2(&device
->alloc
, pAllocator
, pool
);
1060 VkResult
anv_ResetCommandPool(
1062 VkCommandPool commandPool
,
1063 VkCommandPoolResetFlags flags
)
1065 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, commandPool
);
1067 list_for_each_entry_safe(struct anv_cmd_buffer
, cmd_buffer
,
1068 &pool
->cmd_buffers
, pool_link
) {
1069 anv_cmd_buffer_destroy(cmd_buffer
);
1076 * Return NULL if the current subpass has no depthstencil attachment.
1078 const struct anv_image_view
*
1079 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
)
1081 const struct anv_subpass
*subpass
= cmd_buffer
->state
.subpass
;
1082 const struct anv_framebuffer
*fb
= cmd_buffer
->state
.framebuffer
;
1084 if (subpass
->depth_stencil_attachment
== VK_ATTACHMENT_UNUSED
)
1087 const struct anv_image_view
*iview
=
1088 fb
->attachments
[subpass
->depth_stencil_attachment
];
1090 assert(anv_format_is_depth_or_stencil(iview
->format
));