anv/meta: Use the uncompressed rectangle when blitting
[mesa.git] / src / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 /**
33 * The \a format argument is required and overrides any format found in struct
34 * anv_image_create_info. Exactly one bit must be set in \a aspect.
35 */
36 static isl_surf_usage_flags_t
37 choose_isl_surf_usage(const struct anv_image_create_info *info,
38 VkImageAspectFlags aspect)
39 {
40 const VkImageCreateInfo *vk_info = info->vk_info;
41 isl_surf_usage_flags_t isl_flags = 0;
42
43 /* FINISHME: Support aux surfaces */
44 isl_flags |= ISL_SURF_USAGE_DISABLE_AUX_BIT;
45
46 if (vk_info->usage & VK_IMAGE_USAGE_SAMPLED_BIT)
47 isl_flags |= ISL_SURF_USAGE_TEXTURE_BIT;
48
49 if (vk_info->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
50 isl_flags |= ISL_SURF_USAGE_TEXTURE_BIT;
51
52 if (vk_info->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
53 isl_flags |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
54
55 if (vk_info->flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
56 isl_flags |= ISL_SURF_USAGE_CUBE_BIT;
57
58 if (vk_info->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
59 switch (aspect) {
60 default:
61 unreachable("bad VkImageAspect");
62 case VK_IMAGE_ASPECT_DEPTH_BIT:
63 isl_flags |= ISL_SURF_USAGE_DEPTH_BIT;
64 break;
65 case VK_IMAGE_ASPECT_STENCIL_BIT:
66 isl_flags |= ISL_SURF_USAGE_STENCIL_BIT;
67 break;
68 }
69 }
70
71 if (vk_info->usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
72 /* Meta implements transfers by sampling from the source image. */
73 isl_flags |= ISL_SURF_USAGE_TEXTURE_BIT;
74 }
75
76 if (vk_info->usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) {
77 /* Meta implements transfers by rendering into the destination image. */
78 isl_flags |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
79 }
80
81 return isl_flags;
82 }
83
84 /**
85 * Exactly one bit must be set in \a aspect.
86 */
87 static struct anv_surface *
88 get_surface(struct anv_image *image, VkImageAspectFlags aspect)
89 {
90 switch (aspect) {
91 default:
92 unreachable("bad VkImageAspect");
93 case VK_IMAGE_ASPECT_COLOR_BIT:
94 return &image->color_surface;
95 case VK_IMAGE_ASPECT_DEPTH_BIT:
96 return &image->depth_surface;
97 case VK_IMAGE_ASPECT_STENCIL_BIT:
98 return &image->stencil_surface;
99 }
100 }
101
102 /**
103 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
104 * image's memory requirements (that is, the image's size and alignment).
105 *
106 * Exactly one bit must be set in \a aspect.
107 */
108 static VkResult
109 make_surface(const struct anv_device *dev,
110 struct anv_image *image,
111 const struct anv_image_create_info *anv_info,
112 VkImageAspectFlags aspect)
113 {
114 const VkImageCreateInfo *vk_info = anv_info->vk_info;
115 bool ok UNUSED;
116
117 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
118 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
119 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
120 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
121 };
122
123 isl_tiling_flags_t tiling_flags = anv_info->isl_tiling_flags;
124 if (vk_info->tiling == VK_IMAGE_TILING_LINEAR)
125 tiling_flags &= ISL_TILING_LINEAR_BIT;
126
127 struct anv_surface *anv_surf = get_surface(image, aspect);
128
129 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
130 .dim = vk_to_isl_surf_dim[vk_info->imageType],
131 .format = anv_get_isl_format(vk_info->format, aspect,
132 vk_info->tiling, NULL),
133 .width = vk_info->extent.width,
134 .height = vk_info->extent.height,
135 .depth = vk_info->extent.depth,
136 .levels = vk_info->mipLevels,
137 .array_len = vk_info->arrayLayers,
138 .samples = vk_info->samples,
139 .min_alignment = 0,
140 .min_pitch = 0,
141 .usage = choose_isl_surf_usage(anv_info, aspect),
142 .tiling_flags = tiling_flags);
143
144 /* isl_surf_init() will fail only if provided invalid input. Invalid input
145 * is illegal in Vulkan.
146 */
147 assert(ok);
148
149 anv_surf->offset = align_u32(image->size, anv_surf->isl.alignment);
150 image->size = anv_surf->offset + anv_surf->isl.size;
151 image->alignment = MAX(image->alignment, anv_surf->isl.alignment);
152
153 return VK_SUCCESS;
154 }
155
156 static VkImageUsageFlags
157 anv_image_get_full_usage(const VkImageCreateInfo *info)
158 {
159 VkImageUsageFlags usage = info->usage;
160
161 if (usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
162 /* Meta will transfer from the image by binding it as a texture. */
163 usage |= VK_IMAGE_USAGE_SAMPLED_BIT;
164 }
165
166 if (usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) {
167 /* Meta will transfer to the image by binding it as a color attachment,
168 * even if the image format is not a color format.
169 */
170 usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
171 }
172
173 return usage;
174 }
175
176 VkResult
177 anv_image_create(VkDevice _device,
178 const struct anv_image_create_info *create_info,
179 const VkAllocationCallbacks* alloc,
180 VkImage *pImage)
181 {
182 ANV_FROM_HANDLE(anv_device, device, _device);
183 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
184 struct anv_image *image = NULL;
185 VkResult r;
186
187 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
188
189 anv_assert(pCreateInfo->mipLevels > 0);
190 anv_assert(pCreateInfo->arrayLayers > 0);
191 anv_assert(pCreateInfo->samples > 0);
192 anv_assert(pCreateInfo->extent.width > 0);
193 anv_assert(pCreateInfo->extent.height > 0);
194 anv_assert(pCreateInfo->extent.depth > 0);
195
196 image = anv_alloc2(&device->alloc, alloc, sizeof(*image), 8,
197 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
198 if (!image)
199 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
200
201 memset(image, 0, sizeof(*image));
202 image->type = pCreateInfo->imageType;
203 image->extent = pCreateInfo->extent;
204 image->vk_format = pCreateInfo->format;
205 image->format = anv_format_for_vk_format(pCreateInfo->format);
206 image->levels = pCreateInfo->mipLevels;
207 image->array_size = pCreateInfo->arrayLayers;
208 image->samples = pCreateInfo->samples;
209 image->usage = anv_image_get_full_usage(pCreateInfo);
210 image->tiling = pCreateInfo->tiling;
211
212 if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT) {
213 image->needs_nonrt_surface_state = true;
214 }
215
216 if (image->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) {
217 image->needs_color_rt_surface_state = true;
218 }
219
220 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
221 image->needs_storage_surface_state = true;
222 }
223
224 if (likely(anv_format_is_color(image->format))) {
225 r = make_surface(device, image, create_info,
226 VK_IMAGE_ASPECT_COLOR_BIT);
227 if (r != VK_SUCCESS)
228 goto fail;
229 } else {
230 if (image->format->depth_format) {
231 r = make_surface(device, image, create_info,
232 VK_IMAGE_ASPECT_DEPTH_BIT);
233 if (r != VK_SUCCESS)
234 goto fail;
235 }
236
237 if (image->format->has_stencil) {
238 r = make_surface(device, image, create_info,
239 VK_IMAGE_ASPECT_STENCIL_BIT);
240 if (r != VK_SUCCESS)
241 goto fail;
242 }
243 }
244
245 *pImage = anv_image_to_handle(image);
246
247 return VK_SUCCESS;
248
249 fail:
250 if (image)
251 anv_free2(&device->alloc, alloc, image);
252
253 return r;
254 }
255
256 VkResult
257 anv_CreateImage(VkDevice device,
258 const VkImageCreateInfo *pCreateInfo,
259 const VkAllocationCallbacks *pAllocator,
260 VkImage *pImage)
261 {
262 return anv_image_create(device,
263 &(struct anv_image_create_info) {
264 .vk_info = pCreateInfo,
265 .isl_tiling_flags = ISL_TILING_ANY_MASK,
266 },
267 pAllocator,
268 pImage);
269 }
270
271 void
272 anv_DestroyImage(VkDevice _device, VkImage _image,
273 const VkAllocationCallbacks *pAllocator)
274 {
275 ANV_FROM_HANDLE(anv_device, device, _device);
276
277 anv_free2(&device->alloc, pAllocator, anv_image_from_handle(_image));
278 }
279
280 static void
281 anv_surface_get_subresource_layout(struct anv_image *image,
282 struct anv_surface *surface,
283 const VkImageSubresource *subresource,
284 VkSubresourceLayout *layout)
285 {
286 /* If we are on a non-zero mip level or array slice, we need to
287 * calculate a real offset.
288 */
289 anv_assert(subresource->mipLevel == 0);
290 anv_assert(subresource->arrayLayer == 0);
291
292 layout->offset = surface->offset;
293 layout->rowPitch = surface->isl.row_pitch;
294 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
295 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
296 layout->size = surface->isl.size;
297 }
298
299 void anv_GetImageSubresourceLayout(
300 VkDevice device,
301 VkImage _image,
302 const VkImageSubresource* pSubresource,
303 VkSubresourceLayout* pLayout)
304 {
305 ANV_FROM_HANDLE(anv_image, image, _image);
306
307 assert(__builtin_popcount(pSubresource->aspectMask) == 1);
308
309 switch (pSubresource->aspectMask) {
310 case VK_IMAGE_ASPECT_COLOR_BIT:
311 anv_surface_get_subresource_layout(image, &image->color_surface,
312 pSubresource, pLayout);
313 break;
314 case VK_IMAGE_ASPECT_DEPTH_BIT:
315 anv_surface_get_subresource_layout(image, &image->depth_surface,
316 pSubresource, pLayout);
317 break;
318 case VK_IMAGE_ASPECT_STENCIL_BIT:
319 anv_surface_get_subresource_layout(image, &image->stencil_surface,
320 pSubresource, pLayout);
321 break;
322 default:
323 assert(!"Invalid image aspect");
324 }
325 }
326
327 VkResult
328 anv_validate_CreateImageView(VkDevice _device,
329 const VkImageViewCreateInfo *pCreateInfo,
330 const VkAllocationCallbacks *pAllocator,
331 VkImageView *pView)
332 {
333 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
334 const VkImageSubresourceRange *subresource;
335 const struct anv_format *view_format_info;
336
337 /* Validate structure type before dereferencing it. */
338 assert(pCreateInfo);
339 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO);
340 subresource = &pCreateInfo->subresourceRange;
341
342 /* Validate viewType is in range before using it. */
343 assert(pCreateInfo->viewType >= VK_IMAGE_VIEW_TYPE_BEGIN_RANGE);
344 assert(pCreateInfo->viewType <= VK_IMAGE_VIEW_TYPE_END_RANGE);
345
346 /* Validate format is in range before using it. */
347 assert(pCreateInfo->format >= VK_FORMAT_BEGIN_RANGE);
348 assert(pCreateInfo->format <= VK_FORMAT_END_RANGE);
349 view_format_info = anv_format_for_vk_format(pCreateInfo->format);
350
351 /* Validate channel swizzles. */
352 assert(pCreateInfo->components.r >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
353 assert(pCreateInfo->components.r <= VK_COMPONENT_SWIZZLE_END_RANGE);
354 assert(pCreateInfo->components.g >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
355 assert(pCreateInfo->components.g <= VK_COMPONENT_SWIZZLE_END_RANGE);
356 assert(pCreateInfo->components.b >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
357 assert(pCreateInfo->components.b <= VK_COMPONENT_SWIZZLE_END_RANGE);
358 assert(pCreateInfo->components.a >= VK_COMPONENT_SWIZZLE_BEGIN_RANGE);
359 assert(pCreateInfo->components.a <= VK_COMPONENT_SWIZZLE_END_RANGE);
360
361 /* Validate subresource. */
362 assert(subresource->aspectMask != 0);
363 assert(subresource->levelCount > 0);
364 assert(subresource->layerCount > 0);
365 assert(subresource->baseMipLevel < image->levels);
366 assert(subresource->baseMipLevel + subresource->levelCount <= image->levels);
367 assert(subresource->baseArrayLayer < image->array_size);
368 assert(subresource->baseArrayLayer + subresource->layerCount <= image->array_size);
369 assert(pView);
370
371 const VkImageAspectFlags ds_flags = VK_IMAGE_ASPECT_DEPTH_BIT
372 | VK_IMAGE_ASPECT_STENCIL_BIT;
373
374 /* Validate format. */
375 if (subresource->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
376 assert(subresource->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
377 assert(!image->format->depth_format);
378 assert(!image->format->has_stencil);
379 assert(!view_format_info->depth_format);
380 assert(!view_format_info->has_stencil);
381 assert(view_format_info->isl_layout->bs ==
382 image->format->isl_layout->bs);
383 } else if (subresource->aspectMask & ds_flags) {
384 assert((subresource->aspectMask & ~ds_flags) == 0);
385
386 if (subresource->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT) {
387 assert(image->format->depth_format);
388 assert(view_format_info->depth_format);
389 assert(view_format_info->isl_layout->bs ==
390 image->format->isl_layout->bs);
391 }
392
393 if (subresource->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT) {
394 /* FINISHME: Is it legal to have an R8 view of S8? */
395 assert(image->format->has_stencil);
396 assert(view_format_info->has_stencil);
397 }
398 } else {
399 assert(!"bad VkImageSubresourceRange::aspectFlags");
400 }
401
402 return anv_CreateImageView(_device, pCreateInfo, pAllocator, pView);
403 }
404
405 void
406 anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
407 struct anv_image_view *iview,
408 const VkImageViewCreateInfo *pCreateInfo,
409 VkImageUsageFlagBits usage)
410 {
411 switch (device->info.gen) {
412 case 7:
413 if (device->info.is_haswell)
414 gen75_fill_image_surface_state(device, state.map, iview,
415 pCreateInfo, usage);
416 else
417 gen7_fill_image_surface_state(device, state.map, iview,
418 pCreateInfo, usage);
419 break;
420 case 8:
421 gen8_fill_image_surface_state(device, state.map, iview,
422 pCreateInfo, usage);
423 break;
424 case 9:
425 gen9_fill_image_surface_state(device, state.map, iview,
426 pCreateInfo, usage);
427 break;
428 default:
429 unreachable("unsupported gen\n");
430 }
431
432 if (!device->info.has_llc)
433 anv_state_clflush(state);
434 }
435
436 static struct anv_state
437 alloc_surface_state(struct anv_device *device,
438 struct anv_cmd_buffer *cmd_buffer)
439 {
440 if (cmd_buffer) {
441 return anv_cmd_buffer_alloc_surface_state(cmd_buffer);
442 } else {
443 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
444 }
445 }
446
447 static bool
448 has_matching_storage_typed_format(const struct anv_device *device,
449 enum isl_format format)
450 {
451 return (isl_format_get_layout(format)->bs <= 4 ||
452 (isl_format_get_layout(format)->bs <= 8 &&
453 (device->info.gen >= 8 || device->info.is_haswell)) ||
454 device->info.gen >= 9);
455 }
456
457 static VkComponentSwizzle
458 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
459 struct anv_format_swizzle format_swizzle)
460 {
461 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
462 swizzle = component;
463
464 switch (swizzle) {
465 case VK_COMPONENT_SWIZZLE_ZERO:
466 return VK_COMPONENT_SWIZZLE_ZERO;
467 case VK_COMPONENT_SWIZZLE_ONE:
468 return VK_COMPONENT_SWIZZLE_ONE;
469 case VK_COMPONENT_SWIZZLE_R:
470 return VK_COMPONENT_SWIZZLE_R + format_swizzle.r;
471 case VK_COMPONENT_SWIZZLE_G:
472 return VK_COMPONENT_SWIZZLE_R + format_swizzle.g;
473 case VK_COMPONENT_SWIZZLE_B:
474 return VK_COMPONENT_SWIZZLE_R + format_swizzle.b;
475 case VK_COMPONENT_SWIZZLE_A:
476 return VK_COMPONENT_SWIZZLE_R + format_swizzle.a;
477 default:
478 unreachable("Invalid swizzle");
479 }
480 }
481
482 void
483 anv_image_view_init(struct anv_image_view *iview,
484 struct anv_device *device,
485 const VkImageViewCreateInfo* pCreateInfo,
486 struct anv_cmd_buffer *cmd_buffer)
487 {
488 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
489 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
490
491 assert(range->layerCount > 0);
492 assert(range->baseMipLevel < image->levels);
493 assert(image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
494 VK_IMAGE_USAGE_STORAGE_BIT |
495 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
496 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
497
498 switch (image->type) {
499 default:
500 unreachable("bad VkImageType");
501 case VK_IMAGE_TYPE_1D:
502 case VK_IMAGE_TYPE_2D:
503 assert(range->baseArrayLayer + range->layerCount - 1 <= image->array_size);
504 break;
505 case VK_IMAGE_TYPE_3D:
506 assert(range->baseArrayLayer + range->layerCount - 1
507 <= anv_minify(image->extent.depth, range->baseMipLevel));
508 break;
509 }
510
511 struct anv_surface *surface =
512 anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
513
514 iview->image = image;
515 iview->bo = image->bo;
516 iview->offset = image->offset + surface->offset;
517
518 iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
519 iview->vk_format = pCreateInfo->format;
520
521 struct anv_format_swizzle swizzle;
522 iview->format = anv_get_isl_format(pCreateInfo->format, iview->aspect_mask,
523 image->tiling, &swizzle);
524 iview->swizzle.r = remap_swizzle(pCreateInfo->components.r,
525 VK_COMPONENT_SWIZZLE_R, swizzle);
526 iview->swizzle.g = remap_swizzle(pCreateInfo->components.g,
527 VK_COMPONENT_SWIZZLE_G, swizzle);
528 iview->swizzle.b = remap_swizzle(pCreateInfo->components.b,
529 VK_COMPONENT_SWIZZLE_B, swizzle);
530 iview->swizzle.a = remap_swizzle(pCreateInfo->components.a,
531 VK_COMPONENT_SWIZZLE_A, swizzle);
532
533 iview->base_layer = range->baseArrayLayer;
534 iview->base_mip = range->baseMipLevel;
535 iview->extent = (VkExtent3D) {
536 .width = anv_minify(image->extent.width, range->baseMipLevel),
537 .height = anv_minify(image->extent.height, range->baseMipLevel),
538 .depth = anv_minify(image->extent.depth, range->baseMipLevel),
539 };
540
541 if (image->needs_nonrt_surface_state) {
542 iview->nonrt_surface_state = alloc_surface_state(device, cmd_buffer);
543
544 anv_fill_image_surface_state(device, iview->nonrt_surface_state,
545 iview, pCreateInfo,
546 VK_IMAGE_USAGE_SAMPLED_BIT);
547 } else {
548 iview->nonrt_surface_state.alloc_size = 0;
549 }
550
551 if (image->needs_color_rt_surface_state) {
552 iview->color_rt_surface_state = alloc_surface_state(device, cmd_buffer);
553
554 anv_fill_image_surface_state(device, iview->color_rt_surface_state,
555 iview, pCreateInfo,
556 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
557 } else {
558 iview->color_rt_surface_state.alloc_size = 0;
559 }
560
561 if (image->needs_storage_surface_state) {
562 iview->storage_surface_state = alloc_surface_state(device, cmd_buffer);
563
564 if (has_matching_storage_typed_format(device, iview->format))
565 anv_fill_image_surface_state(device, iview->storage_surface_state,
566 iview, pCreateInfo,
567 VK_IMAGE_USAGE_STORAGE_BIT);
568 else
569 anv_fill_buffer_surface_state(device, iview->storage_surface_state,
570 ISL_FORMAT_RAW,
571 iview->offset,
572 iview->bo->size - iview->offset, 1);
573
574 } else {
575 iview->storage_surface_state.alloc_size = 0;
576 }
577 }
578
579 VkResult
580 anv_CreateImageView(VkDevice _device,
581 const VkImageViewCreateInfo *pCreateInfo,
582 const VkAllocationCallbacks *pAllocator,
583 VkImageView *pView)
584 {
585 ANV_FROM_HANDLE(anv_device, device, _device);
586 struct anv_image_view *view;
587
588 view = anv_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
589 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
590 if (view == NULL)
591 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
592
593 anv_image_view_init(view, device, pCreateInfo, NULL);
594
595 *pView = anv_image_view_to_handle(view);
596
597 return VK_SUCCESS;
598 }
599
600 void
601 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
602 const VkAllocationCallbacks *pAllocator)
603 {
604 ANV_FROM_HANDLE(anv_device, device, _device);
605 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
606
607 if (iview->image->needs_color_rt_surface_state) {
608 anv_state_pool_free(&device->surface_state_pool,
609 iview->color_rt_surface_state);
610 }
611
612 if (iview->image->needs_nonrt_surface_state) {
613 anv_state_pool_free(&device->surface_state_pool,
614 iview->nonrt_surface_state);
615 }
616
617 if (iview->image->needs_storage_surface_state) {
618 anv_state_pool_free(&device->surface_state_pool,
619 iview->storage_surface_state);
620 }
621
622 anv_free2(&device->alloc, pAllocator, iview);
623 }
624
625 VkResult
626 anv_CreateBufferView(VkDevice _device,
627 const VkBufferViewCreateInfo *pCreateInfo,
628 const VkAllocationCallbacks *pAllocator,
629 VkBufferView *pView)
630 {
631 ANV_FROM_HANDLE(anv_device, device, _device);
632 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
633 struct anv_buffer_view *view;
634
635 view = anv_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
636 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
637 if (!view)
638 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
639
640 const struct anv_format *format =
641 anv_format_for_vk_format(pCreateInfo->format);
642
643 view->format = format->surface_format;
644 view->bo = buffer->bo;
645 view->offset = buffer->offset + pCreateInfo->offset;
646 view->range = pCreateInfo->range == VK_WHOLE_SIZE ?
647 buffer->size - view->offset : pCreateInfo->range;
648
649 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
650 view->surface_state =
651 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
652
653 anv_fill_buffer_surface_state(device, view->surface_state,
654 view->format,
655 view->offset, view->range,
656 format->isl_layout->bs);
657 } else {
658 view->surface_state = (struct anv_state){ 0 };
659 }
660
661 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
662 view->storage_surface_state =
663 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
664
665 enum isl_format storage_format =
666 has_matching_storage_typed_format(device, view->format) ?
667 isl_lower_storage_image_format(&device->isl_dev, view->format) :
668 ISL_FORMAT_RAW;
669
670 anv_fill_buffer_surface_state(device, view->storage_surface_state,
671 storage_format,
672 view->offset, view->range,
673 (storage_format == ISL_FORMAT_RAW ? 1 :
674 format->isl_layout->bs));
675
676 } else {
677 view->storage_surface_state = (struct anv_state){ 0 };
678 }
679
680 *pView = anv_buffer_view_to_handle(view);
681
682 return VK_SUCCESS;
683 }
684
685 void
686 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
687 const VkAllocationCallbacks *pAllocator)
688 {
689 ANV_FROM_HANDLE(anv_device, device, _device);
690 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
691
692 if (view->surface_state.alloc_size > 0)
693 anv_state_pool_free(&device->surface_state_pool,
694 view->surface_state);
695
696 if (view->storage_surface_state.alloc_size > 0)
697 anv_state_pool_free(&device->surface_state_pool,
698 view->storage_surface_state);
699
700 anv_free2(&device->alloc, pAllocator, view);
701 }
702
703 struct anv_surface *
704 anv_image_get_surface_for_aspect_mask(struct anv_image *image, VkImageAspectFlags aspect_mask)
705 {
706 switch (aspect_mask) {
707 case VK_IMAGE_ASPECT_COLOR_BIT:
708 /* Dragons will eat you.
709 *
710 * Meta attaches all destination surfaces as color render targets. Guess
711 * what surface the Meta Dragons really want.
712 */
713 if (image->format->depth_format && image->format->has_stencil) {
714 return &image->depth_surface;
715 } else if (image->format->depth_format) {
716 return &image->depth_surface;
717 } else if (image->format->has_stencil) {
718 return &image->stencil_surface;
719 } else {
720 return &image->color_surface;
721 }
722 break;
723 case VK_IMAGE_ASPECT_DEPTH_BIT:
724 assert(image->format->depth_format);
725 return &image->depth_surface;
726 case VK_IMAGE_ASPECT_STENCIL_BIT:
727 assert(image->format->has_stencil);
728 return &image->stencil_surface;
729 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
730 if (image->format->depth_format && image->format->has_stencil) {
731 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
732 * combined depth stencil formats. Specifically, it states:
733 *
734 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
735 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
736 *
737 * Image views with both depth and stencil aspects are only valid for
738 * render target attachments, in which case
739 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
740 * stencil surfaces from the underlying surface.
741 */
742 return &image->depth_surface;
743 } else if (image->format->depth_format) {
744 return &image->depth_surface;
745 } else if (image->format->has_stencil) {
746 return &image->stencil_surface;
747 }
748 /* fallthrough */
749 default:
750 unreachable("image does not have aspect");
751 return NULL;
752 }
753 }
754
755 static void
756 image_param_defaults(struct brw_image_param *param)
757 {
758 memset(param, 0, sizeof *param);
759 /* Set the swizzling shifts to all-ones to effectively disable swizzling --
760 * See emit_address_calculation() in brw_fs_surface_builder.cpp for a more
761 * detailed explanation of these parameters.
762 */
763 param->swizzling[0] = 0xff;
764 param->swizzling[1] = 0xff;
765 }
766
767 void
768 anv_image_view_fill_image_param(struct anv_device *device,
769 struct anv_image_view *view,
770 struct brw_image_param *param)
771 {
772 image_param_defaults(param);
773
774 const struct isl_surf *surf = &view->image->color_surface.isl;
775 const int cpp = isl_format_get_layout(surf->format)->bs;
776 const struct isl_extent3d image_align_sa =
777 isl_surf_get_image_alignment_sa(surf);
778
779 param->size[0] = view->extent.width;
780 param->size[1] = view->extent.height;
781 if (surf->dim == ISL_SURF_DIM_3D) {
782 param->size[2] = view->extent.depth;
783 } else {
784 param->size[2] = surf->logical_level0_px.array_len - view->base_layer;
785 }
786
787 isl_surf_get_image_offset_el(surf, view->base_mip, view->base_layer, 0,
788 &param->offset[0], &param->offset[1]);
789
790 param->stride[0] = cpp;
791 param->stride[1] = surf->row_pitch / cpp;
792
793 if (device->info.gen < 9 && surf->dim == ISL_SURF_DIM_3D) {
794 param->stride[2] = util_align_npot(param->size[0], image_align_sa.w);
795 param->stride[3] = util_align_npot(param->size[1], image_align_sa.h);
796 } else {
797 param->stride[2] = 0;
798 param->stride[3] = isl_surf_get_array_pitch_el_rows(surf);
799 }
800
801 switch (surf->tiling) {
802 case ISL_TILING_LINEAR:
803 /* image_param_defaults is good enough */
804 break;
805
806 case ISL_TILING_X:
807 /* An X tile is a rectangular block of 512x8 bytes. */
808 param->tiling[0] = util_logbase2(512 / cpp);
809 param->tiling[1] = util_logbase2(8);
810
811 if (device->isl_dev.has_bit6_swizzling) {
812 /* Right shifts required to swizzle bits 9 and 10 of the memory
813 * address with bit 6.
814 */
815 param->swizzling[0] = 3;
816 param->swizzling[1] = 4;
817 }
818 break;
819
820 case ISL_TILING_Y0:
821 /* The layout of a Y-tiled surface in memory isn't really fundamentally
822 * different to the layout of an X-tiled surface, we simply pretend that
823 * the surface is broken up in a number of smaller 16Bx32 tiles, each
824 * one arranged in X-major order just like is the case for X-tiling.
825 */
826 param->tiling[0] = util_logbase2(16 / cpp);
827 param->tiling[1] = util_logbase2(32);
828
829 if (device->isl_dev.has_bit6_swizzling) {
830 /* Right shift required to swizzle bit 9 of the memory address with
831 * bit 6.
832 */
833 param->swizzling[0] = 3;
834 param->swizzling[1] = 0xff;
835 }
836 break;
837
838 default:
839 assert(!"Unhandled storage image tiling");
840 }
841
842 /* 3D textures are arranged in 2D in memory with 2^lod slices per row. The
843 * address calculation algorithm (emit_address_calculation() in
844 * brw_fs_surface_builder.cpp) handles this as a sort of tiling with
845 * modulus equal to the LOD.
846 */
847 param->tiling[2] = (device->info.gen < 9 && surf->dim == ISL_SURF_DIM_3D ?
848 view->base_mip : 0);
849 }
850
851 void
852 anv_buffer_view_fill_image_param(struct anv_device *device,
853 struct anv_buffer_view *view,
854 struct brw_image_param *param)
855 {
856 image_param_defaults(param);
857
858 param->stride[0] = isl_format_layouts[view->format].bs;
859 param->size[0] = view->range / param->stride[0];
860 }