739ae09582c41ea13a4fb8c1eaf19db11c0e6972
[mesa.git] / src / vulkan / anv_meta_clear.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_meta.h"
25 #include "anv_private.h"
26 #include "nir/nir_builder.h"
27
28 /** Vertex attributes for color clears. */
29 struct color_clear_vattrs {
30 struct anv_vue_header vue_header;
31 float position[2]; /**< 3DPRIM_RECTLIST */
32 VkClearColorValue color;
33 };
34
35 /** Vertex attributes for depthstencil clears. */
36 struct depthstencil_clear_vattrs {
37 struct anv_vue_header vue_header;
38 float position[2]; /*<< 3DPRIM_RECTLIST */
39 };
40
41 static void
42 meta_clear_begin(struct anv_meta_saved_state *saved_state,
43 struct anv_cmd_buffer *cmd_buffer)
44 {
45 anv_meta_save(saved_state, cmd_buffer,
46 (1 << VK_DYNAMIC_STATE_VIEWPORT) |
47 (1 << VK_DYNAMIC_STATE_SCISSOR) |
48 (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE));
49
50 cmd_buffer->state.dynamic.viewport.count = 0;
51 cmd_buffer->state.dynamic.scissor.count = 0;
52 }
53
54 static void
55 meta_clear_end(struct anv_meta_saved_state *saved_state,
56 struct anv_cmd_buffer *cmd_buffer)
57 {
58 anv_meta_restore(saved_state, cmd_buffer);
59 }
60
61 static void
62 build_color_shaders(struct nir_shader **out_vs,
63 struct nir_shader **out_fs,
64 uint32_t frag_output)
65 {
66 nir_builder vs_b;
67 nir_builder fs_b;
68
69 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
70 nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
71
72 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs");
73 fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs");
74
75 const struct glsl_type *position_type = glsl_vec4_type();
76 const struct glsl_type *color_type = glsl_vec4_type();
77
78 nir_variable *vs_in_pos =
79 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
80 "a_position");
81 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
82
83 nir_variable *vs_out_pos =
84 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
85 "gl_Position");
86 vs_out_pos->data.location = VARYING_SLOT_POS;
87
88 nir_variable *vs_in_color =
89 nir_variable_create(vs_b.shader, nir_var_shader_in, color_type,
90 "a_color");
91 vs_in_color->data.location = VERT_ATTRIB_GENERIC1;
92
93 nir_variable *vs_out_color =
94 nir_variable_create(vs_b.shader, nir_var_shader_out, color_type,
95 "v_color");
96 vs_out_color->data.location = VARYING_SLOT_VAR0;
97 vs_out_color->data.interpolation = INTERP_QUALIFIER_FLAT;
98
99 nir_variable *fs_in_color =
100 nir_variable_create(fs_b.shader, nir_var_shader_in, color_type,
101 "v_color");
102 fs_in_color->data.location = vs_out_color->data.location;
103 fs_in_color->data.interpolation = vs_out_color->data.interpolation;
104
105 nir_variable *fs_out_color =
106 nir_variable_create(fs_b.shader, nir_var_shader_out, color_type,
107 "f_color");
108 fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output;
109
110 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
111 nir_copy_var(&vs_b, vs_out_color, vs_in_color);
112 nir_copy_var(&fs_b, fs_out_color, fs_in_color);
113
114 *out_vs = vs_b.shader;
115 *out_fs = fs_b.shader;
116 }
117
118 static VkResult
119 create_pipeline(struct anv_device *device,
120 uint32_t samples,
121 struct nir_shader *vs_nir,
122 struct nir_shader *fs_nir,
123 const VkPipelineVertexInputStateCreateInfo *vi_state,
124 const VkPipelineDepthStencilStateCreateInfo *ds_state,
125 const VkPipelineColorBlendStateCreateInfo *cb_state,
126 const VkAllocationCallbacks *alloc,
127 bool use_repclear,
128 struct anv_pipeline **pipeline)
129 {
130 VkDevice device_h = anv_device_to_handle(device);
131 VkResult result;
132
133 struct anv_shader_module vs_m = { .nir = vs_nir };
134 struct anv_shader_module fs_m = { .nir = fs_nir };
135
136 VkPipeline pipeline_h = VK_NULL_HANDLE;
137 result = anv_graphics_pipeline_create(device_h,
138 VK_NULL_HANDLE,
139 &(VkGraphicsPipelineCreateInfo) {
140 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
141 .stageCount = fs_nir ? 2 : 1,
142 .pStages = (VkPipelineShaderStageCreateInfo[]) {
143 {
144 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
145 .stage = VK_SHADER_STAGE_VERTEX_BIT,
146 .module = anv_shader_module_to_handle(&vs_m),
147 .pName = "main",
148 },
149 {
150 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
151 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
152 .module = anv_shader_module_to_handle(&fs_m),
153 .pName = "main",
154 },
155 },
156 .pVertexInputState = vi_state,
157 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
158 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
159 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
160 .primitiveRestartEnable = false,
161 },
162 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
163 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
164 .viewportCount = 1,
165 .pViewports = NULL, /* dynamic */
166 .scissorCount = 1,
167 .pScissors = NULL, /* dynamic */
168 },
169 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
170 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
171 .rasterizerDiscardEnable = false,
172 .polygonMode = VK_POLYGON_MODE_FILL,
173 .cullMode = VK_CULL_MODE_NONE,
174 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
175 .depthBiasEnable = false,
176 },
177 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
178 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
179 .rasterizationSamples = samples,
180 .sampleShadingEnable = false,
181 .pSampleMask = (VkSampleMask[]) { ~0 },
182 .alphaToCoverageEnable = false,
183 .alphaToOneEnable = false,
184 },
185 .pDepthStencilState = ds_state,
186 .pColorBlendState = cb_state,
187 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
188 /* The meta clear pipeline declares all state as dynamic.
189 * As a consequence, vkCmdBindPipeline writes no dynamic state
190 * to the cmd buffer. Therefore, at the end of the meta clear,
191 * we need only restore dynamic state was vkCmdSet.
192 */
193 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
194 .dynamicStateCount = 9,
195 .pDynamicStates = (VkDynamicState[]) {
196 VK_DYNAMIC_STATE_VIEWPORT,
197 VK_DYNAMIC_STATE_SCISSOR,
198 VK_DYNAMIC_STATE_LINE_WIDTH,
199 VK_DYNAMIC_STATE_DEPTH_BIAS,
200 VK_DYNAMIC_STATE_BLEND_CONSTANTS,
201 VK_DYNAMIC_STATE_DEPTH_BOUNDS,
202 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
203 VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
204 VK_DYNAMIC_STATE_STENCIL_REFERENCE,
205 },
206 },
207 .flags = 0,
208 .renderPass = anv_render_pass_to_handle(&anv_meta_dummy_renderpass),
209 .subpass = 0,
210 },
211 &(struct anv_graphics_pipeline_create_info) {
212 .color_attachment_count = MAX_RTS,
213 .use_repclear = use_repclear,
214 .disable_viewport = true,
215 .disable_vs = true,
216 .use_rectlist = true
217 },
218 alloc,
219 &pipeline_h);
220
221 ralloc_free(vs_nir);
222 ralloc_free(fs_nir);
223
224 *pipeline = anv_pipeline_from_handle(pipeline_h);
225
226 return result;
227 }
228
229 static VkResult
230 create_color_pipeline(struct anv_device *device,
231 uint32_t samples,
232 uint32_t frag_output,
233 struct anv_pipeline **pipeline)
234 {
235 struct nir_shader *vs_nir;
236 struct nir_shader *fs_nir;
237 build_color_shaders(&vs_nir, &fs_nir, frag_output);
238
239 const VkPipelineVertexInputStateCreateInfo vi_state = {
240 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
241 .vertexBindingDescriptionCount = 1,
242 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
243 {
244 .binding = 0,
245 .stride = sizeof(struct color_clear_vattrs),
246 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
247 },
248 },
249 .vertexAttributeDescriptionCount = 3,
250 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
251 {
252 /* VUE Header */
253 .location = 0,
254 .binding = 0,
255 .format = VK_FORMAT_R32G32B32A32_UINT,
256 .offset = offsetof(struct color_clear_vattrs, vue_header),
257 },
258 {
259 /* Position */
260 .location = 1,
261 .binding = 0,
262 .format = VK_FORMAT_R32G32_SFLOAT,
263 .offset = offsetof(struct color_clear_vattrs, position),
264 },
265 {
266 /* Color */
267 .location = 2,
268 .binding = 0,
269 .format = VK_FORMAT_R32G32B32A32_SFLOAT,
270 .offset = offsetof(struct color_clear_vattrs, color),
271 },
272 },
273 };
274
275 const VkPipelineDepthStencilStateCreateInfo ds_state = {
276 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
277 .depthTestEnable = false,
278 .depthWriteEnable = false,
279 .depthBoundsTestEnable = false,
280 .stencilTestEnable = false,
281 };
282
283 VkPipelineColorBlendAttachmentState blend_attachment_state[MAX_RTS] = { 0 };
284 blend_attachment_state[frag_output] = (VkPipelineColorBlendAttachmentState) {
285 .blendEnable = false,
286 .colorWriteMask = VK_COLOR_COMPONENT_A_BIT |
287 VK_COLOR_COMPONENT_R_BIT |
288 VK_COLOR_COMPONENT_G_BIT |
289 VK_COLOR_COMPONENT_B_BIT,
290 };
291
292 const VkPipelineColorBlendStateCreateInfo cb_state = {
293 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
294 .logicOpEnable = false,
295 .attachmentCount = MAX_RTS,
296 .pAttachments = blend_attachment_state
297 };
298
299 /* Disable repclear because we do not want the compiler to replace the
300 * shader. We need the shader to write to the specified color attachment,
301 * but the repclear shader writes to all color attachments.
302 */
303 return
304 create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state,
305 &cb_state, &device->meta_state.alloc,
306 /*use_repclear*/ false, pipeline);
307 }
308
309 static void
310 destroy_pipeline(struct anv_device *device, struct anv_pipeline *pipeline)
311 {
312 if (!pipeline)
313 return;
314
315 ANV_CALL(DestroyPipeline)(anv_device_to_handle(device),
316 anv_pipeline_to_handle(pipeline),
317 &device->meta_state.alloc);
318 }
319
320 void
321 anv_device_finish_meta_clear_state(struct anv_device *device)
322 {
323 struct anv_meta_state *state = &device->meta_state;
324
325 for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
326 for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
327 destroy_pipeline(device, state->clear[i].color_pipelines[j]);
328 }
329
330 destroy_pipeline(device, state->clear[i].depth_only_pipeline);
331 destroy_pipeline(device, state->clear[i].stencil_only_pipeline);
332 destroy_pipeline(device, state->clear[i].depthstencil_pipeline);
333 }
334 }
335
336 static void
337 emit_color_clear(struct anv_cmd_buffer *cmd_buffer,
338 const VkClearAttachment *clear_att,
339 const VkClearRect *clear_rect)
340 {
341 struct anv_device *device = cmd_buffer->device;
342 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
343 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
344 const uint32_t subpass_att = clear_att->colorAttachment;
345 const uint32_t pass_att = subpass->color_attachments[subpass_att];
346 const struct anv_image_view *iview = fb->attachments[pass_att];
347 const uint32_t samples = iview->image->samples;
348 const uint32_t samples_log2 = ffs(samples) - 1;
349 struct anv_pipeline *pipeline =
350 device->meta_state.clear[samples_log2].color_pipelines[subpass_att];
351 VkClearColorValue clear_value = clear_att->clearValue.color;
352
353 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
354 VkPipeline pipeline_h = anv_pipeline_to_handle(pipeline);
355
356 assert(samples_log2 < ARRAY_SIZE(device->meta_state.clear));
357 assert(clear_att->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
358 assert(clear_att->colorAttachment < subpass->color_count);
359
360 const struct color_clear_vattrs vertex_data[3] = {
361 {
362 .vue_header = { 0 },
363 .position = {
364 clear_rect->rect.offset.x,
365 clear_rect->rect.offset.y,
366 },
367 .color = clear_value,
368 },
369 {
370 .vue_header = { 0 },
371 .position = {
372 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
373 clear_rect->rect.offset.y,
374 },
375 .color = clear_value,
376 },
377 {
378 .vue_header = { 0 },
379 .position = {
380 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
381 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
382 },
383 .color = clear_value,
384 },
385 };
386
387 struct anv_state state =
388 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
389
390 struct anv_buffer vertex_buffer = {
391 .device = device,
392 .size = sizeof(vertex_data),
393 .bo = &device->dynamic_state_block_pool.bo,
394 .offset = state.offset,
395 };
396
397 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
398 (VkViewport[]) {
399 {
400 .x = 0,
401 .y = 0,
402 .width = fb->width,
403 .height = fb->height,
404 .minDepth = 0.0,
405 .maxDepth = 1.0,
406 },
407 });
408
409 ANV_CALL(CmdSetScissor)(cmd_buffer_h, 0, 1,
410 (VkRect2D[]) {
411 {
412 .offset = { 0, 0 },
413 .extent = { fb->width, fb->height },
414 }
415 });
416
417 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
418 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
419 (VkDeviceSize[]) { 0 });
420
421 if (cmd_buffer->state.pipeline != pipeline) {
422 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
423 pipeline_h);
424 }
425
426 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
427 }
428
429
430 static void
431 build_depthstencil_shader(struct nir_shader **out_vs)
432 {
433 nir_builder vs_b;
434
435 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
436
437 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs");
438
439 const struct glsl_type *position_type = glsl_vec4_type();
440
441 nir_variable *vs_in_pos =
442 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
443 "a_position");
444 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
445
446 nir_variable *vs_out_pos =
447 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
448 "gl_Position");
449 vs_out_pos->data.location = VARYING_SLOT_POS;
450
451 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
452
453 *out_vs = vs_b.shader;
454 }
455
456 static VkResult
457 create_depthstencil_pipeline(struct anv_device *device,
458 VkImageAspectFlags aspects,
459 uint32_t samples,
460 struct anv_pipeline **pipeline)
461 {
462 struct nir_shader *vs_nir;
463
464 build_depthstencil_shader(&vs_nir);
465
466 const VkPipelineVertexInputStateCreateInfo vi_state = {
467 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
468 .vertexBindingDescriptionCount = 1,
469 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
470 {
471 .binding = 0,
472 .stride = sizeof(struct depthstencil_clear_vattrs),
473 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
474 },
475 },
476 .vertexAttributeDescriptionCount = 2,
477 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
478 {
479 /* VUE Header */
480 .location = 0,
481 .binding = 0,
482 .format = VK_FORMAT_R32G32B32A32_UINT,
483 .offset = offsetof(struct depthstencil_clear_vattrs, vue_header),
484 },
485 {
486 /* Position */
487 .location = 1,
488 .binding = 0,
489 .format = VK_FORMAT_R32G32_SFLOAT,
490 .offset = offsetof(struct depthstencil_clear_vattrs, position),
491 },
492 },
493 };
494
495 const VkPipelineDepthStencilStateCreateInfo ds_state = {
496 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
497 .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
498 .depthCompareOp = VK_COMPARE_OP_ALWAYS,
499 .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
500 .depthBoundsTestEnable = false,
501 .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT),
502 .front = {
503 .passOp = VK_STENCIL_OP_REPLACE,
504 .compareOp = VK_COMPARE_OP_ALWAYS,
505 .writeMask = UINT32_MAX,
506 .reference = 0, /* dynamic */
507 },
508 .back = { 0 /* dont care */ },
509 };
510
511 const VkPipelineColorBlendStateCreateInfo cb_state = {
512 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
513 .logicOpEnable = false,
514 .attachmentCount = 0,
515 .pAttachments = NULL,
516 };
517
518 return create_pipeline(device, samples, vs_nir, NULL, &vi_state, &ds_state,
519 &cb_state, &device->meta_state.alloc,
520 /*use_repclear*/ true, pipeline);
521 }
522
523 static void
524 emit_depthstencil_clear(struct anv_cmd_buffer *cmd_buffer,
525 const VkClearAttachment *clear_att,
526 const VkClearRect *clear_rect)
527 {
528 struct anv_device *device = cmd_buffer->device;
529 struct anv_meta_state *meta_state = &device->meta_state;
530 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
531 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
532 const uint32_t pass_att = subpass->depth_stencil_attachment;
533 const struct anv_image_view *iview = fb->attachments[pass_att];
534 const uint32_t samples = iview->image->samples;
535 const uint32_t samples_log2 = ffs(samples) - 1;
536 VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
537 VkImageAspectFlags aspects = clear_att->aspectMask;
538
539 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
540
541 assert(samples_log2 < ARRAY_SIZE(meta_state->clear));
542 assert(aspects == VK_IMAGE_ASPECT_DEPTH_BIT ||
543 aspects == VK_IMAGE_ASPECT_STENCIL_BIT ||
544 aspects == (VK_IMAGE_ASPECT_DEPTH_BIT |
545 VK_IMAGE_ASPECT_STENCIL_BIT));
546 assert(pass_att != VK_ATTACHMENT_UNUSED);
547
548 const struct depthstencil_clear_vattrs vertex_data[3] = {
549 {
550 .vue_header = { 0 },
551 .position = {
552 clear_rect->rect.offset.x,
553 clear_rect->rect.offset.y,
554 },
555 },
556 {
557 .vue_header = { 0 },
558 .position = {
559 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
560 clear_rect->rect.offset.y,
561 },
562 },
563 {
564 .vue_header = { 0 },
565 .position = {
566 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
567 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
568 },
569 },
570 };
571
572 struct anv_state state =
573 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
574
575 struct anv_buffer vertex_buffer = {
576 .device = device,
577 .size = sizeof(vertex_data),
578 .bo = &device->dynamic_state_block_pool.bo,
579 .offset = state.offset,
580 };
581
582 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
583 (VkViewport[]) {
584 {
585 .x = 0,
586 .y = 0,
587 .width = fb->width,
588 .height = fb->height,
589
590 /* Ignored when clearing only stencil. */
591 .minDepth = clear_value.depth,
592 .maxDepth = clear_value.depth,
593 },
594 });
595
596 ANV_CALL(CmdSetScissor)(cmd_buffer_h, 0, 1,
597 (VkRect2D[]) {
598 {
599 .offset = { 0, 0 },
600 .extent = { fb->width, fb->height },
601 }
602 });
603
604 if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
605 ANV_CALL(CmdSetStencilReference)(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT,
606 clear_value.stencil);
607 }
608
609 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
610 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
611 (VkDeviceSize[]) { 0 });
612
613 struct anv_pipeline *pipeline;
614 switch (aspects) {
615 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
616 pipeline = meta_state->clear[samples_log2].depthstencil_pipeline;
617 break;
618 case VK_IMAGE_ASPECT_DEPTH_BIT:
619 pipeline = meta_state->clear[samples_log2].depth_only_pipeline;
620 break;
621 case VK_IMAGE_ASPECT_STENCIL_BIT:
622 pipeline = meta_state->clear[samples_log2].stencil_only_pipeline;
623 break;
624 default:
625 unreachable("expected depth or stencil aspect");
626 }
627
628 if (cmd_buffer->state.pipeline != pipeline) {
629 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
630 anv_pipeline_to_handle(pipeline));
631 }
632
633 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
634 }
635
636 VkResult
637 anv_device_init_meta_clear_state(struct anv_device *device)
638 {
639 VkResult res;
640 struct anv_meta_state *state = &device->meta_state;
641
642 zero(device->meta_state.clear);
643
644 for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
645 uint32_t samples = 1 << i;
646
647 for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
648 res = create_color_pipeline(device, samples, /* frag_output */ j,
649 &state->clear[i].color_pipelines[j]);
650 if (res != VK_SUCCESS)
651 goto fail;
652 }
653
654 res = create_depthstencil_pipeline(device,
655 VK_IMAGE_ASPECT_DEPTH_BIT, samples,
656 &state->clear[i].depth_only_pipeline);
657 if (res != VK_SUCCESS)
658 goto fail;
659
660 res = create_depthstencil_pipeline(device,
661 VK_IMAGE_ASPECT_STENCIL_BIT, samples,
662 &state->clear[i].stencil_only_pipeline);
663 if (res != VK_SUCCESS)
664 goto fail;
665
666 res = create_depthstencil_pipeline(device,
667 VK_IMAGE_ASPECT_DEPTH_BIT |
668 VK_IMAGE_ASPECT_STENCIL_BIT, samples,
669 &state->clear[i].depthstencil_pipeline);
670 if (res != VK_SUCCESS)
671 goto fail;
672 }
673
674 return VK_SUCCESS;
675
676 fail:
677 anv_device_finish_meta_clear_state(device);
678 return res;
679 }
680
681 /**
682 * The parameters mean that same as those in vkCmdClearAttachments.
683 */
684 static void
685 emit_clear(struct anv_cmd_buffer *cmd_buffer,
686 const VkClearAttachment *clear_att,
687 const VkClearRect *clear_rect)
688 {
689 if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
690 emit_color_clear(cmd_buffer, clear_att, clear_rect);
691 } else {
692 assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
693 VK_IMAGE_ASPECT_STENCIL_BIT));
694 emit_depthstencil_clear(cmd_buffer, clear_att, clear_rect);
695 }
696 }
697
698 static bool
699 subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
700 {
701 const struct anv_cmd_state *cmd_state = &cmd_buffer->state;
702 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
703
704 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
705 uint32_t a = cmd_state->subpass->color_attachments[i];
706 if (cmd_state->attachments[a].pending_clear_aspects) {
707 return true;
708 }
709 }
710
711 if (ds != VK_ATTACHMENT_UNUSED &&
712 cmd_state->attachments[ds].pending_clear_aspects) {
713 return true;
714 }
715
716 return false;
717 }
718
719 /**
720 * Emit any pending attachment clears for the current subpass.
721 *
722 * @see anv_attachment_state::pending_clear_aspects
723 */
724 void
725 anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
726 {
727 struct anv_cmd_state *cmd_state = &cmd_buffer->state;
728 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
729 struct anv_meta_saved_state saved_state;
730
731 if (!subpass_needs_clear(cmd_buffer))
732 return;
733
734 meta_clear_begin(&saved_state, cmd_buffer);
735
736 if (cmd_state->framebuffer->layers > 1)
737 anv_finishme("clearing multi-layer framebuffer");
738
739 VkClearRect clear_rect = {
740 .rect = {
741 .offset = { 0, 0 },
742 .extent = { fb->width, fb->height },
743 },
744 .baseArrayLayer = 0,
745 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
746 };
747
748 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
749 uint32_t a = cmd_state->subpass->color_attachments[i];
750
751 if (!cmd_state->attachments[a].pending_clear_aspects)
752 continue;
753
754 assert(cmd_state->attachments[a].pending_clear_aspects ==
755 VK_IMAGE_ASPECT_COLOR_BIT);
756
757 VkClearAttachment clear_att = {
758 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
759 .colorAttachment = i, /* Use attachment index relative to subpass */
760 .clearValue = cmd_state->attachments[a].clear_value,
761 };
762
763 emit_clear(cmd_buffer, &clear_att, &clear_rect);
764 cmd_state->attachments[a].pending_clear_aspects = 0;
765 }
766
767 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
768
769 if (ds != VK_ATTACHMENT_UNUSED &&
770 cmd_state->attachments[ds].pending_clear_aspects) {
771
772 VkClearAttachment clear_att = {
773 .aspectMask = cmd_state->attachments[ds].pending_clear_aspects,
774 .clearValue = cmd_state->attachments[ds].clear_value,
775 };
776
777 emit_clear(cmd_buffer, &clear_att, &clear_rect);
778 cmd_state->attachments[ds].pending_clear_aspects = 0;
779 }
780
781 meta_clear_end(&saved_state, cmd_buffer);
782 }
783
784 static void
785 anv_cmd_clear_image(struct anv_cmd_buffer *cmd_buffer,
786 struct anv_image *image,
787 VkImageLayout image_layout,
788 const VkClearValue *clear_value,
789 uint32_t range_count,
790 const VkImageSubresourceRange *ranges)
791 {
792 VkDevice device_h = anv_device_to_handle(cmd_buffer->device);
793
794 for (uint32_t r = 0; r < range_count; r++) {
795 const VkImageSubresourceRange *range = &ranges[r];
796
797 for (uint32_t l = 0; l < range->levelCount; ++l) {
798 for (uint32_t s = 0; s < range->layerCount; ++s) {
799 struct anv_image_view iview;
800 anv_image_view_init(&iview, cmd_buffer->device,
801 &(VkImageViewCreateInfo) {
802 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
803 .image = anv_image_to_handle(image),
804 .viewType = anv_meta_get_view_type(image),
805 .format = image->vk_format,
806 .subresourceRange = {
807 .aspectMask = range->aspectMask,
808 .baseMipLevel = range->baseMipLevel + l,
809 .levelCount = 1,
810 .baseArrayLayer = range->baseArrayLayer + s,
811 .layerCount = 1
812 },
813 },
814 cmd_buffer, 0);
815
816 VkFramebuffer fb;
817 anv_CreateFramebuffer(device_h,
818 &(VkFramebufferCreateInfo) {
819 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
820 .attachmentCount = 1,
821 .pAttachments = (VkImageView[]) {
822 anv_image_view_to_handle(&iview),
823 },
824 .width = iview.extent.width,
825 .height = iview.extent.height,
826 .layers = 1
827 },
828 &cmd_buffer->pool->alloc,
829 &fb);
830
831 VkAttachmentDescription att_desc = {
832 .format = iview.vk_format,
833 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
834 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
835 .stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
836 .stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE,
837 .initialLayout = image_layout,
838 .finalLayout = image_layout,
839 };
840
841 VkSubpassDescription subpass_desc = {
842 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
843 .inputAttachmentCount = 0,
844 .colorAttachmentCount = 0,
845 .pColorAttachments = NULL,
846 .pResolveAttachments = NULL,
847 .pDepthStencilAttachment = NULL,
848 .preserveAttachmentCount = 0,
849 .pPreserveAttachments = NULL,
850 };
851
852 const VkAttachmentReference att_ref = {
853 .attachment = 0,
854 .layout = image_layout,
855 };
856
857 if (range->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
858 subpass_desc.colorAttachmentCount = 1;
859 subpass_desc.pColorAttachments = &att_ref;
860 } else {
861 subpass_desc.pDepthStencilAttachment = &att_ref;
862 }
863
864 VkRenderPass pass;
865 anv_CreateRenderPass(device_h,
866 &(VkRenderPassCreateInfo) {
867 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
868 .attachmentCount = 1,
869 .pAttachments = &att_desc,
870 .subpassCount = 1,
871 .pSubpasses = &subpass_desc,
872 },
873 &cmd_buffer->pool->alloc,
874 &pass);
875
876 ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
877 &(VkRenderPassBeginInfo) {
878 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
879 .renderArea = {
880 .offset = { 0, 0, },
881 .extent = {
882 .width = iview.extent.width,
883 .height = iview.extent.height,
884 },
885 },
886 .renderPass = pass,
887 .framebuffer = fb,
888 .clearValueCount = 0,
889 .pClearValues = NULL,
890 },
891 VK_SUBPASS_CONTENTS_INLINE);
892
893 VkClearAttachment clear_att = {
894 .aspectMask = range->aspectMask,
895 .colorAttachment = 0,
896 .clearValue = *clear_value,
897 };
898
899 VkClearRect clear_rect = {
900 .rect = {
901 .offset = { 0, 0 },
902 .extent = { iview.extent.width, iview.extent.height },
903 },
904 .baseArrayLayer = range->baseArrayLayer,
905 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
906 };
907
908 emit_clear(cmd_buffer, &clear_att, &clear_rect);
909
910 ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
911 ANV_CALL(DestroyRenderPass)(device_h, pass,
912 &cmd_buffer->pool->alloc);
913 ANV_CALL(DestroyFramebuffer)(device_h, fb,
914 &cmd_buffer->pool->alloc);
915 }
916 }
917 }
918 }
919
920 void anv_CmdClearColorImage(
921 VkCommandBuffer commandBuffer,
922 VkImage image_h,
923 VkImageLayout imageLayout,
924 const VkClearColorValue* pColor,
925 uint32_t rangeCount,
926 const VkImageSubresourceRange* pRanges)
927 {
928 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
929 ANV_FROM_HANDLE(anv_image, image, image_h);
930 struct anv_meta_saved_state saved_state;
931
932 meta_clear_begin(&saved_state, cmd_buffer);
933
934 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
935 (const VkClearValue *) pColor,
936 rangeCount, pRanges);
937
938 meta_clear_end(&saved_state, cmd_buffer);
939 }
940
941 void anv_CmdClearDepthStencilImage(
942 VkCommandBuffer commandBuffer,
943 VkImage image_h,
944 VkImageLayout imageLayout,
945 const VkClearDepthStencilValue* pDepthStencil,
946 uint32_t rangeCount,
947 const VkImageSubresourceRange* pRanges)
948 {
949 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
950 ANV_FROM_HANDLE(anv_image, image, image_h);
951 struct anv_meta_saved_state saved_state;
952
953 meta_clear_begin(&saved_state, cmd_buffer);
954
955 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
956 (const VkClearValue *) pDepthStencil,
957 rangeCount, pRanges);
958
959 meta_clear_end(&saved_state, cmd_buffer);
960 }
961
962 void anv_CmdClearAttachments(
963 VkCommandBuffer commandBuffer,
964 uint32_t attachmentCount,
965 const VkClearAttachment* pAttachments,
966 uint32_t rectCount,
967 const VkClearRect* pRects)
968 {
969 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
970 struct anv_meta_saved_state saved_state;
971
972 meta_clear_begin(&saved_state, cmd_buffer);
973
974 /* FINISHME: We can do better than this dumb loop. It thrashes too much
975 * state.
976 */
977 for (uint32_t a = 0; a < attachmentCount; ++a) {
978 for (uint32_t r = 0; r < rectCount; ++r) {
979 emit_clear(cmd_buffer, &pAttachments[a], &pRects[r]);
980 }
981 }
982
983 meta_clear_end(&saved_state, cmd_buffer);
984 }
985
986 static void
987 do_buffer_fill(struct anv_cmd_buffer *cmd_buffer,
988 struct anv_bo *dest, uint64_t dest_offset,
989 int width, int height, VkFormat fill_format, uint32_t data)
990 {
991 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
992
993 VkImageCreateInfo image_info = {
994 .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
995 .imageType = VK_IMAGE_TYPE_2D,
996 .format = fill_format,
997 .extent = {
998 .width = width,
999 .height = height,
1000 .depth = 1,
1001 },
1002 .mipLevels = 1,
1003 .arrayLayers = 1,
1004 .samples = 1,
1005 .tiling = VK_IMAGE_TILING_LINEAR,
1006 .usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
1007 .flags = 0,
1008 };
1009
1010 VkImage dest_image;
1011 image_info.usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
1012 anv_CreateImage(vk_device, &image_info,
1013 &cmd_buffer->pool->alloc, &dest_image);
1014
1015 /* We could use a vk call to bind memory, but that would require
1016 * creating a dummy memory object etc. so there's really no point.
1017 */
1018 anv_image_from_handle(dest_image)->bo = dest;
1019 anv_image_from_handle(dest_image)->offset = dest_offset;
1020
1021 const VkClearValue clear_value = {
1022 .color = {
1023 .uint32 = { data, data, data, data }
1024 }
1025 };
1026
1027 const VkImageSubresourceRange range = {
1028 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
1029 .baseMipLevel = 0,
1030 .levelCount = 1,
1031 .baseArrayLayer = 0,
1032 .layerCount = 1,
1033 };
1034
1035 anv_cmd_clear_image(cmd_buffer, anv_image_from_handle(dest_image),
1036 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
1037 &clear_value, 1, &range);
1038 }
1039
1040 void anv_CmdFillBuffer(
1041 VkCommandBuffer commandBuffer,
1042 VkBuffer dstBuffer,
1043 VkDeviceSize dstOffset,
1044 VkDeviceSize fillSize,
1045 uint32_t data)
1046 {
1047 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1048 ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);
1049 struct anv_meta_saved_state saved_state;
1050
1051 meta_clear_begin(&saved_state, cmd_buffer);
1052
1053 VkFormat format;
1054 int bs;
1055 if ((fillSize & 15) == 0 && (dstOffset & 15) == 0) {
1056 format = VK_FORMAT_R32G32B32A32_UINT;
1057 bs = 16;
1058 } else if ((fillSize & 7) == 0 && (dstOffset & 15) == 0) {
1059 format = VK_FORMAT_R32G32_UINT;
1060 bs = 8;
1061 } else {
1062 assert((fillSize & 3) == 0 && (dstOffset & 3) == 0);
1063 format = VK_FORMAT_R32_UINT;
1064 bs = 4;
1065 }
1066
1067 /* This is maximum possible width/height our HW can handle */
1068 const uint64_t max_surface_dim = 1 << 14;
1069
1070 /* First, we make a bunch of max-sized copies */
1071 const uint64_t max_fill_size = max_surface_dim * max_surface_dim * bs;
1072 while (fillSize > max_fill_size) {
1073 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1074 dst_buffer->offset + dstOffset,
1075 max_surface_dim, max_surface_dim, format, data);
1076 fillSize -= max_fill_size;
1077 dstOffset += max_fill_size;
1078 }
1079
1080 uint64_t height = fillSize / (max_surface_dim * bs);
1081 assert(height < max_surface_dim);
1082 if (height != 0) {
1083 const uint64_t rect_fill_size = height * max_surface_dim * bs;
1084 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1085 dst_buffer->offset + dstOffset,
1086 max_surface_dim, height, format, data);
1087 fillSize -= rect_fill_size;
1088 dstOffset += rect_fill_size;
1089 }
1090
1091 if (fillSize != 0) {
1092 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1093 dst_buffer->offset + dstOffset,
1094 fillSize / bs, 1, format, data);
1095 }
1096
1097 meta_clear_end(&saved_state, cmd_buffer);
1098 }