ac369e9f9be2747be6c409bce8f4c875cc86c8b7
[mesa.git] / src / vulkan / anv_meta_clear.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_meta.h"
25 #include "anv_meta_clear.h"
26 #include "anv_private.h"
27 #include "glsl/nir/nir_builder.h"
28
29 /** Vertex attributes for color clears. */
30 struct color_clear_vattrs {
31 struct anv_vue_header vue_header;
32 float position[2]; /**< 3DPRIM_RECTLIST */
33 VkClearColorValue color;
34 };
35
36 /** Vertex attributes for depthstencil clears. */
37 struct depthstencil_clear_vattrs {
38 struct anv_vue_header vue_header;
39 float position[2]; /*<< 3DPRIM_RECTLIST */
40 };
41
42 static void
43 meta_clear_begin(struct anv_meta_saved_state *saved_state,
44 struct anv_cmd_buffer *cmd_buffer)
45 {
46 anv_meta_save(saved_state, cmd_buffer,
47 (1 << VK_DYNAMIC_STATE_VIEWPORT) |
48 (1 << VK_DYNAMIC_STATE_SCISSOR) |
49 (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE));
50
51 cmd_buffer->state.dynamic.viewport.count = 0;
52 cmd_buffer->state.dynamic.scissor.count = 0;
53 }
54
55 static void
56 meta_clear_end(struct anv_meta_saved_state *saved_state,
57 struct anv_cmd_buffer *cmd_buffer)
58 {
59 anv_meta_restore(saved_state, cmd_buffer);
60 }
61
62 static void
63 build_color_shaders(struct nir_shader **out_vs,
64 struct nir_shader **out_fs,
65 uint32_t frag_output)
66 {
67 nir_builder vs_b;
68 nir_builder fs_b;
69
70 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
71 nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
72
73 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs");
74 fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs");
75
76 const struct glsl_type *position_type = glsl_vec4_type();
77 const struct glsl_type *color_type = glsl_vec4_type();
78
79 nir_variable *vs_in_pos =
80 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
81 "a_position");
82 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
83
84 nir_variable *vs_out_pos =
85 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
86 "gl_Position");
87 vs_out_pos->data.location = VARYING_SLOT_POS;
88
89 nir_variable *vs_in_color =
90 nir_variable_create(vs_b.shader, nir_var_shader_in, color_type,
91 "a_color");
92 vs_in_color->data.location = VERT_ATTRIB_GENERIC1;
93
94 nir_variable *vs_out_color =
95 nir_variable_create(vs_b.shader, nir_var_shader_out, color_type,
96 "v_color");
97 vs_out_color->data.location = VARYING_SLOT_VAR0;
98 vs_out_color->data.interpolation = INTERP_QUALIFIER_FLAT;
99
100 nir_variable *fs_in_color =
101 nir_variable_create(fs_b.shader, nir_var_shader_in, color_type,
102 "v_color");
103 fs_in_color->data.location = vs_out_color->data.location;
104 fs_in_color->data.interpolation = vs_out_color->data.interpolation;
105
106 nir_variable *fs_out_color =
107 nir_variable_create(fs_b.shader, nir_var_shader_out, color_type,
108 "f_color");
109 fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output;
110
111 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
112 nir_copy_var(&vs_b, vs_out_color, vs_in_color);
113 nir_copy_var(&fs_b, fs_out_color, fs_in_color);
114
115 *out_vs = vs_b.shader;
116 *out_fs = fs_b.shader;
117 }
118
119 static VkResult
120 create_pipeline(struct anv_device *device,
121 struct nir_shader *vs_nir,
122 struct nir_shader *fs_nir,
123 const VkPipelineVertexInputStateCreateInfo *vi_state,
124 const VkPipelineDepthStencilStateCreateInfo *ds_state,
125 const VkPipelineColorBlendStateCreateInfo *cb_state,
126 const VkAllocationCallbacks *alloc,
127 bool use_repclear,
128 struct anv_pipeline **pipeline)
129 {
130 VkDevice device_h = anv_device_to_handle(device);
131 VkResult result;
132
133 struct anv_shader_module vs_m = { .nir = vs_nir };
134 struct anv_shader_module fs_m = { .nir = fs_nir };
135
136 VkPipeline pipeline_h = VK_NULL_HANDLE;
137 result = anv_graphics_pipeline_create(device_h,
138 VK_NULL_HANDLE,
139 &(VkGraphicsPipelineCreateInfo) {
140 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
141 .stageCount = fs_nir ? 2 : 1,
142 .pStages = (VkPipelineShaderStageCreateInfo[]) {
143 {
144 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
145 .stage = VK_SHADER_STAGE_VERTEX_BIT,
146 .module = anv_shader_module_to_handle(&vs_m),
147 .pName = "main",
148 },
149 {
150 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
151 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
152 .module = anv_shader_module_to_handle(&fs_m),
153 .pName = "main",
154 },
155 },
156 .pVertexInputState = vi_state,
157 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
158 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
159 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
160 .primitiveRestartEnable = false,
161 },
162 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
163 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
164 .viewportCount = 1,
165 .pViewports = NULL, /* dynamic */
166 .scissorCount = 1,
167 .pScissors = NULL, /* dynamic */
168 },
169 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
170 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
171 .rasterizerDiscardEnable = false,
172 .polygonMode = VK_POLYGON_MODE_FILL,
173 .cullMode = VK_CULL_MODE_NONE,
174 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
175 .depthBiasEnable = false,
176 },
177 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
178 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
179 .rasterizationSamples = 1, /* FINISHME: Multisampling */
180 .sampleShadingEnable = false,
181 .pSampleMask = (VkSampleMask[]) { 0x1 },
182 .alphaToCoverageEnable = false,
183 .alphaToOneEnable = false,
184 },
185 .pDepthStencilState = ds_state,
186 .pColorBlendState = cb_state,
187 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
188 /* The meta clear pipeline declares all state as dynamic.
189 * As a consequence, vkCmdBindPipeline writes no dynamic state
190 * to the cmd buffer. Therefore, at the end of the meta clear,
191 * we need only restore dynamic state was vkCmdSet.
192 */
193 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
194 .dynamicStateCount = 9,
195 .pDynamicStates = (VkDynamicState[]) {
196 VK_DYNAMIC_STATE_VIEWPORT,
197 VK_DYNAMIC_STATE_SCISSOR,
198 VK_DYNAMIC_STATE_LINE_WIDTH,
199 VK_DYNAMIC_STATE_DEPTH_BIAS,
200 VK_DYNAMIC_STATE_BLEND_CONSTANTS,
201 VK_DYNAMIC_STATE_DEPTH_BOUNDS,
202 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
203 VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
204 VK_DYNAMIC_STATE_STENCIL_REFERENCE,
205 },
206 },
207 .flags = 0,
208 .renderPass = anv_render_pass_to_handle(&anv_meta_dummy_renderpass),
209 .subpass = 0,
210 },
211 &(struct anv_graphics_pipeline_create_info) {
212 .color_attachment_count = MAX_RTS,
213 .use_repclear = use_repclear,
214 .disable_viewport = true,
215 .disable_vs = true,
216 .use_rectlist = true
217 },
218 alloc,
219 &pipeline_h);
220
221 ralloc_free(vs_nir);
222 ralloc_free(fs_nir);
223
224 *pipeline = anv_pipeline_from_handle(pipeline_h);
225
226 return result;
227 }
228
229 static VkResult
230 create_color_pipeline(struct anv_device *device, uint32_t frag_output,
231 struct anv_pipeline **pipeline)
232 {
233 struct nir_shader *vs_nir;
234 struct nir_shader *fs_nir;
235 build_color_shaders(&vs_nir, &fs_nir, frag_output);
236
237 const VkPipelineVertexInputStateCreateInfo vi_state = {
238 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
239 .vertexBindingDescriptionCount = 1,
240 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
241 {
242 .binding = 0,
243 .stride = sizeof(struct color_clear_vattrs),
244 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
245 },
246 },
247 .vertexAttributeDescriptionCount = 3,
248 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
249 {
250 /* VUE Header */
251 .location = 0,
252 .binding = 0,
253 .format = VK_FORMAT_R32G32B32A32_UINT,
254 .offset = offsetof(struct color_clear_vattrs, vue_header),
255 },
256 {
257 /* Position */
258 .location = 1,
259 .binding = 0,
260 .format = VK_FORMAT_R32G32_SFLOAT,
261 .offset = offsetof(struct color_clear_vattrs, position),
262 },
263 {
264 /* Color */
265 .location = 2,
266 .binding = 0,
267 .format = VK_FORMAT_R32G32B32A32_SFLOAT,
268 .offset = offsetof(struct color_clear_vattrs, color),
269 },
270 },
271 };
272
273 const VkPipelineDepthStencilStateCreateInfo ds_state = {
274 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
275 .depthTestEnable = false,
276 .depthWriteEnable = false,
277 .depthBoundsTestEnable = false,
278 .stencilTestEnable = false,
279 };
280
281 const VkPipelineColorBlendStateCreateInfo cb_state = {
282 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
283 .logicOpEnable = false,
284 .attachmentCount = 1,
285 .pAttachments = (VkPipelineColorBlendAttachmentState []) {
286 {
287 .blendEnable = false,
288 .colorWriteMask = VK_COLOR_COMPONENT_A_BIT |
289 VK_COLOR_COMPONENT_R_BIT |
290 VK_COLOR_COMPONENT_G_BIT |
291 VK_COLOR_COMPONENT_B_BIT,
292 },
293 },
294 };
295
296 /* Disable repclear because we do not want the compiler to replace the
297 * shader. We need the shader to write to the specified color attachment,
298 * but the repclear shader writes to all color attachments.
299 */
300 return
301 create_pipeline(device, vs_nir, fs_nir, &vi_state, &ds_state,
302 &cb_state, &device->meta_state.alloc,
303 /*use_repclear*/ false, pipeline);
304 }
305
306 static void
307 free_color_pipelines(struct anv_device *device)
308 {
309 for (uint32_t i = 0;
310 i < ARRAY_SIZE(device->meta_state.clear.color_pipelines); ++i) {
311 if (device->meta_state.clear.color_pipelines[i] == NULL)
312 continue;
313
314 ANV_CALL(DestroyPipeline)(
315 anv_device_to_handle(device),
316 anv_pipeline_to_handle(device->meta_state.clear.color_pipelines[i]),
317 &device->meta_state.alloc);
318 }
319 }
320
321 static VkResult
322 init_color_pipelines(struct anv_device *device)
323 {
324 VkResult result;
325 struct anv_pipeline **pipelines = device->meta_state.clear.color_pipelines;
326 uint32_t n = ARRAY_SIZE(device->meta_state.clear.color_pipelines);
327
328 zero(device->meta_state.clear.color_pipelines);
329
330 for (uint32_t i = 0; i < n; ++i) {
331 result = create_color_pipeline(device, i, &pipelines[i]);
332 if (result < 0)
333 goto fail;
334 }
335
336 return VK_SUCCESS;
337
338 fail:
339 free_color_pipelines(device);
340
341 return result;
342 }
343
344 static void
345 emit_color_clear(struct anv_cmd_buffer *cmd_buffer,
346 const VkClearAttachment *clear_att,
347 const VkClearRect *clear_rect)
348 {
349 struct anv_device *device = cmd_buffer->device;
350 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
351 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
352 VkClearColorValue clear_value = clear_att->clearValue.color;
353 struct anv_pipeline *pipeline =
354 device->meta_state.clear.color_pipelines[clear_att->colorAttachment];
355
356 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
357 VkPipeline pipeline_h = anv_pipeline_to_handle(pipeline);
358
359 assert(clear_att->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
360 assert(clear_att->colorAttachment < subpass->color_count);
361
362 const struct color_clear_vattrs vertex_data[3] = {
363 {
364 .vue_header = { 0 },
365 .position = {
366 clear_rect->rect.offset.x,
367 clear_rect->rect.offset.y,
368 },
369 .color = clear_value,
370 },
371 {
372 .vue_header = { 0 },
373 .position = {
374 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
375 clear_rect->rect.offset.y,
376 },
377 .color = clear_value,
378 },
379 {
380 .vue_header = { 0 },
381 .position = {
382 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
383 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
384 },
385 .color = clear_value,
386 },
387 };
388
389 struct anv_state state =
390 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
391
392 struct anv_buffer vertex_buffer = {
393 .device = device,
394 .size = sizeof(vertex_data),
395 .bo = &device->dynamic_state_block_pool.bo,
396 .offset = state.offset,
397 };
398
399 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
400 (VkViewport[]) {
401 {
402 .x = 0,
403 .y = 0,
404 .width = fb->width,
405 .height = fb->height,
406 .minDepth = 0.0,
407 .maxDepth = 1.0,
408 },
409 });
410
411 ANV_CALL(CmdSetScissor)(cmd_buffer_h, 0, 1,
412 (VkRect2D[]) {
413 {
414 .offset = { 0, 0 },
415 .extent = { fb->width, fb->height },
416 }
417 });
418
419 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
420 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
421 (VkDeviceSize[]) { 0 });
422
423 if (cmd_buffer->state.pipeline != pipeline) {
424 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
425 pipeline_h);
426 }
427
428 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
429 }
430
431
432 static void
433 build_depthstencil_shader(struct nir_shader **out_vs)
434 {
435 nir_builder vs_b;
436
437 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
438
439 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs");
440
441 const struct glsl_type *position_type = glsl_vec4_type();
442
443 nir_variable *vs_in_pos =
444 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
445 "a_position");
446 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
447
448 nir_variable *vs_out_pos =
449 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
450 "gl_Position");
451 vs_out_pos->data.location = VARYING_SLOT_POS;
452
453 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
454
455 *out_vs = vs_b.shader;
456 }
457
458 static VkResult
459 create_depthstencil_pipeline(struct anv_device *device,
460 VkImageAspectFlags aspects,
461 struct anv_pipeline **pipeline)
462 {
463 struct nir_shader *vs_nir;
464
465 build_depthstencil_shader(&vs_nir);
466
467 const VkPipelineVertexInputStateCreateInfo vi_state = {
468 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
469 .vertexBindingDescriptionCount = 1,
470 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
471 {
472 .binding = 0,
473 .stride = sizeof(struct depthstencil_clear_vattrs),
474 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
475 },
476 },
477 .vertexAttributeDescriptionCount = 2,
478 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
479 {
480 /* VUE Header */
481 .location = 0,
482 .binding = 0,
483 .format = VK_FORMAT_R32G32B32A32_UINT,
484 .offset = offsetof(struct depthstencil_clear_vattrs, vue_header),
485 },
486 {
487 /* Position */
488 .location = 1,
489 .binding = 0,
490 .format = VK_FORMAT_R32G32_SFLOAT,
491 .offset = offsetof(struct depthstencil_clear_vattrs, position),
492 },
493 },
494 };
495
496 const VkPipelineDepthStencilStateCreateInfo ds_state = {
497 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
498 .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
499 .depthCompareOp = VK_COMPARE_OP_ALWAYS,
500 .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
501 .depthBoundsTestEnable = false,
502 .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT),
503 .front = {
504 .passOp = VK_STENCIL_OP_REPLACE,
505 .compareOp = VK_COMPARE_OP_ALWAYS,
506 .writeMask = UINT32_MAX,
507 .reference = 0, /* dynamic */
508 },
509 .back = { 0 /* dont care */ },
510 };
511
512 const VkPipelineColorBlendStateCreateInfo cb_state = {
513 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
514 .logicOpEnable = false,
515 .attachmentCount = 0,
516 .pAttachments = NULL,
517 };
518
519 return create_pipeline(device, vs_nir, NULL, &vi_state, &ds_state,
520 &cb_state, &device->meta_state.alloc,
521 /*use_repclear*/ true, pipeline);
522 }
523
524 static void
525 emit_depthstencil_clear(struct anv_cmd_buffer *cmd_buffer,
526 const VkClearAttachment *clear_att,
527 const VkClearRect *clear_rect)
528 {
529 struct anv_device *device = cmd_buffer->device;
530 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
531 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
532 uint32_t attachment = subpass->depth_stencil_attachment;
533 VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
534 VkImageAspectFlags aspects = clear_att->aspectMask;
535
536 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
537
538 assert(aspects == VK_IMAGE_ASPECT_DEPTH_BIT ||
539 aspects == VK_IMAGE_ASPECT_STENCIL_BIT ||
540 aspects == (VK_IMAGE_ASPECT_DEPTH_BIT |
541 VK_IMAGE_ASPECT_STENCIL_BIT));
542 assert(attachment != VK_ATTACHMENT_UNUSED);
543
544 const struct depthstencil_clear_vattrs vertex_data[3] = {
545 {
546 .vue_header = { 0 },
547 .position = {
548 clear_rect->rect.offset.x,
549 clear_rect->rect.offset.y,
550 },
551 },
552 {
553 .vue_header = { 0 },
554 .position = {
555 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
556 clear_rect->rect.offset.y,
557 },
558 },
559 {
560 .vue_header = { 0 },
561 .position = {
562 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
563 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
564 },
565 },
566 };
567
568 struct anv_state state =
569 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
570
571 struct anv_buffer vertex_buffer = {
572 .device = device,
573 .size = sizeof(vertex_data),
574 .bo = &device->dynamic_state_block_pool.bo,
575 .offset = state.offset,
576 };
577
578 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
579 (VkViewport[]) {
580 {
581 .x = 0,
582 .y = 0,
583 .width = fb->width,
584 .height = fb->height,
585
586 /* Ignored when clearing only stencil. */
587 .minDepth = clear_value.depth,
588 .maxDepth = clear_value.depth,
589 },
590 });
591
592 ANV_CALL(CmdSetScissor)(cmd_buffer_h, 0, 1,
593 (VkRect2D[]) {
594 {
595 .offset = { 0, 0 },
596 .extent = { fb->width, fb->height },
597 }
598 });
599
600 if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
601 ANV_CALL(CmdSetStencilReference)(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT,
602 clear_value.stencil);
603 }
604
605 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
606 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
607 (VkDeviceSize[]) { 0 });
608
609 struct anv_pipeline *pipeline;
610 switch (aspects) {
611 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
612 pipeline = device->meta_state.clear.depthstencil_pipeline;
613 break;
614 case VK_IMAGE_ASPECT_DEPTH_BIT:
615 pipeline = device->meta_state.clear.depth_only_pipeline;
616 break;
617 case VK_IMAGE_ASPECT_STENCIL_BIT:
618 pipeline = device->meta_state.clear.stencil_only_pipeline;
619 break;
620 default:
621 unreachable("expected depth or stencil aspect");
622 }
623
624 if (cmd_buffer->state.pipeline != pipeline) {
625 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
626 anv_pipeline_to_handle(pipeline));
627 }
628
629 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
630 }
631
632 static VkResult
633 init_depthstencil_pipelines(struct anv_device *device)
634 {
635 VkResult result;
636 struct anv_meta_state *state = &device->meta_state;
637
638 result =
639 create_depthstencil_pipeline(device, VK_IMAGE_ASPECT_DEPTH_BIT,
640 &state->clear.depth_only_pipeline);
641 if (result != VK_SUCCESS)
642 goto fail;
643
644 result =
645 create_depthstencil_pipeline(device, VK_IMAGE_ASPECT_STENCIL_BIT,
646 &state->clear.stencil_only_pipeline);
647 if (result != VK_SUCCESS)
648 goto fail_depth_only;
649
650 result =
651 create_depthstencil_pipeline(device,
652 VK_IMAGE_ASPECT_DEPTH_BIT |
653 VK_IMAGE_ASPECT_STENCIL_BIT,
654 &state->clear.depthstencil_pipeline);
655 if (result != VK_SUCCESS)
656 goto fail_stencil_only;
657
658 return result;
659
660 fail_stencil_only:
661 anv_DestroyPipeline(anv_device_to_handle(device),
662 anv_pipeline_to_handle(state->clear.stencil_only_pipeline),
663 NULL);
664 fail_depth_only:
665 anv_DestroyPipeline(anv_device_to_handle(device),
666 anv_pipeline_to_handle(state->clear.depth_only_pipeline),
667 NULL);
668 fail:
669 return result;
670 }
671
672 VkResult
673 anv_device_init_meta_clear_state(struct anv_device *device)
674 {
675 VkResult result;
676
677 result = init_color_pipelines(device);
678 if (result != VK_SUCCESS)
679 return result;
680
681 result = init_depthstencil_pipelines(device);
682 if (result != VK_SUCCESS) {
683 free_color_pipelines(device);
684 return result;
685 }
686
687 return VK_SUCCESS;
688 }
689
690 void
691 anv_device_finish_meta_clear_state(struct anv_device *device)
692 {
693 VkDevice device_h = anv_device_to_handle(device);
694
695 free_color_pipelines(device);
696
697 ANV_CALL(DestroyPipeline)(device_h,
698 anv_pipeline_to_handle(device->meta_state.clear.depth_only_pipeline),
699 NULL);
700 ANV_CALL(DestroyPipeline)(device_h,
701 anv_pipeline_to_handle(device->meta_state.clear.stencil_only_pipeline),
702 NULL);
703 ANV_CALL(DestroyPipeline)(device_h,
704 anv_pipeline_to_handle(device->meta_state.clear.depthstencil_pipeline),
705 NULL);
706 }
707
708 /**
709 * The parameters mean that same as those in vkCmdClearAttachments.
710 */
711 static void
712 emit_clear(struct anv_cmd_buffer *cmd_buffer,
713 const VkClearAttachment *clear_att,
714 const VkClearRect *clear_rect)
715 {
716 if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
717 emit_color_clear(cmd_buffer, clear_att, clear_rect);
718 } else {
719 assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
720 VK_IMAGE_ASPECT_STENCIL_BIT));
721 emit_depthstencil_clear(cmd_buffer, clear_att, clear_rect);
722 }
723 }
724
725 static bool
726 subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
727 {
728 const struct anv_cmd_state *cmd_state = &cmd_buffer->state;
729 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
730
731 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
732 uint32_t a = cmd_state->subpass->color_attachments[i];
733 if (cmd_state->attachments[a].pending_clear_aspects) {
734 return true;
735 }
736 }
737
738 if (ds != VK_ATTACHMENT_UNUSED &&
739 cmd_state->attachments[ds].pending_clear_aspects) {
740 return true;
741 }
742
743 return false;
744 }
745
746 /**
747 * Emit any pending attachment clears for the current subpass.
748 *
749 * @see anv_attachment_state::pending_clear_aspects
750 */
751 void
752 anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
753 {
754 struct anv_cmd_state *cmd_state = &cmd_buffer->state;
755 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
756 struct anv_meta_saved_state saved_state;
757
758 if (!subpass_needs_clear(cmd_buffer))
759 return;
760
761 meta_clear_begin(&saved_state, cmd_buffer);
762
763 if (cmd_state->framebuffer->layers > 1)
764 anv_finishme("clearing multi-layer framebuffer");
765
766 VkClearRect clear_rect = {
767 .rect = {
768 .offset = { 0, 0 },
769 .extent = { fb->width, fb->height },
770 },
771 .baseArrayLayer = 0,
772 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
773 };
774
775 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
776 uint32_t a = cmd_state->subpass->color_attachments[i];
777
778 if (!cmd_state->attachments[a].pending_clear_aspects)
779 continue;
780
781 assert(cmd_state->attachments[a].pending_clear_aspects ==
782 VK_IMAGE_ASPECT_COLOR_BIT);
783
784 VkClearAttachment clear_att = {
785 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
786 .colorAttachment = i, /* Use attachment index relative to subpass */
787 .clearValue = cmd_state->attachments[a].clear_value,
788 };
789
790 emit_clear(cmd_buffer, &clear_att, &clear_rect);
791 cmd_state->attachments[a].pending_clear_aspects = 0;
792 }
793
794 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
795
796 if (ds != VK_ATTACHMENT_UNUSED &&
797 cmd_state->attachments[ds].pending_clear_aspects) {
798
799 VkClearAttachment clear_att = {
800 .aspectMask = cmd_state->attachments[ds].pending_clear_aspects,
801 .clearValue = cmd_state->attachments[ds].clear_value,
802 };
803
804 emit_clear(cmd_buffer, &clear_att, &clear_rect);
805 cmd_state->attachments[ds].pending_clear_aspects = 0;
806 }
807
808 meta_clear_end(&saved_state, cmd_buffer);
809 }
810
811 static void
812 anv_cmd_clear_image(struct anv_cmd_buffer *cmd_buffer,
813 struct anv_image *image,
814 VkImageLayout image_layout,
815 const VkClearValue *clear_value,
816 uint32_t range_count,
817 const VkImageSubresourceRange *ranges)
818 {
819 VkDevice device_h = anv_device_to_handle(cmd_buffer->device);
820
821 for (uint32_t r = 0; r < range_count; r++) {
822 const VkImageSubresourceRange *range = &ranges[r];
823
824 for (uint32_t l = 0; l < range->levelCount; ++l) {
825 for (uint32_t s = 0; s < range->layerCount; ++s) {
826 struct anv_image_view iview;
827 anv_image_view_init(&iview, cmd_buffer->device,
828 &(VkImageViewCreateInfo) {
829 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
830 .image = anv_image_to_handle(image),
831 .viewType = anv_meta_get_view_type(image),
832 .format = image->vk_format,
833 .subresourceRange = {
834 .aspectMask = range->aspectMask,
835 .baseMipLevel = range->baseMipLevel + l,
836 .levelCount = 1,
837 .baseArrayLayer = range->baseArrayLayer + s,
838 .layerCount = 1
839 },
840 },
841 cmd_buffer);
842
843 VkFramebuffer fb;
844 anv_CreateFramebuffer(device_h,
845 &(VkFramebufferCreateInfo) {
846 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
847 .attachmentCount = 1,
848 .pAttachments = (VkImageView[]) {
849 anv_image_view_to_handle(&iview),
850 },
851 .width = iview.extent.width,
852 .height = iview.extent.height,
853 .layers = 1
854 },
855 &cmd_buffer->pool->alloc,
856 &fb);
857
858 VkAttachmentDescription att_desc = {
859 .format = iview.vk_format,
860 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
861 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
862 .stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
863 .stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE,
864 .initialLayout = image_layout,
865 .finalLayout = image_layout,
866 };
867
868 VkSubpassDescription subpass_desc = {
869 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
870 .inputAttachmentCount = 0,
871 .colorAttachmentCount = 0,
872 .pColorAttachments = NULL,
873 .pResolveAttachments = NULL,
874 .pDepthStencilAttachment = NULL,
875 .preserveAttachmentCount = 0,
876 .pPreserveAttachments = NULL,
877 };
878
879 const VkAttachmentReference att_ref = {
880 .attachment = 0,
881 .layout = image_layout,
882 };
883
884 if (range->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
885 subpass_desc.colorAttachmentCount = 1;
886 subpass_desc.pColorAttachments = &att_ref;
887 } else {
888 subpass_desc.pDepthStencilAttachment = &att_ref;
889 }
890
891 VkRenderPass pass;
892 anv_CreateRenderPass(device_h,
893 &(VkRenderPassCreateInfo) {
894 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
895 .attachmentCount = 1,
896 .pAttachments = &att_desc,
897 .subpassCount = 1,
898 .pSubpasses = &subpass_desc,
899 },
900 &cmd_buffer->pool->alloc,
901 &pass);
902
903 ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
904 &(VkRenderPassBeginInfo) {
905 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
906 .renderArea = {
907 .offset = { 0, 0, },
908 .extent = {
909 .width = iview.extent.width,
910 .height = iview.extent.height,
911 },
912 },
913 .renderPass = pass,
914 .framebuffer = fb,
915 .clearValueCount = 0,
916 .pClearValues = NULL,
917 },
918 VK_SUBPASS_CONTENTS_INLINE);
919
920 VkClearAttachment clear_att = {
921 .aspectMask = range->aspectMask,
922 .colorAttachment = 0,
923 .clearValue = *clear_value,
924 };
925
926 VkClearRect clear_rect = {
927 .rect = {
928 .offset = { 0, 0 },
929 .extent = { iview.extent.width, iview.extent.height },
930 },
931 .baseArrayLayer = range->baseArrayLayer,
932 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
933 };
934
935 emit_clear(cmd_buffer, &clear_att, &clear_rect);
936
937 ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
938 ANV_CALL(DestroyRenderPass)(device_h, pass,
939 &cmd_buffer->pool->alloc);
940 ANV_CALL(DestroyFramebuffer)(device_h, fb,
941 &cmd_buffer->pool->alloc);
942 }
943 }
944 }
945 }
946
947 void anv_CmdClearColorImage(
948 VkCommandBuffer commandBuffer,
949 VkImage image_h,
950 VkImageLayout imageLayout,
951 const VkClearColorValue* pColor,
952 uint32_t rangeCount,
953 const VkImageSubresourceRange* pRanges)
954 {
955 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
956 ANV_FROM_HANDLE(anv_image, image, image_h);
957 struct anv_meta_saved_state saved_state;
958
959 meta_clear_begin(&saved_state, cmd_buffer);
960
961 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
962 (const VkClearValue *) pColor,
963 rangeCount, pRanges);
964
965 meta_clear_end(&saved_state, cmd_buffer);
966 }
967
968 void anv_CmdClearDepthStencilImage(
969 VkCommandBuffer commandBuffer,
970 VkImage image_h,
971 VkImageLayout imageLayout,
972 const VkClearDepthStencilValue* pDepthStencil,
973 uint32_t rangeCount,
974 const VkImageSubresourceRange* pRanges)
975 {
976 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
977 ANV_FROM_HANDLE(anv_image, image, image_h);
978 struct anv_meta_saved_state saved_state;
979
980 meta_clear_begin(&saved_state, cmd_buffer);
981
982 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
983 (const VkClearValue *) pDepthStencil,
984 rangeCount, pRanges);
985
986 meta_clear_end(&saved_state, cmd_buffer);
987 }
988
989 void anv_CmdClearAttachments(
990 VkCommandBuffer commandBuffer,
991 uint32_t attachmentCount,
992 const VkClearAttachment* pAttachments,
993 uint32_t rectCount,
994 const VkClearRect* pRects)
995 {
996 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
997 struct anv_meta_saved_state saved_state;
998
999 meta_clear_begin(&saved_state, cmd_buffer);
1000
1001 /* FINISHME: We can do better than this dumb loop. It thrashes too much
1002 * state.
1003 */
1004 for (uint32_t a = 0; a < attachmentCount; ++a) {
1005 for (uint32_t r = 0; r < rectCount; ++r) {
1006 emit_clear(cmd_buffer, &pAttachments[a], &pRects[r]);
1007 }
1008 }
1009
1010 meta_clear_end(&saved_state, cmd_buffer);
1011 }
1012
1013 static void
1014 do_buffer_fill(struct anv_cmd_buffer *cmd_buffer,
1015 struct anv_bo *dest, uint64_t dest_offset,
1016 int width, int height, VkFormat fill_format, uint32_t data)
1017 {
1018 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
1019
1020 VkImageCreateInfo image_info = {
1021 .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
1022 .imageType = VK_IMAGE_TYPE_2D,
1023 .format = fill_format,
1024 .extent = {
1025 .width = width,
1026 .height = height,
1027 .depth = 1,
1028 },
1029 .mipLevels = 1,
1030 .arrayLayers = 1,
1031 .samples = 1,
1032 .tiling = VK_IMAGE_TILING_LINEAR,
1033 .usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
1034 .flags = 0,
1035 };
1036
1037 VkImage dest_image;
1038 image_info.usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
1039 anv_CreateImage(vk_device, &image_info,
1040 &cmd_buffer->pool->alloc, &dest_image);
1041
1042 /* We could use a vk call to bind memory, but that would require
1043 * creating a dummy memory object etc. so there's really no point.
1044 */
1045 anv_image_from_handle(dest_image)->bo = dest;
1046 anv_image_from_handle(dest_image)->offset = dest_offset;
1047
1048 const VkClearValue clear_value = {
1049 .color = {
1050 .uint32 = { data, data, data, data }
1051 }
1052 };
1053
1054 const VkImageSubresourceRange range = {
1055 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
1056 .baseMipLevel = 0,
1057 .levelCount = 1,
1058 .baseArrayLayer = 0,
1059 .layerCount = 1,
1060 };
1061
1062 anv_cmd_clear_image(cmd_buffer, anv_image_from_handle(dest_image),
1063 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
1064 &clear_value, 1, &range);
1065 }
1066
1067 void anv_CmdFillBuffer(
1068 VkCommandBuffer commandBuffer,
1069 VkBuffer dstBuffer,
1070 VkDeviceSize dstOffset,
1071 VkDeviceSize fillSize,
1072 uint32_t data)
1073 {
1074 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1075 ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);
1076 struct anv_meta_saved_state saved_state;
1077
1078 meta_clear_begin(&saved_state, cmd_buffer);
1079
1080 VkFormat format;
1081 int bs;
1082 if ((fillSize & 15) == 0 && (dstOffset & 15) == 0) {
1083 format = VK_FORMAT_R32G32B32A32_UINT;
1084 bs = 16;
1085 } else if ((fillSize & 7) == 0 && (dstOffset & 15) == 0) {
1086 format = VK_FORMAT_R32G32_UINT;
1087 bs = 8;
1088 } else {
1089 assert((fillSize & 3) == 0 && (dstOffset & 3) == 0);
1090 format = VK_FORMAT_R32_UINT;
1091 bs = 4;
1092 }
1093
1094 /* This is maximum possible width/height our HW can handle */
1095 const uint64_t max_surface_dim = 1 << 14;
1096
1097 /* First, we make a bunch of max-sized copies */
1098 const uint64_t max_fill_size = max_surface_dim * max_surface_dim * bs;
1099 while (fillSize > max_fill_size) {
1100 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1101 dst_buffer->offset + dstOffset,
1102 max_surface_dim, max_surface_dim, format, data);
1103 fillSize -= max_fill_size;
1104 dstOffset += max_fill_size;
1105 }
1106
1107 uint64_t height = fillSize / (max_surface_dim * bs);
1108 assert(height < max_surface_dim);
1109 if (height != 0) {
1110 const uint64_t rect_fill_size = height * max_surface_dim * bs;
1111 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1112 dst_buffer->offset + dstOffset,
1113 max_surface_dim, height, format, data);
1114 fillSize -= rect_fill_size;
1115 dstOffset += rect_fill_size;
1116 }
1117
1118 if (fillSize != 0) {
1119 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1120 dst_buffer->offset + dstOffset,
1121 fillSize / bs, 1, format, data);
1122 }
1123
1124 meta_clear_end(&saved_state, cmd_buffer);
1125 }