0d1998d659ca30b48652a6a541c055fe1a7af080
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <i915_drm.h>
32
33 #ifdef HAVE_VALGRIND
34 #include <valgrind.h>
35 #include <memcheck.h>
36 #define VG(x) x
37 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
38 #else
39 #define VG(x)
40 #endif
41
42 #include "brw_device_info.h"
43 #include "util/macros.h"
44 #include "util/list.h"
45
46 #define VK_PROTOTYPES
47 #include <vulkan/vulkan.h>
48 #include <vulkan/vulkan_intel.h>
49 #include <vulkan/vk_wsi_swapchain.h>
50 #include <vulkan/vk_wsi_device_swapchain.h>
51
52 #include "anv_entrypoints.h"
53
54 #include "brw_context.h"
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define ICD_LOADER_MAGIC 0x01CDC0DE
61
62 typedef union _VK_LOADER_DATA {
63 uintptr_t loaderMagic;
64 void *loaderData;
65 } VK_LOADER_DATA;
66
67 #define anv_noreturn __attribute__((__noreturn__))
68 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
69
70 #define MIN(a, b) ((a) < (b) ? (a) : (b))
71 #define MAX(a, b) ((a) > (b) ? (a) : (b))
72
73 static inline uint32_t
74 align_u32(uint32_t v, uint32_t a)
75 {
76 return (v + a - 1) & ~(a - 1);
77 }
78
79 static inline int32_t
80 align_i32(int32_t v, int32_t a)
81 {
82 return (v + a - 1) & ~(a - 1);
83 }
84
85 /** Alignment must be a power of 2. */
86 static inline bool
87 anv_is_aligned(uintmax_t n, uintmax_t a)
88 {
89 assert(a == (a & -a));
90 return (n & (a - 1)) == 0;
91 }
92
93 static inline uint32_t
94 anv_minify(uint32_t n, uint32_t levels)
95 {
96 if (unlikely(n == 0))
97 return 0;
98 else
99 return MAX(n >> levels, 1);
100 }
101
102 static inline bool
103 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
104 {
105 if (*inout_mask & clear_mask) {
106 *inout_mask &= ~clear_mask;
107 return true;
108 } else {
109 return false;
110 }
111 }
112
113 #define for_each_bit(b, dword) \
114 for (uint32_t __dword = (dword); \
115 (b) = __builtin_ffs(__dword) - 1, __dword; \
116 __dword &= ~(1 << (b)))
117
118 #define typed_memcpy(dest, src, count) ({ \
119 static_assert(sizeof(*src) == sizeof(*dest), ""); \
120 memcpy((dest), (src), (count) * sizeof(*(src))); \
121 })
122
123 /* Define no kernel as 1, since that's an illegal offset for a kernel */
124 #define NO_KERNEL 1
125
126 struct anv_common {
127 VkStructureType sType;
128 const void* pNext;
129 };
130
131 /* Whenever we generate an error, pass it through this function. Useful for
132 * debugging, where we can break on it. Only call at error site, not when
133 * propagating errors. Might be useful to plug in a stack trace here.
134 */
135
136 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
137
138 #ifdef DEBUG
139 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
140 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
141 #else
142 #define vk_error(error) error
143 #define vk_errorf(error, format, ...) error
144 #endif
145
146 void __anv_finishme(const char *file, int line, const char *format, ...)
147 anv_printflike(3, 4);
148 void anv_loge(const char *format, ...) anv_printflike(1, 2);
149 void anv_loge_v(const char *format, va_list va);
150
151 /**
152 * Print a FINISHME message, including its source location.
153 */
154 #define anv_finishme(format, ...) \
155 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
156
157 /* A non-fatal assert. Useful for debugging. */
158 #ifdef DEBUG
159 #define anv_assert(x) ({ \
160 if (unlikely(!(x))) \
161 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
162 })
163 #else
164 #define anv_assert(x)
165 #endif
166
167 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
168 void anv_abortfv(const char *format, va_list va) anv_noreturn;
169
170 #define stub_return(v) \
171 do { \
172 anv_finishme("stub %s", __func__); \
173 return (v); \
174 } while (0)
175
176 #define stub() \
177 do { \
178 anv_finishme("stub %s", __func__); \
179 return; \
180 } while (0)
181
182 /**
183 * A dynamically growable, circular buffer. Elements are added at head and
184 * removed from tail. head and tail are free-running uint32_t indices and we
185 * only compute the modulo with size when accessing the array. This way,
186 * number of bytes in the queue is always head - tail, even in case of
187 * wraparound.
188 */
189
190 struct anv_vector {
191 uint32_t head;
192 uint32_t tail;
193 uint32_t element_size;
194 uint32_t size;
195 void *data;
196 };
197
198 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
199 void *anv_vector_add(struct anv_vector *queue);
200 void *anv_vector_remove(struct anv_vector *queue);
201
202 static inline int
203 anv_vector_length(struct anv_vector *queue)
204 {
205 return (queue->head - queue->tail) / queue->element_size;
206 }
207
208 static inline void *
209 anv_vector_head(struct anv_vector *vector)
210 {
211 assert(vector->tail < vector->head);
212 return (void *)((char *)vector->data +
213 ((vector->head - vector->element_size) &
214 (vector->size - 1)));
215 }
216
217 static inline void *
218 anv_vector_tail(struct anv_vector *vector)
219 {
220 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
221 }
222
223 static inline void
224 anv_vector_finish(struct anv_vector *queue)
225 {
226 free(queue->data);
227 }
228
229 #define anv_vector_foreach(elem, queue) \
230 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
231 for (uint32_t __anv_vector_offset = (queue)->tail; \
232 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
233 __anv_vector_offset += (queue)->element_size)
234
235 struct anv_bo {
236 int gem_handle;
237
238 /* Index into the current validation list. This is used by the
239 * validation list building alrogithm to track which buffers are already
240 * in the validation list so that we can ensure uniqueness.
241 */
242 uint32_t index;
243
244 /* Last known offset. This value is provided by the kernel when we
245 * execbuf and is used as the presumed offset for the next bunch of
246 * relocations.
247 */
248 uint64_t offset;
249
250 uint64_t size;
251 void *map;
252 };
253
254 /* Represents a lock-free linked list of "free" things. This is used by
255 * both the block pool and the state pools. Unfortunately, in order to
256 * solve the ABA problem, we can't use a single uint32_t head.
257 */
258 union anv_free_list {
259 struct {
260 int32_t offset;
261
262 /* A simple count that is incremented every time the head changes. */
263 uint32_t count;
264 };
265 uint64_t u64;
266 };
267
268 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
269
270 struct anv_block_state {
271 union {
272 struct {
273 uint32_t next;
274 uint32_t end;
275 };
276 uint64_t u64;
277 };
278 };
279
280 struct anv_block_pool {
281 struct anv_device *device;
282
283 struct anv_bo bo;
284
285 /* The offset from the start of the bo to the "center" of the block
286 * pool. Pointers to allocated blocks are given by
287 * bo.map + center_bo_offset + offsets.
288 */
289 uint32_t center_bo_offset;
290
291 /* Current memory map of the block pool. This pointer may or may not
292 * point to the actual beginning of the block pool memory. If
293 * anv_block_pool_alloc_back has ever been called, then this pointer
294 * will point to the "center" position of the buffer and all offsets
295 * (negative or positive) given out by the block pool alloc functions
296 * will be valid relative to this pointer.
297 *
298 * In particular, map == bo.map + center_offset
299 */
300 void *map;
301 int fd;
302
303 /**
304 * Array of mmaps and gem handles owned by the block pool, reclaimed when
305 * the block pool is destroyed.
306 */
307 struct anv_vector mmap_cleanups;
308
309 uint32_t block_size;
310
311 union anv_free_list free_list;
312 struct anv_block_state state;
313
314 union anv_free_list back_free_list;
315 struct anv_block_state back_state;
316 };
317
318 /* Block pools are backed by a fixed-size 2GB memfd */
319 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
320
321 /* The center of the block pool is also the middle of the memfd. This may
322 * change in the future if we decide differently for some reason.
323 */
324 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
325
326 static inline uint32_t
327 anv_block_pool_size(struct anv_block_pool *pool)
328 {
329 return pool->state.end + pool->back_state.end;
330 }
331
332 struct anv_state {
333 int32_t offset;
334 uint32_t alloc_size;
335 void *map;
336 };
337
338 struct anv_fixed_size_state_pool {
339 size_t state_size;
340 union anv_free_list free_list;
341 struct anv_block_state block;
342 };
343
344 #define ANV_MIN_STATE_SIZE_LOG2 6
345 #define ANV_MAX_STATE_SIZE_LOG2 10
346
347 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
348
349 struct anv_state_pool {
350 struct anv_block_pool *block_pool;
351 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
352 };
353
354 struct anv_state_stream {
355 struct anv_block_pool *block_pool;
356 uint32_t next;
357 uint32_t current_block;
358 uint32_t end;
359 };
360
361 void anv_block_pool_init(struct anv_block_pool *pool,
362 struct anv_device *device, uint32_t block_size);
363 void anv_block_pool_finish(struct anv_block_pool *pool);
364 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
365 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
366 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
367 void anv_state_pool_init(struct anv_state_pool *pool,
368 struct anv_block_pool *block_pool);
369 void anv_state_pool_finish(struct anv_state_pool *pool);
370 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
371 size_t state_size, size_t alignment);
372 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
373 void anv_state_stream_init(struct anv_state_stream *stream,
374 struct anv_block_pool *block_pool);
375 void anv_state_stream_finish(struct anv_state_stream *stream);
376 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
377 uint32_t size, uint32_t alignment);
378
379 /**
380 * Implements a pool of re-usable BOs. The interface is identical to that
381 * of block_pool except that each block is its own BO.
382 */
383 struct anv_bo_pool {
384 struct anv_device *device;
385
386 uint32_t bo_size;
387
388 void *free_list;
389 };
390
391 void anv_bo_pool_init(struct anv_bo_pool *pool,
392 struct anv_device *device, uint32_t block_size);
393 void anv_bo_pool_finish(struct anv_bo_pool *pool);
394 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
395 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
396
397
398 void *anv_resolve_entrypoint(uint32_t index);
399
400 extern struct anv_dispatch_table dtable;
401
402 #define ANV_CALL(func) ({ \
403 if (dtable.func == NULL) { \
404 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
405 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
406 } \
407 dtable.func; \
408 })
409
410
411 struct anv_physical_device {
412 VK_LOADER_DATA _loader_data;
413
414 struct anv_instance * instance;
415 uint32_t chipset_id;
416 const char * path;
417 const char * name;
418 const struct brw_device_info * info;
419 uint64_t aperture_size;
420 };
421
422 struct anv_instance {
423 VK_LOADER_DATA _loader_data;
424
425 void * pAllocUserData;
426 PFN_vkAllocFunction pfnAlloc;
427 PFN_vkFreeFunction pfnFree;
428 uint32_t apiVersion;
429 uint32_t physicalDeviceCount;
430 struct anv_physical_device physicalDevice;
431
432 struct anv_wsi_implementation * wsi_impl[VK_PLATFORM_NUM_WSI];
433 };
434
435 VkResult anv_init_wsi(struct anv_instance *instance);
436 void anv_finish_wsi(struct anv_instance *instance);
437
438 struct anv_meta_state {
439 struct {
440 VkPipeline pipeline;
441 } clear;
442
443 struct {
444 /** Pipeline that blits from a 2D image. */
445 VkPipeline pipeline_2d_src;
446
447 /** Pipeline that blits from a 3D image. */
448 VkPipeline pipeline_3d_src;
449
450 VkPipelineLayout pipeline_layout;
451 VkDescriptorSetLayout ds_layout;
452 } blit;
453 };
454
455 struct anv_queue {
456 VK_LOADER_DATA _loader_data;
457
458 struct anv_device * device;
459
460 struct anv_state_pool * pool;
461
462 /**
463 * Serial number of the most recently completed batch executed on the
464 * engine.
465 */
466 struct anv_state completed_serial;
467
468 /**
469 * The next batch submitted to the engine will be assigned this serial
470 * number.
471 */
472 uint32_t next_serial;
473
474 uint32_t last_collected_serial;
475 };
476
477 struct anv_device {
478 VK_LOADER_DATA _loader_data;
479
480 struct anv_instance * instance;
481 uint32_t chipset_id;
482 struct brw_device_info info;
483 int context_id;
484 int fd;
485
486 struct anv_bo_pool batch_bo_pool;
487
488 struct anv_block_pool dynamic_state_block_pool;
489 struct anv_state_pool dynamic_state_pool;
490
491 struct anv_block_pool instruction_block_pool;
492 struct anv_block_pool surface_state_block_pool;
493 struct anv_state_pool surface_state_pool;
494
495 struct anv_meta_state meta_state;
496
497 struct anv_state border_colors;
498
499 struct anv_queue queue;
500
501 struct anv_block_pool scratch_block_pool;
502
503 struct anv_compiler * compiler;
504 pthread_mutex_t mutex;
505 };
506
507 void *
508 anv_instance_alloc(struct anv_instance * instance,
509 size_t size,
510 size_t alignment,
511 VkSystemAllocType allocType);
512
513 void
514 anv_instance_free(struct anv_instance * instance,
515 void * mem);
516
517 void *
518 anv_device_alloc(struct anv_device * device,
519 size_t size,
520 size_t alignment,
521 VkSystemAllocType allocType);
522
523 void
524 anv_device_free(struct anv_device * device,
525 void * mem);
526
527 void* anv_gem_mmap(struct anv_device *device,
528 uint32_t gem_handle, uint64_t offset, uint64_t size);
529 void anv_gem_munmap(void *p, uint64_t size);
530 uint32_t anv_gem_create(struct anv_device *device, size_t size);
531 void anv_gem_close(struct anv_device *device, int gem_handle);
532 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
533 int anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns);
534 int anv_gem_execbuffer(struct anv_device *device,
535 struct drm_i915_gem_execbuffer2 *execbuf);
536 int anv_gem_set_tiling(struct anv_device *device, int gem_handle,
537 uint32_t stride, uint32_t tiling);
538 int anv_gem_create_context(struct anv_device *device);
539 int anv_gem_destroy_context(struct anv_device *device, int context);
540 int anv_gem_get_param(int fd, uint32_t param);
541 int anv_gem_get_aperture(int fd, uint64_t *size);
542 int anv_gem_handle_to_fd(struct anv_device *device, int gem_handle);
543 int anv_gem_fd_to_handle(struct anv_device *device, int fd);
544 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
545
546 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
547
548 struct anv_reloc_list {
549 size_t num_relocs;
550 size_t array_length;
551 struct drm_i915_gem_relocation_entry * relocs;
552 struct anv_bo ** reloc_bos;
553 };
554
555 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
556 struct anv_device *device);
557 void anv_reloc_list_finish(struct anv_reloc_list *list,
558 struct anv_device *device);
559
560 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
561 struct anv_device *device,
562 uint32_t offset, struct anv_bo *target_bo,
563 uint32_t delta);
564
565 struct anv_batch_bo {
566 /* Link in the anv_cmd_buffer.owned_batch_bos list */
567 struct list_head link;
568
569 struct anv_bo bo;
570
571 /* Bytes actually consumed in this batch BO */
572 size_t length;
573
574 /* Last seen surface state block pool bo offset */
575 uint32_t last_ss_pool_bo_offset;
576
577 struct anv_reloc_list relocs;
578 };
579
580 struct anv_batch {
581 struct anv_device * device;
582
583 void * start;
584 void * end;
585 void * next;
586
587 struct anv_reloc_list * relocs;
588
589 /* This callback is called (with the associated user data) in the event
590 * that the batch runs out of space.
591 */
592 VkResult (*extend_cb)(struct anv_batch *, void *);
593 void * user_data;
594 };
595
596 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
597 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
598 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
599 void *location, struct anv_bo *bo, uint32_t offset);
600
601 struct anv_address {
602 struct anv_bo *bo;
603 uint32_t offset;
604 };
605
606 #define __gen_address_type struct anv_address
607 #define __gen_user_data struct anv_batch
608
609 static inline uint64_t
610 __gen_combine_address(struct anv_batch *batch, void *location,
611 const struct anv_address address, uint32_t delta)
612 {
613 if (address.bo == NULL) {
614 return address.offset + delta;
615 } else {
616 assert(batch->start <= location && location < batch->end);
617
618 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
619 }
620 }
621
622 #include "gen7_pack.h"
623 #include "gen75_pack.h"
624 #undef GEN8_3DSTATE_MULTISAMPLE
625 #include "gen8_pack.h"
626
627 #define anv_batch_emit(batch, cmd, ...) do { \
628 void *__dst = anv_batch_emit_dwords(batch, cmd ## _length); \
629 struct cmd __template = { \
630 cmd ## _header, \
631 __VA_ARGS__ \
632 }; \
633 cmd ## _pack(batch, __dst, &__template); \
634 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, cmd ## _length * 4)); \
635 } while (0)
636
637 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
638 void *__dst = anv_batch_emit_dwords(batch, n); \
639 struct cmd __template = { \
640 cmd ## _header, \
641 .DwordLength = n - cmd ## _length_bias, \
642 __VA_ARGS__ \
643 }; \
644 cmd ## _pack(batch, __dst, &__template); \
645 __dst; \
646 })
647
648 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
649 do { \
650 uint32_t *dw; \
651 \
652 assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \
653 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
654 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
655 dw[i] = (dwords0)[i] | (dwords1)[i]; \
656 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
657 } while (0)
658
659 static const struct GEN7_MEMORY_OBJECT_CONTROL_STATE GEN7_MOCS = {
660 .GraphicsDataTypeGFDT = 0,
661 .LLCCacheabilityControlLLCCC = 0,
662 .L3CacheabilityControlL3CC = 1
663 };
664
665 #define GEN8_MOCS { \
666 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
667 .TargetCache = L3DefertoPATforLLCeLLCselection, \
668 .AgeforQUADLRU = 0 \
669 }
670
671 struct anv_device_memory {
672 struct anv_bo bo;
673 VkDeviceSize map_size;
674 void * map;
675 };
676
677 struct anv_descriptor_slot {
678 int8_t dynamic_slot;
679 uint8_t index;
680 };
681
682 struct anv_descriptor_set_layout {
683 struct {
684 uint32_t surface_count;
685 struct anv_descriptor_slot *surface_start;
686 uint32_t sampler_count;
687 struct anv_descriptor_slot *sampler_start;
688 } stage[VK_SHADER_STAGE_NUM];
689
690 uint32_t count;
691 uint32_t num_dynamic_buffers;
692 VkShaderStageFlags shader_stages;
693 struct anv_descriptor_slot entries[0];
694 };
695
696 enum anv_descriptor_type {
697 ANV_DESCRIPTOR_TYPE_EMPTY = 0,
698 ANV_DESCRIPTOR_TYPE_BUFFER_VIEW,
699 ANV_DESCRIPTOR_TYPE_IMAGE_VIEW,
700 ANV_DESCRIPTOR_TYPE_SAMPLER,
701 };
702
703 struct anv_descriptor {
704 union {
705 struct anv_buffer_view *buffer_view;
706 struct anv_image_view *image_view;
707 struct anv_sampler *sampler;
708 };
709
710 enum anv_descriptor_type type;
711 };
712
713 struct anv_descriptor_set {
714 struct anv_descriptor descriptors[0];
715 };
716
717 VkResult
718 anv_descriptor_set_create(struct anv_device *device,
719 const struct anv_descriptor_set_layout *layout,
720 struct anv_descriptor_set **out_set);
721
722 void
723 anv_descriptor_set_destroy(struct anv_device *device,
724 struct anv_descriptor_set *set);
725
726 #define MAX_VBS 32
727 #define MAX_SETS 8
728 #define MAX_RTS 8
729 #define MAX_VIEWPORTS 16
730 #define MAX_SCISSORS 16
731 #define MAX_PUSH_CONSTANTS_SIZE 128
732 #define MAX_DYNAMIC_BUFFERS 16
733 #define MAX_IMAGES 8
734
735 struct anv_pipeline_layout {
736 struct {
737 struct anv_descriptor_set_layout *layout;
738 uint32_t dynamic_offset_start;
739 struct {
740 uint32_t surface_start;
741 uint32_t sampler_start;
742 } stage[VK_SHADER_STAGE_NUM];
743 } set[MAX_SETS];
744
745 uint32_t num_sets;
746
747 struct {
748 bool has_dynamic_offsets;
749 uint32_t surface_count;
750 uint32_t sampler_count;
751 } stage[VK_SHADER_STAGE_NUM];
752 };
753
754 struct anv_buffer {
755 struct anv_device * device;
756 VkDeviceSize size;
757
758 /* Set when bound */
759 struct anv_bo * bo;
760 VkDeviceSize offset;
761 };
762
763 /* The first 9 correspond to 1 << VK_DYNAMIC_STATE_FOO */
764 #define ANV_DYNAMIC_VIEWPORT_DIRTY (1 << 0)
765 #define ANV_DYNAMIC_SCISSOR_DIRTY (1 << 1)
766 #define ANV_DYNAMIC_LINE_WIDTH_DIRTY (1 << 2)
767 #define ANV_DYNAMIC_DEPTH_BIAS_DIRTY (1 << 3)
768 #define ANV_DYNAMIC_BLEND_CONSTANTS_DIRTY (1 << 4)
769 #define ANV_DYNAMIC_DEPTH_BOUNDS_DIRTY (1 << 5)
770 #define ANV_DYNAMIC_STENCIL_COMPARE_MASK_DIRTY (1 << 6)
771 #define ANV_DYNAMIC_STENCIL_WRITE_MASK_DIRTY (1 << 7)
772 #define ANV_DYNAMIC_STENCIL_REFERENCE_DIRTY (1 << 8)
773 #define ANV_CMD_BUFFER_PIPELINE_DIRTY (1 << 9)
774 #define ANV_CMD_BUFFER_INDEX_BUFFER_DIRTY (1 << 10)
775
776 struct anv_vertex_binding {
777 struct anv_buffer * buffer;
778 VkDeviceSize offset;
779 };
780
781 struct anv_descriptor_set_binding {
782 struct anv_descriptor_set * set;
783 uint32_t dynamic_offsets[128];
784 };
785
786 struct anv_push_constants {
787 /* Current allocated size of this push constants data structure.
788 * Because a decent chunk of it may not be used (images on SKL, for
789 * instance), we won't actually allocate the entire structure up-front.
790 */
791 uint32_t size;
792
793 /* Push constant data provided by the client through vkPushConstants */
794 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
795
796 /* Our hardware only provides zero-based vertex and instance id so, in
797 * order to satisfy the vulkan requirements, we may have to push one or
798 * both of these into the shader.
799 */
800 uint32_t base_vertex;
801 uint32_t base_instance;
802
803 /* Offsets for dynamically bound buffers */
804 uint32_t dynamic_offsets[MAX_DYNAMIC_BUFFERS];
805
806 /* Image data for image_load_store on pre-SKL */
807 struct brw_image_param images[MAX_IMAGES];
808 };
809
810 struct anv_dynamic_state {
811 struct {
812 uint32_t count;
813 VkViewport viewports[MAX_VIEWPORTS];
814 } viewport;
815
816 struct {
817 uint32_t count;
818 VkRect2D scissors[MAX_SCISSORS];
819 } scissor;
820
821 float line_width;
822
823 struct {
824 float bias;
825 float clamp;
826 float slope_scaled;
827 } depth_bias;
828
829 float blend_constants[4];
830
831 struct {
832 float min;
833 float max;
834 } depth_bounds;
835
836 struct {
837 uint32_t front;
838 uint32_t back;
839 } stencil_compare_mask;
840
841 struct {
842 uint32_t front;
843 uint32_t back;
844 } stencil_write_mask;
845
846 struct {
847 uint32_t front;
848 uint32_t back;
849 } stencil_reference;
850 };
851
852 extern const struct anv_dynamic_state default_dynamic_state;
853
854 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
855 const struct anv_dynamic_state *src,
856 uint32_t copy_mask);
857
858 /** State required while building cmd buffer */
859 struct anv_cmd_state {
860 uint32_t current_pipeline;
861 uint32_t vb_dirty;
862 uint32_t dirty;
863 uint32_t compute_dirty;
864 VkShaderStageFlags descriptors_dirty;
865 VkShaderStageFlags push_constants_dirty;
866 uint32_t scratch_size;
867 struct anv_pipeline * pipeline;
868 struct anv_pipeline * compute_pipeline;
869 struct anv_framebuffer * framebuffer;
870 struct anv_render_pass * pass;
871 struct anv_subpass * subpass;
872 uint32_t state_vf[GEN8_3DSTATE_VF_length];
873 struct anv_vertex_binding vertex_bindings[MAX_VBS];
874 struct anv_descriptor_set_binding descriptors[MAX_SETS];
875 struct anv_push_constants * push_constants[VK_SHADER_STAGE_NUM];
876 struct anv_dynamic_state dynamic;
877
878 struct {
879 struct anv_buffer * index_buffer;
880 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
881 uint32_t index_offset;
882 } gen7;
883 };
884
885 struct anv_cmd_pool {
886 struct list_head cmd_buffers;
887 };
888
889 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
890
891 enum anv_cmd_buffer_exec_mode {
892 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
893 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
894 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
895 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
896 };
897
898 struct anv_cmd_buffer {
899 VK_LOADER_DATA _loader_data;
900
901 struct anv_device * device;
902
903 struct list_head pool_link;
904
905 struct anv_batch batch;
906
907 /* Fields required for the actual chain of anv_batch_bo's.
908 *
909 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
910 */
911 struct list_head batch_bos;
912 enum anv_cmd_buffer_exec_mode exec_mode;
913
914 /* A vector of anv_batch_bo pointers for every batch or surface buffer
915 * referenced by this command buffer
916 *
917 * initialized by anv_cmd_buffer_init_batch_bo_chain()
918 */
919 struct anv_vector seen_bbos;
920
921 /* A vector of int32_t's for every block of binding tables.
922 *
923 * initialized by anv_cmd_buffer_init_batch_bo_chain()
924 */
925 struct anv_vector bt_blocks;
926 uint32_t bt_next;
927 struct anv_reloc_list surface_relocs;
928
929 /* Information needed for execbuf
930 *
931 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
932 */
933 struct {
934 struct drm_i915_gem_execbuffer2 execbuf;
935
936 struct drm_i915_gem_exec_object2 * objects;
937 uint32_t bo_count;
938 struct anv_bo ** bos;
939
940 /* Allocated length of the 'objects' and 'bos' arrays */
941 uint32_t array_length;
942
943 bool need_reloc;
944 } execbuf2;
945
946 /* Serial for tracking buffer completion */
947 uint32_t serial;
948
949 /* Stream objects for storing temporary data */
950 struct anv_state_stream surface_state_stream;
951 struct anv_state_stream dynamic_state_stream;
952
953 VkCmdBufferOptimizeFlags opt_flags;
954 VkCmdBufferLevel level;
955
956 struct anv_cmd_state state;
957 };
958
959 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
960 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
961 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
962 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
963 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
964 struct anv_cmd_buffer *secondary);
965 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
966
967 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
968 unsigned stage, struct anv_state *bt_state);
969 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
970 unsigned stage, struct anv_state *state);
971 void anv_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
972
973 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
974 uint32_t *a, uint32_t dwords,
975 uint32_t alignment);
976 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
977 uint32_t *a, uint32_t *b,
978 uint32_t dwords, uint32_t alignment);
979 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
980 struct anv_subpass *subpass);
981
982 struct anv_address
983 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
984 struct anv_state
985 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
986 uint32_t entries, uint32_t *state_offset);
987 struct anv_state
988 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
989 uint32_t size, uint32_t alignment);
990
991 VkResult
992 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
993
994 void anv_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
995 void anv_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
996
997 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
998 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
999
1000 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1001
1002 void gen7_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1003 struct anv_subpass *subpass);
1004
1005 void gen8_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1006 struct anv_subpass *subpass);
1007
1008 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1009 struct anv_subpass *subpass);
1010
1011 struct anv_state
1012 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1013 VkShaderStage stage);
1014
1015 void anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
1016 struct anv_render_pass *pass,
1017 const VkClearValue *clear_values);
1018 const struct anv_image_view *
1019 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1020
1021 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1022
1023 struct anv_fence {
1024 struct anv_bo bo;
1025 struct drm_i915_gem_execbuffer2 execbuf;
1026 struct drm_i915_gem_exec_object2 exec2_objects[1];
1027 bool ready;
1028 };
1029
1030 struct nir_shader;
1031
1032 struct anv_shader_module {
1033 struct nir_shader * nir;
1034
1035 uint32_t size;
1036 char data[0];
1037 };
1038
1039 struct anv_shader {
1040 struct anv_shader_module * module;
1041 char entrypoint[0];
1042 };
1043
1044 struct anv_pipeline {
1045 struct anv_device * device;
1046 struct anv_batch batch;
1047 uint32_t batch_data[256];
1048 struct anv_reloc_list batch_relocs;
1049 uint32_t dynamic_state_mask;
1050 struct anv_dynamic_state dynamic_state;
1051
1052 struct anv_shader * shaders[VK_SHADER_STAGE_NUM];
1053 struct anv_pipeline_layout * layout;
1054 bool use_repclear;
1055
1056 struct brw_vs_prog_data vs_prog_data;
1057 struct brw_wm_prog_data wm_prog_data;
1058 struct brw_gs_prog_data gs_prog_data;
1059 struct brw_cs_prog_data cs_prog_data;
1060 bool writes_point_size;
1061 struct brw_stage_prog_data * prog_data[VK_SHADER_STAGE_NUM];
1062 uint32_t scratch_start[VK_SHADER_STAGE_NUM];
1063 uint32_t total_scratch;
1064 struct {
1065 uint32_t vs_start;
1066 uint32_t vs_size;
1067 uint32_t nr_vs_entries;
1068 uint32_t gs_start;
1069 uint32_t gs_size;
1070 uint32_t nr_gs_entries;
1071 } urb;
1072
1073 VkShaderStageFlags active_stages;
1074 struct anv_state_stream program_stream;
1075 struct anv_state blend_state;
1076 uint32_t vs_simd8;
1077 uint32_t vs_vec4;
1078 uint32_t ps_simd8;
1079 uint32_t ps_simd16;
1080 uint32_t ps_ksp0;
1081 uint32_t ps_ksp2;
1082 uint32_t ps_grf_start0;
1083 uint32_t ps_grf_start2;
1084 uint32_t gs_vec4;
1085 uint32_t gs_vertex_count;
1086 uint32_t cs_simd;
1087
1088 uint32_t vb_used;
1089 uint32_t binding_stride[MAX_VBS];
1090 bool instancing_enable[MAX_VBS];
1091 bool primitive_restart;
1092 uint32_t topology;
1093
1094 uint32_t cs_thread_width_max;
1095 uint32_t cs_right_mask;
1096
1097 struct {
1098 uint32_t sf[GEN7_3DSTATE_SF_length];
1099 uint32_t depth_stencil_state[GEN7_DEPTH_STENCIL_STATE_length];
1100 } gen7;
1101
1102 struct {
1103 uint32_t sf[GEN8_3DSTATE_SF_length];
1104 uint32_t vf[GEN8_3DSTATE_VF_length];
1105 uint32_t raster[GEN8_3DSTATE_RASTER_length];
1106 uint32_t wm_depth_stencil[GEN8_3DSTATE_WM_DEPTH_STENCIL_length];
1107 } gen8;
1108 };
1109
1110 struct anv_graphics_pipeline_create_info {
1111 bool use_repclear;
1112 bool disable_viewport;
1113 bool disable_scissor;
1114 bool disable_vs;
1115 bool use_rectlist;
1116 };
1117
1118 VkResult
1119 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1120 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1121 const struct anv_graphics_pipeline_create_info *extra);
1122
1123 VkResult
1124 anv_graphics_pipeline_create(VkDevice device,
1125 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1126 const struct anv_graphics_pipeline_create_info *extra,
1127 VkPipeline *pPipeline);
1128
1129 VkResult
1130 gen7_graphics_pipeline_create(VkDevice _device,
1131 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1132 const struct anv_graphics_pipeline_create_info *extra,
1133 VkPipeline *pPipeline);
1134
1135 VkResult
1136 gen8_graphics_pipeline_create(VkDevice _device,
1137 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1138 const struct anv_graphics_pipeline_create_info *extra,
1139 VkPipeline *pPipeline);
1140 VkResult
1141 gen7_compute_pipeline_create(VkDevice _device,
1142 const VkComputePipelineCreateInfo *pCreateInfo,
1143 VkPipeline *pPipeline);
1144
1145 VkResult
1146 gen8_compute_pipeline_create(VkDevice _device,
1147 const VkComputePipelineCreateInfo *pCreateInfo,
1148 VkPipeline *pPipeline);
1149
1150 struct anv_compiler *anv_compiler_create(struct anv_device *device);
1151 void anv_compiler_destroy(struct anv_compiler *compiler);
1152 int anv_compiler_run(struct anv_compiler *compiler, struct anv_pipeline *pipeline);
1153 void anv_compiler_free(struct anv_pipeline *pipeline);
1154
1155 struct anv_format {
1156 const VkFormat vk_format;
1157 const char *name;
1158 uint16_t surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1159 uint8_t cpp; /**< Bytes-per-pixel of anv_format::surface_format. */
1160 uint8_t num_channels;
1161 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1162 bool has_stencil;
1163 };
1164
1165 /**
1166 * Stencil formats are often a special case. To reduce the number of lookups
1167 * into the VkFormat-to-anv_format translation table when working with
1168 * stencil, here is the handle to the table's entry for VK_FORMAT_S8_UINT.
1169 */
1170 extern const struct anv_format *const anv_format_s8_uint;
1171
1172 const struct anv_format *
1173 anv_format_for_vk_format(VkFormat format);
1174
1175 static inline bool
1176 anv_format_is_color(const struct anv_format *format)
1177 {
1178 return !format->depth_format && !format->has_stencil;
1179 }
1180
1181 static inline bool
1182 anv_format_is_depth_or_stencil(const struct anv_format *format)
1183 {
1184 return format->depth_format || format->has_stencil;
1185 }
1186
1187 struct anv_image_view_info {
1188 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1189 bool is_array:1; /**< RENDER_SURFACE_STATE.SurfaceArray */
1190 bool is_cube:1; /**< RENDER_SURFACE_STATE.CubeFaceEnable* */
1191 };
1192
1193 struct anv_image_view_info
1194 anv_image_view_info_for_vk_image_view_type(VkImageViewType type);
1195
1196 /**
1197 * A proxy for the color surfaces, depth surfaces, and stencil surfaces.
1198 */
1199 struct anv_surface {
1200 /**
1201 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1202 */
1203 uint32_t offset;
1204
1205 uint32_t stride; /**< RENDER_SURFACE_STATE.SurfacePitch */
1206 uint16_t qpitch; /**< RENDER_SURFACE_STATE.QPitch */
1207
1208 /**
1209 * \name Alignment of miptree images, in units of pixels.
1210 *
1211 * These fields contain the real alignment values, not the values to be
1212 * given to the GPU. For example, if h_align is 4, then program the GPU
1213 * with HALIGN_4.
1214 * \{
1215 */
1216 uint8_t h_align; /**< RENDER_SURFACE_STATE.SurfaceHorizontalAlignment */
1217 uint8_t v_align; /**< RENDER_SURFACE_STATE.SurfaceVerticalAlignment */
1218 /** \} */
1219
1220 uint8_t tile_mode; /**< RENDER_SURFACE_STATE.TileMode */
1221 };
1222
1223 struct anv_image {
1224 VkImageType type;
1225 const struct anv_format *format;
1226 VkExtent3D extent;
1227 uint32_t levels;
1228 uint32_t array_size;
1229 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1230
1231 VkDeviceSize size;
1232 uint32_t alignment;
1233
1234 /* Set when bound */
1235 struct anv_bo *bo;
1236 VkDeviceSize offset;
1237
1238 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1239
1240 bool needs_nonrt_surface_state:1;
1241 bool needs_color_rt_surface_state:1;
1242
1243 /**
1244 * Image subsurfaces
1245 *
1246 * For each foo, anv_image::foo_surface is valid if and only if
1247 * anv_image::format has a foo aspect.
1248 *
1249 * The hardware requires that the depth buffer and stencil buffer be
1250 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1251 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1252 * allocate the depth and stencil buffers as separate surfaces in the same
1253 * bo.
1254 */
1255 union {
1256 struct anv_surface color_surface;
1257
1258 struct {
1259 struct anv_surface depth_surface;
1260 struct anv_surface stencil_surface;
1261 };
1262 };
1263 };
1264
1265 struct anv_buffer_view {
1266 struct anv_state surface_state; /**< RENDER_SURFACE_STATE */
1267 struct anv_bo *bo;
1268 uint32_t offset; /**< Offset into bo. */
1269 uint32_t range; /**< VkBufferViewCreateInfo::range */
1270 const struct anv_format *format; /**< VkBufferViewCreateInfo::format */
1271 };
1272
1273 struct anv_image_view {
1274 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1275 const struct anv_format *format; /**< VkImageViewCreateInfo::format */
1276 struct anv_bo *bo;
1277 uint32_t offset; /**< Offset into bo. */
1278 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1279
1280 /** RENDER_SURFACE_STATE when using image as a color render target. */
1281 struct anv_state color_rt_surface_state;
1282
1283 /** RENDER_SURFACE_STATE when using image as a non render target. */
1284 struct anv_state nonrt_surface_state;
1285 };
1286
1287 struct anv_image_create_info {
1288 const VkImageCreateInfo *vk_info;
1289 bool force_tile_mode;
1290 uint8_t tile_mode;
1291 uint32_t stride;
1292 };
1293
1294 VkResult anv_image_create(VkDevice _device,
1295 const struct anv_image_create_info *info,
1296 VkImage *pImage);
1297
1298 struct anv_surface *
1299 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1300 VkImageAspectFlags aspect_mask);
1301
1302 void anv_image_view_init(struct anv_image_view *view,
1303 struct anv_device *device,
1304 const VkImageViewCreateInfo* pCreateInfo,
1305 struct anv_cmd_buffer *cmd_buffer);
1306
1307 void
1308 gen7_image_view_init(struct anv_image_view *iview,
1309 struct anv_device *device,
1310 const VkImageViewCreateInfo* pCreateInfo,
1311 struct anv_cmd_buffer *cmd_buffer);
1312
1313 void
1314 gen8_image_view_init(struct anv_image_view *iview,
1315 struct anv_device *device,
1316 const VkImageViewCreateInfo* pCreateInfo,
1317 struct anv_cmd_buffer *cmd_buffer);
1318
1319 VkResult anv_buffer_view_create(struct anv_device *device,
1320 const VkBufferViewCreateInfo *pCreateInfo,
1321 struct anv_buffer_view **bview_out);
1322
1323 void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
1324 const struct anv_format *format,
1325 uint32_t offset, uint32_t range);
1326
1327 void gen7_fill_buffer_surface_state(void *state, const struct anv_format *format,
1328 uint32_t offset, uint32_t range);
1329 void gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
1330 uint32_t offset, uint32_t range);
1331
1332 struct anv_sampler {
1333 uint32_t state[4];
1334 };
1335
1336 struct anv_framebuffer {
1337 uint32_t width;
1338 uint32_t height;
1339 uint32_t layers;
1340
1341 uint32_t attachment_count;
1342 const struct anv_image_view * attachments[0];
1343 };
1344
1345 struct anv_subpass {
1346 uint32_t input_count;
1347 uint32_t * input_attachments;
1348 uint32_t color_count;
1349 uint32_t * color_attachments;
1350 uint32_t * resolve_attachments;
1351 uint32_t depth_stencil_attachment;
1352 };
1353
1354 struct anv_render_pass_attachment {
1355 const struct anv_format *format;
1356 uint32_t samples;
1357 VkAttachmentLoadOp load_op;
1358 VkAttachmentLoadOp stencil_load_op;
1359 };
1360
1361 struct anv_render_pass {
1362 uint32_t attachment_count;
1363 uint32_t subpass_count;
1364
1365 uint32_t num_color_clear_attachments;
1366 bool has_depth_clear_attachment;
1367 bool has_stencil_clear_attachment;
1368
1369 struct anv_render_pass_attachment * attachments;
1370 struct anv_subpass subpasses[0];
1371 };
1372
1373 struct anv_query_pool_slot {
1374 uint64_t begin;
1375 uint64_t end;
1376 uint64_t available;
1377 };
1378
1379 struct anv_query_pool {
1380 VkQueryType type;
1381 uint32_t slots;
1382 struct anv_bo bo;
1383 };
1384
1385 void anv_device_init_meta(struct anv_device *device);
1386 void anv_device_finish_meta(struct anv_device *device);
1387
1388 void *anv_lookup_entrypoint(const char *name);
1389
1390 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1391 \
1392 static inline struct __anv_type * \
1393 __anv_type ## _from_handle(__VkType _handle) \
1394 { \
1395 return (struct __anv_type *) _handle; \
1396 } \
1397 \
1398 static inline __VkType \
1399 __anv_type ## _to_handle(struct __anv_type *_obj) \
1400 { \
1401 return (__VkType) _obj; \
1402 }
1403
1404 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1405 \
1406 static inline struct __anv_type * \
1407 __anv_type ## _from_handle(__VkType _handle) \
1408 { \
1409 return (struct __anv_type *) _handle.handle; \
1410 } \
1411 \
1412 static inline __VkType \
1413 __anv_type ## _to_handle(struct __anv_type *_obj) \
1414 { \
1415 return (__VkType) { .handle = (uint64_t) _obj }; \
1416 }
1417
1418 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1419 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1420
1421 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCmdBuffer)
1422 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1423 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1424 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1425 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1426
1427 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCmdPool)
1428 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1429 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView);
1430 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1431 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1432 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1433 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1434 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1435 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1436 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1437 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1438 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1439 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1440 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1441 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1442 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader, VkShader)
1443 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1444
1445 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1446 \
1447 static inline const __VkType * \
1448 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1449 { \
1450 return (const __VkType *) __anv_obj; \
1451 }
1452
1453 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1454 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1455
1456 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1457 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1458 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1459
1460 #ifdef __cplusplus
1461 }
1462 #endif