79af4102e3f8b696030049ab1410a9a3027aa3cf
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <stdint.h>
32 #include <i915_drm.h>
33
34 #ifdef HAVE_VALGRIND
35 #include <valgrind.h>
36 #include <memcheck.h>
37 #define VG(x) x
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
39 #else
40 #define VG(x)
41 #endif
42
43 #include "brw_device_info.h"
44 #include "util/macros.h"
45 #include "util/list.h"
46
47 /* Pre-declarations needed for WSI entrypoints */
48 struct wl_surface;
49 struct wl_display;
50 typedef struct xcb_connection_t xcb_connection_t;
51 typedef uint32_t xcb_visualid_t;
52 typedef uint32_t xcb_window_t;
53
54 #define VK_USE_PLATFORM_XCB_KHR
55 #define VK_USE_PLATFORM_WAYLAND_KHR
56
57 #define VK_PROTOTYPES
58 #include <vulkan/vulkan.h>
59 #include <vulkan/vulkan_intel.h>
60
61 #include "anv_entrypoints.h"
62 #include "anv_gen_macros.h"
63 #include "brw_context.h"
64 #include "isl.h"
65
66 #ifdef __cplusplus
67 extern "C" {
68 #endif
69
70 #define MAX_VBS 32
71 #define MAX_SETS 8
72 #define MAX_RTS 8
73 #define MAX_VIEWPORTS 16
74 #define MAX_SCISSORS 16
75 #define MAX_PUSH_CONSTANTS_SIZE 128
76 #define MAX_DYNAMIC_BUFFERS 16
77 #define MAX_IMAGES 8
78
79 #define ICD_LOADER_MAGIC 0x01CDC0DE
80
81 typedef union _VK_LOADER_DATA {
82 uintptr_t loaderMagic;
83 void *loaderData;
84 } VK_LOADER_DATA;
85
86 #define anv_noreturn __attribute__((__noreturn__))
87 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
88
89 #define MIN(a, b) ((a) < (b) ? (a) : (b))
90 #define MAX(a, b) ((a) > (b) ? (a) : (b))
91
92 static inline uint32_t
93 align_u32(uint32_t v, uint32_t a)
94 {
95 assert(a != 0 && a == (a & -a));
96 return (v + a - 1) & ~(a - 1);
97 }
98
99 static inline uint64_t
100 align_u64(uint64_t v, uint64_t a)
101 {
102 assert(a != 0 && a == (a & -a));
103 return (v + a - 1) & ~(a - 1);
104 }
105
106 static inline int32_t
107 align_i32(int32_t v, int32_t a)
108 {
109 assert(a != 0 && a == (a & -a));
110 return (v + a - 1) & ~(a - 1);
111 }
112
113 /** Alignment must be a power of 2. */
114 static inline bool
115 anv_is_aligned(uintmax_t n, uintmax_t a)
116 {
117 assert(a == (a & -a));
118 return (n & (a - 1)) == 0;
119 }
120
121 static inline uint32_t
122 anv_minify(uint32_t n, uint32_t levels)
123 {
124 if (unlikely(n == 0))
125 return 0;
126 else
127 return MAX(n >> levels, 1);
128 }
129
130 static inline float
131 anv_clamp_f(float f, float min, float max)
132 {
133 assert(min < max);
134
135 if (f > max)
136 return max;
137 else if (f < min)
138 return min;
139 else
140 return f;
141 }
142
143 static inline bool
144 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
145 {
146 if (*inout_mask & clear_mask) {
147 *inout_mask &= ~clear_mask;
148 return true;
149 } else {
150 return false;
151 }
152 }
153
154 #define for_each_bit(b, dword) \
155 for (uint32_t __dword = (dword); \
156 (b) = __builtin_ffs(__dword) - 1, __dword; \
157 __dword &= ~(1 << (b)))
158
159 #define typed_memcpy(dest, src, count) ({ \
160 static_assert(sizeof(*src) == sizeof(*dest), ""); \
161 memcpy((dest), (src), (count) * sizeof(*(src))); \
162 })
163
164 #define zero(x) (memset(&(x), 0, sizeof(x)))
165
166 /* Define no kernel as 1, since that's an illegal offset for a kernel */
167 #define NO_KERNEL 1
168
169 struct anv_common {
170 VkStructureType sType;
171 const void* pNext;
172 };
173
174 /* Whenever we generate an error, pass it through this function. Useful for
175 * debugging, where we can break on it. Only call at error site, not when
176 * propagating errors. Might be useful to plug in a stack trace here.
177 */
178
179 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
180
181 #ifdef DEBUG
182 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
183 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
184 #else
185 #define vk_error(error) error
186 #define vk_errorf(error, format, ...) error
187 #endif
188
189 void __anv_finishme(const char *file, int line, const char *format, ...)
190 anv_printflike(3, 4);
191 void anv_loge(const char *format, ...) anv_printflike(1, 2);
192 void anv_loge_v(const char *format, va_list va);
193
194 /**
195 * Print a FINISHME message, including its source location.
196 */
197 #define anv_finishme(format, ...) \
198 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
199
200 /* A non-fatal assert. Useful for debugging. */
201 #ifdef DEBUG
202 #define anv_assert(x) ({ \
203 if (unlikely(!(x))) \
204 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
205 })
206 #else
207 #define anv_assert(x)
208 #endif
209
210 /**
211 * If a block of code is annotated with anv_validate, then the block runs only
212 * in debug builds.
213 */
214 #ifdef DEBUG
215 #define anv_validate if (1)
216 #else
217 #define anv_validate if (0)
218 #endif
219
220 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
221 void anv_abortfv(const char *format, va_list va) anv_noreturn;
222
223 #define stub_return(v) \
224 do { \
225 anv_finishme("stub %s", __func__); \
226 return (v); \
227 } while (0)
228
229 #define stub() \
230 do { \
231 anv_finishme("stub %s", __func__); \
232 return; \
233 } while (0)
234
235 /**
236 * A dynamically growable, circular buffer. Elements are added at head and
237 * removed from tail. head and tail are free-running uint32_t indices and we
238 * only compute the modulo with size when accessing the array. This way,
239 * number of bytes in the queue is always head - tail, even in case of
240 * wraparound.
241 */
242
243 struct anv_vector {
244 uint32_t head;
245 uint32_t tail;
246 uint32_t element_size;
247 uint32_t size;
248 void *data;
249 };
250
251 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
252 void *anv_vector_add(struct anv_vector *queue);
253 void *anv_vector_remove(struct anv_vector *queue);
254
255 static inline int
256 anv_vector_length(struct anv_vector *queue)
257 {
258 return (queue->head - queue->tail) / queue->element_size;
259 }
260
261 static inline void *
262 anv_vector_head(struct anv_vector *vector)
263 {
264 assert(vector->tail < vector->head);
265 return (void *)((char *)vector->data +
266 ((vector->head - vector->element_size) &
267 (vector->size - 1)));
268 }
269
270 static inline void *
271 anv_vector_tail(struct anv_vector *vector)
272 {
273 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
274 }
275
276 static inline void
277 anv_vector_finish(struct anv_vector *queue)
278 {
279 free(queue->data);
280 }
281
282 #define anv_vector_foreach(elem, queue) \
283 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
284 for (uint32_t __anv_vector_offset = (queue)->tail; \
285 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
286 __anv_vector_offset += (queue)->element_size)
287
288 struct anv_bo {
289 uint32_t gem_handle;
290
291 /* Index into the current validation list. This is used by the
292 * validation list building alrogithm to track which buffers are already
293 * in the validation list so that we can ensure uniqueness.
294 */
295 uint32_t index;
296
297 /* Last known offset. This value is provided by the kernel when we
298 * execbuf and is used as the presumed offset for the next bunch of
299 * relocations.
300 */
301 uint64_t offset;
302
303 uint64_t size;
304 void *map;
305 };
306
307 /* Represents a lock-free linked list of "free" things. This is used by
308 * both the block pool and the state pools. Unfortunately, in order to
309 * solve the ABA problem, we can't use a single uint32_t head.
310 */
311 union anv_free_list {
312 struct {
313 int32_t offset;
314
315 /* A simple count that is incremented every time the head changes. */
316 uint32_t count;
317 };
318 uint64_t u64;
319 };
320
321 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
322
323 struct anv_block_state {
324 union {
325 struct {
326 uint32_t next;
327 uint32_t end;
328 };
329 uint64_t u64;
330 };
331 };
332
333 struct anv_block_pool {
334 struct anv_device *device;
335
336 struct anv_bo bo;
337
338 /* The offset from the start of the bo to the "center" of the block
339 * pool. Pointers to allocated blocks are given by
340 * bo.map + center_bo_offset + offsets.
341 */
342 uint32_t center_bo_offset;
343
344 /* Current memory map of the block pool. This pointer may or may not
345 * point to the actual beginning of the block pool memory. If
346 * anv_block_pool_alloc_back has ever been called, then this pointer
347 * will point to the "center" position of the buffer and all offsets
348 * (negative or positive) given out by the block pool alloc functions
349 * will be valid relative to this pointer.
350 *
351 * In particular, map == bo.map + center_offset
352 */
353 void *map;
354 int fd;
355
356 /**
357 * Array of mmaps and gem handles owned by the block pool, reclaimed when
358 * the block pool is destroyed.
359 */
360 struct anv_vector mmap_cleanups;
361
362 uint32_t block_size;
363
364 union anv_free_list free_list;
365 struct anv_block_state state;
366
367 union anv_free_list back_free_list;
368 struct anv_block_state back_state;
369 };
370
371 /* Block pools are backed by a fixed-size 2GB memfd */
372 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
373
374 /* The center of the block pool is also the middle of the memfd. This may
375 * change in the future if we decide differently for some reason.
376 */
377 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
378
379 static inline uint32_t
380 anv_block_pool_size(struct anv_block_pool *pool)
381 {
382 return pool->state.end + pool->back_state.end;
383 }
384
385 struct anv_state {
386 int32_t offset;
387 uint32_t alloc_size;
388 void *map;
389 };
390
391 struct anv_fixed_size_state_pool {
392 size_t state_size;
393 union anv_free_list free_list;
394 struct anv_block_state block;
395 };
396
397 #define ANV_MIN_STATE_SIZE_LOG2 6
398 #define ANV_MAX_STATE_SIZE_LOG2 10
399
400 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
401
402 struct anv_state_pool {
403 struct anv_block_pool *block_pool;
404 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
405 };
406
407 struct anv_state_stream_block;
408
409 struct anv_state_stream {
410 struct anv_block_pool *block_pool;
411
412 /* The current working block */
413 struct anv_state_stream_block *block;
414
415 /* Offset at which the current block starts */
416 uint32_t start;
417 /* Offset at which to allocate the next state */
418 uint32_t next;
419 /* Offset at which the current block ends */
420 uint32_t end;
421 };
422
423 #define CACHELINE_SIZE 64
424 #define CACHELINE_MASK 63
425
426 static void inline
427 anv_state_clflush(struct anv_state state)
428 {
429 /* state.map may not be cacheline aligned, so round down the start pointer
430 * to a cacheline boundary so we flush all pages that contain the state.
431 */
432 void *end = state.map + state.alloc_size;
433 void *p = (void *) (((uintptr_t) state.map) & ~CACHELINE_MASK);
434
435 __builtin_ia32_sfence();
436 while (p < end) {
437 __builtin_ia32_clflush(p);
438 p += CACHELINE_SIZE;
439 }
440 }
441
442 void anv_block_pool_init(struct anv_block_pool *pool,
443 struct anv_device *device, uint32_t block_size);
444 void anv_block_pool_finish(struct anv_block_pool *pool);
445 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
446 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
447 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
448 void anv_state_pool_init(struct anv_state_pool *pool,
449 struct anv_block_pool *block_pool);
450 void anv_state_pool_finish(struct anv_state_pool *pool);
451 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
452 size_t state_size, size_t alignment);
453 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
454 void anv_state_stream_init(struct anv_state_stream *stream,
455 struct anv_block_pool *block_pool);
456 void anv_state_stream_finish(struct anv_state_stream *stream);
457 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
458 uint32_t size, uint32_t alignment);
459
460 /**
461 * Implements a pool of re-usable BOs. The interface is identical to that
462 * of block_pool except that each block is its own BO.
463 */
464 struct anv_bo_pool {
465 struct anv_device *device;
466
467 uint32_t bo_size;
468
469 void *free_list;
470 };
471
472 void anv_bo_pool_init(struct anv_bo_pool *pool,
473 struct anv_device *device, uint32_t block_size);
474 void anv_bo_pool_finish(struct anv_bo_pool *pool);
475 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
476 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
477
478
479 void *anv_resolve_entrypoint(uint32_t index);
480
481 extern struct anv_dispatch_table dtable;
482
483 #define ANV_CALL(func) ({ \
484 if (dtable.func == NULL) { \
485 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
486 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
487 } \
488 dtable.func; \
489 })
490
491 static inline void *
492 anv_alloc(const VkAllocationCallbacks *alloc,
493 size_t size, size_t align,
494 VkSystemAllocationScope scope)
495 {
496 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
497 }
498
499 static inline void *
500 anv_realloc(const VkAllocationCallbacks *alloc,
501 void *ptr, size_t size, size_t align,
502 VkSystemAllocationScope scope)
503 {
504 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
505 }
506
507 static inline void
508 anv_free(const VkAllocationCallbacks *alloc, void *data)
509 {
510 alloc->pfnFree(alloc->pUserData, data);
511 }
512
513 static inline void *
514 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
515 const VkAllocationCallbacks *alloc,
516 size_t size, size_t align,
517 VkSystemAllocationScope scope)
518 {
519 if (alloc)
520 return anv_alloc(alloc, size, align, scope);
521 else
522 return anv_alloc(parent_alloc, size, align, scope);
523 }
524
525 static inline void
526 anv_free2(const VkAllocationCallbacks *parent_alloc,
527 const VkAllocationCallbacks *alloc,
528 void *data)
529 {
530 if (alloc)
531 anv_free(alloc, data);
532 else
533 anv_free(parent_alloc, data);
534 }
535
536 struct anv_physical_device {
537 VK_LOADER_DATA _loader_data;
538
539 struct anv_instance * instance;
540 uint32_t chipset_id;
541 const char * path;
542 const char * name;
543 const struct brw_device_info * info;
544 uint64_t aperture_size;
545 struct brw_compiler * compiler;
546 struct isl_device isl_dev;
547 };
548
549 struct anv_instance {
550 VK_LOADER_DATA _loader_data;
551
552 VkAllocationCallbacks alloc;
553
554 uint32_t apiVersion;
555 int physicalDeviceCount;
556 struct anv_physical_device physicalDevice;
557
558 void * wayland_wsi;
559 };
560
561 VkResult anv_init_wsi(struct anv_instance *instance);
562 void anv_finish_wsi(struct anv_instance *instance);
563
564 struct anv_meta_state {
565 VkAllocationCallbacks alloc;
566
567 struct {
568 /**
569 * Pipeline N is used to clear color attachment N of the current
570 * subpass.
571 *
572 * HACK: We use one pipeline per color attachment to work around the
573 * compiler's inability to dynamically set the render target index of
574 * the render target write message.
575 */
576 struct anv_pipeline *color_pipelines[MAX_RTS];
577
578 struct anv_pipeline *depth_only_pipeline;
579 struct anv_pipeline *stencil_only_pipeline;
580 struct anv_pipeline *depthstencil_pipeline;
581 } clear;
582
583 struct {
584 VkRenderPass render_pass;
585
586 /** Pipeline that blits from a 1D image. */
587 VkPipeline pipeline_1d_src;
588
589 /** Pipeline that blits from a 2D image. */
590 VkPipeline pipeline_2d_src;
591
592 /** Pipeline that blits from a 3D image. */
593 VkPipeline pipeline_3d_src;
594
595 VkPipelineLayout pipeline_layout;
596 VkDescriptorSetLayout ds_layout;
597 } blit;
598 };
599
600 struct anv_queue {
601 VK_LOADER_DATA _loader_data;
602
603 struct anv_device * device;
604
605 struct anv_state_pool * pool;
606 };
607
608 struct anv_pipeline_cache {
609 struct anv_device * device;
610 struct anv_state_stream program_stream;
611 pthread_mutex_t mutex;
612 };
613
614 void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
615 struct anv_device *device);
616 void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
617
618 struct anv_device {
619 VK_LOADER_DATA _loader_data;
620
621 VkAllocationCallbacks alloc;
622
623 struct anv_instance * instance;
624 uint32_t chipset_id;
625 struct brw_device_info info;
626 struct isl_device isl_dev;
627 int context_id;
628 int fd;
629
630 struct anv_bo_pool batch_bo_pool;
631
632 struct anv_block_pool dynamic_state_block_pool;
633 struct anv_state_pool dynamic_state_pool;
634
635 struct anv_block_pool instruction_block_pool;
636 struct anv_pipeline_cache default_pipeline_cache;
637
638 struct anv_block_pool surface_state_block_pool;
639 struct anv_state_pool surface_state_pool;
640
641 struct anv_bo workaround_bo;
642
643 struct anv_meta_state meta_state;
644
645 struct anv_state border_colors;
646
647 struct anv_queue queue;
648
649 struct anv_block_pool scratch_block_pool;
650
651 pthread_mutex_t mutex;
652 };
653
654 void* anv_gem_mmap(struct anv_device *device,
655 uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
656 void anv_gem_munmap(void *p, uint64_t size);
657 uint32_t anv_gem_create(struct anv_device *device, size_t size);
658 void anv_gem_close(struct anv_device *device, uint32_t gem_handle);
659 uint32_t anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
660 int anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns);
661 int anv_gem_execbuffer(struct anv_device *device,
662 struct drm_i915_gem_execbuffer2 *execbuf);
663 int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
664 uint32_t stride, uint32_t tiling);
665 int anv_gem_create_context(struct anv_device *device);
666 int anv_gem_destroy_context(struct anv_device *device, int context);
667 int anv_gem_get_param(int fd, uint32_t param);
668 bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
669 int anv_gem_get_aperture(int fd, uint64_t *size);
670 int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
671 uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
672 int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, uint32_t caching);
673 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
674 uint32_t read_domains, uint32_t write_domain);
675
676 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
677
678 struct anv_reloc_list {
679 size_t num_relocs;
680 size_t array_length;
681 struct drm_i915_gem_relocation_entry * relocs;
682 struct anv_bo ** reloc_bos;
683 };
684
685 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
686 const VkAllocationCallbacks *alloc);
687 void anv_reloc_list_finish(struct anv_reloc_list *list,
688 const VkAllocationCallbacks *alloc);
689
690 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
691 const VkAllocationCallbacks *alloc,
692 uint32_t offset, struct anv_bo *target_bo,
693 uint32_t delta);
694
695 struct anv_batch_bo {
696 /* Link in the anv_cmd_buffer.owned_batch_bos list */
697 struct list_head link;
698
699 struct anv_bo bo;
700
701 /* Bytes actually consumed in this batch BO */
702 size_t length;
703
704 /* Last seen surface state block pool bo offset */
705 uint32_t last_ss_pool_bo_offset;
706
707 struct anv_reloc_list relocs;
708 };
709
710 struct anv_batch {
711 const VkAllocationCallbacks * alloc;
712
713 void * start;
714 void * end;
715 void * next;
716
717 struct anv_reloc_list * relocs;
718
719 /* This callback is called (with the associated user data) in the event
720 * that the batch runs out of space.
721 */
722 VkResult (*extend_cb)(struct anv_batch *, void *);
723 void * user_data;
724 };
725
726 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
727 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
728 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
729 void *location, struct anv_bo *bo, uint32_t offset);
730
731 struct anv_address {
732 struct anv_bo *bo;
733 uint32_t offset;
734 };
735
736 #define __gen_address_type struct anv_address
737 #define __gen_user_data struct anv_batch
738
739 static inline uint64_t
740 __gen_combine_address(struct anv_batch *batch, void *location,
741 const struct anv_address address, uint32_t delta)
742 {
743 if (address.bo == NULL) {
744 return address.offset + delta;
745 } else {
746 assert(batch->start <= location && location < batch->end);
747
748 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
749 }
750 }
751
752 /* Wrapper macros needed to work around preprocessor argument issues. In
753 * particular, arguments don't get pre-evaluated if they are concatenated.
754 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
755 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
756 * We can work around this easily enough with these helpers.
757 */
758 #define __anv_cmd_length(cmd) cmd ## _length
759 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
760 #define __anv_cmd_header(cmd) cmd ## _header
761 #define __anv_cmd_pack(cmd) cmd ## _pack
762
763 #define anv_batch_emit(batch, cmd, ...) do { \
764 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
765 struct cmd __template = { \
766 __anv_cmd_header(cmd), \
767 __VA_ARGS__ \
768 }; \
769 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
770 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
771 } while (0)
772
773 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
774 void *__dst = anv_batch_emit_dwords(batch, n); \
775 struct cmd __template = { \
776 __anv_cmd_header(cmd), \
777 .DwordLength = n - __anv_cmd_length_bias(cmd), \
778 __VA_ARGS__ \
779 }; \
780 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
781 __dst; \
782 })
783
784 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
785 do { \
786 uint32_t *dw; \
787 \
788 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
789 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
790 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
791 dw[i] = (dwords0)[i] | (dwords1)[i]; \
792 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
793 } while (0)
794
795 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
796 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
797 struct anv_state __state = \
798 anv_state_pool_alloc((pool), __size, align); \
799 struct cmd __template = { \
800 __VA_ARGS__ \
801 }; \
802 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
803 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
804 if (!(pool)->block_pool->device->info.has_llc) \
805 anv_state_clflush(__state); \
806 __state; \
807 })
808
809 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
810 .GraphicsDataTypeGFDT = 0, \
811 .LLCCacheabilityControlLLCCC = 0, \
812 .L3CacheabilityControlL3CC = 1, \
813 }
814
815 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
816 .LLCeLLCCacheabilityControlLLCCC = 0, \
817 .L3CacheabilityControlL3CC = 1, \
818 }
819
820 #define GEN8_MOCS { \
821 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
822 .TargetCache = L3DefertoPATforLLCeLLCselection, \
823 .AgeforQUADLRU = 0 \
824 }
825
826 /* Skylake: MOCS is now an index into an array of 62 different caching
827 * configurations programmed by the kernel.
828 */
829
830 #define GEN9_MOCS { \
831 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
832 .IndextoMOCSTables = 2 \
833 }
834
835 #define GEN9_MOCS_PTE { \
836 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
837 .IndextoMOCSTables = 1 \
838 }
839
840 struct anv_device_memory {
841 struct anv_bo bo;
842 uint32_t type_index;
843 VkDeviceSize map_size;
844 void * map;
845 };
846
847 /**
848 * Header for Vertex URB Entry (VUE)
849 */
850 struct anv_vue_header {
851 uint32_t Reserved;
852 uint32_t RTAIndex; /* RenderTargetArrayIndex */
853 uint32_t ViewportIndex;
854 float PointWidth;
855 };
856
857 struct anv_descriptor_set_binding_layout {
858 /* Number of array elements in this binding */
859 uint16_t array_size;
860
861 /* Index into the flattend descriptor set */
862 uint16_t descriptor_index;
863
864 /* Index into the dynamic state array for a dynamic buffer */
865 int16_t dynamic_offset_index;
866
867 /* Index into the descriptor set buffer views */
868 int16_t buffer_index;
869
870 struct {
871 /* Index into the binding table for the associated surface */
872 int16_t surface_index;
873
874 /* Index into the sampler table for the associated sampler */
875 int16_t sampler_index;
876
877 /* Index into the image table for the associated image */
878 int16_t image_index;
879 } stage[MESA_SHADER_STAGES];
880
881 /* Immutable samplers (or NULL if no immutable samplers) */
882 struct anv_sampler **immutable_samplers;
883 };
884
885 struct anv_descriptor_set_layout {
886 /* Number of bindings in this descriptor set */
887 uint16_t binding_count;
888
889 /* Total size of the descriptor set with room for all array entries */
890 uint16_t size;
891
892 /* Shader stages affected by this descriptor set */
893 uint16_t shader_stages;
894
895 /* Number of buffers in this descriptor set */
896 uint16_t buffer_count;
897
898 /* Number of dynamic offsets used by this descriptor set */
899 uint16_t dynamic_offset_count;
900
901 /* Bindings in this descriptor set */
902 struct anv_descriptor_set_binding_layout binding[0];
903 };
904
905 struct anv_descriptor {
906 VkDescriptorType type;
907
908 union {
909 struct {
910 union {
911 struct anv_image_view *image_view;
912 };
913 struct anv_sampler *sampler;
914 };
915
916 struct anv_buffer_view *buffer_view;
917 };
918 };
919
920 struct anv_descriptor_set {
921 const struct anv_descriptor_set_layout *layout;
922 struct anv_buffer_view *buffer_views;
923 struct anv_descriptor descriptors[0];
924 };
925
926 VkResult
927 anv_descriptor_set_create(struct anv_device *device,
928 const struct anv_descriptor_set_layout *layout,
929 struct anv_descriptor_set **out_set);
930
931 void
932 anv_descriptor_set_destroy(struct anv_device *device,
933 struct anv_descriptor_set *set);
934
935 struct anv_pipeline_binding {
936 /* The descriptor set this surface corresponds to */
937 uint16_t set;
938
939 /* Offset into the descriptor set */
940 uint16_t offset;
941 };
942
943 struct anv_pipeline_layout {
944 struct {
945 struct anv_descriptor_set_layout *layout;
946 uint32_t dynamic_offset_start;
947 struct {
948 uint32_t surface_start;
949 uint32_t sampler_start;
950 uint32_t image_start;
951 } stage[MESA_SHADER_STAGES];
952 } set[MAX_SETS];
953
954 uint32_t num_sets;
955
956 struct {
957 bool has_dynamic_offsets;
958 uint32_t surface_count;
959 struct anv_pipeline_binding *surface_to_descriptor;
960 uint32_t sampler_count;
961 struct anv_pipeline_binding *sampler_to_descriptor;
962 uint32_t image_count;
963 } stage[MESA_SHADER_STAGES];
964
965 struct anv_pipeline_binding entries[0];
966 };
967
968 struct anv_buffer {
969 struct anv_device * device;
970 VkDeviceSize size;
971
972 VkBufferUsageFlags usage;
973
974 /* Set when bound */
975 struct anv_bo * bo;
976 VkDeviceSize offset;
977 };
978
979 enum anv_cmd_dirty_bits {
980 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
981 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
982 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
983 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
984 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
985 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
986 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
987 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
988 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
989 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
990 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
991 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
992 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
993 };
994 typedef uint32_t anv_cmd_dirty_mask_t;
995
996 struct anv_vertex_binding {
997 struct anv_buffer * buffer;
998 VkDeviceSize offset;
999 };
1000
1001 struct anv_push_constants {
1002 /* Current allocated size of this push constants data structure.
1003 * Because a decent chunk of it may not be used (images on SKL, for
1004 * instance), we won't actually allocate the entire structure up-front.
1005 */
1006 uint32_t size;
1007
1008 /* Push constant data provided by the client through vkPushConstants */
1009 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
1010
1011 /* Our hardware only provides zero-based vertex and instance id so, in
1012 * order to satisfy the vulkan requirements, we may have to push one or
1013 * both of these into the shader.
1014 */
1015 uint32_t base_vertex;
1016 uint32_t base_instance;
1017
1018 /* Offsets and ranges for dynamically bound buffers */
1019 struct {
1020 uint32_t offset;
1021 uint32_t range;
1022 } dynamic[MAX_DYNAMIC_BUFFERS];
1023
1024 /* Image data for image_load_store on pre-SKL */
1025 struct brw_image_param images[MAX_IMAGES];
1026 };
1027
1028 struct anv_dynamic_state {
1029 struct {
1030 uint32_t count;
1031 VkViewport viewports[MAX_VIEWPORTS];
1032 } viewport;
1033
1034 struct {
1035 uint32_t count;
1036 VkRect2D scissors[MAX_SCISSORS];
1037 } scissor;
1038
1039 float line_width;
1040
1041 struct {
1042 float bias;
1043 float clamp;
1044 float slope;
1045 } depth_bias;
1046
1047 float blend_constants[4];
1048
1049 struct {
1050 float min;
1051 float max;
1052 } depth_bounds;
1053
1054 struct {
1055 uint32_t front;
1056 uint32_t back;
1057 } stencil_compare_mask;
1058
1059 struct {
1060 uint32_t front;
1061 uint32_t back;
1062 } stencil_write_mask;
1063
1064 struct {
1065 uint32_t front;
1066 uint32_t back;
1067 } stencil_reference;
1068 };
1069
1070 extern const struct anv_dynamic_state default_dynamic_state;
1071
1072 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
1073 const struct anv_dynamic_state *src,
1074 uint32_t copy_mask);
1075
1076 /**
1077 * Attachment state when recording a renderpass instance.
1078 *
1079 * The clear value is valid only if there exists a pending clear.
1080 */
1081 struct anv_attachment_state {
1082 VkImageAspectFlags pending_clear_aspects;
1083 VkClearValue clear_value;
1084 };
1085
1086 /** State required while building cmd buffer */
1087 struct anv_cmd_state {
1088 /* PIPELINE_SELECT.PipelineSelection */
1089 uint32_t current_pipeline;
1090 uint32_t current_l3_config;
1091 uint32_t vb_dirty;
1092 anv_cmd_dirty_mask_t dirty;
1093 anv_cmd_dirty_mask_t compute_dirty;
1094 uint32_t num_workgroups_offset;
1095 struct anv_bo *num_workgroups_bo;
1096 VkShaderStageFlags descriptors_dirty;
1097 VkShaderStageFlags push_constants_dirty;
1098 uint32_t scratch_size;
1099 struct anv_pipeline * pipeline;
1100 struct anv_pipeline * compute_pipeline;
1101 struct anv_framebuffer * framebuffer;
1102 struct anv_render_pass * pass;
1103 struct anv_subpass * subpass;
1104 uint32_t restart_index;
1105 struct anv_vertex_binding vertex_bindings[MAX_VBS];
1106 struct anv_descriptor_set * descriptors[MAX_SETS];
1107 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
1108 struct anv_state binding_tables[MESA_SHADER_STAGES];
1109 struct anv_state samplers[MESA_SHADER_STAGES];
1110 struct anv_dynamic_state dynamic;
1111 bool need_query_wa;
1112
1113 /**
1114 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1115 * valid only when recording a render pass instance.
1116 */
1117 struct anv_attachment_state * attachments;
1118
1119 struct {
1120 struct anv_buffer * index_buffer;
1121 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1122 uint32_t index_offset;
1123 } gen7;
1124 };
1125
1126 struct anv_cmd_pool {
1127 VkAllocationCallbacks alloc;
1128 struct list_head cmd_buffers;
1129 };
1130
1131 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1132
1133 enum anv_cmd_buffer_exec_mode {
1134 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1135 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1136 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1137 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1138 };
1139
1140 struct anv_cmd_buffer {
1141 VK_LOADER_DATA _loader_data;
1142
1143 struct anv_device * device;
1144
1145 struct anv_cmd_pool * pool;
1146 struct list_head pool_link;
1147
1148 struct anv_batch batch;
1149
1150 /* Fields required for the actual chain of anv_batch_bo's.
1151 *
1152 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1153 */
1154 struct list_head batch_bos;
1155 enum anv_cmd_buffer_exec_mode exec_mode;
1156
1157 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1158 * referenced by this command buffer
1159 *
1160 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1161 */
1162 struct anv_vector seen_bbos;
1163
1164 /* A vector of int32_t's for every block of binding tables.
1165 *
1166 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1167 */
1168 struct anv_vector bt_blocks;
1169 uint32_t bt_next;
1170 struct anv_reloc_list surface_relocs;
1171
1172 /* Information needed for execbuf
1173 *
1174 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1175 */
1176 struct {
1177 struct drm_i915_gem_execbuffer2 execbuf;
1178
1179 struct drm_i915_gem_exec_object2 * objects;
1180 uint32_t bo_count;
1181 struct anv_bo ** bos;
1182
1183 /* Allocated length of the 'objects' and 'bos' arrays */
1184 uint32_t array_length;
1185
1186 bool need_reloc;
1187 } execbuf2;
1188
1189 /* Serial for tracking buffer completion */
1190 uint32_t serial;
1191
1192 /* Stream objects for storing temporary data */
1193 struct anv_state_stream surface_state_stream;
1194 struct anv_state_stream dynamic_state_stream;
1195
1196 VkCommandBufferUsageFlags usage_flags;
1197 VkCommandBufferLevel level;
1198
1199 struct anv_cmd_state state;
1200 };
1201
1202 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1203 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1204 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1205 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1206 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1207 struct anv_cmd_buffer *secondary);
1208 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1209
1210 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1211 unsigned stage, struct anv_state *bt_state);
1212 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1213 unsigned stage, struct anv_state *state);
1214 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1215 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer,
1216 uint32_t stages);
1217
1218 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1219 const void *data, uint32_t size, uint32_t alignment);
1220 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1221 uint32_t *a, uint32_t *b,
1222 uint32_t dwords, uint32_t alignment);
1223
1224 struct anv_address
1225 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1226 struct anv_state
1227 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1228 uint32_t entries, uint32_t *state_offset);
1229 struct anv_state
1230 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1231 struct anv_state
1232 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1233 uint32_t size, uint32_t alignment);
1234
1235 VkResult
1236 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1237
1238 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1239 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1240
1241 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1242 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1243 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1244 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1245
1246 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1247
1248 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
1249 const VkRenderPassBeginInfo *info);
1250
1251 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1252 struct anv_subpass *subpass);
1253 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1254 struct anv_subpass *subpass);
1255 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1256 struct anv_subpass *subpass);
1257 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1258 struct anv_subpass *subpass);
1259
1260 struct anv_state
1261 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1262 gl_shader_stage stage);
1263 struct anv_state
1264 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
1265
1266 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
1267
1268 const struct anv_image_view *
1269 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1270
1271 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1272
1273 struct anv_fence {
1274 struct anv_bo bo;
1275 struct drm_i915_gem_execbuffer2 execbuf;
1276 struct drm_i915_gem_exec_object2 exec2_objects[1];
1277 bool ready;
1278 };
1279
1280 struct anv_event {
1281 uint32_t semaphore;
1282 struct anv_state state;
1283 };
1284
1285 struct nir_shader;
1286
1287 struct anv_shader_module {
1288 struct nir_shader * nir;
1289
1290 uint32_t size;
1291 char data[0];
1292 };
1293
1294 static inline gl_shader_stage
1295 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1296 {
1297 assert(__builtin_popcount(vk_stage) == 1);
1298 return ffs(vk_stage) - 1;
1299 }
1300
1301 static inline VkShaderStageFlagBits
1302 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1303 {
1304 return (1 << mesa_stage);
1305 }
1306
1307 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1308
1309 #define anv_foreach_stage(stage, stage_bits) \
1310 for (gl_shader_stage stage, \
1311 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1312 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1313 __tmp &= ~(1 << (stage)))
1314
1315 struct anv_pipeline {
1316 struct anv_device * device;
1317 struct anv_batch batch;
1318 uint32_t batch_data[512];
1319 struct anv_reloc_list batch_relocs;
1320 uint32_t dynamic_state_mask;
1321 struct anv_dynamic_state dynamic_state;
1322
1323 struct anv_pipeline_layout * layout;
1324 bool use_repclear;
1325
1326 struct brw_vs_prog_data vs_prog_data;
1327 struct brw_wm_prog_data wm_prog_data;
1328 struct brw_gs_prog_data gs_prog_data;
1329 struct brw_cs_prog_data cs_prog_data;
1330 bool writes_point_size;
1331 struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
1332 uint32_t scratch_start[MESA_SHADER_STAGES];
1333 uint32_t total_scratch;
1334 struct {
1335 uint32_t vs_start;
1336 uint32_t vs_size;
1337 uint32_t nr_vs_entries;
1338 uint32_t gs_start;
1339 uint32_t gs_size;
1340 uint32_t nr_gs_entries;
1341 } urb;
1342
1343 VkShaderStageFlags active_stages;
1344 struct anv_state blend_state;
1345 uint32_t vs_simd8;
1346 uint32_t vs_vec4;
1347 uint32_t ps_simd8;
1348 uint32_t ps_simd16;
1349 uint32_t ps_ksp0;
1350 uint32_t ps_ksp2;
1351 uint32_t ps_grf_start0;
1352 uint32_t ps_grf_start2;
1353 uint32_t gs_kernel;
1354 uint32_t gs_vertex_count;
1355 uint32_t cs_simd;
1356
1357 uint32_t vb_used;
1358 uint32_t binding_stride[MAX_VBS];
1359 bool instancing_enable[MAX_VBS];
1360 bool primitive_restart;
1361 uint32_t topology;
1362
1363 uint32_t cs_thread_width_max;
1364 uint32_t cs_right_mask;
1365
1366 struct {
1367 uint32_t sf[7];
1368 uint32_t depth_stencil_state[3];
1369 } gen7;
1370
1371 struct {
1372 uint32_t sf[4];
1373 uint32_t raster[5];
1374 uint32_t wm_depth_stencil[3];
1375 } gen8;
1376
1377 struct {
1378 uint32_t wm_depth_stencil[4];
1379 } gen9;
1380 };
1381
1382 struct anv_graphics_pipeline_create_info {
1383 /**
1384 * If non-negative, overrides the color attachment count of the pipeline's
1385 * subpass.
1386 */
1387 int8_t color_attachment_count;
1388
1389 bool use_repclear;
1390 bool disable_viewport;
1391 bool disable_scissor;
1392 bool disable_vs;
1393 bool use_rectlist;
1394 };
1395
1396 VkResult
1397 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1398 struct anv_pipeline_cache *cache,
1399 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1400 const struct anv_graphics_pipeline_create_info *extra,
1401 const VkAllocationCallbacks *alloc);
1402
1403 VkResult
1404 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1405 struct anv_pipeline_cache *cache,
1406 const VkComputePipelineCreateInfo *info,
1407 struct anv_shader_module *module,
1408 const char *entrypoint,
1409 const VkSpecializationInfo *spec_info);
1410
1411 VkResult
1412 anv_graphics_pipeline_create(VkDevice device,
1413 VkPipelineCache cache,
1414 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1415 const struct anv_graphics_pipeline_create_info *extra,
1416 const VkAllocationCallbacks *alloc,
1417 VkPipeline *pPipeline);
1418
1419 VkResult
1420 gen7_graphics_pipeline_create(VkDevice _device,
1421 struct anv_pipeline_cache *cache,
1422 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1423 const struct anv_graphics_pipeline_create_info *extra,
1424 const VkAllocationCallbacks *alloc,
1425 VkPipeline *pPipeline);
1426
1427 VkResult
1428 gen75_graphics_pipeline_create(VkDevice _device,
1429 struct anv_pipeline_cache *cache,
1430 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1431 const struct anv_graphics_pipeline_create_info *extra,
1432 const VkAllocationCallbacks *alloc,
1433 VkPipeline *pPipeline);
1434
1435 VkResult
1436 gen8_graphics_pipeline_create(VkDevice _device,
1437 struct anv_pipeline_cache *cache,
1438 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1439 const struct anv_graphics_pipeline_create_info *extra,
1440 const VkAllocationCallbacks *alloc,
1441 VkPipeline *pPipeline);
1442 VkResult
1443 gen9_graphics_pipeline_create(VkDevice _device,
1444 struct anv_pipeline_cache *cache,
1445 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1446 const struct anv_graphics_pipeline_create_info *extra,
1447 const VkAllocationCallbacks *alloc,
1448 VkPipeline *pPipeline);
1449 VkResult
1450 gen7_compute_pipeline_create(VkDevice _device,
1451 struct anv_pipeline_cache *cache,
1452 const VkComputePipelineCreateInfo *pCreateInfo,
1453 const VkAllocationCallbacks *alloc,
1454 VkPipeline *pPipeline);
1455 VkResult
1456 gen75_compute_pipeline_create(VkDevice _device,
1457 struct anv_pipeline_cache *cache,
1458 const VkComputePipelineCreateInfo *pCreateInfo,
1459 const VkAllocationCallbacks *alloc,
1460 VkPipeline *pPipeline);
1461
1462 VkResult
1463 gen8_compute_pipeline_create(VkDevice _device,
1464 struct anv_pipeline_cache *cache,
1465 const VkComputePipelineCreateInfo *pCreateInfo,
1466 const VkAllocationCallbacks *alloc,
1467 VkPipeline *pPipeline);
1468 VkResult
1469 gen9_compute_pipeline_create(VkDevice _device,
1470 struct anv_pipeline_cache *cache,
1471 const VkComputePipelineCreateInfo *pCreateInfo,
1472 const VkAllocationCallbacks *alloc,
1473 VkPipeline *pPipeline);
1474
1475 struct anv_format_swizzle {
1476 unsigned r:2;
1477 unsigned g:2;
1478 unsigned b:2;
1479 unsigned a:2;
1480 };
1481
1482 struct anv_format {
1483 const VkFormat vk_format;
1484 const char *name;
1485 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1486 const struct isl_format_layout *isl_layout;
1487 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1488 struct anv_format_swizzle swizzle;
1489 bool has_stencil;
1490 };
1491
1492 const struct anv_format *
1493 anv_format_for_vk_format(VkFormat format);
1494
1495 enum isl_format
1496 anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
1497 VkImageTiling tiling, struct anv_format_swizzle *swizzle);
1498
1499 static inline bool
1500 anv_format_is_color(const struct anv_format *format)
1501 {
1502 return !format->depth_format && !format->has_stencil;
1503 }
1504
1505 static inline bool
1506 anv_format_is_depth_or_stencil(const struct anv_format *format)
1507 {
1508 return format->depth_format || format->has_stencil;
1509 }
1510
1511 /**
1512 * Subsurface of an anv_image.
1513 */
1514 struct anv_surface {
1515 struct isl_surf isl;
1516
1517 /**
1518 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1519 */
1520 uint32_t offset;
1521 };
1522
1523 struct anv_image {
1524 VkImageType type;
1525 /* The original VkFormat provided by the client. This may not match any
1526 * of the actual surface formats.
1527 */
1528 VkFormat vk_format;
1529 const struct anv_format *format;
1530 VkExtent3D extent;
1531 uint32_t levels;
1532 uint32_t array_size;
1533 uint32_t samples; /**< VkImageCreateInfo::samples */
1534 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1535 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1536
1537 VkDeviceSize size;
1538 uint32_t alignment;
1539
1540 /* Set when bound */
1541 struct anv_bo *bo;
1542 VkDeviceSize offset;
1543
1544 bool needs_nonrt_surface_state:1;
1545 bool needs_color_rt_surface_state:1;
1546 bool needs_storage_surface_state:1;
1547
1548 /**
1549 * Image subsurfaces
1550 *
1551 * For each foo, anv_image::foo_surface is valid if and only if
1552 * anv_image::format has a foo aspect.
1553 *
1554 * The hardware requires that the depth buffer and stencil buffer be
1555 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1556 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1557 * allocate the depth and stencil buffers as separate surfaces in the same
1558 * bo.
1559 */
1560 union {
1561 struct anv_surface color_surface;
1562
1563 struct {
1564 struct anv_surface depth_surface;
1565 struct anv_surface stencil_surface;
1566 };
1567 };
1568 };
1569
1570 struct anv_image_view {
1571 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1572 struct anv_bo *bo;
1573 uint32_t offset; /**< Offset into bo. */
1574
1575 VkImageAspectFlags aspect_mask;
1576 VkFormat vk_format;
1577 VkComponentMapping swizzle;
1578 enum isl_format format;
1579 uint32_t base_layer;
1580 uint32_t base_mip;
1581 VkExtent3D level_0_extent; /**< Extent of ::image's level 0 adjusted for ::vk_format. */
1582 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1583
1584 /** RENDER_SURFACE_STATE when using image as a color render target. */
1585 struct anv_state color_rt_surface_state;
1586
1587 /** RENDER_SURFACE_STATE when using image as a non render target. */
1588 struct anv_state nonrt_surface_state;
1589
1590 /** RENDER_SURFACE_STATE when using image as a storage image. */
1591 struct anv_state storage_surface_state;
1592 };
1593
1594 struct anv_image_create_info {
1595 const VkImageCreateInfo *vk_info;
1596 isl_tiling_flags_t isl_tiling_flags;
1597 uint32_t stride;
1598 };
1599
1600 VkResult anv_image_create(VkDevice _device,
1601 const struct anv_image_create_info *info,
1602 const VkAllocationCallbacks* alloc,
1603 VkImage *pImage);
1604
1605 struct anv_surface *
1606 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1607 VkImageAspectFlags aspect_mask);
1608
1609 void anv_image_view_init(struct anv_image_view *view,
1610 struct anv_device *device,
1611 const VkImageViewCreateInfo* pCreateInfo,
1612 struct anv_cmd_buffer *cmd_buffer);
1613
1614 void
1615 anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
1616 struct anv_image_view *iview,
1617 const VkImageViewCreateInfo *pCreateInfo,
1618 VkImageUsageFlagBits usage);
1619 void
1620 gen7_fill_image_surface_state(struct anv_device *device, void *state_map,
1621 struct anv_image_view *iview,
1622 const VkImageViewCreateInfo *pCreateInfo,
1623 VkImageUsageFlagBits usage);
1624 void
1625 gen75_fill_image_surface_state(struct anv_device *device, void *state_map,
1626 struct anv_image_view *iview,
1627 const VkImageViewCreateInfo *pCreateInfo,
1628 VkImageUsageFlagBits usage);
1629 void
1630 gen8_fill_image_surface_state(struct anv_device *device, void *state_map,
1631 struct anv_image_view *iview,
1632 const VkImageViewCreateInfo *pCreateInfo,
1633 VkImageUsageFlagBits usage);
1634 void
1635 gen9_fill_image_surface_state(struct anv_device *device, void *state_map,
1636 struct anv_image_view *iview,
1637 const VkImageViewCreateInfo *pCreateInfo,
1638 VkImageUsageFlagBits usage);
1639
1640 struct anv_buffer_view {
1641 enum isl_format format; /**< VkBufferViewCreateInfo::format */
1642 struct anv_bo *bo;
1643 uint32_t offset; /**< Offset into bo. */
1644 uint64_t range; /**< VkBufferViewCreateInfo::range */
1645
1646 struct anv_state surface_state;
1647 struct anv_state storage_surface_state;
1648 };
1649
1650 const struct anv_format *
1651 anv_format_for_descriptor_type(VkDescriptorType type);
1652
1653 void anv_fill_buffer_surface_state(struct anv_device *device,
1654 struct anv_state state,
1655 enum isl_format format,
1656 uint32_t offset, uint32_t range,
1657 uint32_t stride);
1658
1659 void gen7_fill_buffer_surface_state(void *state, enum isl_format format,
1660 uint32_t offset, uint32_t range,
1661 uint32_t stride);
1662 void gen75_fill_buffer_surface_state(void *state, enum isl_format format,
1663 uint32_t offset, uint32_t range,
1664 uint32_t stride);
1665 void gen8_fill_buffer_surface_state(void *state, enum isl_format format,
1666 uint32_t offset, uint32_t range,
1667 uint32_t stride);
1668 void gen9_fill_buffer_surface_state(void *state, enum isl_format format,
1669 uint32_t offset, uint32_t range,
1670 uint32_t stride);
1671
1672 void anv_image_view_fill_image_param(struct anv_device *device,
1673 struct anv_image_view *view,
1674 struct brw_image_param *param);
1675 void anv_buffer_view_fill_image_param(struct anv_device *device,
1676 struct anv_buffer_view *view,
1677 struct brw_image_param *param);
1678
1679 struct anv_sampler {
1680 uint32_t state[4];
1681 };
1682
1683 struct anv_framebuffer {
1684 uint32_t width;
1685 uint32_t height;
1686 uint32_t layers;
1687
1688 uint32_t attachment_count;
1689 const struct anv_image_view * attachments[0];
1690 };
1691
1692 struct anv_subpass {
1693 uint32_t input_count;
1694 uint32_t * input_attachments;
1695 uint32_t color_count;
1696 uint32_t * color_attachments;
1697 uint32_t * resolve_attachments;
1698 uint32_t depth_stencil_attachment;
1699 };
1700
1701 struct anv_render_pass_attachment {
1702 const struct anv_format *format;
1703 uint32_t samples;
1704 VkAttachmentLoadOp load_op;
1705 VkAttachmentLoadOp stencil_load_op;
1706 };
1707
1708 struct anv_render_pass {
1709 uint32_t attachment_count;
1710 uint32_t subpass_count;
1711 uint32_t * subpass_attachments;
1712 struct anv_render_pass_attachment * attachments;
1713 struct anv_subpass subpasses[0];
1714 };
1715
1716 extern struct anv_render_pass anv_meta_dummy_renderpass;
1717
1718 struct anv_query_pool_slot {
1719 uint64_t begin;
1720 uint64_t end;
1721 uint64_t available;
1722 };
1723
1724 struct anv_query_pool {
1725 VkQueryType type;
1726 uint32_t slots;
1727 struct anv_bo bo;
1728 };
1729
1730 VkResult anv_device_init_meta(struct anv_device *device);
1731 void anv_device_finish_meta(struct anv_device *device);
1732
1733 void *anv_lookup_entrypoint(const char *name);
1734
1735 void anv_dump_image_to_ppm(struct anv_device *device,
1736 struct anv_image *image, unsigned miplevel,
1737 unsigned array_layer, const char *filename);
1738
1739 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1740 \
1741 static inline struct __anv_type * \
1742 __anv_type ## _from_handle(__VkType _handle) \
1743 { \
1744 return (struct __anv_type *) _handle; \
1745 } \
1746 \
1747 static inline __VkType \
1748 __anv_type ## _to_handle(struct __anv_type *_obj) \
1749 { \
1750 return (__VkType) _obj; \
1751 }
1752
1753 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1754 \
1755 static inline struct __anv_type * \
1756 __anv_type ## _from_handle(__VkType _handle) \
1757 { \
1758 return (struct __anv_type *)(uintptr_t) _handle; \
1759 } \
1760 \
1761 static inline __VkType \
1762 __anv_type ## _to_handle(struct __anv_type *_obj) \
1763 { \
1764 return (__VkType)(uintptr_t) _obj; \
1765 }
1766
1767 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1768 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1769
1770 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1771 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1772 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1773 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1774 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1775
1776 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1777 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1778 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
1779 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1780 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1781 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1782 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1783 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
1784 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1785 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1786 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1787 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
1788 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1789 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1790 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1791 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1792 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1793 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1794
1795 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1796 \
1797 static inline const __VkType * \
1798 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1799 { \
1800 return (const __VkType *) __anv_obj; \
1801 }
1802
1803 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1804 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1805
1806 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1807 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1808 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1809
1810 #ifdef __cplusplus
1811 }
1812 #endif