2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
43 #include "brw_device_info.h"
44 #include "util/macros.h"
45 #include "util/list.h"
47 /* Pre-declarations needed for WSI entrypoints */
50 typedef struct xcb_connection_t xcb_connection_t
;
51 typedef uint32_t xcb_visualid_t
;
52 typedef uint32_t xcb_window_t
;
54 #define VK_USE_PLATFORM_XCB_KHR
55 #define VK_USE_PLATFORM_WAYLAND_KHR
58 #include <vulkan/vulkan.h>
59 #include <vulkan/vulkan_intel.h>
60 #include <vulkan/vk_icd.h>
62 #include "anv_entrypoints.h"
63 #include "anv_gen_macros.h"
64 #include "brw_context.h"
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
87 static inline uint32_t
88 align_u32(uint32_t v
, uint32_t a
)
90 assert(a
!= 0 && a
== (a
& -a
));
91 return (v
+ a
- 1) & ~(a
- 1);
94 static inline uint64_t
95 align_u64(uint64_t v
, uint64_t a
)
97 assert(a
!= 0 && a
== (a
& -a
));
98 return (v
+ a
- 1) & ~(a
- 1);
101 static inline int32_t
102 align_i32(int32_t v
, int32_t a
)
104 assert(a
!= 0 && a
== (a
& -a
));
105 return (v
+ a
- 1) & ~(a
- 1);
108 /** Alignment must be a power of 2. */
110 anv_is_aligned(uintmax_t n
, uintmax_t a
)
112 assert(a
== (a
& -a
));
113 return (n
& (a
- 1)) == 0;
116 static inline uint32_t
117 anv_minify(uint32_t n
, uint32_t levels
)
119 if (unlikely(n
== 0))
122 return MAX(n
>> levels
, 1);
126 anv_clamp_f(float f
, float min
, float max
)
139 anv_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
141 if (*inout_mask
& clear_mask
) {
142 *inout_mask
&= ~clear_mask
;
149 #define for_each_bit(b, dword) \
150 for (uint32_t __dword = (dword); \
151 (b) = __builtin_ffs(__dword) - 1, __dword; \
152 __dword &= ~(1 << (b)))
154 #define typed_memcpy(dest, src, count) ({ \
155 static_assert(sizeof(*src) == sizeof(*dest), ""); \
156 memcpy((dest), (src), (count) * sizeof(*(src))); \
159 #define zero(x) (memset(&(x), 0, sizeof(x)))
161 /* Define no kernel as 1, since that's an illegal offset for a kernel */
165 VkStructureType sType
;
169 /* Whenever we generate an error, pass it through this function. Useful for
170 * debugging, where we can break on it. Only call at error site, not when
171 * propagating errors. Might be useful to plug in a stack trace here.
174 VkResult
__vk_errorf(VkResult error
, const char *file
, int line
, const char *format
, ...);
177 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
178 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
180 #define vk_error(error) error
181 #define vk_errorf(error, format, ...) error
184 void __anv_finishme(const char *file
, int line
, const char *format
, ...)
185 anv_printflike(3, 4);
186 void anv_loge(const char *format
, ...) anv_printflike(1, 2);
187 void anv_loge_v(const char *format
, va_list va
);
190 * Print a FINISHME message, including its source location.
192 #define anv_finishme(format, ...) \
193 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
195 /* A non-fatal assert. Useful for debugging. */
197 #define anv_assert(x) ({ \
198 if (unlikely(!(x))) \
199 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
202 #define anv_assert(x)
206 * If a block of code is annotated with anv_validate, then the block runs only
210 #define anv_validate if (1)
212 #define anv_validate if (0)
215 void anv_abortf(const char *format
, ...) anv_noreturn
anv_printflike(1, 2);
216 void anv_abortfv(const char *format
, va_list va
) anv_noreturn
;
218 #define stub_return(v) \
220 anv_finishme("stub %s", __func__); \
226 anv_finishme("stub %s", __func__); \
231 * A dynamically growable, circular buffer. Elements are added at head and
232 * removed from tail. head and tail are free-running uint32_t indices and we
233 * only compute the modulo with size when accessing the array. This way,
234 * number of bytes in the queue is always head - tail, even in case of
241 uint32_t element_size
;
246 int anv_vector_init(struct anv_vector
*queue
, uint32_t element_size
, uint32_t size
);
247 void *anv_vector_add(struct anv_vector
*queue
);
248 void *anv_vector_remove(struct anv_vector
*queue
);
251 anv_vector_length(struct anv_vector
*queue
)
253 return (queue
->head
- queue
->tail
) / queue
->element_size
;
257 anv_vector_head(struct anv_vector
*vector
)
259 assert(vector
->tail
< vector
->head
);
260 return (void *)((char *)vector
->data
+
261 ((vector
->head
- vector
->element_size
) &
262 (vector
->size
- 1)));
266 anv_vector_tail(struct anv_vector
*vector
)
268 return (void *)((char *)vector
->data
+ (vector
->tail
& (vector
->size
- 1)));
272 anv_vector_finish(struct anv_vector
*queue
)
277 #define anv_vector_foreach(elem, queue) \
278 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
279 for (uint32_t __anv_vector_offset = (queue)->tail; \
280 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
281 __anv_vector_offset += (queue)->element_size)
286 /* Index into the current validation list. This is used by the
287 * validation list building alrogithm to track which buffers are already
288 * in the validation list so that we can ensure uniqueness.
292 /* Last known offset. This value is provided by the kernel when we
293 * execbuf and is used as the presumed offset for the next bunch of
302 /* Represents a lock-free linked list of "free" things. This is used by
303 * both the block pool and the state pools. Unfortunately, in order to
304 * solve the ABA problem, we can't use a single uint32_t head.
306 union anv_free_list
{
310 /* A simple count that is incremented every time the head changes. */
316 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
318 struct anv_block_state
{
328 struct anv_block_pool
{
329 struct anv_device
*device
;
333 /* The offset from the start of the bo to the "center" of the block
334 * pool. Pointers to allocated blocks are given by
335 * bo.map + center_bo_offset + offsets.
337 uint32_t center_bo_offset
;
339 /* Current memory map of the block pool. This pointer may or may not
340 * point to the actual beginning of the block pool memory. If
341 * anv_block_pool_alloc_back has ever been called, then this pointer
342 * will point to the "center" position of the buffer and all offsets
343 * (negative or positive) given out by the block pool alloc functions
344 * will be valid relative to this pointer.
346 * In particular, map == bo.map + center_offset
352 * Array of mmaps and gem handles owned by the block pool, reclaimed when
353 * the block pool is destroyed.
355 struct anv_vector mmap_cleanups
;
359 union anv_free_list free_list
;
360 struct anv_block_state state
;
362 union anv_free_list back_free_list
;
363 struct anv_block_state back_state
;
366 /* Block pools are backed by a fixed-size 2GB memfd */
367 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
369 /* The center of the block pool is also the middle of the memfd. This may
370 * change in the future if we decide differently for some reason.
372 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
374 static inline uint32_t
375 anv_block_pool_size(struct anv_block_pool
*pool
)
377 return pool
->state
.end
+ pool
->back_state
.end
;
386 struct anv_fixed_size_state_pool
{
388 union anv_free_list free_list
;
389 struct anv_block_state block
;
392 #define ANV_MIN_STATE_SIZE_LOG2 6
393 #define ANV_MAX_STATE_SIZE_LOG2 10
395 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
397 struct anv_state_pool
{
398 struct anv_block_pool
*block_pool
;
399 struct anv_fixed_size_state_pool buckets
[ANV_STATE_BUCKETS
];
402 struct anv_state_stream_block
;
404 struct anv_state_stream
{
405 struct anv_block_pool
*block_pool
;
407 /* The current working block */
408 struct anv_state_stream_block
*block
;
410 /* Offset at which the current block starts */
412 /* Offset at which to allocate the next state */
414 /* Offset at which the current block ends */
418 #define CACHELINE_SIZE 64
419 #define CACHELINE_MASK 63
422 anv_state_clflush(struct anv_state state
)
424 /* state.map may not be cacheline aligned, so round down the start pointer
425 * to a cacheline boundary so we flush all pages that contain the state.
427 void *end
= state
.map
+ state
.alloc_size
;
428 void *p
= (void *) (((uintptr_t) state
.map
) & ~CACHELINE_MASK
);
430 __builtin_ia32_mfence();
432 __builtin_ia32_clflush(p
);
437 void anv_block_pool_init(struct anv_block_pool
*pool
,
438 struct anv_device
*device
, uint32_t block_size
);
439 void anv_block_pool_finish(struct anv_block_pool
*pool
);
440 int32_t anv_block_pool_alloc(struct anv_block_pool
*pool
);
441 int32_t anv_block_pool_alloc_back(struct anv_block_pool
*pool
);
442 void anv_block_pool_free(struct anv_block_pool
*pool
, int32_t offset
);
443 void anv_state_pool_init(struct anv_state_pool
*pool
,
444 struct anv_block_pool
*block_pool
);
445 void anv_state_pool_finish(struct anv_state_pool
*pool
);
446 struct anv_state
anv_state_pool_alloc(struct anv_state_pool
*pool
,
447 size_t state_size
, size_t alignment
);
448 void anv_state_pool_free(struct anv_state_pool
*pool
, struct anv_state state
);
449 void anv_state_stream_init(struct anv_state_stream
*stream
,
450 struct anv_block_pool
*block_pool
);
451 void anv_state_stream_finish(struct anv_state_stream
*stream
);
452 struct anv_state
anv_state_stream_alloc(struct anv_state_stream
*stream
,
453 uint32_t size
, uint32_t alignment
);
456 * Implements a pool of re-usable BOs. The interface is identical to that
457 * of block_pool except that each block is its own BO.
460 struct anv_device
*device
;
467 void anv_bo_pool_init(struct anv_bo_pool
*pool
,
468 struct anv_device
*device
, uint32_t block_size
);
469 void anv_bo_pool_finish(struct anv_bo_pool
*pool
);
470 VkResult
anv_bo_pool_alloc(struct anv_bo_pool
*pool
, struct anv_bo
*bo
);
471 void anv_bo_pool_free(struct anv_bo_pool
*pool
, const struct anv_bo
*bo
);
474 void *anv_resolve_entrypoint(uint32_t index
);
476 extern struct anv_dispatch_table dtable
;
478 #define ANV_CALL(func) ({ \
479 if (dtable.func == NULL) { \
480 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
481 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
487 anv_alloc(const VkAllocationCallbacks
*alloc
,
488 size_t size
, size_t align
,
489 VkSystemAllocationScope scope
)
491 return alloc
->pfnAllocation(alloc
->pUserData
, size
, align
, scope
);
495 anv_realloc(const VkAllocationCallbacks
*alloc
,
496 void *ptr
, size_t size
, size_t align
,
497 VkSystemAllocationScope scope
)
499 return alloc
->pfnReallocation(alloc
->pUserData
, ptr
, size
, align
, scope
);
503 anv_free(const VkAllocationCallbacks
*alloc
, void *data
)
505 alloc
->pfnFree(alloc
->pUserData
, data
);
509 anv_alloc2(const VkAllocationCallbacks
*parent_alloc
,
510 const VkAllocationCallbacks
*alloc
,
511 size_t size
, size_t align
,
512 VkSystemAllocationScope scope
)
515 return anv_alloc(alloc
, size
, align
, scope
);
517 return anv_alloc(parent_alloc
, size
, align
, scope
);
521 anv_free2(const VkAllocationCallbacks
*parent_alloc
,
522 const VkAllocationCallbacks
*alloc
,
526 anv_free(alloc
, data
);
528 anv_free(parent_alloc
, data
);
531 struct anv_physical_device
{
532 VK_LOADER_DATA _loader_data
;
534 struct anv_instance
* instance
;
538 const struct brw_device_info
* info
;
539 uint64_t aperture_size
;
540 struct brw_compiler
* compiler
;
541 struct isl_device isl_dev
;
544 struct anv_wsi_interaface
;
546 #define VK_ICD_WSI_PLATFORM_MAX 5
548 struct anv_instance
{
549 VK_LOADER_DATA _loader_data
;
551 VkAllocationCallbacks alloc
;
554 int physicalDeviceCount
;
555 struct anv_physical_device physicalDevice
;
557 struct anv_wsi_interface
* wsi
[VK_ICD_WSI_PLATFORM_MAX
];
560 VkResult
anv_init_wsi(struct anv_instance
*instance
);
561 void anv_finish_wsi(struct anv_instance
*instance
);
563 struct anv_meta_state
{
564 VkAllocationCallbacks alloc
;
567 * Use array element `i` for images with `2^i` samples.
571 * Pipeline N is used to clear color attachment N of the current
574 * HACK: We use one pipeline per color attachment to work around the
575 * compiler's inability to dynamically set the render target index of
576 * the render target write message.
578 struct anv_pipeline
*color_pipelines
[MAX_RTS
];
580 struct anv_pipeline
*depth_only_pipeline
;
581 struct anv_pipeline
*stencil_only_pipeline
;
582 struct anv_pipeline
*depthstencil_pipeline
;
583 } clear
[1 + MAX_SAMPLES_LOG2
];
586 VkRenderPass render_pass
;
588 /** Pipeline that blits from a 1D image. */
589 VkPipeline pipeline_1d_src
;
591 /** Pipeline that blits from a 2D image. */
592 VkPipeline pipeline_2d_src
;
594 /** Pipeline that blits from a 3D image. */
595 VkPipeline pipeline_3d_src
;
597 VkPipelineLayout pipeline_layout
;
598 VkDescriptorSetLayout ds_layout
;
602 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
603 VkPipeline pipelines
[MAX_SAMPLES_LOG2
];
606 VkPipelineLayout pipeline_layout
;
607 VkDescriptorSetLayout ds_layout
;
612 VK_LOADER_DATA _loader_data
;
614 struct anv_device
* device
;
616 struct anv_state_pool
* pool
;
619 struct anv_pipeline_cache
{
620 struct anv_device
* device
;
621 struct anv_state_stream program_stream
;
622 pthread_mutex_t mutex
;
625 void anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
626 struct anv_device
*device
);
627 void anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
);
630 VK_LOADER_DATA _loader_data
;
632 VkAllocationCallbacks alloc
;
634 struct anv_instance
* instance
;
636 struct brw_device_info info
;
637 struct isl_device isl_dev
;
641 struct anv_bo_pool batch_bo_pool
;
643 struct anv_block_pool dynamic_state_block_pool
;
644 struct anv_state_pool dynamic_state_pool
;
646 struct anv_block_pool instruction_block_pool
;
647 struct anv_pipeline_cache default_pipeline_cache
;
649 struct anv_block_pool surface_state_block_pool
;
650 struct anv_state_pool surface_state_pool
;
652 struct anv_bo workaround_bo
;
654 struct anv_meta_state meta_state
;
656 struct anv_state border_colors
;
658 struct anv_queue queue
;
660 struct anv_block_pool scratch_block_pool
;
662 pthread_mutex_t mutex
;
665 void* anv_gem_mmap(struct anv_device
*device
,
666 uint32_t gem_handle
, uint64_t offset
, uint64_t size
, uint32_t flags
);
667 void anv_gem_munmap(void *p
, uint64_t size
);
668 uint32_t anv_gem_create(struct anv_device
*device
, size_t size
);
669 void anv_gem_close(struct anv_device
*device
, uint32_t gem_handle
);
670 uint32_t anv_gem_userptr(struct anv_device
*device
, void *mem
, size_t size
);
671 int anv_gem_wait(struct anv_device
*device
, uint32_t gem_handle
, int64_t *timeout_ns
);
672 int anv_gem_execbuffer(struct anv_device
*device
,
673 struct drm_i915_gem_execbuffer2
*execbuf
);
674 int anv_gem_set_tiling(struct anv_device
*device
, uint32_t gem_handle
,
675 uint32_t stride
, uint32_t tiling
);
676 int anv_gem_create_context(struct anv_device
*device
);
677 int anv_gem_destroy_context(struct anv_device
*device
, int context
);
678 int anv_gem_get_param(int fd
, uint32_t param
);
679 bool anv_gem_get_bit6_swizzle(int fd
, uint32_t tiling
);
680 int anv_gem_get_aperture(int fd
, uint64_t *size
);
681 int anv_gem_handle_to_fd(struct anv_device
*device
, uint32_t gem_handle
);
682 uint32_t anv_gem_fd_to_handle(struct anv_device
*device
, int fd
);
683 int anv_gem_set_caching(struct anv_device
*device
, uint32_t gem_handle
, uint32_t caching
);
684 int anv_gem_set_domain(struct anv_device
*device
, uint32_t gem_handle
,
685 uint32_t read_domains
, uint32_t write_domain
);
687 VkResult
anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
);
689 struct anv_reloc_list
{
692 struct drm_i915_gem_relocation_entry
* relocs
;
693 struct anv_bo
** reloc_bos
;
696 VkResult
anv_reloc_list_init(struct anv_reloc_list
*list
,
697 const VkAllocationCallbacks
*alloc
);
698 void anv_reloc_list_finish(struct anv_reloc_list
*list
,
699 const VkAllocationCallbacks
*alloc
);
701 uint64_t anv_reloc_list_add(struct anv_reloc_list
*list
,
702 const VkAllocationCallbacks
*alloc
,
703 uint32_t offset
, struct anv_bo
*target_bo
,
706 struct anv_batch_bo
{
707 /* Link in the anv_cmd_buffer.owned_batch_bos list */
708 struct list_head link
;
712 /* Bytes actually consumed in this batch BO */
715 /* Last seen surface state block pool bo offset */
716 uint32_t last_ss_pool_bo_offset
;
718 struct anv_reloc_list relocs
;
722 const VkAllocationCallbacks
* alloc
;
728 struct anv_reloc_list
* relocs
;
730 /* This callback is called (with the associated user data) in the event
731 * that the batch runs out of space.
733 VkResult (*extend_cb
)(struct anv_batch
*, void *);
737 void *anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
);
738 void anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
);
739 uint64_t anv_batch_emit_reloc(struct anv_batch
*batch
,
740 void *location
, struct anv_bo
*bo
, uint32_t offset
);
747 #define __gen_address_type struct anv_address
748 #define __gen_user_data struct anv_batch
750 static inline uint64_t
751 __gen_combine_address(struct anv_batch
*batch
, void *location
,
752 const struct anv_address address
, uint32_t delta
)
754 if (address
.bo
== NULL
) {
755 return address
.offset
+ delta
;
757 assert(batch
->start
<= location
&& location
< batch
->end
);
759 return anv_batch_emit_reloc(batch
, location
, address
.bo
, address
.offset
+ delta
);
763 /* Wrapper macros needed to work around preprocessor argument issues. In
764 * particular, arguments don't get pre-evaluated if they are concatenated.
765 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
766 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
767 * We can work around this easily enough with these helpers.
769 #define __anv_cmd_length(cmd) cmd ## _length
770 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
771 #define __anv_cmd_header(cmd) cmd ## _header
772 #define __anv_cmd_pack(cmd) cmd ## _pack
774 #define anv_batch_emit(batch, cmd, ...) do { \
775 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
776 struct cmd __template = { \
777 __anv_cmd_header(cmd), \
780 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
781 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
784 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
785 void *__dst = anv_batch_emit_dwords(batch, n); \
786 struct cmd __template = { \
787 __anv_cmd_header(cmd), \
788 .DwordLength = n - __anv_cmd_length_bias(cmd), \
791 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
795 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
799 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
800 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
801 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
802 dw[i] = (dwords0)[i] | (dwords1)[i]; \
803 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
806 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
807 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
808 struct anv_state __state = \
809 anv_state_pool_alloc((pool), __size, align); \
810 struct cmd __template = { \
813 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
814 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
815 if (!(pool)->block_pool->device->info.has_llc) \
816 anv_state_clflush(__state); \
820 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
821 .GraphicsDataTypeGFDT = 0, \
822 .LLCCacheabilityControlLLCCC = 0, \
823 .L3CacheabilityControlL3CC = 1, \
826 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
827 .LLCeLLCCacheabilityControlLLCCC = 0, \
828 .L3CacheabilityControlL3CC = 1, \
831 #define GEN8_MOCS { \
832 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
833 .TargetCache = L3DefertoPATforLLCeLLCselection, \
837 /* Skylake: MOCS is now an index into an array of 62 different caching
838 * configurations programmed by the kernel.
841 #define GEN9_MOCS { \
842 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
843 .IndextoMOCSTables = 2 \
846 #define GEN9_MOCS_PTE { \
847 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
848 .IndextoMOCSTables = 1 \
851 struct anv_device_memory
{
854 VkDeviceSize map_size
;
859 * Header for Vertex URB Entry (VUE)
861 struct anv_vue_header
{
863 uint32_t RTAIndex
; /* RenderTargetArrayIndex */
864 uint32_t ViewportIndex
;
868 struct anv_descriptor_set_binding_layout
{
869 /* Number of array elements in this binding */
872 /* Index into the flattend descriptor set */
873 uint16_t descriptor_index
;
875 /* Index into the dynamic state array for a dynamic buffer */
876 int16_t dynamic_offset_index
;
878 /* Index into the descriptor set buffer views */
879 int16_t buffer_index
;
882 /* Index into the binding table for the associated surface */
883 int16_t surface_index
;
885 /* Index into the sampler table for the associated sampler */
886 int16_t sampler_index
;
888 /* Index into the image table for the associated image */
890 } stage
[MESA_SHADER_STAGES
];
892 /* Immutable samplers (or NULL if no immutable samplers) */
893 struct anv_sampler
**immutable_samplers
;
896 struct anv_descriptor_set_layout
{
897 /* Number of bindings in this descriptor set */
898 uint16_t binding_count
;
900 /* Total size of the descriptor set with room for all array entries */
903 /* Shader stages affected by this descriptor set */
904 uint16_t shader_stages
;
906 /* Number of buffers in this descriptor set */
907 uint16_t buffer_count
;
909 /* Number of dynamic offsets used by this descriptor set */
910 uint16_t dynamic_offset_count
;
912 /* Bindings in this descriptor set */
913 struct anv_descriptor_set_binding_layout binding
[0];
916 struct anv_descriptor
{
917 VkDescriptorType type
;
921 struct anv_image_view
*image_view
;
922 struct anv_sampler
*sampler
;
925 struct anv_buffer_view
*buffer_view
;
929 struct anv_descriptor_set
{
930 const struct anv_descriptor_set_layout
*layout
;
931 uint32_t buffer_count
;
932 struct anv_buffer_view
*buffer_views
;
933 struct anv_descriptor descriptors
[0];
937 anv_descriptor_set_create(struct anv_device
*device
,
938 const struct anv_descriptor_set_layout
*layout
,
939 struct anv_descriptor_set
**out_set
);
942 anv_descriptor_set_destroy(struct anv_device
*device
,
943 struct anv_descriptor_set
*set
);
945 struct anv_pipeline_binding
{
946 /* The descriptor set this surface corresponds to */
949 /* Offset into the descriptor set */
953 struct anv_pipeline_layout
{
955 struct anv_descriptor_set_layout
*layout
;
956 uint32_t dynamic_offset_start
;
958 uint32_t surface_start
;
959 uint32_t sampler_start
;
960 uint32_t image_start
;
961 } stage
[MESA_SHADER_STAGES
];
967 bool has_dynamic_offsets
;
968 uint32_t surface_count
;
969 struct anv_pipeline_binding
*surface_to_descriptor
;
970 uint32_t sampler_count
;
971 struct anv_pipeline_binding
*sampler_to_descriptor
;
972 uint32_t image_count
;
973 } stage
[MESA_SHADER_STAGES
];
975 struct anv_pipeline_binding entries
[0];
979 struct anv_device
* device
;
982 VkBufferUsageFlags usage
;
989 enum anv_cmd_dirty_bits
{
990 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
991 ANV_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
992 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
993 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
= 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
994 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
= 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
995 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
= 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
996 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
997 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
998 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
999 ANV_CMD_DIRTY_DYNAMIC_ALL
= (1 << 9) - 1,
1000 ANV_CMD_DIRTY_PIPELINE
= 1 << 9,
1001 ANV_CMD_DIRTY_INDEX_BUFFER
= 1 << 10,
1002 ANV_CMD_DIRTY_RENDER_TARGETS
= 1 << 11,
1004 typedef uint32_t anv_cmd_dirty_mask_t
;
1006 struct anv_vertex_binding
{
1007 struct anv_buffer
* buffer
;
1008 VkDeviceSize offset
;
1011 struct anv_push_constants
{
1012 /* Current allocated size of this push constants data structure.
1013 * Because a decent chunk of it may not be used (images on SKL, for
1014 * instance), we won't actually allocate the entire structure up-front.
1018 /* Push constant data provided by the client through vkPushConstants */
1019 uint8_t client_data
[MAX_PUSH_CONSTANTS_SIZE
];
1021 /* Our hardware only provides zero-based vertex and instance id so, in
1022 * order to satisfy the vulkan requirements, we may have to push one or
1023 * both of these into the shader.
1025 uint32_t base_vertex
;
1026 uint32_t base_instance
;
1028 /* Offsets and ranges for dynamically bound buffers */
1032 } dynamic
[MAX_DYNAMIC_BUFFERS
];
1034 /* Image data for image_load_store on pre-SKL */
1035 struct brw_image_param images
[MAX_IMAGES
];
1038 struct anv_dynamic_state
{
1041 VkViewport viewports
[MAX_VIEWPORTS
];
1046 VkRect2D scissors
[MAX_SCISSORS
];
1057 float blend_constants
[4];
1067 } stencil_compare_mask
;
1072 } stencil_write_mask
;
1077 } stencil_reference
;
1080 extern const struct anv_dynamic_state default_dynamic_state
;
1082 void anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
1083 const struct anv_dynamic_state
*src
,
1084 uint32_t copy_mask
);
1087 * Attachment state when recording a renderpass instance.
1089 * The clear value is valid only if there exists a pending clear.
1091 struct anv_attachment_state
{
1092 VkImageAspectFlags pending_clear_aspects
;
1093 VkClearValue clear_value
;
1096 /** State required while building cmd buffer */
1097 struct anv_cmd_state
{
1098 /* PIPELINE_SELECT.PipelineSelection */
1099 uint32_t current_pipeline
;
1100 uint32_t current_l3_config
;
1102 anv_cmd_dirty_mask_t dirty
;
1103 anv_cmd_dirty_mask_t compute_dirty
;
1104 uint32_t num_workgroups_offset
;
1105 struct anv_bo
*num_workgroups_bo
;
1106 VkShaderStageFlags descriptors_dirty
;
1107 VkShaderStageFlags push_constants_dirty
;
1108 uint32_t scratch_size
;
1109 struct anv_pipeline
* pipeline
;
1110 struct anv_pipeline
* compute_pipeline
;
1111 struct anv_framebuffer
* framebuffer
;
1112 struct anv_render_pass
* pass
;
1113 struct anv_subpass
* subpass
;
1114 uint32_t restart_index
;
1115 struct anv_vertex_binding vertex_bindings
[MAX_VBS
];
1116 struct anv_descriptor_set
* descriptors
[MAX_SETS
];
1117 struct anv_push_constants
* push_constants
[MESA_SHADER_STAGES
];
1118 struct anv_state binding_tables
[MESA_SHADER_STAGES
];
1119 struct anv_state samplers
[MESA_SHADER_STAGES
];
1120 struct anv_dynamic_state dynamic
;
1124 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1125 * valid only when recording a render pass instance.
1127 struct anv_attachment_state
* attachments
;
1130 struct anv_buffer
* index_buffer
;
1131 uint32_t index_type
; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1132 uint32_t index_offset
;
1136 struct anv_cmd_pool
{
1137 VkAllocationCallbacks alloc
;
1138 struct list_head cmd_buffers
;
1141 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1143 enum anv_cmd_buffer_exec_mode
{
1144 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY
,
1145 ANV_CMD_BUFFER_EXEC_MODE_EMIT
,
1146 ANV_CMD_BUFFER_EXEC_MODE_CHAIN
,
1147 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN
,
1150 struct anv_cmd_buffer
{
1151 VK_LOADER_DATA _loader_data
;
1153 struct anv_device
* device
;
1155 struct anv_cmd_pool
* pool
;
1156 struct list_head pool_link
;
1158 struct anv_batch batch
;
1160 /* Fields required for the actual chain of anv_batch_bo's.
1162 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1164 struct list_head batch_bos
;
1165 enum anv_cmd_buffer_exec_mode exec_mode
;
1167 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1168 * referenced by this command buffer
1170 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1172 struct anv_vector seen_bbos
;
1174 /* A vector of int32_t's for every block of binding tables.
1176 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1178 struct anv_vector bt_blocks
;
1180 struct anv_reloc_list surface_relocs
;
1182 /* Information needed for execbuf
1184 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1187 struct drm_i915_gem_execbuffer2 execbuf
;
1189 struct drm_i915_gem_exec_object2
* objects
;
1191 struct anv_bo
** bos
;
1193 /* Allocated length of the 'objects' and 'bos' arrays */
1194 uint32_t array_length
;
1199 /* Serial for tracking buffer completion */
1202 /* Stream objects for storing temporary data */
1203 struct anv_state_stream surface_state_stream
;
1204 struct anv_state_stream dynamic_state_stream
;
1206 VkCommandBufferUsageFlags usage_flags
;
1207 VkCommandBufferLevel level
;
1209 struct anv_cmd_state state
;
1212 VkResult
anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1213 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1214 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1215 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer
*cmd_buffer
);
1216 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer
*primary
,
1217 struct anv_cmd_buffer
*secondary
);
1218 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer
*cmd_buffer
);
1220 VkResult
anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1221 unsigned stage
, struct anv_state
*bt_state
);
1222 VkResult
anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
1223 unsigned stage
, struct anv_state
*state
);
1224 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
);
1225 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer
*cmd_buffer
,
1228 struct anv_state
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1229 const void *data
, uint32_t size
, uint32_t alignment
);
1230 struct anv_state
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1231 uint32_t *a
, uint32_t *b
,
1232 uint32_t dwords
, uint32_t alignment
);
1235 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1237 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1238 uint32_t entries
, uint32_t *state_offset
);
1240 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
);
1242 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer
*cmd_buffer
,
1243 uint32_t size
, uint32_t alignment
);
1246 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer
*cmd_buffer
);
1248 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
);
1249 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer
*cmd_buffer
);
1251 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1252 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1253 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1254 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1256 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1258 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer
*cmd_buffer
,
1259 const VkRenderPassBeginInfo
*info
);
1261 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1262 struct anv_subpass
*subpass
);
1263 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1264 struct anv_subpass
*subpass
);
1265 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1266 struct anv_subpass
*subpass
);
1267 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1268 struct anv_subpass
*subpass
);
1271 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
1272 gl_shader_stage stage
);
1274 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
);
1276 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1277 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1279 const struct anv_image_view
*
1280 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
);
1282 void anv_cmd_buffer_dump(struct anv_cmd_buffer
*cmd_buffer
);
1286 struct drm_i915_gem_execbuffer2 execbuf
;
1287 struct drm_i915_gem_exec_object2 exec2_objects
[1];
1293 struct anv_state state
;
1298 struct anv_shader_module
{
1299 struct nir_shader
* nir
;
1305 static inline gl_shader_stage
1306 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1308 assert(__builtin_popcount(vk_stage
) == 1);
1309 return ffs(vk_stage
) - 1;
1312 static inline VkShaderStageFlagBits
1313 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1315 return (1 << mesa_stage
);
1318 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1320 #define anv_foreach_stage(stage, stage_bits) \
1321 for (gl_shader_stage stage, \
1322 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1323 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1324 __tmp &= ~(1 << (stage)))
1326 struct anv_pipeline
{
1327 struct anv_device
* device
;
1328 struct anv_batch batch
;
1329 uint32_t batch_data
[512];
1330 struct anv_reloc_list batch_relocs
;
1331 uint32_t dynamic_state_mask
;
1332 struct anv_dynamic_state dynamic_state
;
1334 struct anv_pipeline_layout
* layout
;
1337 struct brw_vs_prog_data vs_prog_data
;
1338 struct brw_wm_prog_data wm_prog_data
;
1339 struct brw_gs_prog_data gs_prog_data
;
1340 struct brw_cs_prog_data cs_prog_data
;
1341 bool writes_point_size
;
1342 struct brw_stage_prog_data
* prog_data
[MESA_SHADER_STAGES
];
1343 uint32_t scratch_start
[MESA_SHADER_STAGES
];
1344 uint32_t total_scratch
;
1348 uint32_t nr_vs_entries
;
1351 uint32_t nr_gs_entries
;
1354 VkShaderStageFlags active_stages
;
1355 struct anv_state blend_state
;
1362 uint32_t ps_grf_start0
;
1363 uint32_t ps_grf_start2
;
1365 uint32_t gs_vertex_count
;
1369 uint32_t binding_stride
[MAX_VBS
];
1370 bool instancing_enable
[MAX_VBS
];
1371 bool primitive_restart
;
1374 uint32_t cs_thread_width_max
;
1375 uint32_t cs_right_mask
;
1379 uint32_t depth_stencil_state
[3];
1385 uint32_t wm_depth_stencil
[3];
1389 uint32_t wm_depth_stencil
[4];
1393 struct anv_graphics_pipeline_create_info
{
1395 * If non-negative, overrides the color attachment count of the pipeline's
1398 int8_t color_attachment_count
;
1401 bool disable_viewport
;
1402 bool disable_scissor
;
1408 anv_pipeline_init(struct anv_pipeline
*pipeline
, struct anv_device
*device
,
1409 struct anv_pipeline_cache
*cache
,
1410 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1411 const struct anv_graphics_pipeline_create_info
*extra
,
1412 const VkAllocationCallbacks
*alloc
);
1415 anv_pipeline_compile_cs(struct anv_pipeline
*pipeline
,
1416 struct anv_pipeline_cache
*cache
,
1417 const VkComputePipelineCreateInfo
*info
,
1418 struct anv_shader_module
*module
,
1419 const char *entrypoint
,
1420 const VkSpecializationInfo
*spec_info
);
1423 anv_graphics_pipeline_create(VkDevice device
,
1424 VkPipelineCache cache
,
1425 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1426 const struct anv_graphics_pipeline_create_info
*extra
,
1427 const VkAllocationCallbacks
*alloc
,
1428 VkPipeline
*pPipeline
);
1431 gen7_graphics_pipeline_create(VkDevice _device
,
1432 struct anv_pipeline_cache
*cache
,
1433 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1434 const struct anv_graphics_pipeline_create_info
*extra
,
1435 const VkAllocationCallbacks
*alloc
,
1436 VkPipeline
*pPipeline
);
1439 gen75_graphics_pipeline_create(VkDevice _device
,
1440 struct anv_pipeline_cache
*cache
,
1441 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1442 const struct anv_graphics_pipeline_create_info
*extra
,
1443 const VkAllocationCallbacks
*alloc
,
1444 VkPipeline
*pPipeline
);
1447 gen8_graphics_pipeline_create(VkDevice _device
,
1448 struct anv_pipeline_cache
*cache
,
1449 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1450 const struct anv_graphics_pipeline_create_info
*extra
,
1451 const VkAllocationCallbacks
*alloc
,
1452 VkPipeline
*pPipeline
);
1454 gen9_graphics_pipeline_create(VkDevice _device
,
1455 struct anv_pipeline_cache
*cache
,
1456 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1457 const struct anv_graphics_pipeline_create_info
*extra
,
1458 const VkAllocationCallbacks
*alloc
,
1459 VkPipeline
*pPipeline
);
1461 gen7_compute_pipeline_create(VkDevice _device
,
1462 struct anv_pipeline_cache
*cache
,
1463 const VkComputePipelineCreateInfo
*pCreateInfo
,
1464 const VkAllocationCallbacks
*alloc
,
1465 VkPipeline
*pPipeline
);
1467 gen75_compute_pipeline_create(VkDevice _device
,
1468 struct anv_pipeline_cache
*cache
,
1469 const VkComputePipelineCreateInfo
*pCreateInfo
,
1470 const VkAllocationCallbacks
*alloc
,
1471 VkPipeline
*pPipeline
);
1474 gen8_compute_pipeline_create(VkDevice _device
,
1475 struct anv_pipeline_cache
*cache
,
1476 const VkComputePipelineCreateInfo
*pCreateInfo
,
1477 const VkAllocationCallbacks
*alloc
,
1478 VkPipeline
*pPipeline
);
1480 gen9_compute_pipeline_create(VkDevice _device
,
1481 struct anv_pipeline_cache
*cache
,
1482 const VkComputePipelineCreateInfo
*pCreateInfo
,
1483 const VkAllocationCallbacks
*alloc
,
1484 VkPipeline
*pPipeline
);
1486 struct anv_format_swizzle
{
1494 const VkFormat vk_format
;
1496 enum isl_format surface_format
; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1497 const struct isl_format_layout
*isl_layout
;
1498 uint16_t depth_format
; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1499 struct anv_format_swizzle swizzle
;
1503 const struct anv_format
*
1504 anv_format_for_vk_format(VkFormat format
);
1507 anv_get_isl_format(VkFormat format
, VkImageAspectFlags aspect
,
1508 VkImageTiling tiling
, struct anv_format_swizzle
*swizzle
);
1511 anv_format_is_color(const struct anv_format
*format
)
1513 return !format
->depth_format
&& !format
->has_stencil
;
1517 anv_format_is_depth_or_stencil(const struct anv_format
*format
)
1519 return format
->depth_format
|| format
->has_stencil
;
1523 * Subsurface of an anv_image.
1525 struct anv_surface
{
1526 struct isl_surf isl
;
1529 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1536 /* The original VkFormat provided by the client. This may not match any
1537 * of the actual surface formats.
1540 const struct anv_format
*format
;
1543 uint32_t array_size
;
1544 uint32_t samples
; /**< VkImageCreateInfo::samples */
1545 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1546 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1551 /* Set when bound */
1553 VkDeviceSize offset
;
1558 * For each foo, anv_image::foo_surface is valid if and only if
1559 * anv_image::format has a foo aspect.
1561 * The hardware requires that the depth buffer and stencil buffer be
1562 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1563 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1564 * allocate the depth and stencil buffers as separate surfaces in the same
1568 struct anv_surface color_surface
;
1571 struct anv_surface depth_surface
;
1572 struct anv_surface stencil_surface
;
1577 struct anv_image_view
{
1578 const struct anv_image
*image
; /**< VkImageViewCreateInfo::image */
1580 uint32_t offset
; /**< Offset into bo. */
1582 VkImageAspectFlags aspect_mask
;
1584 VkComponentMapping swizzle
;
1585 enum isl_format format
;
1586 uint32_t base_layer
;
1588 VkExtent3D level_0_extent
; /**< Extent of ::image's level 0 adjusted for ::vk_format. */
1589 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1591 /** RENDER_SURFACE_STATE when using image as a color render target. */
1592 struct anv_state color_rt_surface_state
;
1594 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1595 struct anv_state sampler_surface_state
;
1597 /** RENDER_SURFACE_STATE when using image as a storage image. */
1598 struct anv_state storage_surface_state
;
1601 struct anv_image_create_info
{
1602 const VkImageCreateInfo
*vk_info
;
1603 isl_tiling_flags_t isl_tiling_flags
;
1607 VkResult
anv_image_create(VkDevice _device
,
1608 const struct anv_image_create_info
*info
,
1609 const VkAllocationCallbacks
* alloc
,
1612 struct anv_surface
*
1613 anv_image_get_surface_for_aspect_mask(struct anv_image
*image
,
1614 VkImageAspectFlags aspect_mask
);
1616 void anv_image_view_init(struct anv_image_view
*view
,
1617 struct anv_device
*device
,
1618 const VkImageViewCreateInfo
* pCreateInfo
,
1619 struct anv_cmd_buffer
*cmd_buffer
,
1623 anv_fill_image_surface_state(struct anv_device
*device
, struct anv_state state
,
1624 struct anv_image_view
*iview
,
1625 const VkImageViewCreateInfo
*pCreateInfo
,
1626 VkImageUsageFlagBits usage
);
1628 gen7_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1629 struct anv_image_view
*iview
,
1630 const VkImageViewCreateInfo
*pCreateInfo
,
1631 VkImageUsageFlagBits usage
);
1633 gen75_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1634 struct anv_image_view
*iview
,
1635 const VkImageViewCreateInfo
*pCreateInfo
,
1636 VkImageUsageFlagBits usage
);
1638 gen8_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1639 struct anv_image_view
*iview
,
1640 const VkImageViewCreateInfo
*pCreateInfo
,
1641 VkImageUsageFlagBits usage
);
1643 gen9_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1644 struct anv_image_view
*iview
,
1645 const VkImageViewCreateInfo
*pCreateInfo
,
1646 VkImageUsageFlagBits usage
);
1648 struct anv_buffer_view
{
1649 enum isl_format format
; /**< VkBufferViewCreateInfo::format */
1651 uint32_t offset
; /**< Offset into bo. */
1652 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1654 struct anv_state surface_state
;
1655 struct anv_state storage_surface_state
;
1658 const struct anv_format
*
1659 anv_format_for_descriptor_type(VkDescriptorType type
);
1661 void anv_fill_buffer_surface_state(struct anv_device
*device
,
1662 struct anv_state state
,
1663 enum isl_format format
,
1664 uint32_t offset
, uint32_t range
,
1667 void gen7_fill_buffer_surface_state(void *state
, enum isl_format format
,
1668 uint32_t offset
, uint32_t range
,
1670 void gen75_fill_buffer_surface_state(void *state
, enum isl_format format
,
1671 uint32_t offset
, uint32_t range
,
1673 void gen8_fill_buffer_surface_state(void *state
, enum isl_format format
,
1674 uint32_t offset
, uint32_t range
,
1676 void gen9_fill_buffer_surface_state(void *state
, enum isl_format format
,
1677 uint32_t offset
, uint32_t range
,
1680 void anv_image_view_fill_image_param(struct anv_device
*device
,
1681 struct anv_image_view
*view
,
1682 struct brw_image_param
*param
);
1683 void anv_buffer_view_fill_image_param(struct anv_device
*device
,
1684 struct anv_buffer_view
*view
,
1685 struct brw_image_param
*param
);
1687 struct anv_sampler
{
1691 struct anv_framebuffer
{
1696 uint32_t attachment_count
;
1697 struct anv_image_view
* attachments
[0];
1700 struct anv_subpass
{
1701 uint32_t input_count
;
1702 uint32_t * input_attachments
;
1703 uint32_t color_count
;
1704 uint32_t * color_attachments
;
1705 uint32_t * resolve_attachments
;
1706 uint32_t depth_stencil_attachment
;
1708 /** Subpass has at least one resolve attachment */
1712 struct anv_render_pass_attachment
{
1713 const struct anv_format
*format
;
1715 VkAttachmentLoadOp load_op
;
1716 VkAttachmentLoadOp stencil_load_op
;
1719 struct anv_render_pass
{
1720 uint32_t attachment_count
;
1721 uint32_t subpass_count
;
1722 uint32_t * subpass_attachments
;
1723 struct anv_render_pass_attachment
* attachments
;
1724 struct anv_subpass subpasses
[0];
1727 extern struct anv_render_pass anv_meta_dummy_renderpass
;
1729 struct anv_query_pool_slot
{
1735 struct anv_query_pool
{
1741 VkResult
anv_device_init_meta(struct anv_device
*device
);
1742 void anv_device_finish_meta(struct anv_device
*device
);
1744 void *anv_lookup_entrypoint(const char *name
);
1746 void anv_dump_image_to_ppm(struct anv_device
*device
,
1747 struct anv_image
*image
, unsigned miplevel
,
1748 unsigned array_layer
, const char *filename
);
1750 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1752 static inline struct __anv_type * \
1753 __anv_type ## _from_handle(__VkType _handle) \
1755 return (struct __anv_type *) _handle; \
1758 static inline __VkType \
1759 __anv_type ## _to_handle(struct __anv_type *_obj) \
1761 return (__VkType) _obj; \
1764 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1766 static inline struct __anv_type * \
1767 __anv_type ## _from_handle(__VkType _handle) \
1769 return (struct __anv_type *)(uintptr_t) _handle; \
1772 static inline __VkType \
1773 __anv_type ## _to_handle(struct __anv_type *_obj) \
1775 return (__VkType)(uintptr_t) _obj; \
1778 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1779 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1781 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer
, VkCommandBuffer
)
1782 ANV_DEFINE_HANDLE_CASTS(anv_device
, VkDevice
)
1783 ANV_DEFINE_HANDLE_CASTS(anv_instance
, VkInstance
)
1784 ANV_DEFINE_HANDLE_CASTS(anv_physical_device
, VkPhysicalDevice
)
1785 ANV_DEFINE_HANDLE_CASTS(anv_queue
, VkQueue
)
1787 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool
, VkCommandPool
)
1788 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer
, VkBuffer
)
1789 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view
, VkBufferView
)
1790 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set
, VkDescriptorSet
)
1791 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout
, VkDescriptorSetLayout
)
1792 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory
, VkDeviceMemory
)
1793 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence
, VkFence
)
1794 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event
, VkEvent
)
1795 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer
, VkFramebuffer
)
1796 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image
, VkImage
)
1797 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view
, VkImageView
);
1798 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache
, VkPipelineCache
)
1799 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline
, VkPipeline
)
1800 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout
, VkPipelineLayout
)
1801 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool
, VkQueryPool
)
1802 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass
, VkRenderPass
)
1803 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler
, VkSampler
)
1804 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module
, VkShaderModule
)
1806 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1808 static inline const __VkType * \
1809 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1811 return (const __VkType *) __anv_obj; \
1814 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1815 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1817 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkMemoryBarrier
)
1818 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkBufferMemoryBarrier
)
1819 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkImageMemoryBarrier
)