Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <i915_drm.h>
32
33 #ifdef HAVE_VALGRIND
34 #include <valgrind.h>
35 #include <memcheck.h>
36 #define VG(x) x
37 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
38 #else
39 #define VG(x)
40 #endif
41
42 #include "brw_device_info.h"
43 #include "util/macros.h"
44 #include "util/list.h"
45
46 #define VK_PROTOTYPES
47 #include <vulkan/vulkan.h>
48 #include <vulkan/vulkan_intel.h>
49 #include <vulkan/vk_ext_khr_swapchain.h>
50 #include <vulkan/vk_ext_khr_device_swapchain.h>
51
52 #include "anv_entrypoints.h"
53 #include "brw_context.h"
54 #include "isl.h"
55
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59
60 #define ICD_LOADER_MAGIC 0x01CDC0DE
61
62 typedef union _VK_LOADER_DATA {
63 uintptr_t loaderMagic;
64 void *loaderData;
65 } VK_LOADER_DATA;
66
67 #define anv_noreturn __attribute__((__noreturn__))
68 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
69
70 #define MIN(a, b) ((a) < (b) ? (a) : (b))
71 #define MAX(a, b) ((a) > (b) ? (a) : (b))
72
73 static inline uint32_t
74 align_u32(uint32_t v, uint32_t a)
75 {
76 return (v + a - 1) & ~(a - 1);
77 }
78
79 static inline int32_t
80 align_i32(int32_t v, int32_t a)
81 {
82 return (v + a - 1) & ~(a - 1);
83 }
84
85 /** Alignment must be a power of 2. */
86 static inline bool
87 anv_is_aligned(uintmax_t n, uintmax_t a)
88 {
89 assert(a == (a & -a));
90 return (n & (a - 1)) == 0;
91 }
92
93 static inline uint32_t
94 anv_minify(uint32_t n, uint32_t levels)
95 {
96 if (unlikely(n == 0))
97 return 0;
98 else
99 return MAX(n >> levels, 1);
100 }
101
102 static inline bool
103 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
104 {
105 if (*inout_mask & clear_mask) {
106 *inout_mask &= ~clear_mask;
107 return true;
108 } else {
109 return false;
110 }
111 }
112
113 #define for_each_bit(b, dword) \
114 for (uint32_t __dword = (dword); \
115 (b) = __builtin_ffs(__dword) - 1, __dword; \
116 __dword &= ~(1 << (b)))
117
118 #define typed_memcpy(dest, src, count) ({ \
119 static_assert(sizeof(*src) == sizeof(*dest), ""); \
120 memcpy((dest), (src), (count) * sizeof(*(src))); \
121 })
122
123 /* Define no kernel as 1, since that's an illegal offset for a kernel */
124 #define NO_KERNEL 1
125
126 struct anv_common {
127 VkStructureType sType;
128 const void* pNext;
129 };
130
131 /* Whenever we generate an error, pass it through this function. Useful for
132 * debugging, where we can break on it. Only call at error site, not when
133 * propagating errors. Might be useful to plug in a stack trace here.
134 */
135
136 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
137
138 #ifdef DEBUG
139 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
140 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
141 #else
142 #define vk_error(error) error
143 #define vk_errorf(error, format, ...) error
144 #endif
145
146 void __anv_finishme(const char *file, int line, const char *format, ...)
147 anv_printflike(3, 4);
148 void anv_loge(const char *format, ...) anv_printflike(1, 2);
149 void anv_loge_v(const char *format, va_list va);
150
151 /**
152 * Print a FINISHME message, including its source location.
153 */
154 #define anv_finishme(format, ...) \
155 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
156
157 /* A non-fatal assert. Useful for debugging. */
158 #ifdef DEBUG
159 #define anv_assert(x) ({ \
160 if (unlikely(!(x))) \
161 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
162 })
163 #else
164 #define anv_assert(x)
165 #endif
166
167 /**
168 * If a block of code is annotated with anv_validate, then the block runs only
169 * in debug builds.
170 */
171 #ifdef DEBUG
172 #define anv_validate if (1)
173 #else
174 #define anv_validate if (0)
175 #endif
176
177 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
178 void anv_abortfv(const char *format, va_list va) anv_noreturn;
179
180 #define stub_return(v) \
181 do { \
182 anv_finishme("stub %s", __func__); \
183 return (v); \
184 } while (0)
185
186 #define stub() \
187 do { \
188 anv_finishme("stub %s", __func__); \
189 return; \
190 } while (0)
191
192 /**
193 * A dynamically growable, circular buffer. Elements are added at head and
194 * removed from tail. head and tail are free-running uint32_t indices and we
195 * only compute the modulo with size when accessing the array. This way,
196 * number of bytes in the queue is always head - tail, even in case of
197 * wraparound.
198 */
199
200 struct anv_vector {
201 uint32_t head;
202 uint32_t tail;
203 uint32_t element_size;
204 uint32_t size;
205 void *data;
206 };
207
208 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
209 void *anv_vector_add(struct anv_vector *queue);
210 void *anv_vector_remove(struct anv_vector *queue);
211
212 static inline int
213 anv_vector_length(struct anv_vector *queue)
214 {
215 return (queue->head - queue->tail) / queue->element_size;
216 }
217
218 static inline void *
219 anv_vector_head(struct anv_vector *vector)
220 {
221 assert(vector->tail < vector->head);
222 return (void *)((char *)vector->data +
223 ((vector->head - vector->element_size) &
224 (vector->size - 1)));
225 }
226
227 static inline void *
228 anv_vector_tail(struct anv_vector *vector)
229 {
230 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
231 }
232
233 static inline void
234 anv_vector_finish(struct anv_vector *queue)
235 {
236 free(queue->data);
237 }
238
239 #define anv_vector_foreach(elem, queue) \
240 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
241 for (uint32_t __anv_vector_offset = (queue)->tail; \
242 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
243 __anv_vector_offset += (queue)->element_size)
244
245 struct anv_bo {
246 int gem_handle;
247
248 /* Index into the current validation list. This is used by the
249 * validation list building alrogithm to track which buffers are already
250 * in the validation list so that we can ensure uniqueness.
251 */
252 uint32_t index;
253
254 /* Last known offset. This value is provided by the kernel when we
255 * execbuf and is used as the presumed offset for the next bunch of
256 * relocations.
257 */
258 uint64_t offset;
259
260 uint64_t size;
261 void *map;
262 };
263
264 /* Represents a lock-free linked list of "free" things. This is used by
265 * both the block pool and the state pools. Unfortunately, in order to
266 * solve the ABA problem, we can't use a single uint32_t head.
267 */
268 union anv_free_list {
269 struct {
270 int32_t offset;
271
272 /* A simple count that is incremented every time the head changes. */
273 uint32_t count;
274 };
275 uint64_t u64;
276 };
277
278 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
279
280 struct anv_block_state {
281 union {
282 struct {
283 uint32_t next;
284 uint32_t end;
285 };
286 uint64_t u64;
287 };
288 };
289
290 struct anv_block_pool {
291 struct anv_device *device;
292
293 struct anv_bo bo;
294
295 /* The offset from the start of the bo to the "center" of the block
296 * pool. Pointers to allocated blocks are given by
297 * bo.map + center_bo_offset + offsets.
298 */
299 uint32_t center_bo_offset;
300
301 /* Current memory map of the block pool. This pointer may or may not
302 * point to the actual beginning of the block pool memory. If
303 * anv_block_pool_alloc_back has ever been called, then this pointer
304 * will point to the "center" position of the buffer and all offsets
305 * (negative or positive) given out by the block pool alloc functions
306 * will be valid relative to this pointer.
307 *
308 * In particular, map == bo.map + center_offset
309 */
310 void *map;
311 int fd;
312
313 /**
314 * Array of mmaps and gem handles owned by the block pool, reclaimed when
315 * the block pool is destroyed.
316 */
317 struct anv_vector mmap_cleanups;
318
319 uint32_t block_size;
320
321 union anv_free_list free_list;
322 struct anv_block_state state;
323
324 union anv_free_list back_free_list;
325 struct anv_block_state back_state;
326 };
327
328 /* Block pools are backed by a fixed-size 2GB memfd */
329 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
330
331 /* The center of the block pool is also the middle of the memfd. This may
332 * change in the future if we decide differently for some reason.
333 */
334 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
335
336 static inline uint32_t
337 anv_block_pool_size(struct anv_block_pool *pool)
338 {
339 return pool->state.end + pool->back_state.end;
340 }
341
342 struct anv_state {
343 int32_t offset;
344 uint32_t alloc_size;
345 void *map;
346 };
347
348 struct anv_fixed_size_state_pool {
349 size_t state_size;
350 union anv_free_list free_list;
351 struct anv_block_state block;
352 };
353
354 #define ANV_MIN_STATE_SIZE_LOG2 6
355 #define ANV_MAX_STATE_SIZE_LOG2 10
356
357 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
358
359 struct anv_state_pool {
360 struct anv_block_pool *block_pool;
361 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
362 };
363
364 struct anv_state_stream {
365 struct anv_block_pool *block_pool;
366 uint32_t next;
367 uint32_t current_block;
368 uint32_t end;
369 };
370
371 void anv_block_pool_init(struct anv_block_pool *pool,
372 struct anv_device *device, uint32_t block_size);
373 void anv_block_pool_finish(struct anv_block_pool *pool);
374 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
375 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
376 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
377 void anv_state_pool_init(struct anv_state_pool *pool,
378 struct anv_block_pool *block_pool);
379 void anv_state_pool_finish(struct anv_state_pool *pool);
380 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
381 size_t state_size, size_t alignment);
382 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
383 void anv_state_stream_init(struct anv_state_stream *stream,
384 struct anv_block_pool *block_pool);
385 void anv_state_stream_finish(struct anv_state_stream *stream);
386 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
387 uint32_t size, uint32_t alignment);
388
389 /**
390 * Implements a pool of re-usable BOs. The interface is identical to that
391 * of block_pool except that each block is its own BO.
392 */
393 struct anv_bo_pool {
394 struct anv_device *device;
395
396 uint32_t bo_size;
397
398 void *free_list;
399 };
400
401 void anv_bo_pool_init(struct anv_bo_pool *pool,
402 struct anv_device *device, uint32_t block_size);
403 void anv_bo_pool_finish(struct anv_bo_pool *pool);
404 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
405 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
406
407
408 void *anv_resolve_entrypoint(uint32_t index);
409
410 extern struct anv_dispatch_table dtable;
411
412 #define ANV_CALL(func) ({ \
413 if (dtable.func == NULL) { \
414 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
415 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
416 } \
417 dtable.func; \
418 })
419
420
421 struct anv_physical_device {
422 VK_LOADER_DATA _loader_data;
423
424 struct anv_instance * instance;
425 uint32_t chipset_id;
426 const char * path;
427 const char * name;
428 const struct brw_device_info * info;
429 uint64_t aperture_size;
430 struct brw_compiler * compiler;
431 struct isl_device isl_dev;
432 };
433
434 bool anv_is_scalar_shader_stage(const struct brw_compiler *compiler,
435 VkShaderStage stage);
436
437 struct anv_instance {
438 VK_LOADER_DATA _loader_data;
439
440 void * pAllocUserData;
441 PFN_vkAllocFunction pfnAlloc;
442 PFN_vkFreeFunction pfnFree;
443 uint32_t apiVersion;
444 int physicalDeviceCount;
445 struct anv_physical_device physicalDevice;
446
447 struct anv_wsi_implementation * wsi_impl[VK_PLATFORM_NUM_KHR];
448 };
449
450 VkResult anv_init_wsi(struct anv_instance *instance);
451 void anv_finish_wsi(struct anv_instance *instance);
452
453 struct anv_meta_state {
454 struct {
455 struct anv_pipeline *color_pipeline;
456 struct anv_pipeline *depth_only_pipeline;
457 struct anv_pipeline *stencil_only_pipeline;
458 struct anv_pipeline *depthstencil_pipeline;
459 } clear;
460
461 struct {
462 VkRenderPass render_pass;
463
464 /** Pipeline that blits from a 2D image. */
465 VkPipeline pipeline_2d_src;
466
467 /** Pipeline that blits from a 3D image. */
468 VkPipeline pipeline_3d_src;
469
470 VkPipelineLayout pipeline_layout;
471 VkDescriptorSetLayout ds_layout;
472 } blit;
473 };
474
475 struct anv_queue {
476 VK_LOADER_DATA _loader_data;
477
478 struct anv_device * device;
479
480 struct anv_state_pool * pool;
481 };
482
483 struct anv_device {
484 VK_LOADER_DATA _loader_data;
485
486 struct anv_instance * instance;
487 uint32_t chipset_id;
488 struct brw_device_info info;
489 struct isl_device isl_dev;
490 int context_id;
491 int fd;
492
493 struct anv_bo_pool batch_bo_pool;
494
495 struct anv_block_pool dynamic_state_block_pool;
496 struct anv_state_pool dynamic_state_pool;
497
498 struct anv_block_pool instruction_block_pool;
499 struct anv_block_pool surface_state_block_pool;
500 struct anv_state_pool surface_state_pool;
501
502 struct anv_bo workaround_bo;
503
504 struct anv_meta_state meta_state;
505
506 struct anv_state border_colors;
507
508 struct anv_queue queue;
509
510 struct anv_block_pool scratch_block_pool;
511
512 pthread_mutex_t mutex;
513 };
514
515 void *
516 anv_instance_alloc(struct anv_instance * instance,
517 size_t size,
518 size_t alignment,
519 VkSystemAllocType allocType);
520
521 void
522 anv_instance_free(struct anv_instance * instance,
523 void * mem);
524
525 void *
526 anv_device_alloc(struct anv_device * device,
527 size_t size,
528 size_t alignment,
529 VkSystemAllocType allocType);
530
531 void
532 anv_device_free(struct anv_device * device,
533 void * mem);
534
535 void* anv_gem_mmap(struct anv_device *device,
536 uint32_t gem_handle, uint64_t offset, uint64_t size);
537 void anv_gem_munmap(void *p, uint64_t size);
538 uint32_t anv_gem_create(struct anv_device *device, size_t size);
539 void anv_gem_close(struct anv_device *device, int gem_handle);
540 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
541 int anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns);
542 int anv_gem_execbuffer(struct anv_device *device,
543 struct drm_i915_gem_execbuffer2 *execbuf);
544 int anv_gem_set_tiling(struct anv_device *device, int gem_handle,
545 uint32_t stride, uint32_t tiling);
546 int anv_gem_create_context(struct anv_device *device);
547 int anv_gem_destroy_context(struct anv_device *device, int context);
548 int anv_gem_get_param(int fd, uint32_t param);
549 int anv_gem_get_aperture(int fd, uint64_t *size);
550 int anv_gem_handle_to_fd(struct anv_device *device, int gem_handle);
551 int anv_gem_fd_to_handle(struct anv_device *device, int fd);
552 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
553
554 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
555
556 struct anv_reloc_list {
557 size_t num_relocs;
558 size_t array_length;
559 struct drm_i915_gem_relocation_entry * relocs;
560 struct anv_bo ** reloc_bos;
561 };
562
563 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
564 struct anv_device *device);
565 void anv_reloc_list_finish(struct anv_reloc_list *list,
566 struct anv_device *device);
567
568 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
569 struct anv_device *device,
570 uint32_t offset, struct anv_bo *target_bo,
571 uint32_t delta);
572
573 struct anv_batch_bo {
574 /* Link in the anv_cmd_buffer.owned_batch_bos list */
575 struct list_head link;
576
577 struct anv_bo bo;
578
579 /* Bytes actually consumed in this batch BO */
580 size_t length;
581
582 /* Last seen surface state block pool bo offset */
583 uint32_t last_ss_pool_bo_offset;
584
585 struct anv_reloc_list relocs;
586 };
587
588 struct anv_batch {
589 struct anv_device * device;
590
591 void * start;
592 void * end;
593 void * next;
594
595 struct anv_reloc_list * relocs;
596
597 /* This callback is called (with the associated user data) in the event
598 * that the batch runs out of space.
599 */
600 VkResult (*extend_cb)(struct anv_batch *, void *);
601 void * user_data;
602 };
603
604 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
605 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
606 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
607 void *location, struct anv_bo *bo, uint32_t offset);
608
609 struct anv_address {
610 struct anv_bo *bo;
611 uint32_t offset;
612 };
613
614 #define __gen_address_type struct anv_address
615 #define __gen_user_data struct anv_batch
616
617 static inline uint64_t
618 __gen_combine_address(struct anv_batch *batch, void *location,
619 const struct anv_address address, uint32_t delta)
620 {
621 if (address.bo == NULL) {
622 return address.offset + delta;
623 } else {
624 assert(batch->start <= location && location < batch->end);
625
626 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
627 }
628 }
629
630 #include "gen7_pack.h"
631 #include "gen75_pack.h"
632 #undef GEN8_3DSTATE_MULTISAMPLE
633 #include "gen8_pack.h"
634
635 #define anv_batch_emit(batch, cmd, ...) do { \
636 void *__dst = anv_batch_emit_dwords(batch, cmd ## _length); \
637 struct cmd __template = { \
638 cmd ## _header, \
639 __VA_ARGS__ \
640 }; \
641 cmd ## _pack(batch, __dst, &__template); \
642 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, cmd ## _length * 4)); \
643 } while (0)
644
645 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
646 void *__dst = anv_batch_emit_dwords(batch, n); \
647 struct cmd __template = { \
648 cmd ## _header, \
649 .DwordLength = n - cmd ## _length_bias, \
650 __VA_ARGS__ \
651 }; \
652 cmd ## _pack(batch, __dst, &__template); \
653 __dst; \
654 })
655
656 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
657 do { \
658 uint32_t *dw; \
659 \
660 assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \
661 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
662 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
663 dw[i] = (dwords0)[i] | (dwords1)[i]; \
664 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
665 } while (0)
666
667 static const struct GEN7_MEMORY_OBJECT_CONTROL_STATE GEN7_MOCS = {
668 .GraphicsDataTypeGFDT = 0,
669 .LLCCacheabilityControlLLCCC = 0,
670 .L3CacheabilityControlL3CC = 1
671 };
672
673 #define GEN8_MOCS { \
674 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
675 .TargetCache = L3DefertoPATforLLCeLLCselection, \
676 .AgeforQUADLRU = 0 \
677 }
678
679 struct anv_device_memory {
680 struct anv_bo bo;
681 VkDeviceSize map_size;
682 void * map;
683 };
684
685 /**
686 * Header for Vertex URB Entry (VUE)
687 */
688 struct anv_vue_header {
689 uint32_t Reserved;
690 uint32_t RTAIndex; /* RenderTargetArrayIndex */
691 uint32_t ViewportIndex;
692 float PointWidth;
693 };
694
695 struct anv_descriptor_set_binding_layout {
696 /* Number of array elements in this binding */
697 uint16_t array_size;
698
699 /* Index into the flattend descriptor set */
700 uint16_t descriptor_index;
701
702 /* Index into the dynamic state array for a dynamic buffer */
703 int16_t dynamic_offset_index;
704
705 struct {
706 /* Index into the binding table for the associated surface */
707 int16_t surface_index;
708
709 /* Index into the sampler table for the associated sampler */
710 int16_t sampler_index;
711 } stage[VK_SHADER_STAGE_NUM];
712
713 /* Immutable samplers (or NULL if no immutable samplers) */
714 struct anv_sampler **immutable_samplers;
715 };
716
717 struct anv_descriptor_set_layout {
718 /* Number of bindings in this descriptor set */
719 uint16_t binding_count;
720
721 /* Total size of the descriptor set with room for all array entries */
722 uint16_t size;
723
724 /* Shader stages affected by this descriptor set */
725 uint16_t shader_stages;
726
727 /* Number of dynamic offsets used by this descriptor set */
728 uint16_t dynamic_offset_count;
729
730 /* Bindings in this descriptor set */
731 struct anv_descriptor_set_binding_layout binding[0];
732 };
733
734 struct anv_descriptor {
735 VkDescriptorType type;
736
737 union {
738 struct {
739 union {
740 struct anv_image_view *image_view;
741 };
742 struct anv_sampler *sampler;
743 };
744
745 struct {
746 struct anv_buffer *buffer;
747 uint64_t offset;
748 uint64_t range;
749 };
750 };
751 };
752
753 struct anv_descriptor_set {
754 const struct anv_descriptor_set_layout *layout;
755 struct anv_descriptor descriptors[0];
756 };
757
758 VkResult
759 anv_descriptor_set_create(struct anv_device *device,
760 const struct anv_descriptor_set_layout *layout,
761 struct anv_descriptor_set **out_set);
762
763 void
764 anv_descriptor_set_destroy(struct anv_device *device,
765 struct anv_descriptor_set *set);
766
767 #define MAX_VBS 32
768 #define MAX_SETS 8
769 #define MAX_RTS 8
770 #define MAX_VIEWPORTS 16
771 #define MAX_SCISSORS 16
772 #define MAX_PUSH_CONSTANTS_SIZE 128
773 #define MAX_DYNAMIC_BUFFERS 16
774 #define MAX_IMAGES 8
775
776 struct anv_pipeline_binding {
777 /* The descriptor set this surface corresponds to */
778 uint16_t set;
779
780 /* Offset into the descriptor set */
781 uint16_t offset;
782 };
783
784 struct anv_pipeline_layout {
785 struct {
786 struct anv_descriptor_set_layout *layout;
787 uint32_t dynamic_offset_start;
788 struct {
789 uint32_t surface_start;
790 uint32_t sampler_start;
791 } stage[VK_SHADER_STAGE_NUM];
792 } set[MAX_SETS];
793
794 uint32_t num_sets;
795
796 struct {
797 bool has_dynamic_offsets;
798 uint32_t surface_count;
799 struct anv_pipeline_binding *surface_to_descriptor;
800 uint32_t sampler_count;
801 struct anv_pipeline_binding *sampler_to_descriptor;
802 } stage[VK_SHADER_STAGE_NUM];
803
804 struct anv_pipeline_binding entries[0];
805 };
806
807 struct anv_buffer {
808 struct anv_device * device;
809 VkDeviceSize size;
810
811 /* Set when bound */
812 struct anv_bo * bo;
813 VkDeviceSize offset;
814 };
815
816 enum anv_cmd_dirty_bits {
817 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
818 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
819 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
820 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
821 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
822 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
823 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
824 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
825 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
826 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
827 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
828 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
829 };
830 typedef uint32_t anv_cmd_dirty_mask_t;
831
832 struct anv_vertex_binding {
833 struct anv_buffer * buffer;
834 VkDeviceSize offset;
835 };
836
837 struct anv_push_constants {
838 /* Current allocated size of this push constants data structure.
839 * Because a decent chunk of it may not be used (images on SKL, for
840 * instance), we won't actually allocate the entire structure up-front.
841 */
842 uint32_t size;
843
844 /* Push constant data provided by the client through vkPushConstants */
845 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
846
847 /* Our hardware only provides zero-based vertex and instance id so, in
848 * order to satisfy the vulkan requirements, we may have to push one or
849 * both of these into the shader.
850 */
851 uint32_t base_vertex;
852 uint32_t base_instance;
853
854 /* Offsets and ranges for dynamically bound buffers */
855 struct {
856 uint32_t offset;
857 uint32_t range;
858 } dynamic[MAX_DYNAMIC_BUFFERS];
859
860 /* Image data for image_load_store on pre-SKL */
861 struct brw_image_param images[MAX_IMAGES];
862 };
863
864 struct anv_dynamic_state {
865 struct {
866 uint32_t count;
867 VkViewport viewports[MAX_VIEWPORTS];
868 } viewport;
869
870 struct {
871 uint32_t count;
872 VkRect2D scissors[MAX_SCISSORS];
873 } scissor;
874
875 float line_width;
876
877 struct {
878 float bias;
879 float clamp;
880 float slope_scaled;
881 } depth_bias;
882
883 float blend_constants[4];
884
885 struct {
886 float min;
887 float max;
888 } depth_bounds;
889
890 struct {
891 uint32_t front;
892 uint32_t back;
893 } stencil_compare_mask;
894
895 struct {
896 uint32_t front;
897 uint32_t back;
898 } stencil_write_mask;
899
900 struct {
901 uint32_t front;
902 uint32_t back;
903 } stencil_reference;
904 };
905
906 extern const struct anv_dynamic_state default_dynamic_state;
907
908 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
909 const struct anv_dynamic_state *src,
910 uint32_t copy_mask);
911
912 /** State required while building cmd buffer */
913 struct anv_cmd_state {
914 uint32_t current_pipeline;
915 uint32_t vb_dirty;
916 anv_cmd_dirty_mask_t dirty;
917 anv_cmd_dirty_mask_t compute_dirty;
918 VkShaderStageFlags descriptors_dirty;
919 VkShaderStageFlags push_constants_dirty;
920 uint32_t scratch_size;
921 struct anv_pipeline * pipeline;
922 struct anv_pipeline * compute_pipeline;
923 struct anv_framebuffer * framebuffer;
924 struct anv_render_pass * pass;
925 struct anv_subpass * subpass;
926 uint32_t state_vf[GEN8_3DSTATE_VF_length];
927 struct anv_vertex_binding vertex_bindings[MAX_VBS];
928 struct anv_descriptor_set * descriptors[MAX_SETS];
929 struct anv_push_constants * push_constants[VK_SHADER_STAGE_NUM];
930 struct anv_dynamic_state dynamic;
931
932 struct {
933 struct anv_buffer * index_buffer;
934 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
935 uint32_t index_offset;
936 } gen7;
937 };
938
939 struct anv_cmd_pool {
940 struct list_head cmd_buffers;
941 };
942
943 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
944
945 enum anv_cmd_buffer_exec_mode {
946 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
947 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
948 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
949 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
950 };
951
952 struct anv_cmd_buffer {
953 VK_LOADER_DATA _loader_data;
954
955 struct anv_device * device;
956
957 struct list_head pool_link;
958
959 struct anv_batch batch;
960
961 /* Fields required for the actual chain of anv_batch_bo's.
962 *
963 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
964 */
965 struct list_head batch_bos;
966 enum anv_cmd_buffer_exec_mode exec_mode;
967
968 /* A vector of anv_batch_bo pointers for every batch or surface buffer
969 * referenced by this command buffer
970 *
971 * initialized by anv_cmd_buffer_init_batch_bo_chain()
972 */
973 struct anv_vector seen_bbos;
974
975 /* A vector of int32_t's for every block of binding tables.
976 *
977 * initialized by anv_cmd_buffer_init_batch_bo_chain()
978 */
979 struct anv_vector bt_blocks;
980 uint32_t bt_next;
981 struct anv_reloc_list surface_relocs;
982
983 /* Information needed for execbuf
984 *
985 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
986 */
987 struct {
988 struct drm_i915_gem_execbuffer2 execbuf;
989
990 struct drm_i915_gem_exec_object2 * objects;
991 uint32_t bo_count;
992 struct anv_bo ** bos;
993
994 /* Allocated length of the 'objects' and 'bos' arrays */
995 uint32_t array_length;
996
997 bool need_reloc;
998 } execbuf2;
999
1000 /* Serial for tracking buffer completion */
1001 uint32_t serial;
1002
1003 /* Stream objects for storing temporary data */
1004 struct anv_state_stream surface_state_stream;
1005 struct anv_state_stream dynamic_state_stream;
1006
1007 VkCmdBufferOptimizeFlags opt_flags;
1008 VkCmdBufferLevel level;
1009
1010 struct anv_cmd_state state;
1011 };
1012
1013 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1014 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1015 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1016 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1017 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1018 struct anv_cmd_buffer *secondary);
1019 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1020
1021 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1022 unsigned stage, struct anv_state *bt_state);
1023 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1024 unsigned stage, struct anv_state *state);
1025 void anv_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1026
1027 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1028 uint32_t *a, uint32_t dwords,
1029 uint32_t alignment);
1030 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1031 uint32_t *a, uint32_t *b,
1032 uint32_t dwords, uint32_t alignment);
1033 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1034 struct anv_subpass *subpass);
1035
1036 struct anv_address
1037 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1038 struct anv_state
1039 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1040 uint32_t entries, uint32_t *state_offset);
1041 struct anv_state
1042 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1043 struct anv_state
1044 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1045 uint32_t size, uint32_t alignment);
1046
1047 VkResult
1048 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1049
1050 void anv_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1051 void anv_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1052
1053 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1054 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1055
1056 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1057
1058 void gen7_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1059 struct anv_subpass *subpass);
1060
1061 void gen8_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1062 struct anv_subpass *subpass);
1063
1064 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1065 struct anv_subpass *subpass);
1066
1067 struct anv_state
1068 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1069 VkShaderStage stage);
1070
1071 void anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
1072 struct anv_render_pass *pass,
1073 const VkClearValue *clear_values);
1074 const struct anv_image_view *
1075 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1076
1077 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1078
1079 struct anv_fence {
1080 struct anv_bo bo;
1081 struct drm_i915_gem_execbuffer2 execbuf;
1082 struct drm_i915_gem_exec_object2 exec2_objects[1];
1083 bool ready;
1084 };
1085
1086 struct nir_shader;
1087
1088 struct anv_shader_module {
1089 struct nir_shader * nir;
1090
1091 uint32_t size;
1092 char data[0];
1093 };
1094
1095 struct anv_shader {
1096 struct anv_shader_module * module;
1097 char entrypoint[0];
1098 };
1099
1100 struct anv_pipeline {
1101 struct anv_device * device;
1102 struct anv_batch batch;
1103 uint32_t batch_data[512];
1104 struct anv_reloc_list batch_relocs;
1105 uint32_t dynamic_state_mask;
1106 struct anv_dynamic_state dynamic_state;
1107
1108 struct anv_pipeline_layout * layout;
1109 bool use_repclear;
1110
1111 struct brw_vs_prog_data vs_prog_data;
1112 struct brw_wm_prog_data wm_prog_data;
1113 struct brw_gs_prog_data gs_prog_data;
1114 struct brw_cs_prog_data cs_prog_data;
1115 bool writes_point_size;
1116 struct brw_stage_prog_data * prog_data[VK_SHADER_STAGE_NUM];
1117 uint32_t scratch_start[VK_SHADER_STAGE_NUM];
1118 uint32_t total_scratch;
1119 struct {
1120 uint32_t vs_start;
1121 uint32_t vs_size;
1122 uint32_t nr_vs_entries;
1123 uint32_t gs_start;
1124 uint32_t gs_size;
1125 uint32_t nr_gs_entries;
1126 } urb;
1127
1128 VkShaderStageFlags active_stages;
1129 struct anv_state_stream program_stream;
1130 struct anv_state blend_state;
1131 uint32_t vs_simd8;
1132 uint32_t vs_vec4;
1133 uint32_t ps_simd8;
1134 uint32_t ps_simd16;
1135 uint32_t ps_ksp0;
1136 uint32_t ps_ksp2;
1137 uint32_t ps_grf_start0;
1138 uint32_t ps_grf_start2;
1139 uint32_t gs_vec4;
1140 uint32_t gs_vertex_count;
1141 uint32_t cs_simd;
1142
1143 uint32_t vb_used;
1144 uint32_t binding_stride[MAX_VBS];
1145 bool instancing_enable[MAX_VBS];
1146 bool primitive_restart;
1147 uint32_t topology;
1148
1149 uint32_t cs_thread_width_max;
1150 uint32_t cs_right_mask;
1151
1152 struct {
1153 uint32_t sf[GEN7_3DSTATE_SF_length];
1154 uint32_t depth_stencil_state[GEN7_DEPTH_STENCIL_STATE_length];
1155 } gen7;
1156
1157 struct {
1158 uint32_t sf[GEN8_3DSTATE_SF_length];
1159 uint32_t vf[GEN8_3DSTATE_VF_length];
1160 uint32_t raster[GEN8_3DSTATE_RASTER_length];
1161 uint32_t wm_depth_stencil[GEN8_3DSTATE_WM_DEPTH_STENCIL_length];
1162 } gen8;
1163 };
1164
1165 struct anv_graphics_pipeline_create_info {
1166 bool use_repclear;
1167 bool disable_viewport;
1168 bool disable_scissor;
1169 bool disable_vs;
1170 bool use_rectlist;
1171 };
1172
1173 VkResult
1174 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1175 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1176 const struct anv_graphics_pipeline_create_info *extra);
1177
1178 VkResult
1179 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1180 const VkComputePipelineCreateInfo *info,
1181 struct anv_shader *shader);
1182
1183 VkResult
1184 anv_graphics_pipeline_create(VkDevice device,
1185 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1186 const struct anv_graphics_pipeline_create_info *extra,
1187 VkPipeline *pPipeline);
1188
1189 VkResult
1190 gen7_graphics_pipeline_create(VkDevice _device,
1191 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1192 const struct anv_graphics_pipeline_create_info *extra,
1193 VkPipeline *pPipeline);
1194
1195 VkResult
1196 gen8_graphics_pipeline_create(VkDevice _device,
1197 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1198 const struct anv_graphics_pipeline_create_info *extra,
1199 VkPipeline *pPipeline);
1200 VkResult
1201 gen7_compute_pipeline_create(VkDevice _device,
1202 const VkComputePipelineCreateInfo *pCreateInfo,
1203 VkPipeline *pPipeline);
1204
1205 VkResult
1206 gen8_compute_pipeline_create(VkDevice _device,
1207 const VkComputePipelineCreateInfo *pCreateInfo,
1208 VkPipeline *pPipeline);
1209
1210 struct anv_format {
1211 const VkFormat vk_format;
1212 const char *name;
1213 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1214 const struct isl_format_layout *isl_layout;
1215 uint8_t num_channels;
1216 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1217 bool has_stencil;
1218 };
1219
1220 /**
1221 * Stencil formats are often a special case. To reduce the number of lookups
1222 * into the VkFormat-to-anv_format translation table when working with
1223 * stencil, here is the handle to the table's entry for VK_FORMAT_S8_UINT.
1224 */
1225 extern const struct anv_format *const anv_format_s8_uint;
1226
1227 const struct anv_format *
1228 anv_format_for_vk_format(VkFormat format);
1229
1230 static inline bool
1231 anv_format_is_color(const struct anv_format *format)
1232 {
1233 return !format->depth_format && !format->has_stencil;
1234 }
1235
1236 static inline bool
1237 anv_format_is_depth_or_stencil(const struct anv_format *format)
1238 {
1239 return format->depth_format || format->has_stencil;
1240 }
1241
1242 struct anv_image_view_info {
1243 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1244 bool is_array:1; /**< RENDER_SURFACE_STATE.SurfaceArray */
1245 bool is_cube:1; /**< RENDER_SURFACE_STATE.CubeFaceEnable* */
1246 };
1247
1248 struct anv_image_view_info
1249 anv_image_view_info_for_vk_image_view_type(VkImageViewType type);
1250
1251 /**
1252 * A proxy for the color surfaces, depth surfaces, and stencil surfaces.
1253 */
1254 struct anv_surface {
1255 /**
1256 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1257 */
1258 uint32_t offset;
1259
1260 uint32_t stride; /**< RENDER_SURFACE_STATE.SurfacePitch */
1261 uint16_t qpitch; /**< RENDER_SURFACE_STATE.QPitch */
1262
1263 /**
1264 * \name Alignment of miptree images, in units of pixels.
1265 *
1266 * These fields contain the real alignment values, not the values to be
1267 * given to the GPU. For example, if h_align is 4, then program the GPU
1268 * with HALIGN_4.
1269 * \{
1270 */
1271 uint8_t h_align; /**< RENDER_SURFACE_STATE.SurfaceHorizontalAlignment */
1272 uint8_t v_align; /**< RENDER_SURFACE_STATE.SurfaceVerticalAlignment */
1273 /** \} */
1274
1275 enum isl_tiling tiling;
1276 };
1277
1278 struct anv_image {
1279 VkImageType type;
1280 const struct anv_format *format;
1281 VkExtent3D extent;
1282 uint32_t levels;
1283 uint32_t array_size;
1284 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1285
1286 VkDeviceSize size;
1287 uint32_t alignment;
1288
1289 /* Set when bound */
1290 struct anv_bo *bo;
1291 VkDeviceSize offset;
1292
1293 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1294
1295 bool needs_nonrt_surface_state:1;
1296 bool needs_color_rt_surface_state:1;
1297
1298 /**
1299 * Image subsurfaces
1300 *
1301 * For each foo, anv_image::foo_surface is valid if and only if
1302 * anv_image::format has a foo aspect.
1303 *
1304 * The hardware requires that the depth buffer and stencil buffer be
1305 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1306 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1307 * allocate the depth and stencil buffers as separate surfaces in the same
1308 * bo.
1309 */
1310 union {
1311 struct anv_surface color_surface;
1312
1313 struct {
1314 struct anv_surface depth_surface;
1315 struct anv_surface stencil_surface;
1316 };
1317 };
1318 };
1319
1320 struct anv_image_view {
1321 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1322 const struct anv_format *format; /**< VkImageViewCreateInfo::format */
1323 struct anv_bo *bo;
1324 uint32_t offset; /**< Offset into bo. */
1325 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1326
1327 /** RENDER_SURFACE_STATE when using image as a color render target. */
1328 struct anv_state color_rt_surface_state;
1329
1330 /** RENDER_SURFACE_STATE when using image as a non render target. */
1331 struct anv_state nonrt_surface_state;
1332 };
1333
1334 struct anv_image_create_info {
1335 const VkImageCreateInfo *vk_info;
1336 bool force_tiling;
1337 enum isl_tiling tiling;
1338 uint32_t stride;
1339 };
1340
1341 VkResult anv_image_create(VkDevice _device,
1342 const struct anv_image_create_info *info,
1343 VkImage *pImage);
1344
1345 struct anv_surface *
1346 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1347 VkImageAspectFlags aspect_mask);
1348
1349 void anv_image_view_init(struct anv_image_view *view,
1350 struct anv_device *device,
1351 const VkImageViewCreateInfo* pCreateInfo,
1352 struct anv_cmd_buffer *cmd_buffer);
1353
1354 void
1355 gen7_image_view_init(struct anv_image_view *iview,
1356 struct anv_device *device,
1357 const VkImageViewCreateInfo* pCreateInfo,
1358 struct anv_cmd_buffer *cmd_buffer);
1359
1360 void
1361 gen8_image_view_init(struct anv_image_view *iview,
1362 struct anv_device *device,
1363 const VkImageViewCreateInfo* pCreateInfo,
1364 struct anv_cmd_buffer *cmd_buffer);
1365
1366 void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
1367 const struct anv_format *format,
1368 uint32_t offset, uint32_t range,
1369 uint32_t stride);
1370
1371 void gen7_fill_buffer_surface_state(void *state, const struct anv_format *format,
1372 uint32_t offset, uint32_t range,
1373 uint32_t stride);
1374 void gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
1375 uint32_t offset, uint32_t range,
1376 uint32_t stride);
1377
1378 struct anv_sampler {
1379 uint32_t state[4];
1380 };
1381
1382 struct anv_framebuffer {
1383 uint32_t width;
1384 uint32_t height;
1385 uint32_t layers;
1386
1387 uint32_t attachment_count;
1388 const struct anv_image_view * attachments[0];
1389 };
1390
1391 struct anv_subpass {
1392 uint32_t input_count;
1393 uint32_t * input_attachments;
1394 uint32_t color_count;
1395 uint32_t * color_attachments;
1396 uint32_t * resolve_attachments;
1397 uint32_t depth_stencil_attachment;
1398 };
1399
1400 struct anv_render_pass_attachment {
1401 const struct anv_format *format;
1402 uint32_t samples;
1403 VkAttachmentLoadOp load_op;
1404 VkAttachmentLoadOp stencil_load_op;
1405 };
1406
1407 struct anv_render_pass {
1408 uint32_t attachment_count;
1409 uint32_t subpass_count;
1410 struct anv_render_pass_attachment * attachments;
1411 struct anv_subpass subpasses[0];
1412 };
1413
1414 extern struct anv_render_pass anv_meta_dummy_renderpass;
1415
1416 struct anv_query_pool_slot {
1417 uint64_t begin;
1418 uint64_t end;
1419 uint64_t available;
1420 };
1421
1422 struct anv_query_pool {
1423 VkQueryType type;
1424 uint32_t slots;
1425 struct anv_bo bo;
1426 };
1427
1428 void anv_device_init_meta(struct anv_device *device);
1429 void anv_device_finish_meta(struct anv_device *device);
1430
1431 void *anv_lookup_entrypoint(const char *name);
1432
1433 void anv_dump_image_to_ppm(struct anv_device *device,
1434 struct anv_image *image, unsigned miplevel,
1435 unsigned array_layer, const char *filename);
1436
1437 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1438 \
1439 static inline struct __anv_type * \
1440 __anv_type ## _from_handle(__VkType _handle) \
1441 { \
1442 return (struct __anv_type *) _handle; \
1443 } \
1444 \
1445 static inline __VkType \
1446 __anv_type ## _to_handle(struct __anv_type *_obj) \
1447 { \
1448 return (__VkType) _obj; \
1449 }
1450
1451 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1452 \
1453 static inline struct __anv_type * \
1454 __anv_type ## _from_handle(__VkType _handle) \
1455 { \
1456 return (struct __anv_type *) _handle.handle; \
1457 } \
1458 \
1459 static inline __VkType \
1460 __anv_type ## _to_handle(struct __anv_type *_obj) \
1461 { \
1462 return (__VkType) { .handle = (uint64_t) _obj }; \
1463 }
1464
1465 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1466 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1467
1468 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCmdBuffer)
1469 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1470 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1471 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1472 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1473
1474 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCmdPool)
1475 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1476 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1477 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1478 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1479 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1480 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1481 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1482 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1483 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1484 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1485 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1486 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1487 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1488 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader, VkShader)
1489 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1490
1491 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1492 \
1493 static inline const __VkType * \
1494 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1495 { \
1496 return (const __VkType *) __anv_obj; \
1497 }
1498
1499 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1500 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1501
1502 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1503 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1504 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1505
1506 #ifdef __cplusplus
1507 }
1508 #endif