anv: Distinguish between subpass setup and subpass start
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <stdint.h>
32 #include <i915_drm.h>
33
34 #ifdef HAVE_VALGRIND
35 #include <valgrind.h>
36 #include <memcheck.h>
37 #define VG(x) x
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
39 #else
40 #define VG(x)
41 #endif
42
43 #include "brw_device_info.h"
44 #include "util/macros.h"
45 #include "util/list.h"
46
47 /* Pre-declarations needed for WSI entrypoints */
48 struct wl_surface;
49 struct wl_display;
50 typedef struct xcb_connection_t xcb_connection_t;
51 typedef uint32_t xcb_visualid_t;
52 typedef uint32_t xcb_window_t;
53
54 #define VK_USE_PLATFORM_XCB_KHR
55 #define VK_USE_PLATFORM_WAYLAND_KHR
56
57 #define VK_PROTOTYPES
58 #include <vulkan/vulkan.h>
59 #include <vulkan/vulkan_intel.h>
60
61 #include "anv_entrypoints.h"
62 #include "anv_gen_macros.h"
63 #include "brw_context.h"
64 #include "isl.h"
65
66 #ifdef __cplusplus
67 extern "C" {
68 #endif
69
70 #define MAX_VBS 32
71 #define MAX_SETS 8
72 #define MAX_RTS 8
73 #define MAX_VIEWPORTS 16
74 #define MAX_SCISSORS 16
75 #define MAX_PUSH_CONSTANTS_SIZE 128
76 #define MAX_DYNAMIC_BUFFERS 16
77 #define MAX_IMAGES 8
78
79 #define ICD_LOADER_MAGIC 0x01CDC0DE
80
81 typedef union _VK_LOADER_DATA {
82 uintptr_t loaderMagic;
83 void *loaderData;
84 } VK_LOADER_DATA;
85
86 #define anv_noreturn __attribute__((__noreturn__))
87 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
88
89 #define MIN(a, b) ((a) < (b) ? (a) : (b))
90 #define MAX(a, b) ((a) > (b) ? (a) : (b))
91
92 static inline uint32_t
93 align_u32(uint32_t v, uint32_t a)
94 {
95 assert(a != 0 && a == (a & -a));
96 return (v + a - 1) & ~(a - 1);
97 }
98
99 static inline uint64_t
100 align_u64(uint64_t v, uint64_t a)
101 {
102 assert(a != 0 && a == (a & -a));
103 return (v + a - 1) & ~(a - 1);
104 }
105
106 static inline int32_t
107 align_i32(int32_t v, int32_t a)
108 {
109 assert(a != 0 && a == (a & -a));
110 return (v + a - 1) & ~(a - 1);
111 }
112
113 /** Alignment must be a power of 2. */
114 static inline bool
115 anv_is_aligned(uintmax_t n, uintmax_t a)
116 {
117 assert(a == (a & -a));
118 return (n & (a - 1)) == 0;
119 }
120
121 static inline uint32_t
122 anv_minify(uint32_t n, uint32_t levels)
123 {
124 if (unlikely(n == 0))
125 return 0;
126 else
127 return MAX(n >> levels, 1);
128 }
129
130 static inline float
131 anv_clamp_f(float f, float min, float max)
132 {
133 assert(min < max);
134
135 if (f > max)
136 return max;
137 else if (f < min)
138 return min;
139 else
140 return f;
141 }
142
143 static inline bool
144 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
145 {
146 if (*inout_mask & clear_mask) {
147 *inout_mask &= ~clear_mask;
148 return true;
149 } else {
150 return false;
151 }
152 }
153
154 #define for_each_bit(b, dword) \
155 for (uint32_t __dword = (dword); \
156 (b) = __builtin_ffs(__dword) - 1, __dword; \
157 __dword &= ~(1 << (b)))
158
159 #define typed_memcpy(dest, src, count) ({ \
160 static_assert(sizeof(*src) == sizeof(*dest), ""); \
161 memcpy((dest), (src), (count) * sizeof(*(src))); \
162 })
163
164 #define zero(x) (memset(&(x), 0, sizeof(x)))
165
166 /* Define no kernel as 1, since that's an illegal offset for a kernel */
167 #define NO_KERNEL 1
168
169 struct anv_common {
170 VkStructureType sType;
171 const void* pNext;
172 };
173
174 /* Whenever we generate an error, pass it through this function. Useful for
175 * debugging, where we can break on it. Only call at error site, not when
176 * propagating errors. Might be useful to plug in a stack trace here.
177 */
178
179 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
180
181 #ifdef DEBUG
182 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
183 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
184 #else
185 #define vk_error(error) error
186 #define vk_errorf(error, format, ...) error
187 #endif
188
189 void __anv_finishme(const char *file, int line, const char *format, ...)
190 anv_printflike(3, 4);
191 void anv_loge(const char *format, ...) anv_printflike(1, 2);
192 void anv_loge_v(const char *format, va_list va);
193
194 /**
195 * Print a FINISHME message, including its source location.
196 */
197 #define anv_finishme(format, ...) \
198 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
199
200 /* A non-fatal assert. Useful for debugging. */
201 #ifdef DEBUG
202 #define anv_assert(x) ({ \
203 if (unlikely(!(x))) \
204 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
205 })
206 #else
207 #define anv_assert(x)
208 #endif
209
210 /**
211 * If a block of code is annotated with anv_validate, then the block runs only
212 * in debug builds.
213 */
214 #ifdef DEBUG
215 #define anv_validate if (1)
216 #else
217 #define anv_validate if (0)
218 #endif
219
220 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
221 void anv_abortfv(const char *format, va_list va) anv_noreturn;
222
223 #define stub_return(v) \
224 do { \
225 anv_finishme("stub %s", __func__); \
226 return (v); \
227 } while (0)
228
229 #define stub() \
230 do { \
231 anv_finishme("stub %s", __func__); \
232 return; \
233 } while (0)
234
235 /**
236 * A dynamically growable, circular buffer. Elements are added at head and
237 * removed from tail. head and tail are free-running uint32_t indices and we
238 * only compute the modulo with size when accessing the array. This way,
239 * number of bytes in the queue is always head - tail, even in case of
240 * wraparound.
241 */
242
243 struct anv_vector {
244 uint32_t head;
245 uint32_t tail;
246 uint32_t element_size;
247 uint32_t size;
248 void *data;
249 };
250
251 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
252 void *anv_vector_add(struct anv_vector *queue);
253 void *anv_vector_remove(struct anv_vector *queue);
254
255 static inline int
256 anv_vector_length(struct anv_vector *queue)
257 {
258 return (queue->head - queue->tail) / queue->element_size;
259 }
260
261 static inline void *
262 anv_vector_head(struct anv_vector *vector)
263 {
264 assert(vector->tail < vector->head);
265 return (void *)((char *)vector->data +
266 ((vector->head - vector->element_size) &
267 (vector->size - 1)));
268 }
269
270 static inline void *
271 anv_vector_tail(struct anv_vector *vector)
272 {
273 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
274 }
275
276 static inline void
277 anv_vector_finish(struct anv_vector *queue)
278 {
279 free(queue->data);
280 }
281
282 #define anv_vector_foreach(elem, queue) \
283 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
284 for (uint32_t __anv_vector_offset = (queue)->tail; \
285 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
286 __anv_vector_offset += (queue)->element_size)
287
288 struct anv_bo {
289 uint32_t gem_handle;
290
291 /* Index into the current validation list. This is used by the
292 * validation list building alrogithm to track which buffers are already
293 * in the validation list so that we can ensure uniqueness.
294 */
295 uint32_t index;
296
297 /* Last known offset. This value is provided by the kernel when we
298 * execbuf and is used as the presumed offset for the next bunch of
299 * relocations.
300 */
301 uint64_t offset;
302
303 uint64_t size;
304 void *map;
305 };
306
307 /* Represents a lock-free linked list of "free" things. This is used by
308 * both the block pool and the state pools. Unfortunately, in order to
309 * solve the ABA problem, we can't use a single uint32_t head.
310 */
311 union anv_free_list {
312 struct {
313 int32_t offset;
314
315 /* A simple count that is incremented every time the head changes. */
316 uint32_t count;
317 };
318 uint64_t u64;
319 };
320
321 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
322
323 struct anv_block_state {
324 union {
325 struct {
326 uint32_t next;
327 uint32_t end;
328 };
329 uint64_t u64;
330 };
331 };
332
333 struct anv_block_pool {
334 struct anv_device *device;
335
336 struct anv_bo bo;
337
338 /* The offset from the start of the bo to the "center" of the block
339 * pool. Pointers to allocated blocks are given by
340 * bo.map + center_bo_offset + offsets.
341 */
342 uint32_t center_bo_offset;
343
344 /* Current memory map of the block pool. This pointer may or may not
345 * point to the actual beginning of the block pool memory. If
346 * anv_block_pool_alloc_back has ever been called, then this pointer
347 * will point to the "center" position of the buffer and all offsets
348 * (negative or positive) given out by the block pool alloc functions
349 * will be valid relative to this pointer.
350 *
351 * In particular, map == bo.map + center_offset
352 */
353 void *map;
354 int fd;
355
356 /**
357 * Array of mmaps and gem handles owned by the block pool, reclaimed when
358 * the block pool is destroyed.
359 */
360 struct anv_vector mmap_cleanups;
361
362 uint32_t block_size;
363
364 union anv_free_list free_list;
365 struct anv_block_state state;
366
367 union anv_free_list back_free_list;
368 struct anv_block_state back_state;
369 };
370
371 /* Block pools are backed by a fixed-size 2GB memfd */
372 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
373
374 /* The center of the block pool is also the middle of the memfd. This may
375 * change in the future if we decide differently for some reason.
376 */
377 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
378
379 static inline uint32_t
380 anv_block_pool_size(struct anv_block_pool *pool)
381 {
382 return pool->state.end + pool->back_state.end;
383 }
384
385 struct anv_state {
386 int32_t offset;
387 uint32_t alloc_size;
388 void *map;
389 };
390
391 struct anv_fixed_size_state_pool {
392 size_t state_size;
393 union anv_free_list free_list;
394 struct anv_block_state block;
395 };
396
397 #define ANV_MIN_STATE_SIZE_LOG2 6
398 #define ANV_MAX_STATE_SIZE_LOG2 10
399
400 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
401
402 struct anv_state_pool {
403 struct anv_block_pool *block_pool;
404 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
405 };
406
407 struct anv_state_stream_block;
408
409 struct anv_state_stream {
410 struct anv_block_pool *block_pool;
411
412 /* The current working block */
413 struct anv_state_stream_block *block;
414
415 /* Offset at which the current block starts */
416 uint32_t start;
417 /* Offset at which to allocate the next state */
418 uint32_t next;
419 /* Offset at which the current block ends */
420 uint32_t end;
421 };
422
423 #define CACHELINE_SIZE 64
424 #define CACHELINE_MASK 63
425
426 static void inline
427 anv_state_clflush(struct anv_state state)
428 {
429 /* state.map may not be cacheline aligned, so round down the start pointer
430 * to a cacheline boundary so we flush all pages that contain the state.
431 */
432 void *end = state.map + state.alloc_size;
433 void *p = (void *) (((uintptr_t) state.map) & ~CACHELINE_MASK);
434
435 __builtin_ia32_sfence();
436 while (p < end) {
437 __builtin_ia32_clflush(p);
438 p += CACHELINE_SIZE;
439 }
440 }
441
442 void anv_block_pool_init(struct anv_block_pool *pool,
443 struct anv_device *device, uint32_t block_size);
444 void anv_block_pool_finish(struct anv_block_pool *pool);
445 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
446 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
447 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
448 void anv_state_pool_init(struct anv_state_pool *pool,
449 struct anv_block_pool *block_pool);
450 void anv_state_pool_finish(struct anv_state_pool *pool);
451 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
452 size_t state_size, size_t alignment);
453 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
454 void anv_state_stream_init(struct anv_state_stream *stream,
455 struct anv_block_pool *block_pool);
456 void anv_state_stream_finish(struct anv_state_stream *stream);
457 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
458 uint32_t size, uint32_t alignment);
459
460 /**
461 * Implements a pool of re-usable BOs. The interface is identical to that
462 * of block_pool except that each block is its own BO.
463 */
464 struct anv_bo_pool {
465 struct anv_device *device;
466
467 uint32_t bo_size;
468
469 void *free_list;
470 };
471
472 void anv_bo_pool_init(struct anv_bo_pool *pool,
473 struct anv_device *device, uint32_t block_size);
474 void anv_bo_pool_finish(struct anv_bo_pool *pool);
475 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
476 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
477
478
479 void *anv_resolve_entrypoint(uint32_t index);
480
481 extern struct anv_dispatch_table dtable;
482
483 #define ANV_CALL(func) ({ \
484 if (dtable.func == NULL) { \
485 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
486 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
487 } \
488 dtable.func; \
489 })
490
491 static inline void *
492 anv_alloc(const VkAllocationCallbacks *alloc,
493 size_t size, size_t align,
494 VkSystemAllocationScope scope)
495 {
496 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
497 }
498
499 static inline void *
500 anv_realloc(const VkAllocationCallbacks *alloc,
501 void *ptr, size_t size, size_t align,
502 VkSystemAllocationScope scope)
503 {
504 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
505 }
506
507 static inline void
508 anv_free(const VkAllocationCallbacks *alloc, void *data)
509 {
510 alloc->pfnFree(alloc->pUserData, data);
511 }
512
513 static inline void *
514 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
515 const VkAllocationCallbacks *alloc,
516 size_t size, size_t align,
517 VkSystemAllocationScope scope)
518 {
519 if (alloc)
520 return anv_alloc(alloc, size, align, scope);
521 else
522 return anv_alloc(parent_alloc, size, align, scope);
523 }
524
525 static inline void
526 anv_free2(const VkAllocationCallbacks *parent_alloc,
527 const VkAllocationCallbacks *alloc,
528 void *data)
529 {
530 if (alloc)
531 anv_free(alloc, data);
532 else
533 anv_free(parent_alloc, data);
534 }
535
536 struct anv_physical_device {
537 VK_LOADER_DATA _loader_data;
538
539 struct anv_instance * instance;
540 uint32_t chipset_id;
541 const char * path;
542 const char * name;
543 const struct brw_device_info * info;
544 uint64_t aperture_size;
545 struct brw_compiler * compiler;
546 struct isl_device isl_dev;
547 };
548
549 struct anv_instance {
550 VK_LOADER_DATA _loader_data;
551
552 VkAllocationCallbacks alloc;
553
554 uint32_t apiVersion;
555 int physicalDeviceCount;
556 struct anv_physical_device physicalDevice;
557
558 void * wayland_wsi;
559 };
560
561 VkResult anv_init_wsi(struct anv_instance *instance);
562 void anv_finish_wsi(struct anv_instance *instance);
563
564 struct anv_meta_state {
565 struct {
566 /**
567 * Pipeline N is used to clear color attachment N of the current
568 * subpass.
569 *
570 * HACK: We use one pipeline per color attachment to work around the
571 * compiler's inability to dynamically set the render target index of
572 * the render target write message.
573 */
574 struct anv_pipeline *color_pipelines[MAX_RTS];
575
576 struct anv_pipeline *depth_only_pipeline;
577 struct anv_pipeline *stencil_only_pipeline;
578 struct anv_pipeline *depthstencil_pipeline;
579 } clear;
580
581 struct {
582 VkRenderPass render_pass;
583
584 /** Pipeline that blits from a 1D image. */
585 VkPipeline pipeline_1d_src;
586
587 /** Pipeline that blits from a 2D image. */
588 VkPipeline pipeline_2d_src;
589
590 /** Pipeline that blits from a 3D image. */
591 VkPipeline pipeline_3d_src;
592
593 VkPipelineLayout pipeline_layout;
594 VkDescriptorSetLayout ds_layout;
595 } blit;
596 };
597
598 struct anv_queue {
599 VK_LOADER_DATA _loader_data;
600
601 struct anv_device * device;
602
603 struct anv_state_pool * pool;
604 };
605
606 struct anv_pipeline_cache {
607 struct anv_device * device;
608 struct anv_state_stream program_stream;
609 pthread_mutex_t mutex;
610 };
611
612 void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
613 struct anv_device *device);
614 void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
615
616 struct anv_device {
617 VK_LOADER_DATA _loader_data;
618
619 VkAllocationCallbacks alloc;
620
621 struct anv_instance * instance;
622 uint32_t chipset_id;
623 struct brw_device_info info;
624 struct isl_device isl_dev;
625 int context_id;
626 int fd;
627
628 struct anv_bo_pool batch_bo_pool;
629
630 struct anv_block_pool dynamic_state_block_pool;
631 struct anv_state_pool dynamic_state_pool;
632
633 struct anv_block_pool instruction_block_pool;
634 struct anv_pipeline_cache default_pipeline_cache;
635
636 struct anv_block_pool surface_state_block_pool;
637 struct anv_state_pool surface_state_pool;
638
639 struct anv_bo workaround_bo;
640
641 struct anv_meta_state meta_state;
642
643 struct anv_state border_colors;
644
645 struct anv_queue queue;
646
647 struct anv_block_pool scratch_block_pool;
648
649 pthread_mutex_t mutex;
650 };
651
652 void* anv_gem_mmap(struct anv_device *device,
653 uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
654 void anv_gem_munmap(void *p, uint64_t size);
655 uint32_t anv_gem_create(struct anv_device *device, size_t size);
656 void anv_gem_close(struct anv_device *device, uint32_t gem_handle);
657 uint32_t anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
658 int anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns);
659 int anv_gem_execbuffer(struct anv_device *device,
660 struct drm_i915_gem_execbuffer2 *execbuf);
661 int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
662 uint32_t stride, uint32_t tiling);
663 int anv_gem_create_context(struct anv_device *device);
664 int anv_gem_destroy_context(struct anv_device *device, int context);
665 int anv_gem_get_param(int fd, uint32_t param);
666 int anv_gem_get_aperture(int fd, uint64_t *size);
667 int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
668 uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
669 int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, uint32_t caching);
670 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
671 uint32_t read_domains, uint32_t write_domain);
672
673 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
674
675 struct anv_reloc_list {
676 size_t num_relocs;
677 size_t array_length;
678 struct drm_i915_gem_relocation_entry * relocs;
679 struct anv_bo ** reloc_bos;
680 };
681
682 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
683 const VkAllocationCallbacks *alloc);
684 void anv_reloc_list_finish(struct anv_reloc_list *list,
685 const VkAllocationCallbacks *alloc);
686
687 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
688 const VkAllocationCallbacks *alloc,
689 uint32_t offset, struct anv_bo *target_bo,
690 uint32_t delta);
691
692 struct anv_batch_bo {
693 /* Link in the anv_cmd_buffer.owned_batch_bos list */
694 struct list_head link;
695
696 struct anv_bo bo;
697
698 /* Bytes actually consumed in this batch BO */
699 size_t length;
700
701 /* Last seen surface state block pool bo offset */
702 uint32_t last_ss_pool_bo_offset;
703
704 struct anv_reloc_list relocs;
705 };
706
707 struct anv_batch {
708 const VkAllocationCallbacks * alloc;
709
710 void * start;
711 void * end;
712 void * next;
713
714 struct anv_reloc_list * relocs;
715
716 /* This callback is called (with the associated user data) in the event
717 * that the batch runs out of space.
718 */
719 VkResult (*extend_cb)(struct anv_batch *, void *);
720 void * user_data;
721 };
722
723 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
724 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
725 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
726 void *location, struct anv_bo *bo, uint32_t offset);
727
728 struct anv_address {
729 struct anv_bo *bo;
730 uint32_t offset;
731 };
732
733 #define __gen_address_type struct anv_address
734 #define __gen_user_data struct anv_batch
735
736 static inline uint64_t
737 __gen_combine_address(struct anv_batch *batch, void *location,
738 const struct anv_address address, uint32_t delta)
739 {
740 if (address.bo == NULL) {
741 return address.offset + delta;
742 } else {
743 assert(batch->start <= location && location < batch->end);
744
745 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
746 }
747 }
748
749 /* Wrapper macros needed to work around preprocessor argument issues. In
750 * particular, arguments don't get pre-evaluated if they are concatenated.
751 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
752 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
753 * We can work around this easily enough with these helpers.
754 */
755 #define __anv_cmd_length(cmd) cmd ## _length
756 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
757 #define __anv_cmd_header(cmd) cmd ## _header
758 #define __anv_cmd_pack(cmd) cmd ## _pack
759
760 #define anv_batch_emit(batch, cmd, ...) do { \
761 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
762 struct cmd __template = { \
763 __anv_cmd_header(cmd), \
764 __VA_ARGS__ \
765 }; \
766 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
767 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
768 } while (0)
769
770 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
771 void *__dst = anv_batch_emit_dwords(batch, n); \
772 struct cmd __template = { \
773 __anv_cmd_header(cmd), \
774 .DwordLength = n - __anv_cmd_length_bias(cmd), \
775 __VA_ARGS__ \
776 }; \
777 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
778 __dst; \
779 })
780
781 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
782 do { \
783 uint32_t *dw; \
784 \
785 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
786 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
787 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
788 dw[i] = (dwords0)[i] | (dwords1)[i]; \
789 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
790 } while (0)
791
792 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
793 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
794 struct anv_state __state = \
795 anv_state_pool_alloc((pool), __size, align); \
796 struct cmd __template = { \
797 __VA_ARGS__ \
798 }; \
799 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
800 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
801 if (!(pool)->block_pool->device->info.has_llc) \
802 anv_state_clflush(__state); \
803 __state; \
804 })
805
806 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
807 .GraphicsDataTypeGFDT = 0, \
808 .LLCCacheabilityControlLLCCC = 0, \
809 .L3CacheabilityControlL3CC = 1, \
810 }
811
812 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
813 .LLCeLLCCacheabilityControlLLCCC = 0, \
814 .L3CacheabilityControlL3CC = 1, \
815 }
816
817 #define GEN8_MOCS { \
818 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
819 .TargetCache = L3DefertoPATforLLCeLLCselection, \
820 .AgeforQUADLRU = 0 \
821 }
822
823 /* Skylake: MOCS is now an index into an array of 62 different caching
824 * configurations programmed by the kernel.
825 */
826
827 #define GEN9_MOCS { \
828 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
829 .IndextoMOCSTables = 2 \
830 }
831
832 #define GEN9_MOCS_PTE { \
833 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
834 .IndextoMOCSTables = 1 \
835 }
836
837 struct anv_device_memory {
838 struct anv_bo bo;
839 uint32_t type_index;
840 VkDeviceSize map_size;
841 void * map;
842 };
843
844 /**
845 * Header for Vertex URB Entry (VUE)
846 */
847 struct anv_vue_header {
848 uint32_t Reserved;
849 uint32_t RTAIndex; /* RenderTargetArrayIndex */
850 uint32_t ViewportIndex;
851 float PointWidth;
852 };
853
854 struct anv_descriptor_set_binding_layout {
855 /* Number of array elements in this binding */
856 uint16_t array_size;
857
858 /* Index into the flattend descriptor set */
859 uint16_t descriptor_index;
860
861 /* Index into the dynamic state array for a dynamic buffer */
862 int16_t dynamic_offset_index;
863
864 /* Index into the descriptor set buffer views */
865 int16_t buffer_index;
866
867 struct {
868 /* Index into the binding table for the associated surface */
869 int16_t surface_index;
870
871 /* Index into the sampler table for the associated sampler */
872 int16_t sampler_index;
873
874 /* Index into the image table for the associated image */
875 int16_t image_index;
876 } stage[MESA_SHADER_STAGES];
877
878 /* Immutable samplers (or NULL if no immutable samplers) */
879 struct anv_sampler **immutable_samplers;
880 };
881
882 struct anv_descriptor_set_layout {
883 /* Number of bindings in this descriptor set */
884 uint16_t binding_count;
885
886 /* Total size of the descriptor set with room for all array entries */
887 uint16_t size;
888
889 /* Shader stages affected by this descriptor set */
890 uint16_t shader_stages;
891
892 /* Number of buffers in this descriptor set */
893 uint16_t buffer_count;
894
895 /* Number of dynamic offsets used by this descriptor set */
896 uint16_t dynamic_offset_count;
897
898 /* Bindings in this descriptor set */
899 struct anv_descriptor_set_binding_layout binding[0];
900 };
901
902 struct anv_descriptor {
903 VkDescriptorType type;
904
905 union {
906 struct {
907 union {
908 struct anv_image_view *image_view;
909 };
910 struct anv_sampler *sampler;
911 };
912
913 struct anv_buffer_view *buffer_view;
914 };
915 };
916
917 struct anv_descriptor_set {
918 const struct anv_descriptor_set_layout *layout;
919 struct anv_buffer_view *buffer_views;
920 struct anv_descriptor descriptors[0];
921 };
922
923 VkResult
924 anv_descriptor_set_create(struct anv_device *device,
925 const struct anv_descriptor_set_layout *layout,
926 struct anv_descriptor_set **out_set);
927
928 void
929 anv_descriptor_set_destroy(struct anv_device *device,
930 struct anv_descriptor_set *set);
931
932 struct anv_pipeline_binding {
933 /* The descriptor set this surface corresponds to */
934 uint16_t set;
935
936 /* Offset into the descriptor set */
937 uint16_t offset;
938 };
939
940 struct anv_pipeline_layout {
941 struct {
942 struct anv_descriptor_set_layout *layout;
943 uint32_t dynamic_offset_start;
944 struct {
945 uint32_t surface_start;
946 uint32_t sampler_start;
947 uint32_t image_start;
948 } stage[MESA_SHADER_STAGES];
949 } set[MAX_SETS];
950
951 uint32_t num_sets;
952
953 struct {
954 bool has_dynamic_offsets;
955 uint32_t surface_count;
956 struct anv_pipeline_binding *surface_to_descriptor;
957 uint32_t sampler_count;
958 struct anv_pipeline_binding *sampler_to_descriptor;
959 uint32_t image_count;
960 } stage[MESA_SHADER_STAGES];
961
962 struct anv_pipeline_binding entries[0];
963 };
964
965 struct anv_buffer {
966 struct anv_device * device;
967 VkDeviceSize size;
968
969 VkBufferUsageFlags usage;
970
971 /* Set when bound */
972 struct anv_bo * bo;
973 VkDeviceSize offset;
974 };
975
976 enum anv_cmd_dirty_bits {
977 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
978 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
979 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
980 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
981 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
982 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
983 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
984 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
985 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
986 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
987 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
988 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
989 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
990 };
991 typedef uint32_t anv_cmd_dirty_mask_t;
992
993 struct anv_vertex_binding {
994 struct anv_buffer * buffer;
995 VkDeviceSize offset;
996 };
997
998 struct anv_push_constants {
999 /* Current allocated size of this push constants data structure.
1000 * Because a decent chunk of it may not be used (images on SKL, for
1001 * instance), we won't actually allocate the entire structure up-front.
1002 */
1003 uint32_t size;
1004
1005 /* Push constant data provided by the client through vkPushConstants */
1006 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
1007
1008 /* Our hardware only provides zero-based vertex and instance id so, in
1009 * order to satisfy the vulkan requirements, we may have to push one or
1010 * both of these into the shader.
1011 */
1012 uint32_t base_vertex;
1013 uint32_t base_instance;
1014
1015 /* Offsets and ranges for dynamically bound buffers */
1016 struct {
1017 uint32_t offset;
1018 uint32_t range;
1019 } dynamic[MAX_DYNAMIC_BUFFERS];
1020
1021 /* Image data for image_load_store on pre-SKL */
1022 struct brw_image_param images[MAX_IMAGES];
1023 };
1024
1025 struct anv_dynamic_state {
1026 struct {
1027 uint32_t count;
1028 VkViewport viewports[MAX_VIEWPORTS];
1029 } viewport;
1030
1031 struct {
1032 uint32_t count;
1033 VkRect2D scissors[MAX_SCISSORS];
1034 } scissor;
1035
1036 float line_width;
1037
1038 struct {
1039 float bias;
1040 float clamp;
1041 float slope;
1042 } depth_bias;
1043
1044 float blend_constants[4];
1045
1046 struct {
1047 float min;
1048 float max;
1049 } depth_bounds;
1050
1051 struct {
1052 uint32_t front;
1053 uint32_t back;
1054 } stencil_compare_mask;
1055
1056 struct {
1057 uint32_t front;
1058 uint32_t back;
1059 } stencil_write_mask;
1060
1061 struct {
1062 uint32_t front;
1063 uint32_t back;
1064 } stencil_reference;
1065 };
1066
1067 extern const struct anv_dynamic_state default_dynamic_state;
1068
1069 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
1070 const struct anv_dynamic_state *src,
1071 uint32_t copy_mask);
1072
1073 /**
1074 * Attachment state when recording a renderpass instance.
1075 *
1076 * The clear value is valid only if there exists a pending clear.
1077 */
1078 struct anv_attachment_state {
1079 VkImageAspectFlags pending_clear_aspects;
1080 VkClearValue clear_value;
1081 };
1082
1083 /** State required while building cmd buffer */
1084 struct anv_cmd_state {
1085 /* PIPELINE_SELECT.PipelineSelection */
1086 uint32_t current_pipeline;
1087 uint32_t vb_dirty;
1088 anv_cmd_dirty_mask_t dirty;
1089 anv_cmd_dirty_mask_t compute_dirty;
1090 uint32_t num_workgroups_offset;
1091 struct anv_bo *num_workgroups_bo;
1092 VkShaderStageFlags descriptors_dirty;
1093 VkShaderStageFlags push_constants_dirty;
1094 uint32_t scratch_size;
1095 struct anv_pipeline * pipeline;
1096 struct anv_pipeline * compute_pipeline;
1097 struct anv_framebuffer * framebuffer;
1098 struct anv_render_pass * pass;
1099 struct anv_subpass * subpass;
1100 uint32_t restart_index;
1101 struct anv_vertex_binding vertex_bindings[MAX_VBS];
1102 struct anv_descriptor_set * descriptors[MAX_SETS];
1103 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
1104 struct anv_state binding_tables[MESA_SHADER_STAGES];
1105 struct anv_state samplers[MESA_SHADER_STAGES];
1106 struct anv_dynamic_state dynamic;
1107 bool need_query_wa;
1108
1109 /**
1110 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1111 * valid only when recording a render pass instance.
1112 */
1113 struct anv_attachment_state * attachments;
1114
1115 struct {
1116 struct anv_buffer * index_buffer;
1117 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1118 uint32_t index_offset;
1119 } gen7;
1120 };
1121
1122 struct anv_cmd_pool {
1123 VkAllocationCallbacks alloc;
1124 struct list_head cmd_buffers;
1125 };
1126
1127 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1128
1129 enum anv_cmd_buffer_exec_mode {
1130 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1131 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1132 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1133 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1134 };
1135
1136 struct anv_cmd_buffer {
1137 VK_LOADER_DATA _loader_data;
1138
1139 struct anv_device * device;
1140
1141 struct anv_cmd_pool * pool;
1142 struct list_head pool_link;
1143
1144 struct anv_batch batch;
1145
1146 /* Fields required for the actual chain of anv_batch_bo's.
1147 *
1148 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1149 */
1150 struct list_head batch_bos;
1151 enum anv_cmd_buffer_exec_mode exec_mode;
1152
1153 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1154 * referenced by this command buffer
1155 *
1156 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1157 */
1158 struct anv_vector seen_bbos;
1159
1160 /* A vector of int32_t's for every block of binding tables.
1161 *
1162 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1163 */
1164 struct anv_vector bt_blocks;
1165 uint32_t bt_next;
1166 struct anv_reloc_list surface_relocs;
1167
1168 /* Information needed for execbuf
1169 *
1170 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1171 */
1172 struct {
1173 struct drm_i915_gem_execbuffer2 execbuf;
1174
1175 struct drm_i915_gem_exec_object2 * objects;
1176 uint32_t bo_count;
1177 struct anv_bo ** bos;
1178
1179 /* Allocated length of the 'objects' and 'bos' arrays */
1180 uint32_t array_length;
1181
1182 bool need_reloc;
1183 } execbuf2;
1184
1185 /* Serial for tracking buffer completion */
1186 uint32_t serial;
1187
1188 /* Stream objects for storing temporary data */
1189 struct anv_state_stream surface_state_stream;
1190 struct anv_state_stream dynamic_state_stream;
1191
1192 VkCommandBufferUsageFlags usage_flags;
1193 VkCommandBufferLevel level;
1194
1195 struct anv_cmd_state state;
1196 };
1197
1198 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1199 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1200 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1201 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1202 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1203 struct anv_cmd_buffer *secondary);
1204 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1205
1206 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1207 unsigned stage, struct anv_state *bt_state);
1208 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1209 unsigned stage, struct anv_state *state);
1210 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1211 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer,
1212 uint32_t stages);
1213
1214 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1215 const void *data, uint32_t size, uint32_t alignment);
1216 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1217 uint32_t *a, uint32_t *b,
1218 uint32_t dwords, uint32_t alignment);
1219
1220 struct anv_address
1221 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1222 struct anv_state
1223 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1224 uint32_t entries, uint32_t *state_offset);
1225 struct anv_state
1226 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1227 struct anv_state
1228 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1229 uint32_t size, uint32_t alignment);
1230
1231 VkResult
1232 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1233
1234 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1235 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1236
1237 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1238 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1239 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1240 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1241
1242 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1243
1244 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
1245 const VkRenderPassBeginInfo *info);
1246
1247 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1248 struct anv_subpass *subpass);
1249 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1250 struct anv_subpass *subpass);
1251 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1252 struct anv_subpass *subpass);
1253 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1254 struct anv_subpass *subpass);
1255
1256 struct anv_state
1257 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1258 gl_shader_stage stage);
1259 struct anv_state
1260 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
1261
1262 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
1263
1264 const struct anv_image_view *
1265 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1266
1267 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1268
1269 struct anv_fence {
1270 struct anv_bo bo;
1271 struct drm_i915_gem_execbuffer2 execbuf;
1272 struct drm_i915_gem_exec_object2 exec2_objects[1];
1273 bool ready;
1274 };
1275
1276 struct anv_event {
1277 uint32_t semaphore;
1278 struct anv_state state;
1279 };
1280
1281 struct nir_shader;
1282
1283 struct anv_shader_module {
1284 struct nir_shader * nir;
1285
1286 uint32_t size;
1287 char data[0];
1288 };
1289
1290 static inline gl_shader_stage
1291 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1292 {
1293 assert(__builtin_popcount(vk_stage) == 1);
1294 return ffs(vk_stage) - 1;
1295 }
1296
1297 static inline VkShaderStageFlagBits
1298 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1299 {
1300 return (1 << mesa_stage);
1301 }
1302
1303 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1304
1305 #define anv_foreach_stage(stage, stage_bits) \
1306 for (gl_shader_stage stage, \
1307 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1308 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1309 __tmp &= ~(1 << (stage)))
1310
1311 struct anv_pipeline {
1312 struct anv_device * device;
1313 struct anv_batch batch;
1314 uint32_t batch_data[512];
1315 struct anv_reloc_list batch_relocs;
1316 uint32_t dynamic_state_mask;
1317 struct anv_dynamic_state dynamic_state;
1318
1319 struct anv_pipeline_layout * layout;
1320 bool use_repclear;
1321
1322 struct brw_vs_prog_data vs_prog_data;
1323 struct brw_wm_prog_data wm_prog_data;
1324 struct brw_gs_prog_data gs_prog_data;
1325 struct brw_cs_prog_data cs_prog_data;
1326 bool writes_point_size;
1327 struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
1328 uint32_t scratch_start[MESA_SHADER_STAGES];
1329 uint32_t total_scratch;
1330 struct {
1331 uint32_t vs_start;
1332 uint32_t vs_size;
1333 uint32_t nr_vs_entries;
1334 uint32_t gs_start;
1335 uint32_t gs_size;
1336 uint32_t nr_gs_entries;
1337 } urb;
1338
1339 VkShaderStageFlags active_stages;
1340 struct anv_state blend_state;
1341 uint32_t vs_simd8;
1342 uint32_t vs_vec4;
1343 uint32_t ps_simd8;
1344 uint32_t ps_simd16;
1345 uint32_t ps_ksp0;
1346 uint32_t ps_ksp2;
1347 uint32_t ps_grf_start0;
1348 uint32_t ps_grf_start2;
1349 uint32_t gs_kernel;
1350 uint32_t gs_vertex_count;
1351 uint32_t cs_simd;
1352
1353 uint32_t vb_used;
1354 uint32_t binding_stride[MAX_VBS];
1355 bool instancing_enable[MAX_VBS];
1356 bool primitive_restart;
1357 uint32_t topology;
1358
1359 uint32_t cs_thread_width_max;
1360 uint32_t cs_right_mask;
1361
1362 struct {
1363 uint32_t sf[7];
1364 uint32_t depth_stencil_state[3];
1365 } gen7;
1366
1367 struct {
1368 uint32_t sf[4];
1369 uint32_t raster[5];
1370 uint32_t wm_depth_stencil[3];
1371 } gen8;
1372
1373 struct {
1374 uint32_t wm_depth_stencil[4];
1375 } gen9;
1376 };
1377
1378 struct anv_graphics_pipeline_create_info {
1379 /**
1380 * If non-negative, overrides the color attachment count of the pipeline's
1381 * subpass.
1382 */
1383 int8_t color_attachment_count;
1384
1385 bool use_repclear;
1386 bool disable_viewport;
1387 bool disable_scissor;
1388 bool disable_vs;
1389 bool use_rectlist;
1390 };
1391
1392 VkResult
1393 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1394 struct anv_pipeline_cache *cache,
1395 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1396 const struct anv_graphics_pipeline_create_info *extra,
1397 const VkAllocationCallbacks *alloc);
1398
1399 VkResult
1400 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1401 struct anv_pipeline_cache *cache,
1402 const VkComputePipelineCreateInfo *info,
1403 struct anv_shader_module *module,
1404 const char *entrypoint,
1405 const VkSpecializationInfo *spec_info);
1406
1407 VkResult
1408 anv_graphics_pipeline_create(VkDevice device,
1409 VkPipelineCache cache,
1410 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1411 const struct anv_graphics_pipeline_create_info *extra,
1412 const VkAllocationCallbacks *alloc,
1413 VkPipeline *pPipeline);
1414
1415 VkResult
1416 gen7_graphics_pipeline_create(VkDevice _device,
1417 struct anv_pipeline_cache *cache,
1418 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1419 const struct anv_graphics_pipeline_create_info *extra,
1420 const VkAllocationCallbacks *alloc,
1421 VkPipeline *pPipeline);
1422
1423 VkResult
1424 gen75_graphics_pipeline_create(VkDevice _device,
1425 struct anv_pipeline_cache *cache,
1426 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1427 const struct anv_graphics_pipeline_create_info *extra,
1428 const VkAllocationCallbacks *alloc,
1429 VkPipeline *pPipeline);
1430
1431 VkResult
1432 gen8_graphics_pipeline_create(VkDevice _device,
1433 struct anv_pipeline_cache *cache,
1434 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1435 const struct anv_graphics_pipeline_create_info *extra,
1436 const VkAllocationCallbacks *alloc,
1437 VkPipeline *pPipeline);
1438 VkResult
1439 gen9_graphics_pipeline_create(VkDevice _device,
1440 struct anv_pipeline_cache *cache,
1441 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1442 const struct anv_graphics_pipeline_create_info *extra,
1443 const VkAllocationCallbacks *alloc,
1444 VkPipeline *pPipeline);
1445 VkResult
1446 gen7_compute_pipeline_create(VkDevice _device,
1447 struct anv_pipeline_cache *cache,
1448 const VkComputePipelineCreateInfo *pCreateInfo,
1449 const VkAllocationCallbacks *alloc,
1450 VkPipeline *pPipeline);
1451 VkResult
1452 gen75_compute_pipeline_create(VkDevice _device,
1453 struct anv_pipeline_cache *cache,
1454 const VkComputePipelineCreateInfo *pCreateInfo,
1455 const VkAllocationCallbacks *alloc,
1456 VkPipeline *pPipeline);
1457
1458 VkResult
1459 gen8_compute_pipeline_create(VkDevice _device,
1460 struct anv_pipeline_cache *cache,
1461 const VkComputePipelineCreateInfo *pCreateInfo,
1462 const VkAllocationCallbacks *alloc,
1463 VkPipeline *pPipeline);
1464 VkResult
1465 gen9_compute_pipeline_create(VkDevice _device,
1466 struct anv_pipeline_cache *cache,
1467 const VkComputePipelineCreateInfo *pCreateInfo,
1468 const VkAllocationCallbacks *alloc,
1469 VkPipeline *pPipeline);
1470
1471 struct anv_format {
1472 const VkFormat vk_format;
1473 const char *name;
1474 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1475 const struct isl_format_layout *isl_layout;
1476 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1477 bool has_stencil;
1478 };
1479
1480 const struct anv_format *
1481 anv_format_for_vk_format(VkFormat format);
1482
1483 enum isl_format
1484 anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
1485 VkImageTiling tiling);
1486
1487 static inline bool
1488 anv_format_is_color(const struct anv_format *format)
1489 {
1490 return !format->depth_format && !format->has_stencil;
1491 }
1492
1493 static inline bool
1494 anv_format_is_depth_or_stencil(const struct anv_format *format)
1495 {
1496 return format->depth_format || format->has_stencil;
1497 }
1498
1499 /**
1500 * Subsurface of an anv_image.
1501 */
1502 struct anv_surface {
1503 struct isl_surf isl;
1504
1505 /**
1506 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1507 */
1508 uint32_t offset;
1509 };
1510
1511 struct anv_image {
1512 VkImageType type;
1513 /* The original VkFormat provided by the client. This may not match any
1514 * of the actual surface formats.
1515 */
1516 VkFormat vk_format;
1517 const struct anv_format *format;
1518 VkExtent3D extent;
1519 uint32_t levels;
1520 uint32_t array_size;
1521 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1522 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1523
1524 VkDeviceSize size;
1525 uint32_t alignment;
1526
1527 /* Set when bound */
1528 struct anv_bo *bo;
1529 VkDeviceSize offset;
1530
1531 bool needs_nonrt_surface_state:1;
1532 bool needs_color_rt_surface_state:1;
1533 bool needs_storage_surface_state:1;
1534
1535 /**
1536 * Image subsurfaces
1537 *
1538 * For each foo, anv_image::foo_surface is valid if and only if
1539 * anv_image::format has a foo aspect.
1540 *
1541 * The hardware requires that the depth buffer and stencil buffer be
1542 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1543 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1544 * allocate the depth and stencil buffers as separate surfaces in the same
1545 * bo.
1546 */
1547 union {
1548 struct anv_surface color_surface;
1549
1550 struct {
1551 struct anv_surface depth_surface;
1552 struct anv_surface stencil_surface;
1553 };
1554 };
1555 };
1556
1557 struct anv_image_view {
1558 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1559 struct anv_bo *bo;
1560 uint32_t offset; /**< Offset into bo. */
1561
1562 VkImageAspectFlags aspect_mask;
1563 VkFormat vk_format;
1564 enum isl_format format;
1565 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1566
1567 /** RENDER_SURFACE_STATE when using image as a color render target. */
1568 struct anv_state color_rt_surface_state;
1569
1570 /** RENDER_SURFACE_STATE when using image as a non render target. */
1571 struct anv_state nonrt_surface_state;
1572
1573 /** RENDER_SURFACE_STATE when using image as a storage image. */
1574 struct anv_state storage_surface_state;
1575 };
1576
1577 struct anv_image_create_info {
1578 const VkImageCreateInfo *vk_info;
1579 isl_tiling_flags_t isl_tiling_flags;
1580 uint32_t stride;
1581 };
1582
1583 VkResult anv_image_create(VkDevice _device,
1584 const struct anv_image_create_info *info,
1585 const VkAllocationCallbacks* alloc,
1586 VkImage *pImage);
1587
1588 struct anv_surface *
1589 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1590 VkImageAspectFlags aspect_mask);
1591
1592 void anv_image_view_init(struct anv_image_view *view,
1593 struct anv_device *device,
1594 const VkImageViewCreateInfo* pCreateInfo,
1595 struct anv_cmd_buffer *cmd_buffer);
1596
1597 void
1598 gen7_image_view_init(struct anv_image_view *iview,
1599 struct anv_device *device,
1600 const VkImageViewCreateInfo* pCreateInfo,
1601 struct anv_cmd_buffer *cmd_buffer);
1602
1603 void
1604 gen75_image_view_init(struct anv_image_view *iview,
1605 struct anv_device *device,
1606 const VkImageViewCreateInfo* pCreateInfo,
1607 struct anv_cmd_buffer *cmd_buffer);
1608
1609 void
1610 gen8_image_view_init(struct anv_image_view *iview,
1611 struct anv_device *device,
1612 const VkImageViewCreateInfo* pCreateInfo,
1613 struct anv_cmd_buffer *cmd_buffer);
1614
1615 void
1616 gen9_image_view_init(struct anv_image_view *iview,
1617 struct anv_device *device,
1618 const VkImageViewCreateInfo* pCreateInfo,
1619 struct anv_cmd_buffer *cmd_buffer);
1620
1621 struct anv_buffer_view {
1622 enum isl_format format; /**< VkBufferViewCreateInfo::format */
1623 struct anv_bo *bo;
1624 uint32_t offset; /**< Offset into bo. */
1625 uint64_t range; /**< VkBufferViewCreateInfo::range */
1626
1627 struct anv_state surface_state;
1628 struct anv_state storage_surface_state;
1629 };
1630
1631 const struct anv_format *
1632 anv_format_for_descriptor_type(VkDescriptorType type);
1633
1634 void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
1635 enum isl_format format,
1636 uint32_t offset, uint32_t range,
1637 uint32_t stride);
1638
1639 void gen7_fill_buffer_surface_state(void *state, enum isl_format format,
1640 uint32_t offset, uint32_t range,
1641 uint32_t stride);
1642 void gen75_fill_buffer_surface_state(void *state, enum isl_format format,
1643 uint32_t offset, uint32_t range,
1644 uint32_t stride);
1645 void gen8_fill_buffer_surface_state(void *state, enum isl_format format,
1646 uint32_t offset, uint32_t range,
1647 uint32_t stride);
1648 void gen9_fill_buffer_surface_state(void *state, enum isl_format format,
1649 uint32_t offset, uint32_t range,
1650 uint32_t stride);
1651
1652 void anv_image_view_fill_image_param(struct anv_device *device,
1653 struct anv_image_view *view,
1654 struct brw_image_param *param);
1655 void anv_buffer_view_fill_image_param(struct anv_device *device,
1656 struct anv_buffer_view *view,
1657 struct brw_image_param *param);
1658
1659 struct anv_sampler {
1660 uint32_t state[4];
1661 };
1662
1663 struct anv_framebuffer {
1664 uint32_t width;
1665 uint32_t height;
1666 uint32_t layers;
1667
1668 uint32_t attachment_count;
1669 const struct anv_image_view * attachments[0];
1670 };
1671
1672 struct anv_subpass {
1673 uint32_t input_count;
1674 uint32_t * input_attachments;
1675 uint32_t color_count;
1676 uint32_t * color_attachments;
1677 uint32_t * resolve_attachments;
1678 uint32_t depth_stencil_attachment;
1679 };
1680
1681 struct anv_render_pass_attachment {
1682 const struct anv_format *format;
1683 uint32_t samples;
1684 VkAttachmentLoadOp load_op;
1685 VkAttachmentLoadOp stencil_load_op;
1686 };
1687
1688 struct anv_render_pass {
1689 uint32_t attachment_count;
1690 uint32_t subpass_count;
1691 uint32_t * subpass_attachments;
1692 struct anv_render_pass_attachment * attachments;
1693 struct anv_subpass subpasses[0];
1694 };
1695
1696 extern struct anv_render_pass anv_meta_dummy_renderpass;
1697
1698 struct anv_query_pool_slot {
1699 uint64_t begin;
1700 uint64_t end;
1701 uint64_t available;
1702 };
1703
1704 struct anv_query_pool {
1705 VkQueryType type;
1706 uint32_t slots;
1707 struct anv_bo bo;
1708 };
1709
1710 VkResult anv_device_init_meta(struct anv_device *device);
1711 void anv_device_finish_meta(struct anv_device *device);
1712
1713 void *anv_lookup_entrypoint(const char *name);
1714
1715 void anv_dump_image_to_ppm(struct anv_device *device,
1716 struct anv_image *image, unsigned miplevel,
1717 unsigned array_layer, const char *filename);
1718
1719 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1720 \
1721 static inline struct __anv_type * \
1722 __anv_type ## _from_handle(__VkType _handle) \
1723 { \
1724 return (struct __anv_type *) _handle; \
1725 } \
1726 \
1727 static inline __VkType \
1728 __anv_type ## _to_handle(struct __anv_type *_obj) \
1729 { \
1730 return (__VkType) _obj; \
1731 }
1732
1733 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1734 \
1735 static inline struct __anv_type * \
1736 __anv_type ## _from_handle(__VkType _handle) \
1737 { \
1738 return (struct __anv_type *)(uintptr_t) _handle; \
1739 } \
1740 \
1741 static inline __VkType \
1742 __anv_type ## _to_handle(struct __anv_type *_obj) \
1743 { \
1744 return (__VkType)(uintptr_t) _obj; \
1745 }
1746
1747 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1748 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1749
1750 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1751 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1752 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1753 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1754 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1755
1756 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1757 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1758 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
1759 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1760 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1761 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1762 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1763 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
1764 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1765 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1766 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1767 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
1768 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1769 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1770 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1771 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1772 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1773 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1774
1775 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1776 \
1777 static inline const __VkType * \
1778 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1779 { \
1780 return (const __VkType *) __anv_obj; \
1781 }
1782
1783 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1784 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1785
1786 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1787 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1788 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1789
1790 #ifdef __cplusplus
1791 }
1792 #endif