gen8_state: Clamp sampler values to HW limitations
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <i915_drm.h>
32
33 #ifdef HAVE_VALGRIND
34 #include <valgrind.h>
35 #include <memcheck.h>
36 #define VG(x) x
37 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
38 #else
39 #define VG(x)
40 #endif
41
42 #include "brw_device_info.h"
43 #include "util/macros.h"
44 #include "util/list.h"
45
46 #define VK_PROTOTYPES
47 #include <vulkan/vulkan.h>
48 #include <vulkan/vulkan_intel.h>
49 #include <vulkan/vk_ext_khr_swapchain.h>
50 #include <vulkan/vk_ext_khr_device_swapchain.h>
51
52 #include "anv_entrypoints.h"
53 #include "anv_gen_macros.h"
54 #include "brw_context.h"
55 #include "isl.h"
56
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60
61 #define ICD_LOADER_MAGIC 0x01CDC0DE
62
63 typedef union _VK_LOADER_DATA {
64 uintptr_t loaderMagic;
65 void *loaderData;
66 } VK_LOADER_DATA;
67
68 #define anv_noreturn __attribute__((__noreturn__))
69 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
70
71 #define MIN(a, b) ((a) < (b) ? (a) : (b))
72 #define MAX(a, b) ((a) > (b) ? (a) : (b))
73
74 static inline uint32_t
75 align_u32(uint32_t v, uint32_t a)
76 {
77 return (v + a - 1) & ~(a - 1);
78 }
79
80 static inline int32_t
81 align_i32(int32_t v, int32_t a)
82 {
83 return (v + a - 1) & ~(a - 1);
84 }
85
86 /** Alignment must be a power of 2. */
87 static inline bool
88 anv_is_aligned(uintmax_t n, uintmax_t a)
89 {
90 assert(a == (a & -a));
91 return (n & (a - 1)) == 0;
92 }
93
94 static inline uint32_t
95 anv_minify(uint32_t n, uint32_t levels)
96 {
97 if (unlikely(n == 0))
98 return 0;
99 else
100 return MAX(n >> levels, 1);
101 }
102
103 static inline float
104 anv_clamp_f(float f, float min, float max)
105 {
106 assert(min < max);
107
108 if (f > max)
109 return max;
110 else if (f < min)
111 return min;
112 else
113 return f;
114 }
115
116 static inline bool
117 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
118 {
119 if (*inout_mask & clear_mask) {
120 *inout_mask &= ~clear_mask;
121 return true;
122 } else {
123 return false;
124 }
125 }
126
127 #define for_each_bit(b, dword) \
128 for (uint32_t __dword = (dword); \
129 (b) = __builtin_ffs(__dword) - 1, __dword; \
130 __dword &= ~(1 << (b)))
131
132 #define typed_memcpy(dest, src, count) ({ \
133 static_assert(sizeof(*src) == sizeof(*dest), ""); \
134 memcpy((dest), (src), (count) * sizeof(*(src))); \
135 })
136
137 /* Define no kernel as 1, since that's an illegal offset for a kernel */
138 #define NO_KERNEL 1
139
140 struct anv_common {
141 VkStructureType sType;
142 const void* pNext;
143 };
144
145 /* Whenever we generate an error, pass it through this function. Useful for
146 * debugging, where we can break on it. Only call at error site, not when
147 * propagating errors. Might be useful to plug in a stack trace here.
148 */
149
150 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
151
152 #ifdef DEBUG
153 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
154 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
155 #else
156 #define vk_error(error) error
157 #define vk_errorf(error, format, ...) error
158 #endif
159
160 void __anv_finishme(const char *file, int line, const char *format, ...)
161 anv_printflike(3, 4);
162 void anv_loge(const char *format, ...) anv_printflike(1, 2);
163 void anv_loge_v(const char *format, va_list va);
164
165 /**
166 * Print a FINISHME message, including its source location.
167 */
168 #define anv_finishme(format, ...) \
169 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
170
171 /* A non-fatal assert. Useful for debugging. */
172 #ifdef DEBUG
173 #define anv_assert(x) ({ \
174 if (unlikely(!(x))) \
175 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
176 })
177 #else
178 #define anv_assert(x)
179 #endif
180
181 /**
182 * If a block of code is annotated with anv_validate, then the block runs only
183 * in debug builds.
184 */
185 #ifdef DEBUG
186 #define anv_validate if (1)
187 #else
188 #define anv_validate if (0)
189 #endif
190
191 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
192 void anv_abortfv(const char *format, va_list va) anv_noreturn;
193
194 #define stub_return(v) \
195 do { \
196 anv_finishme("stub %s", __func__); \
197 return (v); \
198 } while (0)
199
200 #define stub() \
201 do { \
202 anv_finishme("stub %s", __func__); \
203 return; \
204 } while (0)
205
206 /**
207 * A dynamically growable, circular buffer. Elements are added at head and
208 * removed from tail. head and tail are free-running uint32_t indices and we
209 * only compute the modulo with size when accessing the array. This way,
210 * number of bytes in the queue is always head - tail, even in case of
211 * wraparound.
212 */
213
214 struct anv_vector {
215 uint32_t head;
216 uint32_t tail;
217 uint32_t element_size;
218 uint32_t size;
219 void *data;
220 };
221
222 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
223 void *anv_vector_add(struct anv_vector *queue);
224 void *anv_vector_remove(struct anv_vector *queue);
225
226 static inline int
227 anv_vector_length(struct anv_vector *queue)
228 {
229 return (queue->head - queue->tail) / queue->element_size;
230 }
231
232 static inline void *
233 anv_vector_head(struct anv_vector *vector)
234 {
235 assert(vector->tail < vector->head);
236 return (void *)((char *)vector->data +
237 ((vector->head - vector->element_size) &
238 (vector->size - 1)));
239 }
240
241 static inline void *
242 anv_vector_tail(struct anv_vector *vector)
243 {
244 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
245 }
246
247 static inline void
248 anv_vector_finish(struct anv_vector *queue)
249 {
250 free(queue->data);
251 }
252
253 #define anv_vector_foreach(elem, queue) \
254 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
255 for (uint32_t __anv_vector_offset = (queue)->tail; \
256 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
257 __anv_vector_offset += (queue)->element_size)
258
259 struct anv_bo {
260 int gem_handle;
261
262 /* Index into the current validation list. This is used by the
263 * validation list building alrogithm to track which buffers are already
264 * in the validation list so that we can ensure uniqueness.
265 */
266 uint32_t index;
267
268 /* Last known offset. This value is provided by the kernel when we
269 * execbuf and is used as the presumed offset for the next bunch of
270 * relocations.
271 */
272 uint64_t offset;
273
274 uint64_t size;
275 void *map;
276 };
277
278 /* Represents a lock-free linked list of "free" things. This is used by
279 * both the block pool and the state pools. Unfortunately, in order to
280 * solve the ABA problem, we can't use a single uint32_t head.
281 */
282 union anv_free_list {
283 struct {
284 int32_t offset;
285
286 /* A simple count that is incremented every time the head changes. */
287 uint32_t count;
288 };
289 uint64_t u64;
290 };
291
292 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
293
294 struct anv_block_state {
295 union {
296 struct {
297 uint32_t next;
298 uint32_t end;
299 };
300 uint64_t u64;
301 };
302 };
303
304 struct anv_block_pool {
305 struct anv_device *device;
306
307 struct anv_bo bo;
308
309 /* The offset from the start of the bo to the "center" of the block
310 * pool. Pointers to allocated blocks are given by
311 * bo.map + center_bo_offset + offsets.
312 */
313 uint32_t center_bo_offset;
314
315 /* Current memory map of the block pool. This pointer may or may not
316 * point to the actual beginning of the block pool memory. If
317 * anv_block_pool_alloc_back has ever been called, then this pointer
318 * will point to the "center" position of the buffer and all offsets
319 * (negative or positive) given out by the block pool alloc functions
320 * will be valid relative to this pointer.
321 *
322 * In particular, map == bo.map + center_offset
323 */
324 void *map;
325 int fd;
326
327 /**
328 * Array of mmaps and gem handles owned by the block pool, reclaimed when
329 * the block pool is destroyed.
330 */
331 struct anv_vector mmap_cleanups;
332
333 uint32_t block_size;
334
335 union anv_free_list free_list;
336 struct anv_block_state state;
337
338 union anv_free_list back_free_list;
339 struct anv_block_state back_state;
340 };
341
342 /* Block pools are backed by a fixed-size 2GB memfd */
343 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
344
345 /* The center of the block pool is also the middle of the memfd. This may
346 * change in the future if we decide differently for some reason.
347 */
348 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
349
350 static inline uint32_t
351 anv_block_pool_size(struct anv_block_pool *pool)
352 {
353 return pool->state.end + pool->back_state.end;
354 }
355
356 struct anv_state {
357 int32_t offset;
358 uint32_t alloc_size;
359 void *map;
360 };
361
362 struct anv_fixed_size_state_pool {
363 size_t state_size;
364 union anv_free_list free_list;
365 struct anv_block_state block;
366 };
367
368 #define ANV_MIN_STATE_SIZE_LOG2 6
369 #define ANV_MAX_STATE_SIZE_LOG2 10
370
371 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
372
373 struct anv_state_pool {
374 struct anv_block_pool *block_pool;
375 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
376 };
377
378 struct anv_state_stream {
379 struct anv_block_pool *block_pool;
380 uint32_t next;
381 uint32_t current_block;
382 uint32_t end;
383 };
384
385 void anv_block_pool_init(struct anv_block_pool *pool,
386 struct anv_device *device, uint32_t block_size);
387 void anv_block_pool_finish(struct anv_block_pool *pool);
388 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
389 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
390 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
391 void anv_state_pool_init(struct anv_state_pool *pool,
392 struct anv_block_pool *block_pool);
393 void anv_state_pool_finish(struct anv_state_pool *pool);
394 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
395 size_t state_size, size_t alignment);
396 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
397 void anv_state_stream_init(struct anv_state_stream *stream,
398 struct anv_block_pool *block_pool);
399 void anv_state_stream_finish(struct anv_state_stream *stream);
400 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
401 uint32_t size, uint32_t alignment);
402
403 /**
404 * Implements a pool of re-usable BOs. The interface is identical to that
405 * of block_pool except that each block is its own BO.
406 */
407 struct anv_bo_pool {
408 struct anv_device *device;
409
410 uint32_t bo_size;
411
412 void *free_list;
413 };
414
415 void anv_bo_pool_init(struct anv_bo_pool *pool,
416 struct anv_device *device, uint32_t block_size);
417 void anv_bo_pool_finish(struct anv_bo_pool *pool);
418 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
419 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
420
421
422 void *anv_resolve_entrypoint(uint32_t index);
423
424 extern struct anv_dispatch_table dtable;
425
426 #define ANV_CALL(func) ({ \
427 if (dtable.func == NULL) { \
428 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
429 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
430 } \
431 dtable.func; \
432 })
433
434
435 struct anv_physical_device {
436 VK_LOADER_DATA _loader_data;
437
438 struct anv_instance * instance;
439 uint32_t chipset_id;
440 const char * path;
441 const char * name;
442 const struct brw_device_info * info;
443 uint64_t aperture_size;
444 struct brw_compiler * compiler;
445 struct isl_device isl_dev;
446 };
447
448 bool anv_is_scalar_shader_stage(const struct brw_compiler *compiler,
449 VkShaderStage stage);
450
451 struct anv_instance {
452 VK_LOADER_DATA _loader_data;
453
454 void * pAllocUserData;
455 PFN_vkAllocFunction pfnAlloc;
456 PFN_vkFreeFunction pfnFree;
457 uint32_t apiVersion;
458 int physicalDeviceCount;
459 struct anv_physical_device physicalDevice;
460
461 struct anv_wsi_implementation * wsi_impl[VK_PLATFORM_NUM_KHR];
462 };
463
464 VkResult anv_init_wsi(struct anv_instance *instance);
465 void anv_finish_wsi(struct anv_instance *instance);
466
467 struct anv_meta_state {
468 struct {
469 struct anv_pipeline *color_pipeline;
470 struct anv_pipeline *depth_only_pipeline;
471 struct anv_pipeline *stencil_only_pipeline;
472 struct anv_pipeline *depthstencil_pipeline;
473 } clear;
474
475 struct {
476 VkRenderPass render_pass;
477
478 /** Pipeline that blits from a 2D image. */
479 VkPipeline pipeline_2d_src;
480
481 /** Pipeline that blits from a 3D image. */
482 VkPipeline pipeline_3d_src;
483
484 VkPipelineLayout pipeline_layout;
485 VkDescriptorSetLayout ds_layout;
486 } blit;
487 };
488
489 struct anv_queue {
490 VK_LOADER_DATA _loader_data;
491
492 struct anv_device * device;
493
494 struct anv_state_pool * pool;
495 };
496
497 struct anv_device {
498 VK_LOADER_DATA _loader_data;
499
500 struct anv_instance * instance;
501 uint32_t chipset_id;
502 struct brw_device_info info;
503 struct isl_device isl_dev;
504 int context_id;
505 int fd;
506
507 struct anv_bo_pool batch_bo_pool;
508
509 struct anv_block_pool dynamic_state_block_pool;
510 struct anv_state_pool dynamic_state_pool;
511
512 struct anv_block_pool instruction_block_pool;
513 struct anv_block_pool surface_state_block_pool;
514 struct anv_state_pool surface_state_pool;
515
516 struct anv_bo workaround_bo;
517
518 struct anv_meta_state meta_state;
519
520 struct anv_state border_colors;
521
522 struct anv_queue queue;
523
524 struct anv_block_pool scratch_block_pool;
525
526 pthread_mutex_t mutex;
527 };
528
529 void *
530 anv_instance_alloc(struct anv_instance * instance,
531 size_t size,
532 size_t alignment,
533 VkSystemAllocType allocType);
534
535 void
536 anv_instance_free(struct anv_instance * instance,
537 void * mem);
538
539 void *
540 anv_device_alloc(struct anv_device * device,
541 size_t size,
542 size_t alignment,
543 VkSystemAllocType allocType);
544
545 void
546 anv_device_free(struct anv_device * device,
547 void * mem);
548
549 void* anv_gem_mmap(struct anv_device *device,
550 uint32_t gem_handle, uint64_t offset, uint64_t size);
551 void anv_gem_munmap(void *p, uint64_t size);
552 uint32_t anv_gem_create(struct anv_device *device, size_t size);
553 void anv_gem_close(struct anv_device *device, int gem_handle);
554 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
555 int anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns);
556 int anv_gem_execbuffer(struct anv_device *device,
557 struct drm_i915_gem_execbuffer2 *execbuf);
558 int anv_gem_set_tiling(struct anv_device *device, int gem_handle,
559 uint32_t stride, uint32_t tiling);
560 int anv_gem_create_context(struct anv_device *device);
561 int anv_gem_destroy_context(struct anv_device *device, int context);
562 int anv_gem_get_param(int fd, uint32_t param);
563 int anv_gem_get_aperture(int fd, uint64_t *size);
564 int anv_gem_handle_to_fd(struct anv_device *device, int gem_handle);
565 int anv_gem_fd_to_handle(struct anv_device *device, int fd);
566 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
567
568 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
569
570 struct anv_reloc_list {
571 size_t num_relocs;
572 size_t array_length;
573 struct drm_i915_gem_relocation_entry * relocs;
574 struct anv_bo ** reloc_bos;
575 };
576
577 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
578 struct anv_device *device);
579 void anv_reloc_list_finish(struct anv_reloc_list *list,
580 struct anv_device *device);
581
582 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
583 struct anv_device *device,
584 uint32_t offset, struct anv_bo *target_bo,
585 uint32_t delta);
586
587 struct anv_batch_bo {
588 /* Link in the anv_cmd_buffer.owned_batch_bos list */
589 struct list_head link;
590
591 struct anv_bo bo;
592
593 /* Bytes actually consumed in this batch BO */
594 size_t length;
595
596 /* Last seen surface state block pool bo offset */
597 uint32_t last_ss_pool_bo_offset;
598
599 struct anv_reloc_list relocs;
600 };
601
602 struct anv_batch {
603 struct anv_device * device;
604
605 void * start;
606 void * end;
607 void * next;
608
609 struct anv_reloc_list * relocs;
610
611 /* This callback is called (with the associated user data) in the event
612 * that the batch runs out of space.
613 */
614 VkResult (*extend_cb)(struct anv_batch *, void *);
615 void * user_data;
616 };
617
618 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
619 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
620 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
621 void *location, struct anv_bo *bo, uint32_t offset);
622
623 struct anv_address {
624 struct anv_bo *bo;
625 uint32_t offset;
626 };
627
628 #define __gen_address_type struct anv_address
629 #define __gen_user_data struct anv_batch
630
631 static inline uint64_t
632 __gen_combine_address(struct anv_batch *batch, void *location,
633 const struct anv_address address, uint32_t delta)
634 {
635 if (address.bo == NULL) {
636 return address.offset + delta;
637 } else {
638 assert(batch->start <= location && location < batch->end);
639
640 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
641 }
642 }
643
644 /* Wrapper macros needed to work around preprocessor argument issues. In
645 * particular, arguments don't get pre-evaluated if they are concatenated.
646 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
647 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
648 * We can work around this easily enough with these helpers.
649 */
650 #define __anv_cmd_length(cmd) cmd ## _length
651 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
652 #define __anv_cmd_header(cmd) cmd ## _header
653 #define __anv_cmd_pack(cmd) cmd ## _pack
654
655 #define anv_batch_emit(batch, cmd, ...) do { \
656 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
657 struct cmd __template = { \
658 __anv_cmd_header(cmd), \
659 __VA_ARGS__ \
660 }; \
661 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
662 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
663 } while (0)
664
665 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
666 void *__dst = anv_batch_emit_dwords(batch, n); \
667 struct cmd __template = { \
668 __anv_cmd_header(cmd), \
669 .DwordLength = n - __anv_cmd_length_bias(cmd), \
670 __VA_ARGS__ \
671 }; \
672 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
673 __dst; \
674 })
675
676 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
677 do { \
678 uint32_t *dw; \
679 \
680 assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \
681 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
682 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
683 dw[i] = (dwords0)[i] | (dwords1)[i]; \
684 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
685 } while (0)
686
687 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
688 .GraphicsDataTypeGFDT = 0, \
689 .LLCCacheabilityControlLLCCC = 0, \
690 .L3CacheabilityControlL3CC = 1, \
691 }
692
693 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
694 .LLCeLLCCacheabilityControlLLCCC = 0, \
695 .L3CacheabilityControlL3CC = 1, \
696 }
697
698 #define GEN8_MOCS { \
699 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
700 .TargetCache = L3DefertoPATforLLCeLLCselection, \
701 .AgeforQUADLRU = 0 \
702 }
703
704 struct anv_device_memory {
705 struct anv_bo bo;
706 VkDeviceSize map_size;
707 void * map;
708 };
709
710 /**
711 * Header for Vertex URB Entry (VUE)
712 */
713 struct anv_vue_header {
714 uint32_t Reserved;
715 uint32_t RTAIndex; /* RenderTargetArrayIndex */
716 uint32_t ViewportIndex;
717 float PointWidth;
718 };
719
720 struct anv_descriptor_set_binding_layout {
721 /* Number of array elements in this binding */
722 uint16_t array_size;
723
724 /* Index into the flattend descriptor set */
725 uint16_t descriptor_index;
726
727 /* Index into the dynamic state array for a dynamic buffer */
728 int16_t dynamic_offset_index;
729
730 struct {
731 /* Index into the binding table for the associated surface */
732 int16_t surface_index;
733
734 /* Index into the sampler table for the associated sampler */
735 int16_t sampler_index;
736 } stage[VK_SHADER_STAGE_NUM];
737
738 /* Immutable samplers (or NULL if no immutable samplers) */
739 struct anv_sampler **immutable_samplers;
740 };
741
742 struct anv_descriptor_set_layout {
743 /* Number of bindings in this descriptor set */
744 uint16_t binding_count;
745
746 /* Total size of the descriptor set with room for all array entries */
747 uint16_t size;
748
749 /* Shader stages affected by this descriptor set */
750 uint16_t shader_stages;
751
752 /* Number of dynamic offsets used by this descriptor set */
753 uint16_t dynamic_offset_count;
754
755 /* Bindings in this descriptor set */
756 struct anv_descriptor_set_binding_layout binding[0];
757 };
758
759 struct anv_descriptor {
760 VkDescriptorType type;
761
762 union {
763 struct {
764 union {
765 struct anv_image_view *image_view;
766 };
767 struct anv_sampler *sampler;
768 };
769
770 struct {
771 struct anv_buffer *buffer;
772 uint64_t offset;
773 uint64_t range;
774 };
775 };
776 };
777
778 struct anv_descriptor_set {
779 const struct anv_descriptor_set_layout *layout;
780 struct anv_descriptor descriptors[0];
781 };
782
783 VkResult
784 anv_descriptor_set_create(struct anv_device *device,
785 const struct anv_descriptor_set_layout *layout,
786 struct anv_descriptor_set **out_set);
787
788 void
789 anv_descriptor_set_destroy(struct anv_device *device,
790 struct anv_descriptor_set *set);
791
792 #define MAX_VBS 32
793 #define MAX_SETS 8
794 #define MAX_RTS 8
795 #define MAX_VIEWPORTS 16
796 #define MAX_SCISSORS 16
797 #define MAX_PUSH_CONSTANTS_SIZE 128
798 #define MAX_DYNAMIC_BUFFERS 16
799 #define MAX_IMAGES 8
800
801 struct anv_pipeline_binding {
802 /* The descriptor set this surface corresponds to */
803 uint16_t set;
804
805 /* Offset into the descriptor set */
806 uint16_t offset;
807 };
808
809 struct anv_pipeline_layout {
810 struct {
811 struct anv_descriptor_set_layout *layout;
812 uint32_t dynamic_offset_start;
813 struct {
814 uint32_t surface_start;
815 uint32_t sampler_start;
816 } stage[VK_SHADER_STAGE_NUM];
817 } set[MAX_SETS];
818
819 uint32_t num_sets;
820
821 struct {
822 bool has_dynamic_offsets;
823 uint32_t surface_count;
824 struct anv_pipeline_binding *surface_to_descriptor;
825 uint32_t sampler_count;
826 struct anv_pipeline_binding *sampler_to_descriptor;
827 } stage[VK_SHADER_STAGE_NUM];
828
829 struct anv_pipeline_binding entries[0];
830 };
831
832 struct anv_buffer {
833 struct anv_device * device;
834 VkDeviceSize size;
835
836 /* Set when bound */
837 struct anv_bo * bo;
838 VkDeviceSize offset;
839 };
840
841 enum anv_cmd_dirty_bits {
842 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
843 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
844 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
845 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
846 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
847 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
848 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
849 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
850 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
851 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
852 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
853 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
854 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
855 };
856 typedef uint32_t anv_cmd_dirty_mask_t;
857
858 struct anv_vertex_binding {
859 struct anv_buffer * buffer;
860 VkDeviceSize offset;
861 };
862
863 struct anv_push_constants {
864 /* Current allocated size of this push constants data structure.
865 * Because a decent chunk of it may not be used (images on SKL, for
866 * instance), we won't actually allocate the entire structure up-front.
867 */
868 uint32_t size;
869
870 /* Push constant data provided by the client through vkPushConstants */
871 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
872
873 /* Our hardware only provides zero-based vertex and instance id so, in
874 * order to satisfy the vulkan requirements, we may have to push one or
875 * both of these into the shader.
876 */
877 uint32_t base_vertex;
878 uint32_t base_instance;
879
880 /* Offsets and ranges for dynamically bound buffers */
881 struct {
882 uint32_t offset;
883 uint32_t range;
884 } dynamic[MAX_DYNAMIC_BUFFERS];
885
886 /* Image data for image_load_store on pre-SKL */
887 struct brw_image_param images[MAX_IMAGES];
888 };
889
890 struct anv_dynamic_state {
891 struct {
892 uint32_t count;
893 VkViewport viewports[MAX_VIEWPORTS];
894 } viewport;
895
896 struct {
897 uint32_t count;
898 VkRect2D scissors[MAX_SCISSORS];
899 } scissor;
900
901 float line_width;
902
903 struct {
904 float bias;
905 float clamp;
906 float slope_scaled;
907 } depth_bias;
908
909 float blend_constants[4];
910
911 struct {
912 float min;
913 float max;
914 } depth_bounds;
915
916 struct {
917 uint32_t front;
918 uint32_t back;
919 } stencil_compare_mask;
920
921 struct {
922 uint32_t front;
923 uint32_t back;
924 } stencil_write_mask;
925
926 struct {
927 uint32_t front;
928 uint32_t back;
929 } stencil_reference;
930 };
931
932 extern const struct anv_dynamic_state default_dynamic_state;
933
934 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
935 const struct anv_dynamic_state *src,
936 uint32_t copy_mask);
937
938 /** State required while building cmd buffer */
939 struct anv_cmd_state {
940 uint32_t current_pipeline;
941 uint32_t vb_dirty;
942 anv_cmd_dirty_mask_t dirty;
943 anv_cmd_dirty_mask_t compute_dirty;
944 VkShaderStageFlags descriptors_dirty;
945 VkShaderStageFlags push_constants_dirty;
946 uint32_t scratch_size;
947 struct anv_pipeline * pipeline;
948 struct anv_pipeline * compute_pipeline;
949 struct anv_framebuffer * framebuffer;
950 struct anv_render_pass * pass;
951 struct anv_subpass * subpass;
952 uint32_t restart_index;
953 struct anv_vertex_binding vertex_bindings[MAX_VBS];
954 struct anv_descriptor_set * descriptors[MAX_SETS];
955 struct anv_push_constants * push_constants[VK_SHADER_STAGE_NUM];
956 struct anv_dynamic_state dynamic;
957
958 struct {
959 struct anv_buffer * index_buffer;
960 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
961 uint32_t index_offset;
962 } gen7;
963 };
964
965 struct anv_cmd_pool {
966 struct list_head cmd_buffers;
967 };
968
969 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
970
971 enum anv_cmd_buffer_exec_mode {
972 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
973 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
974 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
975 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
976 };
977
978 struct anv_cmd_buffer {
979 VK_LOADER_DATA _loader_data;
980
981 struct anv_device * device;
982
983 struct list_head pool_link;
984
985 struct anv_batch batch;
986
987 /* Fields required for the actual chain of anv_batch_bo's.
988 *
989 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
990 */
991 struct list_head batch_bos;
992 enum anv_cmd_buffer_exec_mode exec_mode;
993
994 /* A vector of anv_batch_bo pointers for every batch or surface buffer
995 * referenced by this command buffer
996 *
997 * initialized by anv_cmd_buffer_init_batch_bo_chain()
998 */
999 struct anv_vector seen_bbos;
1000
1001 /* A vector of int32_t's for every block of binding tables.
1002 *
1003 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1004 */
1005 struct anv_vector bt_blocks;
1006 uint32_t bt_next;
1007 struct anv_reloc_list surface_relocs;
1008
1009 /* Information needed for execbuf
1010 *
1011 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1012 */
1013 struct {
1014 struct drm_i915_gem_execbuffer2 execbuf;
1015
1016 struct drm_i915_gem_exec_object2 * objects;
1017 uint32_t bo_count;
1018 struct anv_bo ** bos;
1019
1020 /* Allocated length of the 'objects' and 'bos' arrays */
1021 uint32_t array_length;
1022
1023 bool need_reloc;
1024 } execbuf2;
1025
1026 /* Serial for tracking buffer completion */
1027 uint32_t serial;
1028
1029 /* Stream objects for storing temporary data */
1030 struct anv_state_stream surface_state_stream;
1031 struct anv_state_stream dynamic_state_stream;
1032
1033 VkCmdBufferOptimizeFlags opt_flags;
1034 VkCmdBufferLevel level;
1035
1036 struct anv_cmd_state state;
1037 };
1038
1039 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1040 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1041 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1042 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1043 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1044 struct anv_cmd_buffer *secondary);
1045 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1046
1047 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1048 unsigned stage, struct anv_state *bt_state);
1049 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1050 unsigned stage, struct anv_state *state);
1051 void gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1052
1053 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1054 uint32_t *a, uint32_t dwords,
1055 uint32_t alignment);
1056 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1057 uint32_t *a, uint32_t *b,
1058 uint32_t dwords, uint32_t alignment);
1059 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1060 struct anv_subpass *subpass);
1061
1062 struct anv_address
1063 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1064 struct anv_state
1065 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1066 uint32_t entries, uint32_t *state_offset);
1067 struct anv_state
1068 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1069 struct anv_state
1070 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1071 uint32_t size, uint32_t alignment);
1072
1073 VkResult
1074 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1075
1076 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1077 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1078
1079 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1080 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1081 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1082
1083 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1084
1085 void gen7_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1086 struct anv_subpass *subpass);
1087
1088 void gen8_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1089 struct anv_subpass *subpass);
1090
1091 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1092 struct anv_subpass *subpass);
1093
1094 struct anv_state
1095 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1096 VkShaderStage stage);
1097
1098 void anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
1099 struct anv_render_pass *pass,
1100 const VkClearValue *clear_values);
1101 const struct anv_image_view *
1102 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1103
1104 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1105
1106 struct anv_fence {
1107 struct anv_bo bo;
1108 struct drm_i915_gem_execbuffer2 execbuf;
1109 struct drm_i915_gem_exec_object2 exec2_objects[1];
1110 bool ready;
1111 };
1112
1113 struct nir_shader;
1114
1115 struct anv_shader_module {
1116 struct nir_shader * nir;
1117
1118 uint32_t size;
1119 char data[0];
1120 };
1121
1122 struct anv_shader {
1123 struct anv_shader_module * module;
1124 char entrypoint[0];
1125 };
1126
1127 struct anv_pipeline {
1128 struct anv_device * device;
1129 struct anv_batch batch;
1130 uint32_t batch_data[512];
1131 struct anv_reloc_list batch_relocs;
1132 uint32_t dynamic_state_mask;
1133 struct anv_dynamic_state dynamic_state;
1134
1135 struct anv_pipeline_layout * layout;
1136 bool use_repclear;
1137
1138 struct brw_vs_prog_data vs_prog_data;
1139 struct brw_wm_prog_data wm_prog_data;
1140 struct brw_gs_prog_data gs_prog_data;
1141 struct brw_cs_prog_data cs_prog_data;
1142 bool writes_point_size;
1143 struct brw_stage_prog_data * prog_data[VK_SHADER_STAGE_NUM];
1144 uint32_t scratch_start[VK_SHADER_STAGE_NUM];
1145 uint32_t total_scratch;
1146 struct {
1147 uint32_t vs_start;
1148 uint32_t vs_size;
1149 uint32_t nr_vs_entries;
1150 uint32_t gs_start;
1151 uint32_t gs_size;
1152 uint32_t nr_gs_entries;
1153 } urb;
1154
1155 VkShaderStageFlags active_stages;
1156 struct anv_state_stream program_stream;
1157 struct anv_state blend_state;
1158 uint32_t vs_simd8;
1159 uint32_t vs_vec4;
1160 uint32_t ps_simd8;
1161 uint32_t ps_simd16;
1162 uint32_t ps_ksp0;
1163 uint32_t ps_ksp2;
1164 uint32_t ps_grf_start0;
1165 uint32_t ps_grf_start2;
1166 uint32_t gs_vec4;
1167 uint32_t gs_vertex_count;
1168 uint32_t cs_simd;
1169
1170 uint32_t vb_used;
1171 uint32_t binding_stride[MAX_VBS];
1172 bool instancing_enable[MAX_VBS];
1173 bool primitive_restart;
1174 uint32_t topology;
1175
1176 uint32_t cs_thread_width_max;
1177 uint32_t cs_right_mask;
1178
1179 struct {
1180 uint32_t sf[7];
1181 uint32_t depth_stencil_state[3];
1182 } gen7;
1183
1184 struct {
1185 uint32_t sf[4];
1186 uint32_t raster[5];
1187 uint32_t wm_depth_stencil[3];
1188 } gen8;
1189 };
1190
1191 struct anv_graphics_pipeline_create_info {
1192 bool use_repclear;
1193 bool disable_viewport;
1194 bool disable_scissor;
1195 bool disable_vs;
1196 bool use_rectlist;
1197 };
1198
1199 VkResult
1200 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1201 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1202 const struct anv_graphics_pipeline_create_info *extra);
1203
1204 VkResult
1205 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1206 const VkComputePipelineCreateInfo *info,
1207 struct anv_shader *shader);
1208
1209 VkResult
1210 anv_graphics_pipeline_create(VkDevice device,
1211 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1212 const struct anv_graphics_pipeline_create_info *extra,
1213 VkPipeline *pPipeline);
1214
1215 VkResult
1216 gen7_graphics_pipeline_create(VkDevice _device,
1217 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1218 const struct anv_graphics_pipeline_create_info *extra,
1219 VkPipeline *pPipeline);
1220
1221 VkResult
1222 gen75_graphics_pipeline_create(VkDevice _device,
1223 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1224 const struct anv_graphics_pipeline_create_info *extra,
1225 VkPipeline *pPipeline);
1226
1227 VkResult
1228 gen8_graphics_pipeline_create(VkDevice _device,
1229 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1230 const struct anv_graphics_pipeline_create_info *extra,
1231 VkPipeline *pPipeline);
1232 VkResult
1233 gen7_compute_pipeline_create(VkDevice _device,
1234 const VkComputePipelineCreateInfo *pCreateInfo,
1235 VkPipeline *pPipeline);
1236 VkResult
1237 gen75_compute_pipeline_create(VkDevice _device,
1238 const VkComputePipelineCreateInfo *pCreateInfo,
1239 VkPipeline *pPipeline);
1240
1241 VkResult
1242 gen8_compute_pipeline_create(VkDevice _device,
1243 const VkComputePipelineCreateInfo *pCreateInfo,
1244 VkPipeline *pPipeline);
1245
1246 struct anv_format {
1247 const VkFormat vk_format;
1248 const char *name;
1249 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1250 const struct isl_format_layout *isl_layout;
1251 uint8_t num_channels;
1252 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1253 bool has_stencil;
1254 };
1255
1256 /**
1257 * Stencil formats are often a special case. To reduce the number of lookups
1258 * into the VkFormat-to-anv_format translation table when working with
1259 * stencil, here is the handle to the table's entry for VK_FORMAT_S8_UINT.
1260 */
1261 extern const struct anv_format *const anv_format_s8_uint;
1262
1263 const struct anv_format *
1264 anv_format_for_vk_format(VkFormat format);
1265
1266 static inline bool
1267 anv_format_is_color(const struct anv_format *format)
1268 {
1269 return !format->depth_format && !format->has_stencil;
1270 }
1271
1272 static inline bool
1273 anv_format_is_depth_or_stencil(const struct anv_format *format)
1274 {
1275 return format->depth_format || format->has_stencil;
1276 }
1277
1278 struct anv_image_view_info {
1279 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1280 bool is_array:1; /**< RENDER_SURFACE_STATE.SurfaceArray */
1281 bool is_cube:1; /**< RENDER_SURFACE_STATE.CubeFaceEnable* */
1282 };
1283
1284 struct anv_image_view_info
1285 anv_image_view_info_for_vk_image_view_type(VkImageViewType type);
1286
1287 /**
1288 * A proxy for the color surfaces, depth surfaces, and stencil surfaces.
1289 */
1290 struct anv_surface {
1291 /**
1292 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1293 */
1294 uint32_t offset;
1295
1296 uint32_t stride; /**< RENDER_SURFACE_STATE.SurfacePitch */
1297 uint16_t qpitch; /**< RENDER_SURFACE_STATE.QPitch */
1298
1299 /**
1300 * \name Alignment of miptree images, in units of pixels.
1301 *
1302 * These fields contain the real alignment values, not the values to be
1303 * given to the GPU. For example, if h_align is 4, then program the GPU
1304 * with HALIGN_4.
1305 * \{
1306 */
1307 uint8_t h_align; /**< RENDER_SURFACE_STATE.SurfaceHorizontalAlignment */
1308 uint8_t v_align; /**< RENDER_SURFACE_STATE.SurfaceVerticalAlignment */
1309 /** \} */
1310
1311 enum isl_tiling tiling;
1312 };
1313
1314 struct anv_image {
1315 VkImageType type;
1316 const struct anv_format *format;
1317 VkExtent3D extent;
1318 uint32_t levels;
1319 uint32_t array_size;
1320 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1321
1322 VkDeviceSize size;
1323 uint32_t alignment;
1324
1325 /* Set when bound */
1326 struct anv_bo *bo;
1327 VkDeviceSize offset;
1328
1329 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1330
1331 bool needs_nonrt_surface_state:1;
1332 bool needs_color_rt_surface_state:1;
1333
1334 /**
1335 * Image subsurfaces
1336 *
1337 * For each foo, anv_image::foo_surface is valid if and only if
1338 * anv_image::format has a foo aspect.
1339 *
1340 * The hardware requires that the depth buffer and stencil buffer be
1341 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1342 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1343 * allocate the depth and stencil buffers as separate surfaces in the same
1344 * bo.
1345 */
1346 union {
1347 struct anv_surface color_surface;
1348
1349 struct {
1350 struct anv_surface depth_surface;
1351 struct anv_surface stencil_surface;
1352 };
1353 };
1354 };
1355
1356 struct anv_image_view {
1357 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1358 const struct anv_format *format; /**< VkImageViewCreateInfo::format */
1359 struct anv_bo *bo;
1360 uint32_t offset; /**< Offset into bo. */
1361 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1362
1363 /** RENDER_SURFACE_STATE when using image as a color render target. */
1364 struct anv_state color_rt_surface_state;
1365
1366 /** RENDER_SURFACE_STATE when using image as a non render target. */
1367 struct anv_state nonrt_surface_state;
1368 };
1369
1370 struct anv_image_create_info {
1371 const VkImageCreateInfo *vk_info;
1372 bool force_tiling;
1373 enum isl_tiling tiling;
1374 uint32_t stride;
1375 };
1376
1377 VkResult anv_image_create(VkDevice _device,
1378 const struct anv_image_create_info *info,
1379 VkImage *pImage);
1380
1381 struct anv_surface *
1382 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1383 VkImageAspectFlags aspect_mask);
1384
1385 void anv_image_view_init(struct anv_image_view *view,
1386 struct anv_device *device,
1387 const VkImageViewCreateInfo* pCreateInfo,
1388 struct anv_cmd_buffer *cmd_buffer);
1389
1390 void
1391 gen7_image_view_init(struct anv_image_view *iview,
1392 struct anv_device *device,
1393 const VkImageViewCreateInfo* pCreateInfo,
1394 struct anv_cmd_buffer *cmd_buffer);
1395
1396 void
1397 gen75_image_view_init(struct anv_image_view *iview,
1398 struct anv_device *device,
1399 const VkImageViewCreateInfo* pCreateInfo,
1400 struct anv_cmd_buffer *cmd_buffer);
1401
1402 void
1403 gen8_image_view_init(struct anv_image_view *iview,
1404 struct anv_device *device,
1405 const VkImageViewCreateInfo* pCreateInfo,
1406 struct anv_cmd_buffer *cmd_buffer);
1407
1408 void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
1409 const struct anv_format *format,
1410 uint32_t offset, uint32_t range,
1411 uint32_t stride);
1412
1413 void gen7_fill_buffer_surface_state(void *state, const struct anv_format *format,
1414 uint32_t offset, uint32_t range,
1415 uint32_t stride);
1416 void gen75_fill_buffer_surface_state(void *state, const struct anv_format *format,
1417 uint32_t offset, uint32_t range,
1418 uint32_t stride);
1419 void gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
1420 uint32_t offset, uint32_t range,
1421 uint32_t stride);
1422
1423 struct anv_sampler {
1424 uint32_t state[4];
1425 };
1426
1427 struct anv_framebuffer {
1428 uint32_t width;
1429 uint32_t height;
1430 uint32_t layers;
1431
1432 uint32_t attachment_count;
1433 const struct anv_image_view * attachments[0];
1434 };
1435
1436 struct anv_subpass {
1437 uint32_t input_count;
1438 uint32_t * input_attachments;
1439 uint32_t color_count;
1440 uint32_t * color_attachments;
1441 uint32_t * resolve_attachments;
1442 uint32_t depth_stencil_attachment;
1443 };
1444
1445 struct anv_render_pass_attachment {
1446 const struct anv_format *format;
1447 uint32_t samples;
1448 VkAttachmentLoadOp load_op;
1449 VkAttachmentLoadOp stencil_load_op;
1450 };
1451
1452 struct anv_render_pass {
1453 uint32_t attachment_count;
1454 uint32_t subpass_count;
1455 struct anv_render_pass_attachment * attachments;
1456 struct anv_subpass subpasses[0];
1457 };
1458
1459 extern struct anv_render_pass anv_meta_dummy_renderpass;
1460
1461 struct anv_query_pool_slot {
1462 uint64_t begin;
1463 uint64_t end;
1464 uint64_t available;
1465 };
1466
1467 struct anv_query_pool {
1468 VkQueryType type;
1469 uint32_t slots;
1470 struct anv_bo bo;
1471 };
1472
1473 void anv_device_init_meta(struct anv_device *device);
1474 void anv_device_finish_meta(struct anv_device *device);
1475
1476 void *anv_lookup_entrypoint(const char *name);
1477
1478 void anv_dump_image_to_ppm(struct anv_device *device,
1479 struct anv_image *image, unsigned miplevel,
1480 unsigned array_layer, const char *filename);
1481
1482 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1483 \
1484 static inline struct __anv_type * \
1485 __anv_type ## _from_handle(__VkType _handle) \
1486 { \
1487 return (struct __anv_type *) _handle; \
1488 } \
1489 \
1490 static inline __VkType \
1491 __anv_type ## _to_handle(struct __anv_type *_obj) \
1492 { \
1493 return (__VkType) _obj; \
1494 }
1495
1496 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1497 \
1498 static inline struct __anv_type * \
1499 __anv_type ## _from_handle(__VkType _handle) \
1500 { \
1501 return (struct __anv_type *) _handle.handle; \
1502 } \
1503 \
1504 static inline __VkType \
1505 __anv_type ## _to_handle(struct __anv_type *_obj) \
1506 { \
1507 return (__VkType) { .handle = (uint64_t) _obj }; \
1508 }
1509
1510 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1511 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1512
1513 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCmdBuffer)
1514 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1515 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1516 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1517 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1518
1519 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCmdPool)
1520 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1521 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1522 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1523 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1524 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1525 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1526 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1527 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1528 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1529 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1530 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1531 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1532 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1533 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader, VkShader)
1534 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1535
1536 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1537 \
1538 static inline const __VkType * \
1539 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1540 { \
1541 return (const __VkType *) __anv_obj; \
1542 }
1543
1544 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1545 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1546
1547 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1548 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1549 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1550
1551 #ifdef __cplusplus
1552 }
1553 #endif