anv: Add a clfush_range helper function
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <stdint.h>
32 #include <i915_drm.h>
33
34 #ifdef HAVE_VALGRIND
35 #include <valgrind.h>
36 #include <memcheck.h>
37 #define VG(x) x
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
39 #else
40 #define VG(x)
41 #endif
42
43 #include "brw_device_info.h"
44 #include "util/macros.h"
45 #include "util/list.h"
46
47 /* Pre-declarations needed for WSI entrypoints */
48 struct wl_surface;
49 struct wl_display;
50 typedef struct xcb_connection_t xcb_connection_t;
51 typedef uint32_t xcb_visualid_t;
52 typedef uint32_t xcb_window_t;
53
54 #define VK_USE_PLATFORM_XCB_KHR
55 #define VK_USE_PLATFORM_WAYLAND_KHR
56
57 #define VK_PROTOTYPES
58 #include <vulkan/vulkan.h>
59 #include <vulkan/vulkan_intel.h>
60 #include <vulkan/vk_icd.h>
61
62 #include "anv_entrypoints.h"
63 #include "anv_gen_macros.h"
64 #include "brw_context.h"
65 #include "isl.h"
66
67 #ifdef __cplusplus
68 extern "C" {
69 #endif
70
71 #define MAX_VBS 32
72 #define MAX_SETS 8
73 #define MAX_RTS 8
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
78 #define MAX_IMAGES 8
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
80
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
83
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
86
87 static inline uint32_t
88 align_u32(uint32_t v, uint32_t a)
89 {
90 assert(a != 0 && a == (a & -a));
91 return (v + a - 1) & ~(a - 1);
92 }
93
94 static inline uint64_t
95 align_u64(uint64_t v, uint64_t a)
96 {
97 assert(a != 0 && a == (a & -a));
98 return (v + a - 1) & ~(a - 1);
99 }
100
101 static inline int32_t
102 align_i32(int32_t v, int32_t a)
103 {
104 assert(a != 0 && a == (a & -a));
105 return (v + a - 1) & ~(a - 1);
106 }
107
108 /** Alignment must be a power of 2. */
109 static inline bool
110 anv_is_aligned(uintmax_t n, uintmax_t a)
111 {
112 assert(a == (a & -a));
113 return (n & (a - 1)) == 0;
114 }
115
116 static inline uint32_t
117 anv_minify(uint32_t n, uint32_t levels)
118 {
119 if (unlikely(n == 0))
120 return 0;
121 else
122 return MAX(n >> levels, 1);
123 }
124
125 static inline float
126 anv_clamp_f(float f, float min, float max)
127 {
128 assert(min < max);
129
130 if (f > max)
131 return max;
132 else if (f < min)
133 return min;
134 else
135 return f;
136 }
137
138 static inline bool
139 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
140 {
141 if (*inout_mask & clear_mask) {
142 *inout_mask &= ~clear_mask;
143 return true;
144 } else {
145 return false;
146 }
147 }
148
149 #define for_each_bit(b, dword) \
150 for (uint32_t __dword = (dword); \
151 (b) = __builtin_ffs(__dword) - 1, __dword; \
152 __dword &= ~(1 << (b)))
153
154 #define typed_memcpy(dest, src, count) ({ \
155 static_assert(sizeof(*src) == sizeof(*dest), ""); \
156 memcpy((dest), (src), (count) * sizeof(*(src))); \
157 })
158
159 #define zero(x) (memset(&(x), 0, sizeof(x)))
160
161 /* Define no kernel as 1, since that's an illegal offset for a kernel */
162 #define NO_KERNEL 1
163
164 struct anv_common {
165 VkStructureType sType;
166 const void* pNext;
167 };
168
169 /* Whenever we generate an error, pass it through this function. Useful for
170 * debugging, where we can break on it. Only call at error site, not when
171 * propagating errors. Might be useful to plug in a stack trace here.
172 */
173
174 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
175
176 #ifdef DEBUG
177 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
178 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
179 #else
180 #define vk_error(error) error
181 #define vk_errorf(error, format, ...) error
182 #endif
183
184 void __anv_finishme(const char *file, int line, const char *format, ...)
185 anv_printflike(3, 4);
186 void anv_loge(const char *format, ...) anv_printflike(1, 2);
187 void anv_loge_v(const char *format, va_list va);
188
189 /**
190 * Print a FINISHME message, including its source location.
191 */
192 #define anv_finishme(format, ...) \
193 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
194
195 /* A non-fatal assert. Useful for debugging. */
196 #ifdef DEBUG
197 #define anv_assert(x) ({ \
198 if (unlikely(!(x))) \
199 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
200 })
201 #else
202 #define anv_assert(x)
203 #endif
204
205 /**
206 * If a block of code is annotated with anv_validate, then the block runs only
207 * in debug builds.
208 */
209 #ifdef DEBUG
210 #define anv_validate if (1)
211 #else
212 #define anv_validate if (0)
213 #endif
214
215 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
216 void anv_abortfv(const char *format, va_list va) anv_noreturn;
217
218 #define stub_return(v) \
219 do { \
220 anv_finishme("stub %s", __func__); \
221 return (v); \
222 } while (0)
223
224 #define stub() \
225 do { \
226 anv_finishme("stub %s", __func__); \
227 return; \
228 } while (0)
229
230 /**
231 * A dynamically growable, circular buffer. Elements are added at head and
232 * removed from tail. head and tail are free-running uint32_t indices and we
233 * only compute the modulo with size when accessing the array. This way,
234 * number of bytes in the queue is always head - tail, even in case of
235 * wraparound.
236 */
237
238 struct anv_vector {
239 uint32_t head;
240 uint32_t tail;
241 uint32_t element_size;
242 uint32_t size;
243 void *data;
244 };
245
246 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
247 void *anv_vector_add(struct anv_vector *queue);
248 void *anv_vector_remove(struct anv_vector *queue);
249
250 static inline int
251 anv_vector_length(struct anv_vector *queue)
252 {
253 return (queue->head - queue->tail) / queue->element_size;
254 }
255
256 static inline void *
257 anv_vector_head(struct anv_vector *vector)
258 {
259 assert(vector->tail < vector->head);
260 return (void *)((char *)vector->data +
261 ((vector->head - vector->element_size) &
262 (vector->size - 1)));
263 }
264
265 static inline void *
266 anv_vector_tail(struct anv_vector *vector)
267 {
268 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
269 }
270
271 static inline void
272 anv_vector_finish(struct anv_vector *queue)
273 {
274 free(queue->data);
275 }
276
277 #define anv_vector_foreach(elem, queue) \
278 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
279 for (uint32_t __anv_vector_offset = (queue)->tail; \
280 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
281 __anv_vector_offset += (queue)->element_size)
282
283 struct anv_bo {
284 uint32_t gem_handle;
285
286 /* Index into the current validation list. This is used by the
287 * validation list building alrogithm to track which buffers are already
288 * in the validation list so that we can ensure uniqueness.
289 */
290 uint32_t index;
291
292 /* Last known offset. This value is provided by the kernel when we
293 * execbuf and is used as the presumed offset for the next bunch of
294 * relocations.
295 */
296 uint64_t offset;
297
298 uint64_t size;
299 void *map;
300 };
301
302 /* Represents a lock-free linked list of "free" things. This is used by
303 * both the block pool and the state pools. Unfortunately, in order to
304 * solve the ABA problem, we can't use a single uint32_t head.
305 */
306 union anv_free_list {
307 struct {
308 int32_t offset;
309
310 /* A simple count that is incremented every time the head changes. */
311 uint32_t count;
312 };
313 uint64_t u64;
314 };
315
316 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
317
318 struct anv_block_state {
319 union {
320 struct {
321 uint32_t next;
322 uint32_t end;
323 };
324 uint64_t u64;
325 };
326 };
327
328 struct anv_block_pool {
329 struct anv_device *device;
330
331 struct anv_bo bo;
332
333 /* The offset from the start of the bo to the "center" of the block
334 * pool. Pointers to allocated blocks are given by
335 * bo.map + center_bo_offset + offsets.
336 */
337 uint32_t center_bo_offset;
338
339 /* Current memory map of the block pool. This pointer may or may not
340 * point to the actual beginning of the block pool memory. If
341 * anv_block_pool_alloc_back has ever been called, then this pointer
342 * will point to the "center" position of the buffer and all offsets
343 * (negative or positive) given out by the block pool alloc functions
344 * will be valid relative to this pointer.
345 *
346 * In particular, map == bo.map + center_offset
347 */
348 void *map;
349 int fd;
350
351 /**
352 * Array of mmaps and gem handles owned by the block pool, reclaimed when
353 * the block pool is destroyed.
354 */
355 struct anv_vector mmap_cleanups;
356
357 uint32_t block_size;
358
359 union anv_free_list free_list;
360 struct anv_block_state state;
361
362 union anv_free_list back_free_list;
363 struct anv_block_state back_state;
364 };
365
366 /* Block pools are backed by a fixed-size 2GB memfd */
367 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
368
369 /* The center of the block pool is also the middle of the memfd. This may
370 * change in the future if we decide differently for some reason.
371 */
372 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
373
374 static inline uint32_t
375 anv_block_pool_size(struct anv_block_pool *pool)
376 {
377 return pool->state.end + pool->back_state.end;
378 }
379
380 struct anv_state {
381 int32_t offset;
382 uint32_t alloc_size;
383 void *map;
384 };
385
386 struct anv_fixed_size_state_pool {
387 size_t state_size;
388 union anv_free_list free_list;
389 struct anv_block_state block;
390 };
391
392 #define ANV_MIN_STATE_SIZE_LOG2 6
393 #define ANV_MAX_STATE_SIZE_LOG2 10
394
395 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
396
397 struct anv_state_pool {
398 struct anv_block_pool *block_pool;
399 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
400 };
401
402 struct anv_state_stream_block;
403
404 struct anv_state_stream {
405 struct anv_block_pool *block_pool;
406
407 /* The current working block */
408 struct anv_state_stream_block *block;
409
410 /* Offset at which the current block starts */
411 uint32_t start;
412 /* Offset at which to allocate the next state */
413 uint32_t next;
414 /* Offset at which the current block ends */
415 uint32_t end;
416 };
417
418 #define CACHELINE_SIZE 64
419 #define CACHELINE_MASK 63
420
421 static inline void
422 anv_clflush_range(void *start, size_t size)
423 {
424 void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
425 void *end = start + size;
426
427 __builtin_ia32_mfence();
428 while (p < end) {
429 __builtin_ia32_clflush(p);
430 p += CACHELINE_SIZE;
431 }
432 }
433
434 static void inline
435 anv_state_clflush(struct anv_state state)
436 {
437 anv_clflush_range(state.map, state.alloc_size);
438 }
439
440 void anv_block_pool_init(struct anv_block_pool *pool,
441 struct anv_device *device, uint32_t block_size);
442 void anv_block_pool_finish(struct anv_block_pool *pool);
443 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
444 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
445 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
446 void anv_state_pool_init(struct anv_state_pool *pool,
447 struct anv_block_pool *block_pool);
448 void anv_state_pool_finish(struct anv_state_pool *pool);
449 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
450 size_t state_size, size_t alignment);
451 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
452 void anv_state_stream_init(struct anv_state_stream *stream,
453 struct anv_block_pool *block_pool);
454 void anv_state_stream_finish(struct anv_state_stream *stream);
455 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
456 uint32_t size, uint32_t alignment);
457
458 /**
459 * Implements a pool of re-usable BOs. The interface is identical to that
460 * of block_pool except that each block is its own BO.
461 */
462 struct anv_bo_pool {
463 struct anv_device *device;
464
465 uint32_t bo_size;
466
467 void *free_list;
468 };
469
470 void anv_bo_pool_init(struct anv_bo_pool *pool,
471 struct anv_device *device, uint32_t block_size);
472 void anv_bo_pool_finish(struct anv_bo_pool *pool);
473 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
474 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
475
476
477 void *anv_resolve_entrypoint(uint32_t index);
478
479 extern struct anv_dispatch_table dtable;
480
481 #define ANV_CALL(func) ({ \
482 if (dtable.func == NULL) { \
483 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
484 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
485 } \
486 dtable.func; \
487 })
488
489 static inline void *
490 anv_alloc(const VkAllocationCallbacks *alloc,
491 size_t size, size_t align,
492 VkSystemAllocationScope scope)
493 {
494 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
495 }
496
497 static inline void *
498 anv_realloc(const VkAllocationCallbacks *alloc,
499 void *ptr, size_t size, size_t align,
500 VkSystemAllocationScope scope)
501 {
502 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
503 }
504
505 static inline void
506 anv_free(const VkAllocationCallbacks *alloc, void *data)
507 {
508 alloc->pfnFree(alloc->pUserData, data);
509 }
510
511 static inline void *
512 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
513 const VkAllocationCallbacks *alloc,
514 size_t size, size_t align,
515 VkSystemAllocationScope scope)
516 {
517 if (alloc)
518 return anv_alloc(alloc, size, align, scope);
519 else
520 return anv_alloc(parent_alloc, size, align, scope);
521 }
522
523 static inline void
524 anv_free2(const VkAllocationCallbacks *parent_alloc,
525 const VkAllocationCallbacks *alloc,
526 void *data)
527 {
528 if (alloc)
529 anv_free(alloc, data);
530 else
531 anv_free(parent_alloc, data);
532 }
533
534 struct anv_physical_device {
535 VK_LOADER_DATA _loader_data;
536
537 struct anv_instance * instance;
538 uint32_t chipset_id;
539 const char * path;
540 const char * name;
541 const struct brw_device_info * info;
542 uint64_t aperture_size;
543 struct brw_compiler * compiler;
544 struct isl_device isl_dev;
545 };
546
547 struct anv_wsi_interaface;
548
549 #define VK_ICD_WSI_PLATFORM_MAX 5
550
551 struct anv_instance {
552 VK_LOADER_DATA _loader_data;
553
554 VkAllocationCallbacks alloc;
555
556 uint32_t apiVersion;
557 int physicalDeviceCount;
558 struct anv_physical_device physicalDevice;
559
560 struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX];
561 };
562
563 VkResult anv_init_wsi(struct anv_instance *instance);
564 void anv_finish_wsi(struct anv_instance *instance);
565
566 struct anv_meta_state {
567 VkAllocationCallbacks alloc;
568
569 /**
570 * Use array element `i` for images with `2^i` samples.
571 */
572 struct {
573 /**
574 * Pipeline N is used to clear color attachment N of the current
575 * subpass.
576 *
577 * HACK: We use one pipeline per color attachment to work around the
578 * compiler's inability to dynamically set the render target index of
579 * the render target write message.
580 */
581 struct anv_pipeline *color_pipelines[MAX_RTS];
582
583 struct anv_pipeline *depth_only_pipeline;
584 struct anv_pipeline *stencil_only_pipeline;
585 struct anv_pipeline *depthstencil_pipeline;
586 } clear[1 + MAX_SAMPLES_LOG2];
587
588 struct {
589 VkRenderPass render_pass;
590
591 /** Pipeline that blits from a 1D image. */
592 VkPipeline pipeline_1d_src;
593
594 /** Pipeline that blits from a 2D image. */
595 VkPipeline pipeline_2d_src;
596
597 /** Pipeline that blits from a 3D image. */
598 VkPipeline pipeline_3d_src;
599
600 VkPipelineLayout pipeline_layout;
601 VkDescriptorSetLayout ds_layout;
602 } blit;
603
604 struct {
605 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
606 VkPipeline pipelines[MAX_SAMPLES_LOG2];
607
608 VkRenderPass pass;
609 VkPipelineLayout pipeline_layout;
610 VkDescriptorSetLayout ds_layout;
611 } resolve;
612 };
613
614 struct anv_queue {
615 VK_LOADER_DATA _loader_data;
616
617 struct anv_device * device;
618
619 struct anv_state_pool * pool;
620 };
621
622 struct anv_pipeline_cache {
623 struct anv_device * device;
624 struct anv_state_stream program_stream;
625 pthread_mutex_t mutex;
626 };
627
628 void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
629 struct anv_device *device);
630 void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
631
632 struct anv_device {
633 VK_LOADER_DATA _loader_data;
634
635 VkAllocationCallbacks alloc;
636
637 struct anv_instance * instance;
638 uint32_t chipset_id;
639 struct brw_device_info info;
640 struct isl_device isl_dev;
641 int context_id;
642 int fd;
643
644 struct anv_bo_pool batch_bo_pool;
645
646 struct anv_block_pool dynamic_state_block_pool;
647 struct anv_state_pool dynamic_state_pool;
648
649 struct anv_block_pool instruction_block_pool;
650 struct anv_pipeline_cache default_pipeline_cache;
651
652 struct anv_block_pool surface_state_block_pool;
653 struct anv_state_pool surface_state_pool;
654
655 struct anv_bo workaround_bo;
656
657 struct anv_meta_state meta_state;
658
659 struct anv_state border_colors;
660
661 struct anv_queue queue;
662
663 struct anv_block_pool scratch_block_pool;
664
665 pthread_mutex_t mutex;
666 };
667
668 VkResult gen7_init_device_state(struct anv_device *device);
669 VkResult gen75_init_device_state(struct anv_device *device);
670 VkResult gen8_init_device_state(struct anv_device *device);
671 VkResult gen9_init_device_state(struct anv_device *device);
672
673 void* anv_gem_mmap(struct anv_device *device,
674 uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
675 void anv_gem_munmap(void *p, uint64_t size);
676 uint32_t anv_gem_create(struct anv_device *device, size_t size);
677 void anv_gem_close(struct anv_device *device, uint32_t gem_handle);
678 uint32_t anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
679 int anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns);
680 int anv_gem_execbuffer(struct anv_device *device,
681 struct drm_i915_gem_execbuffer2 *execbuf);
682 int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
683 uint32_t stride, uint32_t tiling);
684 int anv_gem_create_context(struct anv_device *device);
685 int anv_gem_destroy_context(struct anv_device *device, int context);
686 int anv_gem_get_param(int fd, uint32_t param);
687 bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
688 int anv_gem_get_aperture(int fd, uint64_t *size);
689 int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
690 uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
691 int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, uint32_t caching);
692 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
693 uint32_t read_domains, uint32_t write_domain);
694
695 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
696
697 struct anv_reloc_list {
698 size_t num_relocs;
699 size_t array_length;
700 struct drm_i915_gem_relocation_entry * relocs;
701 struct anv_bo ** reloc_bos;
702 };
703
704 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
705 const VkAllocationCallbacks *alloc);
706 void anv_reloc_list_finish(struct anv_reloc_list *list,
707 const VkAllocationCallbacks *alloc);
708
709 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
710 const VkAllocationCallbacks *alloc,
711 uint32_t offset, struct anv_bo *target_bo,
712 uint32_t delta);
713
714 struct anv_batch_bo {
715 /* Link in the anv_cmd_buffer.owned_batch_bos list */
716 struct list_head link;
717
718 struct anv_bo bo;
719
720 /* Bytes actually consumed in this batch BO */
721 size_t length;
722
723 /* Last seen surface state block pool bo offset */
724 uint32_t last_ss_pool_bo_offset;
725
726 struct anv_reloc_list relocs;
727 };
728
729 struct anv_batch {
730 const VkAllocationCallbacks * alloc;
731
732 void * start;
733 void * end;
734 void * next;
735
736 struct anv_reloc_list * relocs;
737
738 /* This callback is called (with the associated user data) in the event
739 * that the batch runs out of space.
740 */
741 VkResult (*extend_cb)(struct anv_batch *, void *);
742 void * user_data;
743 };
744
745 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
746 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
747 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
748 void *location, struct anv_bo *bo, uint32_t offset);
749 VkResult anv_device_submit_simple_batch(struct anv_device *device,
750 struct anv_batch *batch);
751
752 struct anv_address {
753 struct anv_bo *bo;
754 uint32_t offset;
755 };
756
757 #define __gen_address_type struct anv_address
758 #define __gen_user_data struct anv_batch
759
760 static inline uint64_t
761 __gen_combine_address(struct anv_batch *batch, void *location,
762 const struct anv_address address, uint32_t delta)
763 {
764 if (address.bo == NULL) {
765 return address.offset + delta;
766 } else {
767 assert(batch->start <= location && location < batch->end);
768
769 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
770 }
771 }
772
773 /* Wrapper macros needed to work around preprocessor argument issues. In
774 * particular, arguments don't get pre-evaluated if they are concatenated.
775 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
776 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
777 * We can work around this easily enough with these helpers.
778 */
779 #define __anv_cmd_length(cmd) cmd ## _length
780 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
781 #define __anv_cmd_header(cmd) cmd ## _header
782 #define __anv_cmd_pack(cmd) cmd ## _pack
783
784 #define anv_batch_emit(batch, cmd, ...) do { \
785 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
786 struct cmd __template = { \
787 __anv_cmd_header(cmd), \
788 __VA_ARGS__ \
789 }; \
790 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
791 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
792 } while (0)
793
794 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
795 void *__dst = anv_batch_emit_dwords(batch, n); \
796 struct cmd __template = { \
797 __anv_cmd_header(cmd), \
798 .DWordLength = n - __anv_cmd_length_bias(cmd), \
799 __VA_ARGS__ \
800 }; \
801 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
802 __dst; \
803 })
804
805 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
806 do { \
807 uint32_t *dw; \
808 \
809 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
810 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
811 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
812 dw[i] = (dwords0)[i] | (dwords1)[i]; \
813 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
814 } while (0)
815
816 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
817 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
818 struct anv_state __state = \
819 anv_state_pool_alloc((pool), __size, align); \
820 struct cmd __template = { \
821 __VA_ARGS__ \
822 }; \
823 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
824 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
825 if (!(pool)->block_pool->device->info.has_llc) \
826 anv_state_clflush(__state); \
827 __state; \
828 })
829
830 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
831 .GraphicsDataTypeGFDT = 0, \
832 .LLCCacheabilityControlLLCCC = 0, \
833 .L3CacheabilityControlL3CC = 1, \
834 }
835
836 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
837 .LLCeLLCCacheabilityControlLLCCC = 0, \
838 .L3CacheabilityControlL3CC = 1, \
839 }
840
841 #define GEN8_MOCS { \
842 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
843 .TargetCache = L3DefertoPATforLLCeLLCselection, \
844 .AgeforQUADLRU = 0 \
845 }
846
847 /* Skylake: MOCS is now an index into an array of 62 different caching
848 * configurations programmed by the kernel.
849 */
850
851 #define GEN9_MOCS { \
852 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
853 .IndextoMOCSTables = 2 \
854 }
855
856 #define GEN9_MOCS_PTE { \
857 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
858 .IndextoMOCSTables = 1 \
859 }
860
861 struct anv_device_memory {
862 struct anv_bo bo;
863 uint32_t type_index;
864 VkDeviceSize map_size;
865 void * map;
866 };
867
868 /**
869 * Header for Vertex URB Entry (VUE)
870 */
871 struct anv_vue_header {
872 uint32_t Reserved;
873 uint32_t RTAIndex; /* RenderTargetArrayIndex */
874 uint32_t ViewportIndex;
875 float PointWidth;
876 };
877
878 struct anv_descriptor_set_binding_layout {
879 /* Number of array elements in this binding */
880 uint16_t array_size;
881
882 /* Index into the flattend descriptor set */
883 uint16_t descriptor_index;
884
885 /* Index into the dynamic state array for a dynamic buffer */
886 int16_t dynamic_offset_index;
887
888 /* Index into the descriptor set buffer views */
889 int16_t buffer_index;
890
891 struct {
892 /* Index into the binding table for the associated surface */
893 int16_t surface_index;
894
895 /* Index into the sampler table for the associated sampler */
896 int16_t sampler_index;
897
898 /* Index into the image table for the associated image */
899 int16_t image_index;
900 } stage[MESA_SHADER_STAGES];
901
902 /* Immutable samplers (or NULL if no immutable samplers) */
903 struct anv_sampler **immutable_samplers;
904 };
905
906 struct anv_descriptor_set_layout {
907 /* Number of bindings in this descriptor set */
908 uint16_t binding_count;
909
910 /* Total size of the descriptor set with room for all array entries */
911 uint16_t size;
912
913 /* Shader stages affected by this descriptor set */
914 uint16_t shader_stages;
915
916 /* Number of buffers in this descriptor set */
917 uint16_t buffer_count;
918
919 /* Number of dynamic offsets used by this descriptor set */
920 uint16_t dynamic_offset_count;
921
922 /* Bindings in this descriptor set */
923 struct anv_descriptor_set_binding_layout binding[0];
924 };
925
926 struct anv_descriptor {
927 VkDescriptorType type;
928
929 union {
930 struct {
931 struct anv_image_view *image_view;
932 struct anv_sampler *sampler;
933 };
934
935 struct anv_buffer_view *buffer_view;
936 };
937 };
938
939 struct anv_descriptor_set {
940 const struct anv_descriptor_set_layout *layout;
941 uint32_t buffer_count;
942 struct anv_buffer_view *buffer_views;
943 struct anv_descriptor descriptors[0];
944 };
945
946 VkResult
947 anv_descriptor_set_create(struct anv_device *device,
948 const struct anv_descriptor_set_layout *layout,
949 struct anv_descriptor_set **out_set);
950
951 void
952 anv_descriptor_set_destroy(struct anv_device *device,
953 struct anv_descriptor_set *set);
954
955 struct anv_pipeline_binding {
956 /* The descriptor set this surface corresponds to */
957 uint16_t set;
958
959 /* Offset into the descriptor set */
960 uint16_t offset;
961 };
962
963 struct anv_pipeline_layout {
964 struct {
965 struct anv_descriptor_set_layout *layout;
966 uint32_t dynamic_offset_start;
967 struct {
968 uint32_t surface_start;
969 uint32_t sampler_start;
970 uint32_t image_start;
971 } stage[MESA_SHADER_STAGES];
972 } set[MAX_SETS];
973
974 uint32_t num_sets;
975
976 struct {
977 bool has_dynamic_offsets;
978 uint32_t surface_count;
979 struct anv_pipeline_binding *surface_to_descriptor;
980 uint32_t sampler_count;
981 struct anv_pipeline_binding *sampler_to_descriptor;
982 uint32_t image_count;
983 } stage[MESA_SHADER_STAGES];
984
985 struct anv_pipeline_binding entries[0];
986 };
987
988 struct anv_buffer {
989 struct anv_device * device;
990 VkDeviceSize size;
991
992 VkBufferUsageFlags usage;
993
994 /* Set when bound */
995 struct anv_bo * bo;
996 VkDeviceSize offset;
997 };
998
999 enum anv_cmd_dirty_bits {
1000 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1001 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1002 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1003 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1004 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1005 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1006 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1007 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1008 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1009 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
1010 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
1011 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
1012 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
1013 };
1014 typedef uint32_t anv_cmd_dirty_mask_t;
1015
1016 struct anv_vertex_binding {
1017 struct anv_buffer * buffer;
1018 VkDeviceSize offset;
1019 };
1020
1021 struct anv_push_constants {
1022 /* Current allocated size of this push constants data structure.
1023 * Because a decent chunk of it may not be used (images on SKL, for
1024 * instance), we won't actually allocate the entire structure up-front.
1025 */
1026 uint32_t size;
1027
1028 /* Push constant data provided by the client through vkPushConstants */
1029 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
1030
1031 /* Our hardware only provides zero-based vertex and instance id so, in
1032 * order to satisfy the vulkan requirements, we may have to push one or
1033 * both of these into the shader.
1034 */
1035 uint32_t base_vertex;
1036 uint32_t base_instance;
1037
1038 /* Offsets and ranges for dynamically bound buffers */
1039 struct {
1040 uint32_t offset;
1041 uint32_t range;
1042 } dynamic[MAX_DYNAMIC_BUFFERS];
1043
1044 /* Image data for image_load_store on pre-SKL */
1045 struct brw_image_param images[MAX_IMAGES];
1046 };
1047
1048 struct anv_dynamic_state {
1049 struct {
1050 uint32_t count;
1051 VkViewport viewports[MAX_VIEWPORTS];
1052 } viewport;
1053
1054 struct {
1055 uint32_t count;
1056 VkRect2D scissors[MAX_SCISSORS];
1057 } scissor;
1058
1059 float line_width;
1060
1061 struct {
1062 float bias;
1063 float clamp;
1064 float slope;
1065 } depth_bias;
1066
1067 float blend_constants[4];
1068
1069 struct {
1070 float min;
1071 float max;
1072 } depth_bounds;
1073
1074 struct {
1075 uint32_t front;
1076 uint32_t back;
1077 } stencil_compare_mask;
1078
1079 struct {
1080 uint32_t front;
1081 uint32_t back;
1082 } stencil_write_mask;
1083
1084 struct {
1085 uint32_t front;
1086 uint32_t back;
1087 } stencil_reference;
1088 };
1089
1090 extern const struct anv_dynamic_state default_dynamic_state;
1091
1092 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
1093 const struct anv_dynamic_state *src,
1094 uint32_t copy_mask);
1095
1096 /**
1097 * Attachment state when recording a renderpass instance.
1098 *
1099 * The clear value is valid only if there exists a pending clear.
1100 */
1101 struct anv_attachment_state {
1102 VkImageAspectFlags pending_clear_aspects;
1103 VkClearValue clear_value;
1104 };
1105
1106 /** State required while building cmd buffer */
1107 struct anv_cmd_state {
1108 /* PIPELINE_SELECT.PipelineSelection */
1109 uint32_t current_pipeline;
1110 uint32_t current_l3_config;
1111 uint32_t vb_dirty;
1112 anv_cmd_dirty_mask_t dirty;
1113 anv_cmd_dirty_mask_t compute_dirty;
1114 uint32_t num_workgroups_offset;
1115 struct anv_bo *num_workgroups_bo;
1116 VkShaderStageFlags descriptors_dirty;
1117 VkShaderStageFlags push_constants_dirty;
1118 uint32_t scratch_size;
1119 struct anv_pipeline * pipeline;
1120 struct anv_pipeline * compute_pipeline;
1121 struct anv_framebuffer * framebuffer;
1122 struct anv_render_pass * pass;
1123 struct anv_subpass * subpass;
1124 uint32_t restart_index;
1125 struct anv_vertex_binding vertex_bindings[MAX_VBS];
1126 struct anv_descriptor_set * descriptors[MAX_SETS];
1127 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
1128 struct anv_state binding_tables[MESA_SHADER_STAGES];
1129 struct anv_state samplers[MESA_SHADER_STAGES];
1130 struct anv_dynamic_state dynamic;
1131 bool need_query_wa;
1132
1133 /**
1134 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1135 * valid only when recording a render pass instance.
1136 */
1137 struct anv_attachment_state * attachments;
1138
1139 struct {
1140 struct anv_buffer * index_buffer;
1141 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1142 uint32_t index_offset;
1143 } gen7;
1144 };
1145
1146 struct anv_cmd_pool {
1147 VkAllocationCallbacks alloc;
1148 struct list_head cmd_buffers;
1149 };
1150
1151 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1152
1153 enum anv_cmd_buffer_exec_mode {
1154 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1155 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1156 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1157 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1158 };
1159
1160 struct anv_cmd_buffer {
1161 VK_LOADER_DATA _loader_data;
1162
1163 struct anv_device * device;
1164
1165 struct anv_cmd_pool * pool;
1166 struct list_head pool_link;
1167
1168 struct anv_batch batch;
1169
1170 /* Fields required for the actual chain of anv_batch_bo's.
1171 *
1172 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1173 */
1174 struct list_head batch_bos;
1175 enum anv_cmd_buffer_exec_mode exec_mode;
1176
1177 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1178 * referenced by this command buffer
1179 *
1180 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1181 */
1182 struct anv_vector seen_bbos;
1183
1184 /* A vector of int32_t's for every block of binding tables.
1185 *
1186 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1187 */
1188 struct anv_vector bt_blocks;
1189 uint32_t bt_next;
1190 struct anv_reloc_list surface_relocs;
1191
1192 /* Information needed for execbuf
1193 *
1194 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1195 */
1196 struct {
1197 struct drm_i915_gem_execbuffer2 execbuf;
1198
1199 struct drm_i915_gem_exec_object2 * objects;
1200 uint32_t bo_count;
1201 struct anv_bo ** bos;
1202
1203 /* Allocated length of the 'objects' and 'bos' arrays */
1204 uint32_t array_length;
1205
1206 bool need_reloc;
1207 } execbuf2;
1208
1209 /* Serial for tracking buffer completion */
1210 uint32_t serial;
1211
1212 /* Stream objects for storing temporary data */
1213 struct anv_state_stream surface_state_stream;
1214 struct anv_state_stream dynamic_state_stream;
1215
1216 VkCommandBufferUsageFlags usage_flags;
1217 VkCommandBufferLevel level;
1218
1219 struct anv_cmd_state state;
1220 };
1221
1222 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1223 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1224 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1225 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1226 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1227 struct anv_cmd_buffer *secondary);
1228 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1229
1230 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1231 unsigned stage, struct anv_state *bt_state);
1232 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1233 unsigned stage, struct anv_state *state);
1234 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1235 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer,
1236 uint32_t stages);
1237
1238 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1239 const void *data, uint32_t size, uint32_t alignment);
1240 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1241 uint32_t *a, uint32_t *b,
1242 uint32_t dwords, uint32_t alignment);
1243
1244 struct anv_address
1245 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1246 struct anv_state
1247 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1248 uint32_t entries, uint32_t *state_offset);
1249 struct anv_state
1250 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1251 struct anv_state
1252 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1253 uint32_t size, uint32_t alignment);
1254
1255 VkResult
1256 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1257
1258 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1259 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1260
1261 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1262 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1263 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1264 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1265
1266 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1267
1268 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
1269 const VkRenderPassBeginInfo *info);
1270
1271 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1272 struct anv_subpass *subpass);
1273 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1274 struct anv_subpass *subpass);
1275 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1276 struct anv_subpass *subpass);
1277 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1278 struct anv_subpass *subpass);
1279
1280 void gen7_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1281 void gen75_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1282 void gen8_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1283 void gen9_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1284
1285 void gen7_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1286 void gen75_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1287 void gen8_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1288 void gen9_cmd_buffer_flush_compute_state(struct anv_cmd_buffer *cmd_buffer);
1289
1290 struct anv_state
1291 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1292 gl_shader_stage stage);
1293 struct anv_state
1294 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
1295
1296 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
1297 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer);
1298
1299 const struct anv_image_view *
1300 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1301
1302 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1303
1304 struct anv_fence {
1305 struct anv_bo bo;
1306 struct drm_i915_gem_execbuffer2 execbuf;
1307 struct drm_i915_gem_exec_object2 exec2_objects[1];
1308 bool ready;
1309 };
1310
1311 struct anv_event {
1312 uint64_t semaphore;
1313 struct anv_state state;
1314 };
1315
1316 struct nir_shader;
1317
1318 struct anv_shader_module {
1319 struct nir_shader * nir;
1320
1321 uint32_t size;
1322 char data[0];
1323 };
1324
1325 static inline gl_shader_stage
1326 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1327 {
1328 assert(__builtin_popcount(vk_stage) == 1);
1329 return ffs(vk_stage) - 1;
1330 }
1331
1332 static inline VkShaderStageFlagBits
1333 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1334 {
1335 return (1 << mesa_stage);
1336 }
1337
1338 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1339
1340 #define anv_foreach_stage(stage, stage_bits) \
1341 for (gl_shader_stage stage, \
1342 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1343 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1344 __tmp &= ~(1 << (stage)))
1345
1346 struct anv_pipeline {
1347 struct anv_device * device;
1348 struct anv_batch batch;
1349 uint32_t batch_data[512];
1350 struct anv_reloc_list batch_relocs;
1351 uint32_t dynamic_state_mask;
1352 struct anv_dynamic_state dynamic_state;
1353
1354 struct anv_pipeline_layout * layout;
1355 bool use_repclear;
1356
1357 struct brw_vs_prog_data vs_prog_data;
1358 struct brw_wm_prog_data wm_prog_data;
1359 struct brw_gs_prog_data gs_prog_data;
1360 struct brw_cs_prog_data cs_prog_data;
1361 bool writes_point_size;
1362 struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
1363 uint32_t scratch_start[MESA_SHADER_STAGES];
1364 uint32_t total_scratch;
1365 struct {
1366 uint32_t vs_start;
1367 uint32_t vs_size;
1368 uint32_t nr_vs_entries;
1369 uint32_t gs_start;
1370 uint32_t gs_size;
1371 uint32_t nr_gs_entries;
1372 } urb;
1373
1374 VkShaderStageFlags active_stages;
1375 struct anv_state blend_state;
1376 uint32_t vs_simd8;
1377 uint32_t vs_vec4;
1378 uint32_t ps_simd8;
1379 uint32_t ps_simd16;
1380 uint32_t ps_ksp0;
1381 uint32_t ps_ksp2;
1382 uint32_t ps_grf_start0;
1383 uint32_t ps_grf_start2;
1384 uint32_t gs_kernel;
1385 uint32_t cs_simd;
1386
1387 uint32_t vb_used;
1388 uint32_t binding_stride[MAX_VBS];
1389 bool instancing_enable[MAX_VBS];
1390 bool primitive_restart;
1391 uint32_t topology;
1392
1393 uint32_t cs_thread_width_max;
1394 uint32_t cs_right_mask;
1395
1396 struct {
1397 uint32_t sf[7];
1398 uint32_t depth_stencil_state[3];
1399 } gen7;
1400
1401 struct {
1402 uint32_t sf[4];
1403 uint32_t raster[5];
1404 uint32_t wm_depth_stencil[3];
1405 } gen8;
1406
1407 struct {
1408 uint32_t wm_depth_stencil[4];
1409 } gen9;
1410 };
1411
1412 struct anv_graphics_pipeline_create_info {
1413 /**
1414 * If non-negative, overrides the color attachment count of the pipeline's
1415 * subpass.
1416 */
1417 int8_t color_attachment_count;
1418
1419 bool use_repclear;
1420 bool disable_viewport;
1421 bool disable_scissor;
1422 bool disable_vs;
1423 bool use_rectlist;
1424 };
1425
1426 VkResult
1427 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1428 struct anv_pipeline_cache *cache,
1429 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1430 const struct anv_graphics_pipeline_create_info *extra,
1431 const VkAllocationCallbacks *alloc);
1432
1433 VkResult
1434 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1435 struct anv_pipeline_cache *cache,
1436 const VkComputePipelineCreateInfo *info,
1437 struct anv_shader_module *module,
1438 const char *entrypoint,
1439 const VkSpecializationInfo *spec_info);
1440
1441 VkResult
1442 anv_graphics_pipeline_create(VkDevice device,
1443 VkPipelineCache cache,
1444 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1445 const struct anv_graphics_pipeline_create_info *extra,
1446 const VkAllocationCallbacks *alloc,
1447 VkPipeline *pPipeline);
1448
1449 VkResult
1450 gen7_graphics_pipeline_create(VkDevice _device,
1451 struct anv_pipeline_cache *cache,
1452 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1453 const struct anv_graphics_pipeline_create_info *extra,
1454 const VkAllocationCallbacks *alloc,
1455 VkPipeline *pPipeline);
1456
1457 VkResult
1458 gen75_graphics_pipeline_create(VkDevice _device,
1459 struct anv_pipeline_cache *cache,
1460 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1461 const struct anv_graphics_pipeline_create_info *extra,
1462 const VkAllocationCallbacks *alloc,
1463 VkPipeline *pPipeline);
1464
1465 VkResult
1466 gen8_graphics_pipeline_create(VkDevice _device,
1467 struct anv_pipeline_cache *cache,
1468 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1469 const struct anv_graphics_pipeline_create_info *extra,
1470 const VkAllocationCallbacks *alloc,
1471 VkPipeline *pPipeline);
1472 VkResult
1473 gen9_graphics_pipeline_create(VkDevice _device,
1474 struct anv_pipeline_cache *cache,
1475 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1476 const struct anv_graphics_pipeline_create_info *extra,
1477 const VkAllocationCallbacks *alloc,
1478 VkPipeline *pPipeline);
1479 VkResult
1480 gen7_compute_pipeline_create(VkDevice _device,
1481 struct anv_pipeline_cache *cache,
1482 const VkComputePipelineCreateInfo *pCreateInfo,
1483 const VkAllocationCallbacks *alloc,
1484 VkPipeline *pPipeline);
1485 VkResult
1486 gen75_compute_pipeline_create(VkDevice _device,
1487 struct anv_pipeline_cache *cache,
1488 const VkComputePipelineCreateInfo *pCreateInfo,
1489 const VkAllocationCallbacks *alloc,
1490 VkPipeline *pPipeline);
1491
1492 VkResult
1493 gen8_compute_pipeline_create(VkDevice _device,
1494 struct anv_pipeline_cache *cache,
1495 const VkComputePipelineCreateInfo *pCreateInfo,
1496 const VkAllocationCallbacks *alloc,
1497 VkPipeline *pPipeline);
1498 VkResult
1499 gen9_compute_pipeline_create(VkDevice _device,
1500 struct anv_pipeline_cache *cache,
1501 const VkComputePipelineCreateInfo *pCreateInfo,
1502 const VkAllocationCallbacks *alloc,
1503 VkPipeline *pPipeline);
1504
1505 struct anv_format_swizzle {
1506 unsigned r:2;
1507 unsigned g:2;
1508 unsigned b:2;
1509 unsigned a:2;
1510 };
1511
1512 struct anv_format {
1513 const VkFormat vk_format;
1514 const char *name;
1515 enum isl_format isl_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1516 const struct isl_format_layout *isl_layout;
1517 struct anv_format_swizzle swizzle;
1518 bool has_depth;
1519 bool has_stencil;
1520 };
1521
1522 const struct anv_format *
1523 anv_format_for_vk_format(VkFormat format);
1524
1525 enum isl_format
1526 anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
1527 VkImageTiling tiling, struct anv_format_swizzle *swizzle);
1528
1529 static inline bool
1530 anv_format_is_color(const struct anv_format *format)
1531 {
1532 return !format->has_depth && !format->has_stencil;
1533 }
1534
1535 static inline bool
1536 anv_format_is_depth_or_stencil(const struct anv_format *format)
1537 {
1538 return format->has_depth || format->has_stencil;
1539 }
1540
1541 /**
1542 * Subsurface of an anv_image.
1543 */
1544 struct anv_surface {
1545 struct isl_surf isl;
1546
1547 /**
1548 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1549 */
1550 uint32_t offset;
1551 };
1552
1553 struct anv_image {
1554 VkImageType type;
1555 /* The original VkFormat provided by the client. This may not match any
1556 * of the actual surface formats.
1557 */
1558 VkFormat vk_format;
1559 const struct anv_format *format;
1560 VkExtent3D extent;
1561 uint32_t levels;
1562 uint32_t array_size;
1563 uint32_t samples; /**< VkImageCreateInfo::samples */
1564 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1565 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1566
1567 VkDeviceSize size;
1568 uint32_t alignment;
1569
1570 /* Set when bound */
1571 struct anv_bo *bo;
1572 VkDeviceSize offset;
1573
1574 /**
1575 * Image subsurfaces
1576 *
1577 * For each foo, anv_image::foo_surface is valid if and only if
1578 * anv_image::format has a foo aspect.
1579 *
1580 * The hardware requires that the depth buffer and stencil buffer be
1581 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1582 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1583 * allocate the depth and stencil buffers as separate surfaces in the same
1584 * bo.
1585 */
1586 union {
1587 struct anv_surface color_surface;
1588
1589 struct {
1590 struct anv_surface depth_surface;
1591 struct anv_surface stencil_surface;
1592 };
1593 };
1594 };
1595
1596 struct anv_image_view {
1597 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1598 struct anv_bo *bo;
1599 uint32_t offset; /**< Offset into bo. */
1600
1601 VkImageAspectFlags aspect_mask;
1602 VkFormat vk_format;
1603 VkComponentMapping swizzle;
1604 enum isl_format format;
1605 uint32_t base_layer;
1606 uint32_t base_mip;
1607 VkExtent3D level_0_extent; /**< Extent of ::image's level 0 adjusted for ::vk_format. */
1608 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1609
1610 /** RENDER_SURFACE_STATE when using image as a color render target. */
1611 struct anv_state color_rt_surface_state;
1612
1613 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1614 struct anv_state sampler_surface_state;
1615
1616 /** RENDER_SURFACE_STATE when using image as a storage image. */
1617 struct anv_state storage_surface_state;
1618 };
1619
1620 struct anv_image_create_info {
1621 const VkImageCreateInfo *vk_info;
1622 isl_tiling_flags_t isl_tiling_flags;
1623 uint32_t stride;
1624 };
1625
1626 VkResult anv_image_create(VkDevice _device,
1627 const struct anv_image_create_info *info,
1628 const VkAllocationCallbacks* alloc,
1629 VkImage *pImage);
1630
1631 struct anv_surface *
1632 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1633 VkImageAspectFlags aspect_mask);
1634
1635 void anv_image_view_init(struct anv_image_view *view,
1636 struct anv_device *device,
1637 const VkImageViewCreateInfo* pCreateInfo,
1638 struct anv_cmd_buffer *cmd_buffer,
1639 uint32_t offset);
1640
1641 void
1642 anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
1643 struct anv_image_view *iview,
1644 const VkImageViewCreateInfo *pCreateInfo,
1645 VkImageUsageFlagBits usage);
1646 void
1647 gen7_fill_image_surface_state(struct anv_device *device, void *state_map,
1648 struct anv_image_view *iview,
1649 const VkImageViewCreateInfo *pCreateInfo,
1650 VkImageUsageFlagBits usage);
1651 void
1652 gen75_fill_image_surface_state(struct anv_device *device, void *state_map,
1653 struct anv_image_view *iview,
1654 const VkImageViewCreateInfo *pCreateInfo,
1655 VkImageUsageFlagBits usage);
1656 void
1657 gen8_fill_image_surface_state(struct anv_device *device, void *state_map,
1658 struct anv_image_view *iview,
1659 const VkImageViewCreateInfo *pCreateInfo,
1660 VkImageUsageFlagBits usage);
1661 void
1662 gen9_fill_image_surface_state(struct anv_device *device, void *state_map,
1663 struct anv_image_view *iview,
1664 const VkImageViewCreateInfo *pCreateInfo,
1665 VkImageUsageFlagBits usage);
1666
1667 struct anv_buffer_view {
1668 enum isl_format format; /**< VkBufferViewCreateInfo::format */
1669 struct anv_bo *bo;
1670 uint32_t offset; /**< Offset into bo. */
1671 uint64_t range; /**< VkBufferViewCreateInfo::range */
1672
1673 struct anv_state surface_state;
1674 struct anv_state storage_surface_state;
1675 };
1676
1677 const struct anv_format *
1678 anv_format_for_descriptor_type(VkDescriptorType type);
1679
1680 void anv_fill_buffer_surface_state(struct anv_device *device,
1681 struct anv_state state,
1682 enum isl_format format,
1683 uint32_t offset, uint32_t range,
1684 uint32_t stride);
1685
1686 void gen7_fill_buffer_surface_state(void *state, enum isl_format format,
1687 uint32_t offset, uint32_t range,
1688 uint32_t stride);
1689 void gen75_fill_buffer_surface_state(void *state, enum isl_format format,
1690 uint32_t offset, uint32_t range,
1691 uint32_t stride);
1692 void gen8_fill_buffer_surface_state(void *state, enum isl_format format,
1693 uint32_t offset, uint32_t range,
1694 uint32_t stride);
1695 void gen9_fill_buffer_surface_state(void *state, enum isl_format format,
1696 uint32_t offset, uint32_t range,
1697 uint32_t stride);
1698
1699 void anv_image_view_fill_image_param(struct anv_device *device,
1700 struct anv_image_view *view,
1701 struct brw_image_param *param);
1702 void anv_buffer_view_fill_image_param(struct anv_device *device,
1703 struct anv_buffer_view *view,
1704 struct brw_image_param *param);
1705
1706 struct anv_sampler {
1707 uint32_t state[4];
1708 };
1709
1710 struct anv_framebuffer {
1711 uint32_t width;
1712 uint32_t height;
1713 uint32_t layers;
1714
1715 uint32_t attachment_count;
1716 struct anv_image_view * attachments[0];
1717 };
1718
1719 struct anv_subpass {
1720 uint32_t input_count;
1721 uint32_t * input_attachments;
1722 uint32_t color_count;
1723 uint32_t * color_attachments;
1724 uint32_t * resolve_attachments;
1725 uint32_t depth_stencil_attachment;
1726
1727 /** Subpass has at least one resolve attachment */
1728 bool has_resolve;
1729 };
1730
1731 struct anv_render_pass_attachment {
1732 const struct anv_format *format;
1733 uint32_t samples;
1734 VkAttachmentLoadOp load_op;
1735 VkAttachmentLoadOp stencil_load_op;
1736 };
1737
1738 struct anv_render_pass {
1739 uint32_t attachment_count;
1740 uint32_t subpass_count;
1741 uint32_t * subpass_attachments;
1742 struct anv_render_pass_attachment * attachments;
1743 struct anv_subpass subpasses[0];
1744 };
1745
1746 extern struct anv_render_pass anv_meta_dummy_renderpass;
1747
1748 struct anv_query_pool_slot {
1749 uint64_t begin;
1750 uint64_t end;
1751 uint64_t available;
1752 };
1753
1754 struct anv_query_pool {
1755 VkQueryType type;
1756 uint32_t slots;
1757 struct anv_bo bo;
1758 };
1759
1760 VkResult anv_device_init_meta(struct anv_device *device);
1761 void anv_device_finish_meta(struct anv_device *device);
1762
1763 void *anv_lookup_entrypoint(const char *name);
1764
1765 void anv_dump_image_to_ppm(struct anv_device *device,
1766 struct anv_image *image, unsigned miplevel,
1767 unsigned array_layer, const char *filename);
1768
1769 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1770 \
1771 static inline struct __anv_type * \
1772 __anv_type ## _from_handle(__VkType _handle) \
1773 { \
1774 return (struct __anv_type *) _handle; \
1775 } \
1776 \
1777 static inline __VkType \
1778 __anv_type ## _to_handle(struct __anv_type *_obj) \
1779 { \
1780 return (__VkType) _obj; \
1781 }
1782
1783 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1784 \
1785 static inline struct __anv_type * \
1786 __anv_type ## _from_handle(__VkType _handle) \
1787 { \
1788 return (struct __anv_type *)(uintptr_t) _handle; \
1789 } \
1790 \
1791 static inline __VkType \
1792 __anv_type ## _to_handle(struct __anv_type *_obj) \
1793 { \
1794 return (__VkType)(uintptr_t) _obj; \
1795 }
1796
1797 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1798 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1799
1800 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1801 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1802 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1803 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1804 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1805
1806 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1807 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1808 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
1809 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1810 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1811 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1812 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1813 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
1814 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1815 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1816 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1817 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
1818 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1819 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1820 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1821 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1822 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1823 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1824
1825 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1826 \
1827 static inline const __VkType * \
1828 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1829 { \
1830 return (const __VkType *) __anv_obj; \
1831 }
1832
1833 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1834 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1835
1836 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1837 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1838 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1839
1840 #ifdef __cplusplus
1841 }
1842 #endif