anv: Add macros for doing per-gen compilation
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <i915_drm.h>
32
33 #ifdef HAVE_VALGRIND
34 #include <valgrind.h>
35 #include <memcheck.h>
36 #define VG(x) x
37 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
38 #else
39 #define VG(x)
40 #endif
41
42 #include "brw_device_info.h"
43 #include "util/macros.h"
44 #include "util/list.h"
45
46 #define VK_PROTOTYPES
47 #include <vulkan/vulkan.h>
48 #include <vulkan/vulkan_intel.h>
49 #include <vulkan/vk_ext_khr_swapchain.h>
50 #include <vulkan/vk_ext_khr_device_swapchain.h>
51
52 #include "anv_entrypoints.h"
53 #include "anv_gen_macros.h"
54 #include "brw_context.h"
55 #include "isl.h"
56
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60
61 #define ICD_LOADER_MAGIC 0x01CDC0DE
62
63 typedef union _VK_LOADER_DATA {
64 uintptr_t loaderMagic;
65 void *loaderData;
66 } VK_LOADER_DATA;
67
68 #define anv_noreturn __attribute__((__noreturn__))
69 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
70
71 #define MIN(a, b) ((a) < (b) ? (a) : (b))
72 #define MAX(a, b) ((a) > (b) ? (a) : (b))
73
74 static inline uint32_t
75 align_u32(uint32_t v, uint32_t a)
76 {
77 return (v + a - 1) & ~(a - 1);
78 }
79
80 static inline int32_t
81 align_i32(int32_t v, int32_t a)
82 {
83 return (v + a - 1) & ~(a - 1);
84 }
85
86 /** Alignment must be a power of 2. */
87 static inline bool
88 anv_is_aligned(uintmax_t n, uintmax_t a)
89 {
90 assert(a == (a & -a));
91 return (n & (a - 1)) == 0;
92 }
93
94 static inline uint32_t
95 anv_minify(uint32_t n, uint32_t levels)
96 {
97 if (unlikely(n == 0))
98 return 0;
99 else
100 return MAX(n >> levels, 1);
101 }
102
103 static inline bool
104 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
105 {
106 if (*inout_mask & clear_mask) {
107 *inout_mask &= ~clear_mask;
108 return true;
109 } else {
110 return false;
111 }
112 }
113
114 #define for_each_bit(b, dword) \
115 for (uint32_t __dword = (dword); \
116 (b) = __builtin_ffs(__dword) - 1, __dword; \
117 __dword &= ~(1 << (b)))
118
119 #define typed_memcpy(dest, src, count) ({ \
120 static_assert(sizeof(*src) == sizeof(*dest), ""); \
121 memcpy((dest), (src), (count) * sizeof(*(src))); \
122 })
123
124 /* Define no kernel as 1, since that's an illegal offset for a kernel */
125 #define NO_KERNEL 1
126
127 struct anv_common {
128 VkStructureType sType;
129 const void* pNext;
130 };
131
132 /* Whenever we generate an error, pass it through this function. Useful for
133 * debugging, where we can break on it. Only call at error site, not when
134 * propagating errors. Might be useful to plug in a stack trace here.
135 */
136
137 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
138
139 #ifdef DEBUG
140 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
141 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
142 #else
143 #define vk_error(error) error
144 #define vk_errorf(error, format, ...) error
145 #endif
146
147 void __anv_finishme(const char *file, int line, const char *format, ...)
148 anv_printflike(3, 4);
149 void anv_loge(const char *format, ...) anv_printflike(1, 2);
150 void anv_loge_v(const char *format, va_list va);
151
152 /**
153 * Print a FINISHME message, including its source location.
154 */
155 #define anv_finishme(format, ...) \
156 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
157
158 /* A non-fatal assert. Useful for debugging. */
159 #ifdef DEBUG
160 #define anv_assert(x) ({ \
161 if (unlikely(!(x))) \
162 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
163 })
164 #else
165 #define anv_assert(x)
166 #endif
167
168 /**
169 * If a block of code is annotated with anv_validate, then the block runs only
170 * in debug builds.
171 */
172 #ifdef DEBUG
173 #define anv_validate if (1)
174 #else
175 #define anv_validate if (0)
176 #endif
177
178 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
179 void anv_abortfv(const char *format, va_list va) anv_noreturn;
180
181 #define stub_return(v) \
182 do { \
183 anv_finishme("stub %s", __func__); \
184 return (v); \
185 } while (0)
186
187 #define stub() \
188 do { \
189 anv_finishme("stub %s", __func__); \
190 return; \
191 } while (0)
192
193 /**
194 * A dynamically growable, circular buffer. Elements are added at head and
195 * removed from tail. head and tail are free-running uint32_t indices and we
196 * only compute the modulo with size when accessing the array. This way,
197 * number of bytes in the queue is always head - tail, even in case of
198 * wraparound.
199 */
200
201 struct anv_vector {
202 uint32_t head;
203 uint32_t tail;
204 uint32_t element_size;
205 uint32_t size;
206 void *data;
207 };
208
209 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
210 void *anv_vector_add(struct anv_vector *queue);
211 void *anv_vector_remove(struct anv_vector *queue);
212
213 static inline int
214 anv_vector_length(struct anv_vector *queue)
215 {
216 return (queue->head - queue->tail) / queue->element_size;
217 }
218
219 static inline void *
220 anv_vector_head(struct anv_vector *vector)
221 {
222 assert(vector->tail < vector->head);
223 return (void *)((char *)vector->data +
224 ((vector->head - vector->element_size) &
225 (vector->size - 1)));
226 }
227
228 static inline void *
229 anv_vector_tail(struct anv_vector *vector)
230 {
231 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
232 }
233
234 static inline void
235 anv_vector_finish(struct anv_vector *queue)
236 {
237 free(queue->data);
238 }
239
240 #define anv_vector_foreach(elem, queue) \
241 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
242 for (uint32_t __anv_vector_offset = (queue)->tail; \
243 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
244 __anv_vector_offset += (queue)->element_size)
245
246 struct anv_bo {
247 int gem_handle;
248
249 /* Index into the current validation list. This is used by the
250 * validation list building alrogithm to track which buffers are already
251 * in the validation list so that we can ensure uniqueness.
252 */
253 uint32_t index;
254
255 /* Last known offset. This value is provided by the kernel when we
256 * execbuf and is used as the presumed offset for the next bunch of
257 * relocations.
258 */
259 uint64_t offset;
260
261 uint64_t size;
262 void *map;
263 };
264
265 /* Represents a lock-free linked list of "free" things. This is used by
266 * both the block pool and the state pools. Unfortunately, in order to
267 * solve the ABA problem, we can't use a single uint32_t head.
268 */
269 union anv_free_list {
270 struct {
271 int32_t offset;
272
273 /* A simple count that is incremented every time the head changes. */
274 uint32_t count;
275 };
276 uint64_t u64;
277 };
278
279 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
280
281 struct anv_block_state {
282 union {
283 struct {
284 uint32_t next;
285 uint32_t end;
286 };
287 uint64_t u64;
288 };
289 };
290
291 struct anv_block_pool {
292 struct anv_device *device;
293
294 struct anv_bo bo;
295
296 /* The offset from the start of the bo to the "center" of the block
297 * pool. Pointers to allocated blocks are given by
298 * bo.map + center_bo_offset + offsets.
299 */
300 uint32_t center_bo_offset;
301
302 /* Current memory map of the block pool. This pointer may or may not
303 * point to the actual beginning of the block pool memory. If
304 * anv_block_pool_alloc_back has ever been called, then this pointer
305 * will point to the "center" position of the buffer and all offsets
306 * (negative or positive) given out by the block pool alloc functions
307 * will be valid relative to this pointer.
308 *
309 * In particular, map == bo.map + center_offset
310 */
311 void *map;
312 int fd;
313
314 /**
315 * Array of mmaps and gem handles owned by the block pool, reclaimed when
316 * the block pool is destroyed.
317 */
318 struct anv_vector mmap_cleanups;
319
320 uint32_t block_size;
321
322 union anv_free_list free_list;
323 struct anv_block_state state;
324
325 union anv_free_list back_free_list;
326 struct anv_block_state back_state;
327 };
328
329 /* Block pools are backed by a fixed-size 2GB memfd */
330 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
331
332 /* The center of the block pool is also the middle of the memfd. This may
333 * change in the future if we decide differently for some reason.
334 */
335 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
336
337 static inline uint32_t
338 anv_block_pool_size(struct anv_block_pool *pool)
339 {
340 return pool->state.end + pool->back_state.end;
341 }
342
343 struct anv_state {
344 int32_t offset;
345 uint32_t alloc_size;
346 void *map;
347 };
348
349 struct anv_fixed_size_state_pool {
350 size_t state_size;
351 union anv_free_list free_list;
352 struct anv_block_state block;
353 };
354
355 #define ANV_MIN_STATE_SIZE_LOG2 6
356 #define ANV_MAX_STATE_SIZE_LOG2 10
357
358 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
359
360 struct anv_state_pool {
361 struct anv_block_pool *block_pool;
362 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
363 };
364
365 struct anv_state_stream {
366 struct anv_block_pool *block_pool;
367 uint32_t next;
368 uint32_t current_block;
369 uint32_t end;
370 };
371
372 void anv_block_pool_init(struct anv_block_pool *pool,
373 struct anv_device *device, uint32_t block_size);
374 void anv_block_pool_finish(struct anv_block_pool *pool);
375 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
376 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
377 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
378 void anv_state_pool_init(struct anv_state_pool *pool,
379 struct anv_block_pool *block_pool);
380 void anv_state_pool_finish(struct anv_state_pool *pool);
381 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
382 size_t state_size, size_t alignment);
383 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
384 void anv_state_stream_init(struct anv_state_stream *stream,
385 struct anv_block_pool *block_pool);
386 void anv_state_stream_finish(struct anv_state_stream *stream);
387 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
388 uint32_t size, uint32_t alignment);
389
390 /**
391 * Implements a pool of re-usable BOs. The interface is identical to that
392 * of block_pool except that each block is its own BO.
393 */
394 struct anv_bo_pool {
395 struct anv_device *device;
396
397 uint32_t bo_size;
398
399 void *free_list;
400 };
401
402 void anv_bo_pool_init(struct anv_bo_pool *pool,
403 struct anv_device *device, uint32_t block_size);
404 void anv_bo_pool_finish(struct anv_bo_pool *pool);
405 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
406 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
407
408
409 void *anv_resolve_entrypoint(uint32_t index);
410
411 extern struct anv_dispatch_table dtable;
412
413 #define ANV_CALL(func) ({ \
414 if (dtable.func == NULL) { \
415 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
416 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
417 } \
418 dtable.func; \
419 })
420
421
422 struct anv_physical_device {
423 VK_LOADER_DATA _loader_data;
424
425 struct anv_instance * instance;
426 uint32_t chipset_id;
427 const char * path;
428 const char * name;
429 const struct brw_device_info * info;
430 uint64_t aperture_size;
431 struct brw_compiler * compiler;
432 struct isl_device isl_dev;
433 };
434
435 bool anv_is_scalar_shader_stage(const struct brw_compiler *compiler,
436 VkShaderStage stage);
437
438 struct anv_instance {
439 VK_LOADER_DATA _loader_data;
440
441 void * pAllocUserData;
442 PFN_vkAllocFunction pfnAlloc;
443 PFN_vkFreeFunction pfnFree;
444 uint32_t apiVersion;
445 int physicalDeviceCount;
446 struct anv_physical_device physicalDevice;
447
448 struct anv_wsi_implementation * wsi_impl[VK_PLATFORM_NUM_KHR];
449 };
450
451 VkResult anv_init_wsi(struct anv_instance *instance);
452 void anv_finish_wsi(struct anv_instance *instance);
453
454 struct anv_meta_state {
455 struct {
456 struct anv_pipeline *color_pipeline;
457 struct anv_pipeline *depth_only_pipeline;
458 struct anv_pipeline *stencil_only_pipeline;
459 struct anv_pipeline *depthstencil_pipeline;
460 } clear;
461
462 struct {
463 VkRenderPass render_pass;
464
465 /** Pipeline that blits from a 2D image. */
466 VkPipeline pipeline_2d_src;
467
468 /** Pipeline that blits from a 3D image. */
469 VkPipeline pipeline_3d_src;
470
471 VkPipelineLayout pipeline_layout;
472 VkDescriptorSetLayout ds_layout;
473 } blit;
474 };
475
476 struct anv_queue {
477 VK_LOADER_DATA _loader_data;
478
479 struct anv_device * device;
480
481 struct anv_state_pool * pool;
482 };
483
484 struct anv_device {
485 VK_LOADER_DATA _loader_data;
486
487 struct anv_instance * instance;
488 uint32_t chipset_id;
489 struct brw_device_info info;
490 struct isl_device isl_dev;
491 int context_id;
492 int fd;
493
494 struct anv_bo_pool batch_bo_pool;
495
496 struct anv_block_pool dynamic_state_block_pool;
497 struct anv_state_pool dynamic_state_pool;
498
499 struct anv_block_pool instruction_block_pool;
500 struct anv_block_pool surface_state_block_pool;
501 struct anv_state_pool surface_state_pool;
502
503 struct anv_bo workaround_bo;
504
505 struct anv_meta_state meta_state;
506
507 struct anv_state border_colors;
508
509 struct anv_queue queue;
510
511 struct anv_block_pool scratch_block_pool;
512
513 pthread_mutex_t mutex;
514 };
515
516 void *
517 anv_instance_alloc(struct anv_instance * instance,
518 size_t size,
519 size_t alignment,
520 VkSystemAllocType allocType);
521
522 void
523 anv_instance_free(struct anv_instance * instance,
524 void * mem);
525
526 void *
527 anv_device_alloc(struct anv_device * device,
528 size_t size,
529 size_t alignment,
530 VkSystemAllocType allocType);
531
532 void
533 anv_device_free(struct anv_device * device,
534 void * mem);
535
536 void* anv_gem_mmap(struct anv_device *device,
537 uint32_t gem_handle, uint64_t offset, uint64_t size);
538 void anv_gem_munmap(void *p, uint64_t size);
539 uint32_t anv_gem_create(struct anv_device *device, size_t size);
540 void anv_gem_close(struct anv_device *device, int gem_handle);
541 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
542 int anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns);
543 int anv_gem_execbuffer(struct anv_device *device,
544 struct drm_i915_gem_execbuffer2 *execbuf);
545 int anv_gem_set_tiling(struct anv_device *device, int gem_handle,
546 uint32_t stride, uint32_t tiling);
547 int anv_gem_create_context(struct anv_device *device);
548 int anv_gem_destroy_context(struct anv_device *device, int context);
549 int anv_gem_get_param(int fd, uint32_t param);
550 int anv_gem_get_aperture(int fd, uint64_t *size);
551 int anv_gem_handle_to_fd(struct anv_device *device, int gem_handle);
552 int anv_gem_fd_to_handle(struct anv_device *device, int fd);
553 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
554
555 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
556
557 struct anv_reloc_list {
558 size_t num_relocs;
559 size_t array_length;
560 struct drm_i915_gem_relocation_entry * relocs;
561 struct anv_bo ** reloc_bos;
562 };
563
564 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
565 struct anv_device *device);
566 void anv_reloc_list_finish(struct anv_reloc_list *list,
567 struct anv_device *device);
568
569 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
570 struct anv_device *device,
571 uint32_t offset, struct anv_bo *target_bo,
572 uint32_t delta);
573
574 struct anv_batch_bo {
575 /* Link in the anv_cmd_buffer.owned_batch_bos list */
576 struct list_head link;
577
578 struct anv_bo bo;
579
580 /* Bytes actually consumed in this batch BO */
581 size_t length;
582
583 /* Last seen surface state block pool bo offset */
584 uint32_t last_ss_pool_bo_offset;
585
586 struct anv_reloc_list relocs;
587 };
588
589 struct anv_batch {
590 struct anv_device * device;
591
592 void * start;
593 void * end;
594 void * next;
595
596 struct anv_reloc_list * relocs;
597
598 /* This callback is called (with the associated user data) in the event
599 * that the batch runs out of space.
600 */
601 VkResult (*extend_cb)(struct anv_batch *, void *);
602 void * user_data;
603 };
604
605 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
606 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
607 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
608 void *location, struct anv_bo *bo, uint32_t offset);
609
610 struct anv_address {
611 struct anv_bo *bo;
612 uint32_t offset;
613 };
614
615 #define __gen_address_type struct anv_address
616 #define __gen_user_data struct anv_batch
617
618 static inline uint64_t
619 __gen_combine_address(struct anv_batch *batch, void *location,
620 const struct anv_address address, uint32_t delta)
621 {
622 if (address.bo == NULL) {
623 return address.offset + delta;
624 } else {
625 assert(batch->start <= location && location < batch->end);
626
627 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
628 }
629 }
630
631 /* Wrapper macros needed to work around preprocessor argument issues. In
632 * particular, arguments don't get pre-evaluated if they are concatenated.
633 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
634 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
635 * We can work around this easily enough with these helpers.
636 */
637 #define __anv_cmd_length(cmd) cmd ## _length
638 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
639 #define __anv_cmd_header(cmd) cmd ## _header
640 #define __anv_cmd_pack(cmd) cmd ## _pack
641
642 #define anv_batch_emit(batch, cmd, ...) do { \
643 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
644 struct cmd __template = { \
645 __anv_cmd_header(cmd), \
646 __VA_ARGS__ \
647 }; \
648 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
649 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
650 } while (0)
651
652 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
653 void *__dst = anv_batch_emit_dwords(batch, n); \
654 struct cmd __template = { \
655 __anv_cmd_header(cmd), \
656 .DwordLength = n - __anv_cmd_length_bias(cmd), \
657 __VA_ARGS__ \
658 }; \
659 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
660 __dst; \
661 })
662
663 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
664 do { \
665 uint32_t *dw; \
666 \
667 assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \
668 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
669 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
670 dw[i] = (dwords0)[i] | (dwords1)[i]; \
671 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
672 } while (0)
673
674 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
675 .GraphicsDataTypeGFDT = 0, \
676 .LLCCacheabilityControlLLCCC = 0, \
677 .L3CacheabilityControlL3CC = 1, \
678 }
679
680 #define GEN8_MOCS { \
681 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
682 .TargetCache = L3DefertoPATforLLCeLLCselection, \
683 .AgeforQUADLRU = 0 \
684 }
685
686 struct anv_device_memory {
687 struct anv_bo bo;
688 VkDeviceSize map_size;
689 void * map;
690 };
691
692 /**
693 * Header for Vertex URB Entry (VUE)
694 */
695 struct anv_vue_header {
696 uint32_t Reserved;
697 uint32_t RTAIndex; /* RenderTargetArrayIndex */
698 uint32_t ViewportIndex;
699 float PointWidth;
700 };
701
702 struct anv_descriptor_set_binding_layout {
703 /* Number of array elements in this binding */
704 uint16_t array_size;
705
706 /* Index into the flattend descriptor set */
707 uint16_t descriptor_index;
708
709 /* Index into the dynamic state array for a dynamic buffer */
710 int16_t dynamic_offset_index;
711
712 struct {
713 /* Index into the binding table for the associated surface */
714 int16_t surface_index;
715
716 /* Index into the sampler table for the associated sampler */
717 int16_t sampler_index;
718 } stage[VK_SHADER_STAGE_NUM];
719
720 /* Immutable samplers (or NULL if no immutable samplers) */
721 struct anv_sampler **immutable_samplers;
722 };
723
724 struct anv_descriptor_set_layout {
725 /* Number of bindings in this descriptor set */
726 uint16_t binding_count;
727
728 /* Total size of the descriptor set with room for all array entries */
729 uint16_t size;
730
731 /* Shader stages affected by this descriptor set */
732 uint16_t shader_stages;
733
734 /* Number of dynamic offsets used by this descriptor set */
735 uint16_t dynamic_offset_count;
736
737 /* Bindings in this descriptor set */
738 struct anv_descriptor_set_binding_layout binding[0];
739 };
740
741 struct anv_descriptor {
742 VkDescriptorType type;
743
744 union {
745 struct {
746 union {
747 struct anv_image_view *image_view;
748 };
749 struct anv_sampler *sampler;
750 };
751
752 struct {
753 struct anv_buffer *buffer;
754 uint64_t offset;
755 uint64_t range;
756 };
757 };
758 };
759
760 struct anv_descriptor_set {
761 const struct anv_descriptor_set_layout *layout;
762 struct anv_descriptor descriptors[0];
763 };
764
765 VkResult
766 anv_descriptor_set_create(struct anv_device *device,
767 const struct anv_descriptor_set_layout *layout,
768 struct anv_descriptor_set **out_set);
769
770 void
771 anv_descriptor_set_destroy(struct anv_device *device,
772 struct anv_descriptor_set *set);
773
774 #define MAX_VBS 32
775 #define MAX_SETS 8
776 #define MAX_RTS 8
777 #define MAX_VIEWPORTS 16
778 #define MAX_SCISSORS 16
779 #define MAX_PUSH_CONSTANTS_SIZE 128
780 #define MAX_DYNAMIC_BUFFERS 16
781 #define MAX_IMAGES 8
782
783 struct anv_pipeline_binding {
784 /* The descriptor set this surface corresponds to */
785 uint16_t set;
786
787 /* Offset into the descriptor set */
788 uint16_t offset;
789 };
790
791 struct anv_pipeline_layout {
792 struct {
793 struct anv_descriptor_set_layout *layout;
794 uint32_t dynamic_offset_start;
795 struct {
796 uint32_t surface_start;
797 uint32_t sampler_start;
798 } stage[VK_SHADER_STAGE_NUM];
799 } set[MAX_SETS];
800
801 uint32_t num_sets;
802
803 struct {
804 bool has_dynamic_offsets;
805 uint32_t surface_count;
806 struct anv_pipeline_binding *surface_to_descriptor;
807 uint32_t sampler_count;
808 struct anv_pipeline_binding *sampler_to_descriptor;
809 } stage[VK_SHADER_STAGE_NUM];
810
811 struct anv_pipeline_binding entries[0];
812 };
813
814 struct anv_buffer {
815 struct anv_device * device;
816 VkDeviceSize size;
817
818 /* Set when bound */
819 struct anv_bo * bo;
820 VkDeviceSize offset;
821 };
822
823 enum anv_cmd_dirty_bits {
824 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
825 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
826 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
827 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
828 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
829 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
830 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
831 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
832 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
833 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
834 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
835 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
836 };
837 typedef uint32_t anv_cmd_dirty_mask_t;
838
839 struct anv_vertex_binding {
840 struct anv_buffer * buffer;
841 VkDeviceSize offset;
842 };
843
844 struct anv_push_constants {
845 /* Current allocated size of this push constants data structure.
846 * Because a decent chunk of it may not be used (images on SKL, for
847 * instance), we won't actually allocate the entire structure up-front.
848 */
849 uint32_t size;
850
851 /* Push constant data provided by the client through vkPushConstants */
852 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
853
854 /* Our hardware only provides zero-based vertex and instance id so, in
855 * order to satisfy the vulkan requirements, we may have to push one or
856 * both of these into the shader.
857 */
858 uint32_t base_vertex;
859 uint32_t base_instance;
860
861 /* Offsets and ranges for dynamically bound buffers */
862 struct {
863 uint32_t offset;
864 uint32_t range;
865 } dynamic[MAX_DYNAMIC_BUFFERS];
866
867 /* Image data for image_load_store on pre-SKL */
868 struct brw_image_param images[MAX_IMAGES];
869 };
870
871 struct anv_dynamic_state {
872 struct {
873 uint32_t count;
874 VkViewport viewports[MAX_VIEWPORTS];
875 } viewport;
876
877 struct {
878 uint32_t count;
879 VkRect2D scissors[MAX_SCISSORS];
880 } scissor;
881
882 float line_width;
883
884 struct {
885 float bias;
886 float clamp;
887 float slope_scaled;
888 } depth_bias;
889
890 float blend_constants[4];
891
892 struct {
893 float min;
894 float max;
895 } depth_bounds;
896
897 struct {
898 uint32_t front;
899 uint32_t back;
900 } stencil_compare_mask;
901
902 struct {
903 uint32_t front;
904 uint32_t back;
905 } stencil_write_mask;
906
907 struct {
908 uint32_t front;
909 uint32_t back;
910 } stencil_reference;
911 };
912
913 extern const struct anv_dynamic_state default_dynamic_state;
914
915 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
916 const struct anv_dynamic_state *src,
917 uint32_t copy_mask);
918
919 /** State required while building cmd buffer */
920 struct anv_cmd_state {
921 uint32_t current_pipeline;
922 uint32_t vb_dirty;
923 anv_cmd_dirty_mask_t dirty;
924 anv_cmd_dirty_mask_t compute_dirty;
925 VkShaderStageFlags descriptors_dirty;
926 VkShaderStageFlags push_constants_dirty;
927 uint32_t scratch_size;
928 struct anv_pipeline * pipeline;
929 struct anv_pipeline * compute_pipeline;
930 struct anv_framebuffer * framebuffer;
931 struct anv_render_pass * pass;
932 struct anv_subpass * subpass;
933 uint32_t restart_index;
934 struct anv_vertex_binding vertex_bindings[MAX_VBS];
935 struct anv_descriptor_set * descriptors[MAX_SETS];
936 struct anv_push_constants * push_constants[VK_SHADER_STAGE_NUM];
937 struct anv_dynamic_state dynamic;
938
939 struct {
940 struct anv_buffer * index_buffer;
941 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
942 uint32_t index_offset;
943 } gen7;
944 };
945
946 struct anv_cmd_pool {
947 struct list_head cmd_buffers;
948 };
949
950 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
951
952 enum anv_cmd_buffer_exec_mode {
953 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
954 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
955 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
956 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
957 };
958
959 struct anv_cmd_buffer {
960 VK_LOADER_DATA _loader_data;
961
962 struct anv_device * device;
963
964 struct list_head pool_link;
965
966 struct anv_batch batch;
967
968 /* Fields required for the actual chain of anv_batch_bo's.
969 *
970 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
971 */
972 struct list_head batch_bos;
973 enum anv_cmd_buffer_exec_mode exec_mode;
974
975 /* A vector of anv_batch_bo pointers for every batch or surface buffer
976 * referenced by this command buffer
977 *
978 * initialized by anv_cmd_buffer_init_batch_bo_chain()
979 */
980 struct anv_vector seen_bbos;
981
982 /* A vector of int32_t's for every block of binding tables.
983 *
984 * initialized by anv_cmd_buffer_init_batch_bo_chain()
985 */
986 struct anv_vector bt_blocks;
987 uint32_t bt_next;
988 struct anv_reloc_list surface_relocs;
989
990 /* Information needed for execbuf
991 *
992 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
993 */
994 struct {
995 struct drm_i915_gem_execbuffer2 execbuf;
996
997 struct drm_i915_gem_exec_object2 * objects;
998 uint32_t bo_count;
999 struct anv_bo ** bos;
1000
1001 /* Allocated length of the 'objects' and 'bos' arrays */
1002 uint32_t array_length;
1003
1004 bool need_reloc;
1005 } execbuf2;
1006
1007 /* Serial for tracking buffer completion */
1008 uint32_t serial;
1009
1010 /* Stream objects for storing temporary data */
1011 struct anv_state_stream surface_state_stream;
1012 struct anv_state_stream dynamic_state_stream;
1013
1014 VkCmdBufferOptimizeFlags opt_flags;
1015 VkCmdBufferLevel level;
1016
1017 struct anv_cmd_state state;
1018 };
1019
1020 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1021 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1022 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1023 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1024 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1025 struct anv_cmd_buffer *secondary);
1026 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1027
1028 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1029 unsigned stage, struct anv_state *bt_state);
1030 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1031 unsigned stage, struct anv_state *state);
1032 void gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1033
1034 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1035 uint32_t *a, uint32_t dwords,
1036 uint32_t alignment);
1037 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1038 uint32_t *a, uint32_t *b,
1039 uint32_t dwords, uint32_t alignment);
1040 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1041 struct anv_subpass *subpass);
1042
1043 struct anv_address
1044 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1045 struct anv_state
1046 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1047 uint32_t entries, uint32_t *state_offset);
1048 struct anv_state
1049 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1050 struct anv_state
1051 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1052 uint32_t size, uint32_t alignment);
1053
1054 VkResult
1055 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1056
1057 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1058 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1059
1060 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1061 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1062
1063 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1064
1065 void gen7_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1066 struct anv_subpass *subpass);
1067
1068 void gen8_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1069 struct anv_subpass *subpass);
1070
1071 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1072 struct anv_subpass *subpass);
1073
1074 struct anv_state
1075 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1076 VkShaderStage stage);
1077
1078 void anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
1079 struct anv_render_pass *pass,
1080 const VkClearValue *clear_values);
1081 const struct anv_image_view *
1082 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1083
1084 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1085
1086 struct anv_fence {
1087 struct anv_bo bo;
1088 struct drm_i915_gem_execbuffer2 execbuf;
1089 struct drm_i915_gem_exec_object2 exec2_objects[1];
1090 bool ready;
1091 };
1092
1093 struct nir_shader;
1094
1095 struct anv_shader_module {
1096 struct nir_shader * nir;
1097
1098 uint32_t size;
1099 char data[0];
1100 };
1101
1102 struct anv_shader {
1103 struct anv_shader_module * module;
1104 char entrypoint[0];
1105 };
1106
1107 struct anv_pipeline {
1108 struct anv_device * device;
1109 struct anv_batch batch;
1110 uint32_t batch_data[512];
1111 struct anv_reloc_list batch_relocs;
1112 uint32_t dynamic_state_mask;
1113 struct anv_dynamic_state dynamic_state;
1114
1115 struct anv_pipeline_layout * layout;
1116 bool use_repclear;
1117
1118 struct brw_vs_prog_data vs_prog_data;
1119 struct brw_wm_prog_data wm_prog_data;
1120 struct brw_gs_prog_data gs_prog_data;
1121 struct brw_cs_prog_data cs_prog_data;
1122 bool writes_point_size;
1123 struct brw_stage_prog_data * prog_data[VK_SHADER_STAGE_NUM];
1124 uint32_t scratch_start[VK_SHADER_STAGE_NUM];
1125 uint32_t total_scratch;
1126 struct {
1127 uint32_t vs_start;
1128 uint32_t vs_size;
1129 uint32_t nr_vs_entries;
1130 uint32_t gs_start;
1131 uint32_t gs_size;
1132 uint32_t nr_gs_entries;
1133 } urb;
1134
1135 VkShaderStageFlags active_stages;
1136 struct anv_state_stream program_stream;
1137 struct anv_state blend_state;
1138 uint32_t vs_simd8;
1139 uint32_t vs_vec4;
1140 uint32_t ps_simd8;
1141 uint32_t ps_simd16;
1142 uint32_t ps_ksp0;
1143 uint32_t ps_ksp2;
1144 uint32_t ps_grf_start0;
1145 uint32_t ps_grf_start2;
1146 uint32_t gs_vec4;
1147 uint32_t gs_vertex_count;
1148 uint32_t cs_simd;
1149
1150 uint32_t vb_used;
1151 uint32_t binding_stride[MAX_VBS];
1152 bool instancing_enable[MAX_VBS];
1153 bool primitive_restart;
1154 uint32_t topology;
1155
1156 uint32_t cs_thread_width_max;
1157 uint32_t cs_right_mask;
1158
1159 struct {
1160 uint32_t sf[7];
1161 uint32_t depth_stencil_state[3];
1162 } gen7;
1163
1164 struct {
1165 uint32_t sf[4];
1166 uint32_t raster[5];
1167 uint32_t wm_depth_stencil[3];
1168 } gen8;
1169 };
1170
1171 struct anv_graphics_pipeline_create_info {
1172 bool use_repclear;
1173 bool disable_viewport;
1174 bool disable_scissor;
1175 bool disable_vs;
1176 bool use_rectlist;
1177 };
1178
1179 VkResult
1180 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1181 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1182 const struct anv_graphics_pipeline_create_info *extra);
1183
1184 VkResult
1185 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1186 const VkComputePipelineCreateInfo *info,
1187 struct anv_shader *shader);
1188
1189 VkResult
1190 anv_graphics_pipeline_create(VkDevice device,
1191 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1192 const struct anv_graphics_pipeline_create_info *extra,
1193 VkPipeline *pPipeline);
1194
1195 VkResult
1196 gen7_graphics_pipeline_create(VkDevice _device,
1197 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1198 const struct anv_graphics_pipeline_create_info *extra,
1199 VkPipeline *pPipeline);
1200
1201 VkResult
1202 gen8_graphics_pipeline_create(VkDevice _device,
1203 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1204 const struct anv_graphics_pipeline_create_info *extra,
1205 VkPipeline *pPipeline);
1206 VkResult
1207 gen7_compute_pipeline_create(VkDevice _device,
1208 const VkComputePipelineCreateInfo *pCreateInfo,
1209 VkPipeline *pPipeline);
1210
1211 VkResult
1212 gen8_compute_pipeline_create(VkDevice _device,
1213 const VkComputePipelineCreateInfo *pCreateInfo,
1214 VkPipeline *pPipeline);
1215
1216 struct anv_format {
1217 const VkFormat vk_format;
1218 const char *name;
1219 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1220 const struct isl_format_layout *isl_layout;
1221 uint8_t num_channels;
1222 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1223 bool has_stencil;
1224 };
1225
1226 /**
1227 * Stencil formats are often a special case. To reduce the number of lookups
1228 * into the VkFormat-to-anv_format translation table when working with
1229 * stencil, here is the handle to the table's entry for VK_FORMAT_S8_UINT.
1230 */
1231 extern const struct anv_format *const anv_format_s8_uint;
1232
1233 const struct anv_format *
1234 anv_format_for_vk_format(VkFormat format);
1235
1236 static inline bool
1237 anv_format_is_color(const struct anv_format *format)
1238 {
1239 return !format->depth_format && !format->has_stencil;
1240 }
1241
1242 static inline bool
1243 anv_format_is_depth_or_stencil(const struct anv_format *format)
1244 {
1245 return format->depth_format || format->has_stencil;
1246 }
1247
1248 struct anv_image_view_info {
1249 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1250 bool is_array:1; /**< RENDER_SURFACE_STATE.SurfaceArray */
1251 bool is_cube:1; /**< RENDER_SURFACE_STATE.CubeFaceEnable* */
1252 };
1253
1254 struct anv_image_view_info
1255 anv_image_view_info_for_vk_image_view_type(VkImageViewType type);
1256
1257 /**
1258 * A proxy for the color surfaces, depth surfaces, and stencil surfaces.
1259 */
1260 struct anv_surface {
1261 /**
1262 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1263 */
1264 uint32_t offset;
1265
1266 uint32_t stride; /**< RENDER_SURFACE_STATE.SurfacePitch */
1267 uint16_t qpitch; /**< RENDER_SURFACE_STATE.QPitch */
1268
1269 /**
1270 * \name Alignment of miptree images, in units of pixels.
1271 *
1272 * These fields contain the real alignment values, not the values to be
1273 * given to the GPU. For example, if h_align is 4, then program the GPU
1274 * with HALIGN_4.
1275 * \{
1276 */
1277 uint8_t h_align; /**< RENDER_SURFACE_STATE.SurfaceHorizontalAlignment */
1278 uint8_t v_align; /**< RENDER_SURFACE_STATE.SurfaceVerticalAlignment */
1279 /** \} */
1280
1281 enum isl_tiling tiling;
1282 };
1283
1284 struct anv_image {
1285 VkImageType type;
1286 const struct anv_format *format;
1287 VkExtent3D extent;
1288 uint32_t levels;
1289 uint32_t array_size;
1290 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1291
1292 VkDeviceSize size;
1293 uint32_t alignment;
1294
1295 /* Set when bound */
1296 struct anv_bo *bo;
1297 VkDeviceSize offset;
1298
1299 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1300
1301 bool needs_nonrt_surface_state:1;
1302 bool needs_color_rt_surface_state:1;
1303
1304 /**
1305 * Image subsurfaces
1306 *
1307 * For each foo, anv_image::foo_surface is valid if and only if
1308 * anv_image::format has a foo aspect.
1309 *
1310 * The hardware requires that the depth buffer and stencil buffer be
1311 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1312 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1313 * allocate the depth and stencil buffers as separate surfaces in the same
1314 * bo.
1315 */
1316 union {
1317 struct anv_surface color_surface;
1318
1319 struct {
1320 struct anv_surface depth_surface;
1321 struct anv_surface stencil_surface;
1322 };
1323 };
1324 };
1325
1326 struct anv_image_view {
1327 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1328 const struct anv_format *format; /**< VkImageViewCreateInfo::format */
1329 struct anv_bo *bo;
1330 uint32_t offset; /**< Offset into bo. */
1331 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1332
1333 /** RENDER_SURFACE_STATE when using image as a color render target. */
1334 struct anv_state color_rt_surface_state;
1335
1336 /** RENDER_SURFACE_STATE when using image as a non render target. */
1337 struct anv_state nonrt_surface_state;
1338 };
1339
1340 struct anv_image_create_info {
1341 const VkImageCreateInfo *vk_info;
1342 bool force_tiling;
1343 enum isl_tiling tiling;
1344 uint32_t stride;
1345 };
1346
1347 VkResult anv_image_create(VkDevice _device,
1348 const struct anv_image_create_info *info,
1349 VkImage *pImage);
1350
1351 struct anv_surface *
1352 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1353 VkImageAspectFlags aspect_mask);
1354
1355 void anv_image_view_init(struct anv_image_view *view,
1356 struct anv_device *device,
1357 const VkImageViewCreateInfo* pCreateInfo,
1358 struct anv_cmd_buffer *cmd_buffer);
1359
1360 void
1361 gen7_image_view_init(struct anv_image_view *iview,
1362 struct anv_device *device,
1363 const VkImageViewCreateInfo* pCreateInfo,
1364 struct anv_cmd_buffer *cmd_buffer);
1365
1366 void
1367 gen8_image_view_init(struct anv_image_view *iview,
1368 struct anv_device *device,
1369 const VkImageViewCreateInfo* pCreateInfo,
1370 struct anv_cmd_buffer *cmd_buffer);
1371
1372 void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
1373 const struct anv_format *format,
1374 uint32_t offset, uint32_t range,
1375 uint32_t stride);
1376
1377 void gen7_fill_buffer_surface_state(void *state, const struct anv_format *format,
1378 uint32_t offset, uint32_t range,
1379 uint32_t stride);
1380 void gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
1381 uint32_t offset, uint32_t range,
1382 uint32_t stride);
1383
1384 struct anv_sampler {
1385 uint32_t state[4];
1386 };
1387
1388 struct anv_framebuffer {
1389 uint32_t width;
1390 uint32_t height;
1391 uint32_t layers;
1392
1393 uint32_t attachment_count;
1394 const struct anv_image_view * attachments[0];
1395 };
1396
1397 struct anv_subpass {
1398 uint32_t input_count;
1399 uint32_t * input_attachments;
1400 uint32_t color_count;
1401 uint32_t * color_attachments;
1402 uint32_t * resolve_attachments;
1403 uint32_t depth_stencil_attachment;
1404 };
1405
1406 struct anv_render_pass_attachment {
1407 const struct anv_format *format;
1408 uint32_t samples;
1409 VkAttachmentLoadOp load_op;
1410 VkAttachmentLoadOp stencil_load_op;
1411 };
1412
1413 struct anv_render_pass {
1414 uint32_t attachment_count;
1415 uint32_t subpass_count;
1416 struct anv_render_pass_attachment * attachments;
1417 struct anv_subpass subpasses[0];
1418 };
1419
1420 extern struct anv_render_pass anv_meta_dummy_renderpass;
1421
1422 struct anv_query_pool_slot {
1423 uint64_t begin;
1424 uint64_t end;
1425 uint64_t available;
1426 };
1427
1428 struct anv_query_pool {
1429 VkQueryType type;
1430 uint32_t slots;
1431 struct anv_bo bo;
1432 };
1433
1434 void anv_device_init_meta(struct anv_device *device);
1435 void anv_device_finish_meta(struct anv_device *device);
1436
1437 void *anv_lookup_entrypoint(const char *name);
1438
1439 void anv_dump_image_to_ppm(struct anv_device *device,
1440 struct anv_image *image, unsigned miplevel,
1441 unsigned array_layer, const char *filename);
1442
1443 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1444 \
1445 static inline struct __anv_type * \
1446 __anv_type ## _from_handle(__VkType _handle) \
1447 { \
1448 return (struct __anv_type *) _handle; \
1449 } \
1450 \
1451 static inline __VkType \
1452 __anv_type ## _to_handle(struct __anv_type *_obj) \
1453 { \
1454 return (__VkType) _obj; \
1455 }
1456
1457 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1458 \
1459 static inline struct __anv_type * \
1460 __anv_type ## _from_handle(__VkType _handle) \
1461 { \
1462 return (struct __anv_type *) _handle.handle; \
1463 } \
1464 \
1465 static inline __VkType \
1466 __anv_type ## _to_handle(struct __anv_type *_obj) \
1467 { \
1468 return (__VkType) { .handle = (uint64_t) _obj }; \
1469 }
1470
1471 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1472 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1473
1474 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCmdBuffer)
1475 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1476 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1477 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1478 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1479
1480 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCmdPool)
1481 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1482 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1483 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1484 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1485 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1486 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1487 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1488 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1489 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1490 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1491 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1492 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1493 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1494 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader, VkShader)
1495 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1496
1497 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1498 \
1499 static inline const __VkType * \
1500 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1501 { \
1502 return (const __VkType *) __anv_obj; \
1503 }
1504
1505 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1506 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1507
1508 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1509 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1510 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1511
1512 #ifdef __cplusplus
1513 }
1514 #endif