vk/0.210.0: Remove the VkShaderStage enum
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <i915_drm.h>
32
33 #ifdef HAVE_VALGRIND
34 #include <valgrind.h>
35 #include <memcheck.h>
36 #define VG(x) x
37 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
38 #else
39 #define VG(x)
40 #endif
41
42 #include "brw_device_info.h"
43 #include "util/macros.h"
44 #include "util/list.h"
45
46 #define VK_PROTOTYPES
47 #include <vulkan/vulkan.h>
48 #include <vulkan/vulkan_intel.h>
49 #include <vulkan/vk_ext_khr_swapchain.h>
50 #include <vulkan/vk_ext_khr_device_swapchain.h>
51
52 #include "anv_entrypoints.h"
53 #include "anv_gen_macros.h"
54 #include "brw_context.h"
55 #include "isl.h"
56
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60
61 #define ICD_LOADER_MAGIC 0x01CDC0DE
62
63 typedef union _VK_LOADER_DATA {
64 uintptr_t loaderMagic;
65 void *loaderData;
66 } VK_LOADER_DATA;
67
68 #define anv_noreturn __attribute__((__noreturn__))
69 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
70
71 #define MIN(a, b) ((a) < (b) ? (a) : (b))
72 #define MAX(a, b) ((a) > (b) ? (a) : (b))
73
74 static inline uint32_t
75 align_u32(uint32_t v, uint32_t a)
76 {
77 return (v + a - 1) & ~(a - 1);
78 }
79
80 static inline int32_t
81 align_i32(int32_t v, int32_t a)
82 {
83 return (v + a - 1) & ~(a - 1);
84 }
85
86 /** Alignment must be a power of 2. */
87 static inline bool
88 anv_is_aligned(uintmax_t n, uintmax_t a)
89 {
90 assert(a == (a & -a));
91 return (n & (a - 1)) == 0;
92 }
93
94 static inline uint32_t
95 anv_minify(uint32_t n, uint32_t levels)
96 {
97 if (unlikely(n == 0))
98 return 0;
99 else
100 return MAX(n >> levels, 1);
101 }
102
103 static inline float
104 anv_clamp_f(float f, float min, float max)
105 {
106 assert(min < max);
107
108 if (f > max)
109 return max;
110 else if (f < min)
111 return min;
112 else
113 return f;
114 }
115
116 static inline bool
117 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
118 {
119 if (*inout_mask & clear_mask) {
120 *inout_mask &= ~clear_mask;
121 return true;
122 } else {
123 return false;
124 }
125 }
126
127 #define for_each_bit(b, dword) \
128 for (uint32_t __dword = (dword); \
129 (b) = __builtin_ffs(__dword) - 1, __dword; \
130 __dword &= ~(1 << (b)))
131
132 #define typed_memcpy(dest, src, count) ({ \
133 static_assert(sizeof(*src) == sizeof(*dest), ""); \
134 memcpy((dest), (src), (count) * sizeof(*(src))); \
135 })
136
137 /* Define no kernel as 1, since that's an illegal offset for a kernel */
138 #define NO_KERNEL 1
139
140 struct anv_common {
141 VkStructureType sType;
142 const void* pNext;
143 };
144
145 /* Whenever we generate an error, pass it through this function. Useful for
146 * debugging, where we can break on it. Only call at error site, not when
147 * propagating errors. Might be useful to plug in a stack trace here.
148 */
149
150 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
151
152 #ifdef DEBUG
153 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
154 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
155 #else
156 #define vk_error(error) error
157 #define vk_errorf(error, format, ...) error
158 #endif
159
160 void __anv_finishme(const char *file, int line, const char *format, ...)
161 anv_printflike(3, 4);
162 void anv_loge(const char *format, ...) anv_printflike(1, 2);
163 void anv_loge_v(const char *format, va_list va);
164
165 /**
166 * Print a FINISHME message, including its source location.
167 */
168 #define anv_finishme(format, ...) \
169 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
170
171 /* A non-fatal assert. Useful for debugging. */
172 #ifdef DEBUG
173 #define anv_assert(x) ({ \
174 if (unlikely(!(x))) \
175 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
176 })
177 #else
178 #define anv_assert(x)
179 #endif
180
181 /**
182 * If a block of code is annotated with anv_validate, then the block runs only
183 * in debug builds.
184 */
185 #ifdef DEBUG
186 #define anv_validate if (1)
187 #else
188 #define anv_validate if (0)
189 #endif
190
191 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
192 void anv_abortfv(const char *format, va_list va) anv_noreturn;
193
194 #define stub_return(v) \
195 do { \
196 anv_finishme("stub %s", __func__); \
197 return (v); \
198 } while (0)
199
200 #define stub() \
201 do { \
202 anv_finishme("stub %s", __func__); \
203 return; \
204 } while (0)
205
206 /**
207 * A dynamically growable, circular buffer. Elements are added at head and
208 * removed from tail. head and tail are free-running uint32_t indices and we
209 * only compute the modulo with size when accessing the array. This way,
210 * number of bytes in the queue is always head - tail, even in case of
211 * wraparound.
212 */
213
214 struct anv_vector {
215 uint32_t head;
216 uint32_t tail;
217 uint32_t element_size;
218 uint32_t size;
219 void *data;
220 };
221
222 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
223 void *anv_vector_add(struct anv_vector *queue);
224 void *anv_vector_remove(struct anv_vector *queue);
225
226 static inline int
227 anv_vector_length(struct anv_vector *queue)
228 {
229 return (queue->head - queue->tail) / queue->element_size;
230 }
231
232 static inline void *
233 anv_vector_head(struct anv_vector *vector)
234 {
235 assert(vector->tail < vector->head);
236 return (void *)((char *)vector->data +
237 ((vector->head - vector->element_size) &
238 (vector->size - 1)));
239 }
240
241 static inline void *
242 anv_vector_tail(struct anv_vector *vector)
243 {
244 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
245 }
246
247 static inline void
248 anv_vector_finish(struct anv_vector *queue)
249 {
250 free(queue->data);
251 }
252
253 #define anv_vector_foreach(elem, queue) \
254 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
255 for (uint32_t __anv_vector_offset = (queue)->tail; \
256 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
257 __anv_vector_offset += (queue)->element_size)
258
259 struct anv_bo {
260 int gem_handle;
261
262 /* Index into the current validation list. This is used by the
263 * validation list building alrogithm to track which buffers are already
264 * in the validation list so that we can ensure uniqueness.
265 */
266 uint32_t index;
267
268 /* Last known offset. This value is provided by the kernel when we
269 * execbuf and is used as the presumed offset for the next bunch of
270 * relocations.
271 */
272 uint64_t offset;
273
274 uint64_t size;
275 void *map;
276 };
277
278 /* Represents a lock-free linked list of "free" things. This is used by
279 * both the block pool and the state pools. Unfortunately, in order to
280 * solve the ABA problem, we can't use a single uint32_t head.
281 */
282 union anv_free_list {
283 struct {
284 int32_t offset;
285
286 /* A simple count that is incremented every time the head changes. */
287 uint32_t count;
288 };
289 uint64_t u64;
290 };
291
292 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
293
294 struct anv_block_state {
295 union {
296 struct {
297 uint32_t next;
298 uint32_t end;
299 };
300 uint64_t u64;
301 };
302 };
303
304 struct anv_block_pool {
305 struct anv_device *device;
306
307 struct anv_bo bo;
308
309 /* The offset from the start of the bo to the "center" of the block
310 * pool. Pointers to allocated blocks are given by
311 * bo.map + center_bo_offset + offsets.
312 */
313 uint32_t center_bo_offset;
314
315 /* Current memory map of the block pool. This pointer may or may not
316 * point to the actual beginning of the block pool memory. If
317 * anv_block_pool_alloc_back has ever been called, then this pointer
318 * will point to the "center" position of the buffer and all offsets
319 * (negative or positive) given out by the block pool alloc functions
320 * will be valid relative to this pointer.
321 *
322 * In particular, map == bo.map + center_offset
323 */
324 void *map;
325 int fd;
326
327 /**
328 * Array of mmaps and gem handles owned by the block pool, reclaimed when
329 * the block pool is destroyed.
330 */
331 struct anv_vector mmap_cleanups;
332
333 uint32_t block_size;
334
335 union anv_free_list free_list;
336 struct anv_block_state state;
337
338 union anv_free_list back_free_list;
339 struct anv_block_state back_state;
340 };
341
342 /* Block pools are backed by a fixed-size 2GB memfd */
343 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
344
345 /* The center of the block pool is also the middle of the memfd. This may
346 * change in the future if we decide differently for some reason.
347 */
348 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
349
350 static inline uint32_t
351 anv_block_pool_size(struct anv_block_pool *pool)
352 {
353 return pool->state.end + pool->back_state.end;
354 }
355
356 struct anv_state {
357 int32_t offset;
358 uint32_t alloc_size;
359 void *map;
360 };
361
362 struct anv_fixed_size_state_pool {
363 size_t state_size;
364 union anv_free_list free_list;
365 struct anv_block_state block;
366 };
367
368 #define ANV_MIN_STATE_SIZE_LOG2 6
369 #define ANV_MAX_STATE_SIZE_LOG2 10
370
371 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
372
373 struct anv_state_pool {
374 struct anv_block_pool *block_pool;
375 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
376 };
377
378 struct anv_state_stream {
379 struct anv_block_pool *block_pool;
380 uint32_t next;
381 uint32_t current_block;
382 uint32_t end;
383 };
384
385 void anv_block_pool_init(struct anv_block_pool *pool,
386 struct anv_device *device, uint32_t block_size);
387 void anv_block_pool_finish(struct anv_block_pool *pool);
388 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
389 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
390 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
391 void anv_state_pool_init(struct anv_state_pool *pool,
392 struct anv_block_pool *block_pool);
393 void anv_state_pool_finish(struct anv_state_pool *pool);
394 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
395 size_t state_size, size_t alignment);
396 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
397 void anv_state_stream_init(struct anv_state_stream *stream,
398 struct anv_block_pool *block_pool);
399 void anv_state_stream_finish(struct anv_state_stream *stream);
400 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
401 uint32_t size, uint32_t alignment);
402
403 /**
404 * Implements a pool of re-usable BOs. The interface is identical to that
405 * of block_pool except that each block is its own BO.
406 */
407 struct anv_bo_pool {
408 struct anv_device *device;
409
410 uint32_t bo_size;
411
412 void *free_list;
413 };
414
415 void anv_bo_pool_init(struct anv_bo_pool *pool,
416 struct anv_device *device, uint32_t block_size);
417 void anv_bo_pool_finish(struct anv_bo_pool *pool);
418 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
419 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
420
421
422 void *anv_resolve_entrypoint(uint32_t index);
423
424 extern struct anv_dispatch_table dtable;
425
426 #define ANV_CALL(func) ({ \
427 if (dtable.func == NULL) { \
428 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
429 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
430 } \
431 dtable.func; \
432 })
433
434 static inline void *
435 anv_alloc(const VkAllocationCallbacks *alloc,
436 size_t size, size_t align,
437 VkSystemAllocationScope scope)
438 {
439 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
440 }
441
442 static inline void *
443 anv_realloc(const VkAllocationCallbacks *alloc,
444 void *ptr, size_t size, size_t align,
445 VkSystemAllocationScope scope)
446 {
447 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
448 }
449
450 static inline void
451 anv_free(const VkAllocationCallbacks *alloc, void *data)
452 {
453 alloc->pfnFree(alloc->pUserData, data);
454 }
455
456 static inline void *
457 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
458 const VkAllocationCallbacks *alloc,
459 size_t size, size_t align,
460 VkSystemAllocationScope scope)
461 {
462 if (alloc)
463 return anv_alloc(alloc, size, align, scope);
464 else
465 return anv_alloc(parent_alloc, size, align, scope);
466 }
467
468 static inline void
469 anv_free2(const VkAllocationCallbacks *parent_alloc,
470 const VkAllocationCallbacks *alloc,
471 void *data)
472 {
473 if (alloc)
474 anv_free(alloc, data);
475 else
476 anv_free(parent_alloc, data);
477 }
478
479 struct anv_physical_device {
480 VK_LOADER_DATA _loader_data;
481
482 struct anv_instance * instance;
483 uint32_t chipset_id;
484 const char * path;
485 const char * name;
486 const struct brw_device_info * info;
487 uint64_t aperture_size;
488 struct brw_compiler * compiler;
489 struct isl_device isl_dev;
490 };
491
492 struct anv_instance {
493 VK_LOADER_DATA _loader_data;
494
495 VkAllocationCallbacks alloc;
496
497 uint32_t apiVersion;
498 int physicalDeviceCount;
499 struct anv_physical_device physicalDevice;
500
501 struct anv_wsi_implementation * wsi_impl[VK_PLATFORM_NUM_KHR];
502 };
503
504 VkResult anv_init_wsi(struct anv_instance *instance);
505 void anv_finish_wsi(struct anv_instance *instance);
506
507 struct anv_meta_state {
508 struct {
509 struct anv_pipeline *color_pipeline;
510 struct anv_pipeline *depth_only_pipeline;
511 struct anv_pipeline *stencil_only_pipeline;
512 struct anv_pipeline *depthstencil_pipeline;
513 } clear;
514
515 struct {
516 VkRenderPass render_pass;
517
518 /** Pipeline that blits from a 2D image. */
519 VkPipeline pipeline_2d_src;
520
521 /** Pipeline that blits from a 3D image. */
522 VkPipeline pipeline_3d_src;
523
524 VkPipelineLayout pipeline_layout;
525 VkDescriptorSetLayout ds_layout;
526 } blit;
527 };
528
529 struct anv_queue {
530 VK_LOADER_DATA _loader_data;
531
532 struct anv_device * device;
533
534 struct anv_state_pool * pool;
535 };
536
537 struct anv_device {
538 VK_LOADER_DATA _loader_data;
539
540 VkAllocationCallbacks alloc;
541
542 struct anv_instance * instance;
543 uint32_t chipset_id;
544 struct brw_device_info info;
545 struct isl_device isl_dev;
546 int context_id;
547 int fd;
548
549 struct anv_bo_pool batch_bo_pool;
550
551 struct anv_block_pool dynamic_state_block_pool;
552 struct anv_state_pool dynamic_state_pool;
553
554 struct anv_block_pool instruction_block_pool;
555 struct anv_block_pool surface_state_block_pool;
556 struct anv_state_pool surface_state_pool;
557
558 struct anv_bo workaround_bo;
559
560 struct anv_meta_state meta_state;
561
562 struct anv_state border_colors;
563
564 struct anv_queue queue;
565
566 struct anv_block_pool scratch_block_pool;
567
568 pthread_mutex_t mutex;
569 };
570
571 void* anv_gem_mmap(struct anv_device *device,
572 uint32_t gem_handle, uint64_t offset, uint64_t size);
573 void anv_gem_munmap(void *p, uint64_t size);
574 uint32_t anv_gem_create(struct anv_device *device, size_t size);
575 void anv_gem_close(struct anv_device *device, int gem_handle);
576 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
577 int anv_gem_wait(struct anv_device *device, int gem_handle, int64_t *timeout_ns);
578 int anv_gem_execbuffer(struct anv_device *device,
579 struct drm_i915_gem_execbuffer2 *execbuf);
580 int anv_gem_set_tiling(struct anv_device *device, int gem_handle,
581 uint32_t stride, uint32_t tiling);
582 int anv_gem_create_context(struct anv_device *device);
583 int anv_gem_destroy_context(struct anv_device *device, int context);
584 int anv_gem_get_param(int fd, uint32_t param);
585 int anv_gem_get_aperture(int fd, uint64_t *size);
586 int anv_gem_handle_to_fd(struct anv_device *device, int gem_handle);
587 int anv_gem_fd_to_handle(struct anv_device *device, int fd);
588 int anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
589
590 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
591
592 struct anv_reloc_list {
593 size_t num_relocs;
594 size_t array_length;
595 struct drm_i915_gem_relocation_entry * relocs;
596 struct anv_bo ** reloc_bos;
597 };
598
599 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
600 const VkAllocationCallbacks *alloc);
601 void anv_reloc_list_finish(struct anv_reloc_list *list,
602 const VkAllocationCallbacks *alloc);
603
604 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
605 const VkAllocationCallbacks *alloc,
606 uint32_t offset, struct anv_bo *target_bo,
607 uint32_t delta);
608
609 struct anv_batch_bo {
610 /* Link in the anv_cmd_buffer.owned_batch_bos list */
611 struct list_head link;
612
613 struct anv_bo bo;
614
615 /* Bytes actually consumed in this batch BO */
616 size_t length;
617
618 /* Last seen surface state block pool bo offset */
619 uint32_t last_ss_pool_bo_offset;
620
621 struct anv_reloc_list relocs;
622 };
623
624 struct anv_batch {
625 const VkAllocationCallbacks * alloc;
626
627 void * start;
628 void * end;
629 void * next;
630
631 struct anv_reloc_list * relocs;
632
633 /* This callback is called (with the associated user data) in the event
634 * that the batch runs out of space.
635 */
636 VkResult (*extend_cb)(struct anv_batch *, void *);
637 void * user_data;
638 };
639
640 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
641 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
642 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
643 void *location, struct anv_bo *bo, uint32_t offset);
644
645 struct anv_address {
646 struct anv_bo *bo;
647 uint32_t offset;
648 };
649
650 #define __gen_address_type struct anv_address
651 #define __gen_user_data struct anv_batch
652
653 static inline uint64_t
654 __gen_combine_address(struct anv_batch *batch, void *location,
655 const struct anv_address address, uint32_t delta)
656 {
657 if (address.bo == NULL) {
658 return address.offset + delta;
659 } else {
660 assert(batch->start <= location && location < batch->end);
661
662 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
663 }
664 }
665
666 /* Wrapper macros needed to work around preprocessor argument issues. In
667 * particular, arguments don't get pre-evaluated if they are concatenated.
668 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
669 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
670 * We can work around this easily enough with these helpers.
671 */
672 #define __anv_cmd_length(cmd) cmd ## _length
673 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
674 #define __anv_cmd_header(cmd) cmd ## _header
675 #define __anv_cmd_pack(cmd) cmd ## _pack
676
677 #define anv_batch_emit(batch, cmd, ...) do { \
678 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
679 struct cmd __template = { \
680 __anv_cmd_header(cmd), \
681 __VA_ARGS__ \
682 }; \
683 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
684 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
685 } while (0)
686
687 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
688 void *__dst = anv_batch_emit_dwords(batch, n); \
689 struct cmd __template = { \
690 __anv_cmd_header(cmd), \
691 .DwordLength = n - __anv_cmd_length_bias(cmd), \
692 __VA_ARGS__ \
693 }; \
694 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
695 __dst; \
696 })
697
698 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
699 do { \
700 uint32_t *dw; \
701 \
702 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
703 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
704 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
705 dw[i] = (dwords0)[i] | (dwords1)[i]; \
706 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
707 } while (0)
708
709 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
710 .GraphicsDataTypeGFDT = 0, \
711 .LLCCacheabilityControlLLCCC = 0, \
712 .L3CacheabilityControlL3CC = 1, \
713 }
714
715 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
716 .LLCeLLCCacheabilityControlLLCCC = 0, \
717 .L3CacheabilityControlL3CC = 1, \
718 }
719
720 #define GEN8_MOCS { \
721 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
722 .TargetCache = L3DefertoPATforLLCeLLCselection, \
723 .AgeforQUADLRU = 0 \
724 }
725
726 /* Skylake: MOCS is now an index into an array of 62 different caching
727 * configurations programmed by the kernel.
728 */
729
730 #define GEN9_MOCS { \
731 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
732 .IndextoMOCSTables = 2 \
733 }
734
735 #define GEN9_MOCS_PTE { \
736 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
737 .IndextoMOCSTables = 1 \
738 }
739
740 struct anv_device_memory {
741 struct anv_bo bo;
742 VkDeviceSize map_size;
743 void * map;
744 };
745
746 /**
747 * Header for Vertex URB Entry (VUE)
748 */
749 struct anv_vue_header {
750 uint32_t Reserved;
751 uint32_t RTAIndex; /* RenderTargetArrayIndex */
752 uint32_t ViewportIndex;
753 float PointWidth;
754 };
755
756 struct anv_descriptor_set_binding_layout {
757 /* Number of array elements in this binding */
758 uint16_t array_size;
759
760 /* Index into the flattend descriptor set */
761 uint16_t descriptor_index;
762
763 /* Index into the dynamic state array for a dynamic buffer */
764 int16_t dynamic_offset_index;
765
766 struct {
767 /* Index into the binding table for the associated surface */
768 int16_t surface_index;
769
770 /* Index into the sampler table for the associated sampler */
771 int16_t sampler_index;
772 } stage[MESA_SHADER_STAGES];
773
774 /* Immutable samplers (or NULL if no immutable samplers) */
775 struct anv_sampler **immutable_samplers;
776 };
777
778 struct anv_descriptor_set_layout {
779 /* Number of bindings in this descriptor set */
780 uint16_t binding_count;
781
782 /* Total size of the descriptor set with room for all array entries */
783 uint16_t size;
784
785 /* Shader stages affected by this descriptor set */
786 uint16_t shader_stages;
787
788 /* Number of dynamic offsets used by this descriptor set */
789 uint16_t dynamic_offset_count;
790
791 /* Bindings in this descriptor set */
792 struct anv_descriptor_set_binding_layout binding[0];
793 };
794
795 struct anv_descriptor {
796 VkDescriptorType type;
797
798 union {
799 struct {
800 union {
801 struct anv_image_view *image_view;
802 };
803 struct anv_sampler *sampler;
804 };
805
806 struct {
807 struct anv_buffer *buffer;
808 uint64_t offset;
809 uint64_t range;
810 };
811 };
812 };
813
814 struct anv_descriptor_set {
815 const struct anv_descriptor_set_layout *layout;
816 struct anv_descriptor descriptors[0];
817 };
818
819 VkResult
820 anv_descriptor_set_create(struct anv_device *device,
821 const struct anv_descriptor_set_layout *layout,
822 struct anv_descriptor_set **out_set);
823
824 void
825 anv_descriptor_set_destroy(struct anv_device *device,
826 struct anv_descriptor_set *set);
827
828 #define MAX_VBS 32
829 #define MAX_SETS 8
830 #define MAX_RTS 8
831 #define MAX_VIEWPORTS 16
832 #define MAX_SCISSORS 16
833 #define MAX_PUSH_CONSTANTS_SIZE 128
834 #define MAX_DYNAMIC_BUFFERS 16
835 #define MAX_IMAGES 8
836
837 struct anv_pipeline_binding {
838 /* The descriptor set this surface corresponds to */
839 uint16_t set;
840
841 /* Offset into the descriptor set */
842 uint16_t offset;
843 };
844
845 struct anv_pipeline_layout {
846 struct {
847 struct anv_descriptor_set_layout *layout;
848 uint32_t dynamic_offset_start;
849 struct {
850 uint32_t surface_start;
851 uint32_t sampler_start;
852 } stage[MESA_SHADER_STAGES];
853 } set[MAX_SETS];
854
855 uint32_t num_sets;
856
857 struct {
858 bool has_dynamic_offsets;
859 uint32_t surface_count;
860 struct anv_pipeline_binding *surface_to_descriptor;
861 uint32_t sampler_count;
862 struct anv_pipeline_binding *sampler_to_descriptor;
863 } stage[MESA_SHADER_STAGES];
864
865 struct anv_pipeline_binding entries[0];
866 };
867
868 struct anv_buffer {
869 struct anv_device * device;
870 VkDeviceSize size;
871
872 /* Set when bound */
873 struct anv_bo * bo;
874 VkDeviceSize offset;
875 };
876
877 enum anv_cmd_dirty_bits {
878 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
879 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
880 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
881 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
882 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
883 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
884 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
885 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
886 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
887 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
888 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
889 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
890 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
891 };
892 typedef uint32_t anv_cmd_dirty_mask_t;
893
894 struct anv_vertex_binding {
895 struct anv_buffer * buffer;
896 VkDeviceSize offset;
897 };
898
899 struct anv_push_constants {
900 /* Current allocated size of this push constants data structure.
901 * Because a decent chunk of it may not be used (images on SKL, for
902 * instance), we won't actually allocate the entire structure up-front.
903 */
904 uint32_t size;
905
906 /* Push constant data provided by the client through vkPushConstants */
907 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
908
909 /* Our hardware only provides zero-based vertex and instance id so, in
910 * order to satisfy the vulkan requirements, we may have to push one or
911 * both of these into the shader.
912 */
913 uint32_t base_vertex;
914 uint32_t base_instance;
915
916 /* Offsets and ranges for dynamically bound buffers */
917 struct {
918 uint32_t offset;
919 uint32_t range;
920 } dynamic[MAX_DYNAMIC_BUFFERS];
921
922 /* Image data for image_load_store on pre-SKL */
923 struct brw_image_param images[MAX_IMAGES];
924 };
925
926 struct anv_dynamic_state {
927 struct {
928 uint32_t count;
929 VkViewport viewports[MAX_VIEWPORTS];
930 } viewport;
931
932 struct {
933 uint32_t count;
934 VkRect2D scissors[MAX_SCISSORS];
935 } scissor;
936
937 float line_width;
938
939 struct {
940 float bias;
941 float clamp;
942 float slope;
943 } depth_bias;
944
945 float blend_constants[4];
946
947 struct {
948 float min;
949 float max;
950 } depth_bounds;
951
952 struct {
953 uint32_t front;
954 uint32_t back;
955 } stencil_compare_mask;
956
957 struct {
958 uint32_t front;
959 uint32_t back;
960 } stencil_write_mask;
961
962 struct {
963 uint32_t front;
964 uint32_t back;
965 } stencil_reference;
966 };
967
968 extern const struct anv_dynamic_state default_dynamic_state;
969
970 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
971 const struct anv_dynamic_state *src,
972 uint32_t copy_mask);
973
974 /** State required while building cmd buffer */
975 struct anv_cmd_state {
976 uint32_t current_pipeline;
977 uint32_t vb_dirty;
978 anv_cmd_dirty_mask_t dirty;
979 anv_cmd_dirty_mask_t compute_dirty;
980 VkShaderStageFlags descriptors_dirty;
981 VkShaderStageFlags push_constants_dirty;
982 uint32_t scratch_size;
983 struct anv_pipeline * pipeline;
984 struct anv_pipeline * compute_pipeline;
985 struct anv_framebuffer * framebuffer;
986 struct anv_render_pass * pass;
987 struct anv_subpass * subpass;
988 uint32_t restart_index;
989 struct anv_vertex_binding vertex_bindings[MAX_VBS];
990 struct anv_descriptor_set * descriptors[MAX_SETS];
991 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
992 struct anv_dynamic_state dynamic;
993
994 struct {
995 struct anv_buffer * index_buffer;
996 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
997 uint32_t index_offset;
998 } gen7;
999 };
1000
1001 struct anv_cmd_pool {
1002 VkAllocationCallbacks alloc;
1003 struct list_head cmd_buffers;
1004 };
1005
1006 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1007
1008 enum anv_cmd_buffer_exec_mode {
1009 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1010 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1011 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1012 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1013 };
1014
1015 struct anv_cmd_buffer {
1016 VK_LOADER_DATA _loader_data;
1017
1018 struct anv_device * device;
1019
1020 struct anv_cmd_pool * pool;
1021 struct list_head pool_link;
1022
1023 struct anv_batch batch;
1024
1025 /* Fields required for the actual chain of anv_batch_bo's.
1026 *
1027 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1028 */
1029 struct list_head batch_bos;
1030 enum anv_cmd_buffer_exec_mode exec_mode;
1031
1032 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1033 * referenced by this command buffer
1034 *
1035 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1036 */
1037 struct anv_vector seen_bbos;
1038
1039 /* A vector of int32_t's for every block of binding tables.
1040 *
1041 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1042 */
1043 struct anv_vector bt_blocks;
1044 uint32_t bt_next;
1045 struct anv_reloc_list surface_relocs;
1046
1047 /* Information needed for execbuf
1048 *
1049 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1050 */
1051 struct {
1052 struct drm_i915_gem_execbuffer2 execbuf;
1053
1054 struct drm_i915_gem_exec_object2 * objects;
1055 uint32_t bo_count;
1056 struct anv_bo ** bos;
1057
1058 /* Allocated length of the 'objects' and 'bos' arrays */
1059 uint32_t array_length;
1060
1061 bool need_reloc;
1062 } execbuf2;
1063
1064 /* Serial for tracking buffer completion */
1065 uint32_t serial;
1066
1067 /* Stream objects for storing temporary data */
1068 struct anv_state_stream surface_state_stream;
1069 struct anv_state_stream dynamic_state_stream;
1070
1071 VkCommandBufferUsageFlags usage_flags;
1072 VkCommandBufferLevel level;
1073
1074 struct anv_cmd_state state;
1075 };
1076
1077 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1078 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1079 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1080 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1081 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1082 struct anv_cmd_buffer *secondary);
1083 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1084
1085 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1086 unsigned stage, struct anv_state *bt_state);
1087 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1088 unsigned stage, struct anv_state *state);
1089 void gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1090
1091 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1092 uint32_t *a, uint32_t dwords,
1093 uint32_t alignment);
1094 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1095 uint32_t *a, uint32_t *b,
1096 uint32_t dwords, uint32_t alignment);
1097 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1098 struct anv_subpass *subpass);
1099
1100 struct anv_address
1101 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1102 struct anv_state
1103 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1104 uint32_t entries, uint32_t *state_offset);
1105 struct anv_state
1106 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1107 struct anv_state
1108 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1109 uint32_t size, uint32_t alignment);
1110
1111 VkResult
1112 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1113
1114 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1115 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1116
1117 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1118 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1119 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1120 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1121
1122 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1123
1124 void gen7_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1125 struct anv_subpass *subpass);
1126
1127 void gen8_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1128 struct anv_subpass *subpass);
1129 void gen9_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1130 struct anv_subpass *subpass);
1131
1132 void anv_cmd_buffer_begin_subpass(struct anv_cmd_buffer *cmd_buffer,
1133 struct anv_subpass *subpass);
1134
1135 struct anv_state
1136 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1137 gl_shader_stage stage);
1138
1139 void anv_cmd_buffer_clear_attachments(struct anv_cmd_buffer *cmd_buffer,
1140 struct anv_render_pass *pass,
1141 const VkClearValue *clear_values);
1142 const struct anv_image_view *
1143 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1144
1145 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1146
1147 struct anv_fence {
1148 struct anv_bo bo;
1149 struct drm_i915_gem_execbuffer2 execbuf;
1150 struct drm_i915_gem_exec_object2 exec2_objects[1];
1151 bool ready;
1152 };
1153
1154 struct nir_shader;
1155
1156 struct anv_shader_module {
1157 struct nir_shader * nir;
1158
1159 uint32_t size;
1160 char data[0];
1161 };
1162
1163 static inline gl_shader_stage
1164 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1165 {
1166 assert(__builtin_popcount(vk_stage) == 1);
1167 return ffs(vk_stage) - 1;
1168 }
1169
1170 static inline VkShaderStageFlagBits
1171 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1172 {
1173 return (1 << mesa_stage);
1174 }
1175
1176 #define anv_foreach_stage(stage, stage_bits) \
1177 for (gl_shader_stage stage, __tmp = (gl_shader_stage)(stage_bits);\
1178 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1179 __tmp &= ~(1 << (stage)))
1180
1181 struct anv_pipeline {
1182 struct anv_device * device;
1183 struct anv_batch batch;
1184 uint32_t batch_data[512];
1185 struct anv_reloc_list batch_relocs;
1186 uint32_t dynamic_state_mask;
1187 struct anv_dynamic_state dynamic_state;
1188
1189 struct anv_pipeline_layout * layout;
1190 bool use_repclear;
1191
1192 struct brw_vs_prog_data vs_prog_data;
1193 struct brw_wm_prog_data wm_prog_data;
1194 struct brw_gs_prog_data gs_prog_data;
1195 struct brw_cs_prog_data cs_prog_data;
1196 bool writes_point_size;
1197 struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
1198 uint32_t scratch_start[MESA_SHADER_STAGES];
1199 uint32_t total_scratch;
1200 struct {
1201 uint32_t vs_start;
1202 uint32_t vs_size;
1203 uint32_t nr_vs_entries;
1204 uint32_t gs_start;
1205 uint32_t gs_size;
1206 uint32_t nr_gs_entries;
1207 } urb;
1208
1209 VkShaderStageFlags active_stages;
1210 struct anv_state_stream program_stream;
1211 struct anv_state blend_state;
1212 uint32_t vs_simd8;
1213 uint32_t vs_vec4;
1214 uint32_t ps_simd8;
1215 uint32_t ps_simd16;
1216 uint32_t ps_ksp0;
1217 uint32_t ps_ksp2;
1218 uint32_t ps_grf_start0;
1219 uint32_t ps_grf_start2;
1220 uint32_t gs_vec4;
1221 uint32_t gs_vertex_count;
1222 uint32_t cs_simd;
1223
1224 uint32_t vb_used;
1225 uint32_t binding_stride[MAX_VBS];
1226 bool instancing_enable[MAX_VBS];
1227 bool primitive_restart;
1228 uint32_t topology;
1229
1230 uint32_t cs_thread_width_max;
1231 uint32_t cs_right_mask;
1232
1233 struct {
1234 uint32_t sf[7];
1235 uint32_t depth_stencil_state[3];
1236 } gen7;
1237
1238 struct {
1239 uint32_t sf[4];
1240 uint32_t raster[5];
1241 uint32_t wm_depth_stencil[3];
1242 } gen8;
1243
1244 struct {
1245 uint32_t wm_depth_stencil[4];
1246 } gen9;
1247 };
1248
1249 struct anv_graphics_pipeline_create_info {
1250 bool use_repclear;
1251 bool disable_viewport;
1252 bool disable_scissor;
1253 bool disable_vs;
1254 bool use_rectlist;
1255 };
1256
1257 VkResult
1258 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1259 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1260 const struct anv_graphics_pipeline_create_info *extra,
1261 const VkAllocationCallbacks *alloc);
1262
1263 VkResult
1264 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1265 const VkComputePipelineCreateInfo *info,
1266 struct anv_shader_module *module,
1267 const char *entrypoint_name);
1268
1269 VkResult
1270 anv_graphics_pipeline_create(VkDevice device,
1271 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1272 const struct anv_graphics_pipeline_create_info *extra,
1273 const VkAllocationCallbacks *alloc,
1274 VkPipeline *pPipeline);
1275
1276 VkResult
1277 gen7_graphics_pipeline_create(VkDevice _device,
1278 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1279 const struct anv_graphics_pipeline_create_info *extra,
1280 const VkAllocationCallbacks *alloc,
1281 VkPipeline *pPipeline);
1282
1283 VkResult
1284 gen75_graphics_pipeline_create(VkDevice _device,
1285 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1286 const struct anv_graphics_pipeline_create_info *extra,
1287 const VkAllocationCallbacks *alloc,
1288 VkPipeline *pPipeline);
1289
1290 VkResult
1291 gen8_graphics_pipeline_create(VkDevice _device,
1292 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1293 const struct anv_graphics_pipeline_create_info *extra,
1294 const VkAllocationCallbacks *alloc,
1295 VkPipeline *pPipeline);
1296 VkResult
1297 gen9_graphics_pipeline_create(VkDevice _device,
1298 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1299 const struct anv_graphics_pipeline_create_info *extra,
1300 const VkAllocationCallbacks *alloc,
1301 VkPipeline *pPipeline);
1302 VkResult
1303 gen7_compute_pipeline_create(VkDevice _device,
1304 const VkComputePipelineCreateInfo *pCreateInfo,
1305 const VkAllocationCallbacks *alloc,
1306 VkPipeline *pPipeline);
1307 VkResult
1308 gen75_compute_pipeline_create(VkDevice _device,
1309 const VkComputePipelineCreateInfo *pCreateInfo,
1310 const VkAllocationCallbacks *alloc,
1311 VkPipeline *pPipeline);
1312
1313 VkResult
1314 gen8_compute_pipeline_create(VkDevice _device,
1315 const VkComputePipelineCreateInfo *pCreateInfo,
1316 const VkAllocationCallbacks *alloc,
1317 VkPipeline *pPipeline);
1318 VkResult
1319 gen9_compute_pipeline_create(VkDevice _device,
1320 const VkComputePipelineCreateInfo *pCreateInfo,
1321 const VkAllocationCallbacks *alloc,
1322 VkPipeline *pPipeline);
1323
1324 struct anv_format {
1325 const VkFormat vk_format;
1326 const char *name;
1327 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1328 const struct isl_format_layout *isl_layout;
1329 uint8_t num_channels;
1330 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1331 bool has_stencil;
1332 };
1333
1334 /**
1335 * Stencil formats are often a special case. To reduce the number of lookups
1336 * into the VkFormat-to-anv_format translation table when working with
1337 * stencil, here is the handle to the table's entry for VK_FORMAT_S8_UINT.
1338 */
1339 extern const struct anv_format *const anv_format_s8_uint;
1340
1341 const struct anv_format *
1342 anv_format_for_vk_format(VkFormat format);
1343
1344 static inline bool
1345 anv_format_is_color(const struct anv_format *format)
1346 {
1347 return !format->depth_format && !format->has_stencil;
1348 }
1349
1350 static inline bool
1351 anv_format_is_depth_or_stencil(const struct anv_format *format)
1352 {
1353 return format->depth_format || format->has_stencil;
1354 }
1355
1356 struct anv_image_view_info {
1357 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1358 bool is_array:1; /**< RENDER_SURFACE_STATE.SurfaceArray */
1359 bool is_cube:1; /**< RENDER_SURFACE_STATE.CubeFaceEnable* */
1360 };
1361
1362 struct anv_image_view_info
1363 anv_image_view_info_for_vk_image_view_type(VkImageViewType type);
1364
1365 /**
1366 * A proxy for the color surfaces, depth surfaces, and stencil surfaces.
1367 */
1368 struct anv_surface {
1369 /**
1370 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1371 */
1372 uint32_t offset;
1373
1374 uint32_t stride; /**< RENDER_SURFACE_STATE.SurfacePitch */
1375 uint16_t qpitch; /**< RENDER_SURFACE_STATE.QPitch */
1376
1377 /**
1378 * \name Alignment of miptree images, in units of pixels.
1379 *
1380 * These fields contain the real alignment values, not the values to be
1381 * given to the GPU. For example, if h_align is 4, then program the GPU
1382 * with HALIGN_4.
1383 * \{
1384 */
1385 uint8_t h_align; /**< RENDER_SURFACE_STATE.SurfaceHorizontalAlignment */
1386 uint8_t v_align; /**< RENDER_SURFACE_STATE.SurfaceVerticalAlignment */
1387 /** \} */
1388
1389 enum isl_tiling tiling;
1390 };
1391
1392 struct anv_image {
1393 VkImageType type;
1394 const struct anv_format *format;
1395 VkExtent3D extent;
1396 uint32_t levels;
1397 uint32_t array_size;
1398 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1399
1400 VkDeviceSize size;
1401 uint32_t alignment;
1402
1403 /* Set when bound */
1404 struct anv_bo *bo;
1405 VkDeviceSize offset;
1406
1407 uint8_t surface_type; /**< RENDER_SURFACE_STATE.SurfaceType */
1408
1409 bool needs_nonrt_surface_state:1;
1410 bool needs_color_rt_surface_state:1;
1411
1412 /**
1413 * Image subsurfaces
1414 *
1415 * For each foo, anv_image::foo_surface is valid if and only if
1416 * anv_image::format has a foo aspect.
1417 *
1418 * The hardware requires that the depth buffer and stencil buffer be
1419 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1420 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1421 * allocate the depth and stencil buffers as separate surfaces in the same
1422 * bo.
1423 */
1424 union {
1425 struct anv_surface color_surface;
1426
1427 struct {
1428 struct anv_surface depth_surface;
1429 struct anv_surface stencil_surface;
1430 };
1431 };
1432 };
1433
1434 struct anv_image_view {
1435 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1436 const struct anv_format *format; /**< VkImageViewCreateInfo::format */
1437 struct anv_bo *bo;
1438 uint32_t offset; /**< Offset into bo. */
1439 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1440
1441 /** RENDER_SURFACE_STATE when using image as a color render target. */
1442 struct anv_state color_rt_surface_state;
1443
1444 /** RENDER_SURFACE_STATE when using image as a non render target. */
1445 struct anv_state nonrt_surface_state;
1446 };
1447
1448 struct anv_image_create_info {
1449 const VkImageCreateInfo *vk_info;
1450 bool force_tiling;
1451 enum isl_tiling tiling;
1452 uint32_t stride;
1453 };
1454
1455 VkResult anv_image_create(VkDevice _device,
1456 const struct anv_image_create_info *info,
1457 const VkAllocationCallbacks* alloc,
1458 VkImage *pImage);
1459
1460 struct anv_surface *
1461 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1462 VkImageAspectFlags aspect_mask);
1463
1464 void anv_image_view_init(struct anv_image_view *view,
1465 struct anv_device *device,
1466 const VkImageViewCreateInfo* pCreateInfo,
1467 struct anv_cmd_buffer *cmd_buffer);
1468
1469 void
1470 gen7_image_view_init(struct anv_image_view *iview,
1471 struct anv_device *device,
1472 const VkImageViewCreateInfo* pCreateInfo,
1473 struct anv_cmd_buffer *cmd_buffer);
1474
1475 void
1476 gen75_image_view_init(struct anv_image_view *iview,
1477 struct anv_device *device,
1478 const VkImageViewCreateInfo* pCreateInfo,
1479 struct anv_cmd_buffer *cmd_buffer);
1480
1481 void
1482 gen8_image_view_init(struct anv_image_view *iview,
1483 struct anv_device *device,
1484 const VkImageViewCreateInfo* pCreateInfo,
1485 struct anv_cmd_buffer *cmd_buffer);
1486
1487 void
1488 gen9_image_view_init(struct anv_image_view *iview,
1489 struct anv_device *device,
1490 const VkImageViewCreateInfo* pCreateInfo,
1491 struct anv_cmd_buffer *cmd_buffer);
1492
1493 void anv_fill_buffer_surface_state(struct anv_device *device, void *state,
1494 const struct anv_format *format,
1495 uint32_t offset, uint32_t range,
1496 uint32_t stride);
1497
1498 void gen7_fill_buffer_surface_state(void *state, const struct anv_format *format,
1499 uint32_t offset, uint32_t range,
1500 uint32_t stride);
1501 void gen75_fill_buffer_surface_state(void *state, const struct anv_format *format,
1502 uint32_t offset, uint32_t range,
1503 uint32_t stride);
1504 void gen8_fill_buffer_surface_state(void *state, const struct anv_format *format,
1505 uint32_t offset, uint32_t range,
1506 uint32_t stride);
1507 void gen9_fill_buffer_surface_state(void *state, const struct anv_format *format,
1508 uint32_t offset, uint32_t range,
1509 uint32_t stride);
1510
1511 struct anv_sampler {
1512 uint32_t state[4];
1513 };
1514
1515 struct anv_framebuffer {
1516 uint32_t width;
1517 uint32_t height;
1518 uint32_t layers;
1519
1520 uint32_t attachment_count;
1521 const struct anv_image_view * attachments[0];
1522 };
1523
1524 struct anv_subpass {
1525 uint32_t input_count;
1526 uint32_t * input_attachments;
1527 uint32_t color_count;
1528 uint32_t * color_attachments;
1529 uint32_t * resolve_attachments;
1530 uint32_t depth_stencil_attachment;
1531 };
1532
1533 struct anv_render_pass_attachment {
1534 const struct anv_format *format;
1535 uint32_t samples;
1536 VkAttachmentLoadOp load_op;
1537 VkAttachmentLoadOp stencil_load_op;
1538 };
1539
1540 struct anv_render_pass {
1541 uint32_t attachment_count;
1542 uint32_t subpass_count;
1543 struct anv_render_pass_attachment * attachments;
1544 struct anv_subpass subpasses[0];
1545 };
1546
1547 extern struct anv_render_pass anv_meta_dummy_renderpass;
1548
1549 struct anv_query_pool_slot {
1550 uint64_t begin;
1551 uint64_t end;
1552 uint64_t available;
1553 };
1554
1555 struct anv_query_pool {
1556 VkQueryType type;
1557 uint32_t slots;
1558 struct anv_bo bo;
1559 };
1560
1561 void anv_device_init_meta(struct anv_device *device);
1562 void anv_device_finish_meta(struct anv_device *device);
1563
1564 void *anv_lookup_entrypoint(const char *name);
1565
1566 void anv_dump_image_to_ppm(struct anv_device *device,
1567 struct anv_image *image, unsigned miplevel,
1568 unsigned array_layer, const char *filename);
1569
1570 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1571 \
1572 static inline struct __anv_type * \
1573 __anv_type ## _from_handle(__VkType _handle) \
1574 { \
1575 return (struct __anv_type *) _handle; \
1576 } \
1577 \
1578 static inline __VkType \
1579 __anv_type ## _to_handle(struct __anv_type *_obj) \
1580 { \
1581 return (__VkType) _obj; \
1582 }
1583
1584 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1585 \
1586 static inline struct __anv_type * \
1587 __anv_type ## _from_handle(__VkType _handle) \
1588 { \
1589 return (struct __anv_type *)(uintptr_t) _handle; \
1590 } \
1591 \
1592 static inline __VkType \
1593 __anv_type ## _to_handle(struct __anv_type *_obj) \
1594 { \
1595 return (__VkType)(uintptr_t) _obj; \
1596 }
1597
1598 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1599 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1600
1601 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1602 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1603 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1604 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1605 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1606
1607 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1608 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1609 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1610 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1611 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1612 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1613 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1614 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1615 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1616 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1617 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1618 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1619 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1620 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1621 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1622
1623 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1624 \
1625 static inline const __VkType * \
1626 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1627 { \
1628 return (const __VkType *) __anv_obj; \
1629 }
1630
1631 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1632 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1633
1634 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1635 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1636 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1637
1638 #ifdef __cplusplus
1639 }
1640 #endif