anv: Deduplicate anv_CmdDraw calls
[mesa.git] / src / vulkan / anv_private.h
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdlib.h>
27 #include <stdio.h>
28 #include <stdbool.h>
29 #include <pthread.h>
30 #include <assert.h>
31 #include <stdint.h>
32 #include <i915_drm.h>
33
34 #ifdef HAVE_VALGRIND
35 #include <valgrind.h>
36 #include <memcheck.h>
37 #define VG(x) x
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
39 #else
40 #define VG(x)
41 #endif
42
43 #include "brw_device_info.h"
44 #include "util/macros.h"
45 #include "util/list.h"
46
47 /* Pre-declarations needed for WSI entrypoints */
48 struct wl_surface;
49 struct wl_display;
50 typedef struct xcb_connection_t xcb_connection_t;
51 typedef uint32_t xcb_visualid_t;
52 typedef uint32_t xcb_window_t;
53
54 #define VK_USE_PLATFORM_XCB_KHR
55 #define VK_USE_PLATFORM_WAYLAND_KHR
56
57 #define VK_PROTOTYPES
58 #include <vulkan/vulkan.h>
59 #include <vulkan/vulkan_intel.h>
60 #include <vulkan/vk_icd.h>
61
62 #include "anv_entrypoints.h"
63 #include "anv_gen_macros.h"
64 #include "brw_context.h"
65 #include "isl.h"
66
67 #ifdef __cplusplus
68 extern "C" {
69 #endif
70
71 #define MAX_VBS 32
72 #define MAX_SETS 8
73 #define MAX_RTS 8
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
78 #define MAX_IMAGES 8
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
80
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
83
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
86
87 static inline uint32_t
88 align_u32(uint32_t v, uint32_t a)
89 {
90 assert(a != 0 && a == (a & -a));
91 return (v + a - 1) & ~(a - 1);
92 }
93
94 static inline uint64_t
95 align_u64(uint64_t v, uint64_t a)
96 {
97 assert(a != 0 && a == (a & -a));
98 return (v + a - 1) & ~(a - 1);
99 }
100
101 static inline int32_t
102 align_i32(int32_t v, int32_t a)
103 {
104 assert(a != 0 && a == (a & -a));
105 return (v + a - 1) & ~(a - 1);
106 }
107
108 /** Alignment must be a power of 2. */
109 static inline bool
110 anv_is_aligned(uintmax_t n, uintmax_t a)
111 {
112 assert(a == (a & -a));
113 return (n & (a - 1)) == 0;
114 }
115
116 static inline uint32_t
117 anv_minify(uint32_t n, uint32_t levels)
118 {
119 if (unlikely(n == 0))
120 return 0;
121 else
122 return MAX(n >> levels, 1);
123 }
124
125 static inline float
126 anv_clamp_f(float f, float min, float max)
127 {
128 assert(min < max);
129
130 if (f > max)
131 return max;
132 else if (f < min)
133 return min;
134 else
135 return f;
136 }
137
138 static inline bool
139 anv_clear_mask(uint32_t *inout_mask, uint32_t clear_mask)
140 {
141 if (*inout_mask & clear_mask) {
142 *inout_mask &= ~clear_mask;
143 return true;
144 } else {
145 return false;
146 }
147 }
148
149 #define for_each_bit(b, dword) \
150 for (uint32_t __dword = (dword); \
151 (b) = __builtin_ffs(__dword) - 1, __dword; \
152 __dword &= ~(1 << (b)))
153
154 #define typed_memcpy(dest, src, count) ({ \
155 static_assert(sizeof(*src) == sizeof(*dest), ""); \
156 memcpy((dest), (src), (count) * sizeof(*(src))); \
157 })
158
159 #define zero(x) (memset(&(x), 0, sizeof(x)))
160
161 /* Define no kernel as 1, since that's an illegal offset for a kernel */
162 #define NO_KERNEL 1
163
164 struct anv_common {
165 VkStructureType sType;
166 const void* pNext;
167 };
168
169 /* Whenever we generate an error, pass it through this function. Useful for
170 * debugging, where we can break on it. Only call at error site, not when
171 * propagating errors. Might be useful to plug in a stack trace here.
172 */
173
174 VkResult __vk_errorf(VkResult error, const char *file, int line, const char *format, ...);
175
176 #ifdef DEBUG
177 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
178 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
179 #else
180 #define vk_error(error) error
181 #define vk_errorf(error, format, ...) error
182 #endif
183
184 void __anv_finishme(const char *file, int line, const char *format, ...)
185 anv_printflike(3, 4);
186 void anv_loge(const char *format, ...) anv_printflike(1, 2);
187 void anv_loge_v(const char *format, va_list va);
188
189 /**
190 * Print a FINISHME message, including its source location.
191 */
192 #define anv_finishme(format, ...) \
193 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
194
195 /* A non-fatal assert. Useful for debugging. */
196 #ifdef DEBUG
197 #define anv_assert(x) ({ \
198 if (unlikely(!(x))) \
199 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
200 })
201 #else
202 #define anv_assert(x)
203 #endif
204
205 /**
206 * If a block of code is annotated with anv_validate, then the block runs only
207 * in debug builds.
208 */
209 #ifdef DEBUG
210 #define anv_validate if (1)
211 #else
212 #define anv_validate if (0)
213 #endif
214
215 void anv_abortf(const char *format, ...) anv_noreturn anv_printflike(1, 2);
216 void anv_abortfv(const char *format, va_list va) anv_noreturn;
217
218 #define stub_return(v) \
219 do { \
220 anv_finishme("stub %s", __func__); \
221 return (v); \
222 } while (0)
223
224 #define stub() \
225 do { \
226 anv_finishme("stub %s", __func__); \
227 return; \
228 } while (0)
229
230 /**
231 * A dynamically growable, circular buffer. Elements are added at head and
232 * removed from tail. head and tail are free-running uint32_t indices and we
233 * only compute the modulo with size when accessing the array. This way,
234 * number of bytes in the queue is always head - tail, even in case of
235 * wraparound.
236 */
237
238 struct anv_vector {
239 uint32_t head;
240 uint32_t tail;
241 uint32_t element_size;
242 uint32_t size;
243 void *data;
244 };
245
246 int anv_vector_init(struct anv_vector *queue, uint32_t element_size, uint32_t size);
247 void *anv_vector_add(struct anv_vector *queue);
248 void *anv_vector_remove(struct anv_vector *queue);
249
250 static inline int
251 anv_vector_length(struct anv_vector *queue)
252 {
253 return (queue->head - queue->tail) / queue->element_size;
254 }
255
256 static inline void *
257 anv_vector_head(struct anv_vector *vector)
258 {
259 assert(vector->tail < vector->head);
260 return (void *)((char *)vector->data +
261 ((vector->head - vector->element_size) &
262 (vector->size - 1)));
263 }
264
265 static inline void *
266 anv_vector_tail(struct anv_vector *vector)
267 {
268 return (void *)((char *)vector->data + (vector->tail & (vector->size - 1)));
269 }
270
271 static inline void
272 anv_vector_finish(struct anv_vector *queue)
273 {
274 free(queue->data);
275 }
276
277 #define anv_vector_foreach(elem, queue) \
278 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
279 for (uint32_t __anv_vector_offset = (queue)->tail; \
280 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
281 __anv_vector_offset += (queue)->element_size)
282
283 struct anv_bo {
284 uint32_t gem_handle;
285
286 /* Index into the current validation list. This is used by the
287 * validation list building alrogithm to track which buffers are already
288 * in the validation list so that we can ensure uniqueness.
289 */
290 uint32_t index;
291
292 /* Last known offset. This value is provided by the kernel when we
293 * execbuf and is used as the presumed offset for the next bunch of
294 * relocations.
295 */
296 uint64_t offset;
297
298 uint64_t size;
299 void *map;
300 };
301
302 /* Represents a lock-free linked list of "free" things. This is used by
303 * both the block pool and the state pools. Unfortunately, in order to
304 * solve the ABA problem, we can't use a single uint32_t head.
305 */
306 union anv_free_list {
307 struct {
308 int32_t offset;
309
310 /* A simple count that is incremented every time the head changes. */
311 uint32_t count;
312 };
313 uint64_t u64;
314 };
315
316 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
317
318 struct anv_block_state {
319 union {
320 struct {
321 uint32_t next;
322 uint32_t end;
323 };
324 uint64_t u64;
325 };
326 };
327
328 struct anv_block_pool {
329 struct anv_device *device;
330
331 struct anv_bo bo;
332
333 /* The offset from the start of the bo to the "center" of the block
334 * pool. Pointers to allocated blocks are given by
335 * bo.map + center_bo_offset + offsets.
336 */
337 uint32_t center_bo_offset;
338
339 /* Current memory map of the block pool. This pointer may or may not
340 * point to the actual beginning of the block pool memory. If
341 * anv_block_pool_alloc_back has ever been called, then this pointer
342 * will point to the "center" position of the buffer and all offsets
343 * (negative or positive) given out by the block pool alloc functions
344 * will be valid relative to this pointer.
345 *
346 * In particular, map == bo.map + center_offset
347 */
348 void *map;
349 int fd;
350
351 /**
352 * Array of mmaps and gem handles owned by the block pool, reclaimed when
353 * the block pool is destroyed.
354 */
355 struct anv_vector mmap_cleanups;
356
357 uint32_t block_size;
358
359 union anv_free_list free_list;
360 struct anv_block_state state;
361
362 union anv_free_list back_free_list;
363 struct anv_block_state back_state;
364 };
365
366 /* Block pools are backed by a fixed-size 2GB memfd */
367 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
368
369 /* The center of the block pool is also the middle of the memfd. This may
370 * change in the future if we decide differently for some reason.
371 */
372 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
373
374 static inline uint32_t
375 anv_block_pool_size(struct anv_block_pool *pool)
376 {
377 return pool->state.end + pool->back_state.end;
378 }
379
380 struct anv_state {
381 int32_t offset;
382 uint32_t alloc_size;
383 void *map;
384 };
385
386 struct anv_fixed_size_state_pool {
387 size_t state_size;
388 union anv_free_list free_list;
389 struct anv_block_state block;
390 };
391
392 #define ANV_MIN_STATE_SIZE_LOG2 6
393 #define ANV_MAX_STATE_SIZE_LOG2 10
394
395 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
396
397 struct anv_state_pool {
398 struct anv_block_pool *block_pool;
399 struct anv_fixed_size_state_pool buckets[ANV_STATE_BUCKETS];
400 };
401
402 struct anv_state_stream_block;
403
404 struct anv_state_stream {
405 struct anv_block_pool *block_pool;
406
407 /* The current working block */
408 struct anv_state_stream_block *block;
409
410 /* Offset at which the current block starts */
411 uint32_t start;
412 /* Offset at which to allocate the next state */
413 uint32_t next;
414 /* Offset at which the current block ends */
415 uint32_t end;
416 };
417
418 #define CACHELINE_SIZE 64
419 #define CACHELINE_MASK 63
420
421 static void inline
422 anv_state_clflush(struct anv_state state)
423 {
424 /* state.map may not be cacheline aligned, so round down the start pointer
425 * to a cacheline boundary so we flush all pages that contain the state.
426 */
427 void *end = state.map + state.alloc_size;
428 void *p = (void *) (((uintptr_t) state.map) & ~CACHELINE_MASK);
429
430 __builtin_ia32_mfence();
431 while (p < end) {
432 __builtin_ia32_clflush(p);
433 p += CACHELINE_SIZE;
434 }
435 }
436
437 void anv_block_pool_init(struct anv_block_pool *pool,
438 struct anv_device *device, uint32_t block_size);
439 void anv_block_pool_finish(struct anv_block_pool *pool);
440 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
441 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
442 void anv_block_pool_free(struct anv_block_pool *pool, int32_t offset);
443 void anv_state_pool_init(struct anv_state_pool *pool,
444 struct anv_block_pool *block_pool);
445 void anv_state_pool_finish(struct anv_state_pool *pool);
446 struct anv_state anv_state_pool_alloc(struct anv_state_pool *pool,
447 size_t state_size, size_t alignment);
448 void anv_state_pool_free(struct anv_state_pool *pool, struct anv_state state);
449 void anv_state_stream_init(struct anv_state_stream *stream,
450 struct anv_block_pool *block_pool);
451 void anv_state_stream_finish(struct anv_state_stream *stream);
452 struct anv_state anv_state_stream_alloc(struct anv_state_stream *stream,
453 uint32_t size, uint32_t alignment);
454
455 /**
456 * Implements a pool of re-usable BOs. The interface is identical to that
457 * of block_pool except that each block is its own BO.
458 */
459 struct anv_bo_pool {
460 struct anv_device *device;
461
462 uint32_t bo_size;
463
464 void *free_list;
465 };
466
467 void anv_bo_pool_init(struct anv_bo_pool *pool,
468 struct anv_device *device, uint32_t block_size);
469 void anv_bo_pool_finish(struct anv_bo_pool *pool);
470 VkResult anv_bo_pool_alloc(struct anv_bo_pool *pool, struct anv_bo *bo);
471 void anv_bo_pool_free(struct anv_bo_pool *pool, const struct anv_bo *bo);
472
473
474 void *anv_resolve_entrypoint(uint32_t index);
475
476 extern struct anv_dispatch_table dtable;
477
478 #define ANV_CALL(func) ({ \
479 if (dtable.func == NULL) { \
480 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
481 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
482 } \
483 dtable.func; \
484 })
485
486 static inline void *
487 anv_alloc(const VkAllocationCallbacks *alloc,
488 size_t size, size_t align,
489 VkSystemAllocationScope scope)
490 {
491 return alloc->pfnAllocation(alloc->pUserData, size, align, scope);
492 }
493
494 static inline void *
495 anv_realloc(const VkAllocationCallbacks *alloc,
496 void *ptr, size_t size, size_t align,
497 VkSystemAllocationScope scope)
498 {
499 return alloc->pfnReallocation(alloc->pUserData, ptr, size, align, scope);
500 }
501
502 static inline void
503 anv_free(const VkAllocationCallbacks *alloc, void *data)
504 {
505 alloc->pfnFree(alloc->pUserData, data);
506 }
507
508 static inline void *
509 anv_alloc2(const VkAllocationCallbacks *parent_alloc,
510 const VkAllocationCallbacks *alloc,
511 size_t size, size_t align,
512 VkSystemAllocationScope scope)
513 {
514 if (alloc)
515 return anv_alloc(alloc, size, align, scope);
516 else
517 return anv_alloc(parent_alloc, size, align, scope);
518 }
519
520 static inline void
521 anv_free2(const VkAllocationCallbacks *parent_alloc,
522 const VkAllocationCallbacks *alloc,
523 void *data)
524 {
525 if (alloc)
526 anv_free(alloc, data);
527 else
528 anv_free(parent_alloc, data);
529 }
530
531 struct anv_physical_device {
532 VK_LOADER_DATA _loader_data;
533
534 struct anv_instance * instance;
535 uint32_t chipset_id;
536 const char * path;
537 const char * name;
538 const struct brw_device_info * info;
539 uint64_t aperture_size;
540 struct brw_compiler * compiler;
541 struct isl_device isl_dev;
542 };
543
544 struct anv_wsi_interaface;
545
546 #define VK_ICD_WSI_PLATFORM_MAX 5
547
548 struct anv_instance {
549 VK_LOADER_DATA _loader_data;
550
551 VkAllocationCallbacks alloc;
552
553 uint32_t apiVersion;
554 int physicalDeviceCount;
555 struct anv_physical_device physicalDevice;
556
557 struct anv_wsi_interface * wsi[VK_ICD_WSI_PLATFORM_MAX];
558 };
559
560 VkResult anv_init_wsi(struct anv_instance *instance);
561 void anv_finish_wsi(struct anv_instance *instance);
562
563 struct anv_meta_state {
564 VkAllocationCallbacks alloc;
565
566 /**
567 * Use array element `i` for images with `2^i` samples.
568 */
569 struct {
570 /**
571 * Pipeline N is used to clear color attachment N of the current
572 * subpass.
573 *
574 * HACK: We use one pipeline per color attachment to work around the
575 * compiler's inability to dynamically set the render target index of
576 * the render target write message.
577 */
578 struct anv_pipeline *color_pipelines[MAX_RTS];
579
580 struct anv_pipeline *depth_only_pipeline;
581 struct anv_pipeline *stencil_only_pipeline;
582 struct anv_pipeline *depthstencil_pipeline;
583 } clear[1 + MAX_SAMPLES_LOG2];
584
585 struct {
586 VkRenderPass render_pass;
587
588 /** Pipeline that blits from a 1D image. */
589 VkPipeline pipeline_1d_src;
590
591 /** Pipeline that blits from a 2D image. */
592 VkPipeline pipeline_2d_src;
593
594 /** Pipeline that blits from a 3D image. */
595 VkPipeline pipeline_3d_src;
596
597 VkPipelineLayout pipeline_layout;
598 VkDescriptorSetLayout ds_layout;
599 } blit;
600
601 struct {
602 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
603 VkPipeline pipelines[MAX_SAMPLES_LOG2];
604
605 VkRenderPass pass;
606 VkPipelineLayout pipeline_layout;
607 VkDescriptorSetLayout ds_layout;
608 } resolve;
609 };
610
611 struct anv_queue {
612 VK_LOADER_DATA _loader_data;
613
614 struct anv_device * device;
615
616 struct anv_state_pool * pool;
617 };
618
619 struct anv_pipeline_cache {
620 struct anv_device * device;
621 struct anv_state_stream program_stream;
622 pthread_mutex_t mutex;
623 };
624
625 void anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
626 struct anv_device *device);
627 void anv_pipeline_cache_finish(struct anv_pipeline_cache *cache);
628
629 struct anv_device {
630 VK_LOADER_DATA _loader_data;
631
632 VkAllocationCallbacks alloc;
633
634 struct anv_instance * instance;
635 uint32_t chipset_id;
636 struct brw_device_info info;
637 struct isl_device isl_dev;
638 int context_id;
639 int fd;
640
641 struct anv_bo_pool batch_bo_pool;
642
643 struct anv_block_pool dynamic_state_block_pool;
644 struct anv_state_pool dynamic_state_pool;
645
646 struct anv_block_pool instruction_block_pool;
647 struct anv_pipeline_cache default_pipeline_cache;
648
649 struct anv_block_pool surface_state_block_pool;
650 struct anv_state_pool surface_state_pool;
651
652 struct anv_bo workaround_bo;
653
654 struct anv_meta_state meta_state;
655
656 struct anv_state border_colors;
657
658 struct anv_queue queue;
659
660 struct anv_block_pool scratch_block_pool;
661
662 pthread_mutex_t mutex;
663 };
664
665 VkResult gen7_init_device_state(struct anv_device *device);
666 VkResult gen75_init_device_state(struct anv_device *device);
667 VkResult gen8_init_device_state(struct anv_device *device);
668 VkResult gen9_init_device_state(struct anv_device *device);
669
670 void* anv_gem_mmap(struct anv_device *device,
671 uint32_t gem_handle, uint64_t offset, uint64_t size, uint32_t flags);
672 void anv_gem_munmap(void *p, uint64_t size);
673 uint32_t anv_gem_create(struct anv_device *device, size_t size);
674 void anv_gem_close(struct anv_device *device, uint32_t gem_handle);
675 uint32_t anv_gem_userptr(struct anv_device *device, void *mem, size_t size);
676 int anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns);
677 int anv_gem_execbuffer(struct anv_device *device,
678 struct drm_i915_gem_execbuffer2 *execbuf);
679 int anv_gem_set_tiling(struct anv_device *device, uint32_t gem_handle,
680 uint32_t stride, uint32_t tiling);
681 int anv_gem_create_context(struct anv_device *device);
682 int anv_gem_destroy_context(struct anv_device *device, int context);
683 int anv_gem_get_param(int fd, uint32_t param);
684 bool anv_gem_get_bit6_swizzle(int fd, uint32_t tiling);
685 int anv_gem_get_aperture(int fd, uint64_t *size);
686 int anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle);
687 uint32_t anv_gem_fd_to_handle(struct anv_device *device, int fd);
688 int anv_gem_set_caching(struct anv_device *device, uint32_t gem_handle, uint32_t caching);
689 int anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
690 uint32_t read_domains, uint32_t write_domain);
691
692 VkResult anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size);
693
694 struct anv_reloc_list {
695 size_t num_relocs;
696 size_t array_length;
697 struct drm_i915_gem_relocation_entry * relocs;
698 struct anv_bo ** reloc_bos;
699 };
700
701 VkResult anv_reloc_list_init(struct anv_reloc_list *list,
702 const VkAllocationCallbacks *alloc);
703 void anv_reloc_list_finish(struct anv_reloc_list *list,
704 const VkAllocationCallbacks *alloc);
705
706 uint64_t anv_reloc_list_add(struct anv_reloc_list *list,
707 const VkAllocationCallbacks *alloc,
708 uint32_t offset, struct anv_bo *target_bo,
709 uint32_t delta);
710
711 struct anv_batch_bo {
712 /* Link in the anv_cmd_buffer.owned_batch_bos list */
713 struct list_head link;
714
715 struct anv_bo bo;
716
717 /* Bytes actually consumed in this batch BO */
718 size_t length;
719
720 /* Last seen surface state block pool bo offset */
721 uint32_t last_ss_pool_bo_offset;
722
723 struct anv_reloc_list relocs;
724 };
725
726 struct anv_batch {
727 const VkAllocationCallbacks * alloc;
728
729 void * start;
730 void * end;
731 void * next;
732
733 struct anv_reloc_list * relocs;
734
735 /* This callback is called (with the associated user data) in the event
736 * that the batch runs out of space.
737 */
738 VkResult (*extend_cb)(struct anv_batch *, void *);
739 void * user_data;
740 };
741
742 void *anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords);
743 void anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other);
744 uint64_t anv_batch_emit_reloc(struct anv_batch *batch,
745 void *location, struct anv_bo *bo, uint32_t offset);
746 VkResult anv_device_submit_simple_batch(struct anv_device *device,
747 struct anv_batch *batch);
748
749 struct anv_address {
750 struct anv_bo *bo;
751 uint32_t offset;
752 };
753
754 #define __gen_address_type struct anv_address
755 #define __gen_user_data struct anv_batch
756
757 static inline uint64_t
758 __gen_combine_address(struct anv_batch *batch, void *location,
759 const struct anv_address address, uint32_t delta)
760 {
761 if (address.bo == NULL) {
762 return address.offset + delta;
763 } else {
764 assert(batch->start <= location && location < batch->end);
765
766 return anv_batch_emit_reloc(batch, location, address.bo, address.offset + delta);
767 }
768 }
769
770 /* Wrapper macros needed to work around preprocessor argument issues. In
771 * particular, arguments don't get pre-evaluated if they are concatenated.
772 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
773 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
774 * We can work around this easily enough with these helpers.
775 */
776 #define __anv_cmd_length(cmd) cmd ## _length
777 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
778 #define __anv_cmd_header(cmd) cmd ## _header
779 #define __anv_cmd_pack(cmd) cmd ## _pack
780
781 #define anv_batch_emit(batch, cmd, ...) do { \
782 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
783 struct cmd __template = { \
784 __anv_cmd_header(cmd), \
785 __VA_ARGS__ \
786 }; \
787 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
788 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
789 } while (0)
790
791 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
792 void *__dst = anv_batch_emit_dwords(batch, n); \
793 struct cmd __template = { \
794 __anv_cmd_header(cmd), \
795 .DwordLength = n - __anv_cmd_length_bias(cmd), \
796 __VA_ARGS__ \
797 }; \
798 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
799 __dst; \
800 })
801
802 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
803 do { \
804 uint32_t *dw; \
805 \
806 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
807 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
808 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
809 dw[i] = (dwords0)[i] | (dwords1)[i]; \
810 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
811 } while (0)
812
813 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
814 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
815 struct anv_state __state = \
816 anv_state_pool_alloc((pool), __size, align); \
817 struct cmd __template = { \
818 __VA_ARGS__ \
819 }; \
820 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
821 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
822 if (!(pool)->block_pool->device->info.has_llc) \
823 anv_state_clflush(__state); \
824 __state; \
825 })
826
827 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
828 .GraphicsDataTypeGFDT = 0, \
829 .LLCCacheabilityControlLLCCC = 0, \
830 .L3CacheabilityControlL3CC = 1, \
831 }
832
833 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
834 .LLCeLLCCacheabilityControlLLCCC = 0, \
835 .L3CacheabilityControlL3CC = 1, \
836 }
837
838 #define GEN8_MOCS { \
839 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
840 .TargetCache = L3DefertoPATforLLCeLLCselection, \
841 .AgeforQUADLRU = 0 \
842 }
843
844 /* Skylake: MOCS is now an index into an array of 62 different caching
845 * configurations programmed by the kernel.
846 */
847
848 #define GEN9_MOCS { \
849 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
850 .IndextoMOCSTables = 2 \
851 }
852
853 #define GEN9_MOCS_PTE { \
854 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
855 .IndextoMOCSTables = 1 \
856 }
857
858 struct anv_device_memory {
859 struct anv_bo bo;
860 uint32_t type_index;
861 VkDeviceSize map_size;
862 void * map;
863 };
864
865 /**
866 * Header for Vertex URB Entry (VUE)
867 */
868 struct anv_vue_header {
869 uint32_t Reserved;
870 uint32_t RTAIndex; /* RenderTargetArrayIndex */
871 uint32_t ViewportIndex;
872 float PointWidth;
873 };
874
875 struct anv_descriptor_set_binding_layout {
876 /* Number of array elements in this binding */
877 uint16_t array_size;
878
879 /* Index into the flattend descriptor set */
880 uint16_t descriptor_index;
881
882 /* Index into the dynamic state array for a dynamic buffer */
883 int16_t dynamic_offset_index;
884
885 /* Index into the descriptor set buffer views */
886 int16_t buffer_index;
887
888 struct {
889 /* Index into the binding table for the associated surface */
890 int16_t surface_index;
891
892 /* Index into the sampler table for the associated sampler */
893 int16_t sampler_index;
894
895 /* Index into the image table for the associated image */
896 int16_t image_index;
897 } stage[MESA_SHADER_STAGES];
898
899 /* Immutable samplers (or NULL if no immutable samplers) */
900 struct anv_sampler **immutable_samplers;
901 };
902
903 struct anv_descriptor_set_layout {
904 /* Number of bindings in this descriptor set */
905 uint16_t binding_count;
906
907 /* Total size of the descriptor set with room for all array entries */
908 uint16_t size;
909
910 /* Shader stages affected by this descriptor set */
911 uint16_t shader_stages;
912
913 /* Number of buffers in this descriptor set */
914 uint16_t buffer_count;
915
916 /* Number of dynamic offsets used by this descriptor set */
917 uint16_t dynamic_offset_count;
918
919 /* Bindings in this descriptor set */
920 struct anv_descriptor_set_binding_layout binding[0];
921 };
922
923 struct anv_descriptor {
924 VkDescriptorType type;
925
926 union {
927 struct {
928 struct anv_image_view *image_view;
929 struct anv_sampler *sampler;
930 };
931
932 struct anv_buffer_view *buffer_view;
933 };
934 };
935
936 struct anv_descriptor_set {
937 const struct anv_descriptor_set_layout *layout;
938 uint32_t buffer_count;
939 struct anv_buffer_view *buffer_views;
940 struct anv_descriptor descriptors[0];
941 };
942
943 VkResult
944 anv_descriptor_set_create(struct anv_device *device,
945 const struct anv_descriptor_set_layout *layout,
946 struct anv_descriptor_set **out_set);
947
948 void
949 anv_descriptor_set_destroy(struct anv_device *device,
950 struct anv_descriptor_set *set);
951
952 struct anv_pipeline_binding {
953 /* The descriptor set this surface corresponds to */
954 uint16_t set;
955
956 /* Offset into the descriptor set */
957 uint16_t offset;
958 };
959
960 struct anv_pipeline_layout {
961 struct {
962 struct anv_descriptor_set_layout *layout;
963 uint32_t dynamic_offset_start;
964 struct {
965 uint32_t surface_start;
966 uint32_t sampler_start;
967 uint32_t image_start;
968 } stage[MESA_SHADER_STAGES];
969 } set[MAX_SETS];
970
971 uint32_t num_sets;
972
973 struct {
974 bool has_dynamic_offsets;
975 uint32_t surface_count;
976 struct anv_pipeline_binding *surface_to_descriptor;
977 uint32_t sampler_count;
978 struct anv_pipeline_binding *sampler_to_descriptor;
979 uint32_t image_count;
980 } stage[MESA_SHADER_STAGES];
981
982 struct anv_pipeline_binding entries[0];
983 };
984
985 struct anv_buffer {
986 struct anv_device * device;
987 VkDeviceSize size;
988
989 VkBufferUsageFlags usage;
990
991 /* Set when bound */
992 struct anv_bo * bo;
993 VkDeviceSize offset;
994 };
995
996 enum anv_cmd_dirty_bits {
997 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT = 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
998 ANV_CMD_DIRTY_DYNAMIC_SCISSOR = 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
999 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH = 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1000 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS = 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1001 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS = 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1002 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS = 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1003 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK = 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1004 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK = 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1005 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE = 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1006 ANV_CMD_DIRTY_DYNAMIC_ALL = (1 << 9) - 1,
1007 ANV_CMD_DIRTY_PIPELINE = 1 << 9,
1008 ANV_CMD_DIRTY_INDEX_BUFFER = 1 << 10,
1009 ANV_CMD_DIRTY_RENDER_TARGETS = 1 << 11,
1010 };
1011 typedef uint32_t anv_cmd_dirty_mask_t;
1012
1013 struct anv_vertex_binding {
1014 struct anv_buffer * buffer;
1015 VkDeviceSize offset;
1016 };
1017
1018 struct anv_push_constants {
1019 /* Current allocated size of this push constants data structure.
1020 * Because a decent chunk of it may not be used (images on SKL, for
1021 * instance), we won't actually allocate the entire structure up-front.
1022 */
1023 uint32_t size;
1024
1025 /* Push constant data provided by the client through vkPushConstants */
1026 uint8_t client_data[MAX_PUSH_CONSTANTS_SIZE];
1027
1028 /* Our hardware only provides zero-based vertex and instance id so, in
1029 * order to satisfy the vulkan requirements, we may have to push one or
1030 * both of these into the shader.
1031 */
1032 uint32_t base_vertex;
1033 uint32_t base_instance;
1034
1035 /* Offsets and ranges for dynamically bound buffers */
1036 struct {
1037 uint32_t offset;
1038 uint32_t range;
1039 } dynamic[MAX_DYNAMIC_BUFFERS];
1040
1041 /* Image data for image_load_store on pre-SKL */
1042 struct brw_image_param images[MAX_IMAGES];
1043 };
1044
1045 struct anv_dynamic_state {
1046 struct {
1047 uint32_t count;
1048 VkViewport viewports[MAX_VIEWPORTS];
1049 } viewport;
1050
1051 struct {
1052 uint32_t count;
1053 VkRect2D scissors[MAX_SCISSORS];
1054 } scissor;
1055
1056 float line_width;
1057
1058 struct {
1059 float bias;
1060 float clamp;
1061 float slope;
1062 } depth_bias;
1063
1064 float blend_constants[4];
1065
1066 struct {
1067 float min;
1068 float max;
1069 } depth_bounds;
1070
1071 struct {
1072 uint32_t front;
1073 uint32_t back;
1074 } stencil_compare_mask;
1075
1076 struct {
1077 uint32_t front;
1078 uint32_t back;
1079 } stencil_write_mask;
1080
1081 struct {
1082 uint32_t front;
1083 uint32_t back;
1084 } stencil_reference;
1085 };
1086
1087 extern const struct anv_dynamic_state default_dynamic_state;
1088
1089 void anv_dynamic_state_copy(struct anv_dynamic_state *dest,
1090 const struct anv_dynamic_state *src,
1091 uint32_t copy_mask);
1092
1093 /**
1094 * Attachment state when recording a renderpass instance.
1095 *
1096 * The clear value is valid only if there exists a pending clear.
1097 */
1098 struct anv_attachment_state {
1099 VkImageAspectFlags pending_clear_aspects;
1100 VkClearValue clear_value;
1101 };
1102
1103 /** State required while building cmd buffer */
1104 struct anv_cmd_state {
1105 /* PIPELINE_SELECT.PipelineSelection */
1106 uint32_t current_pipeline;
1107 uint32_t current_l3_config;
1108 uint32_t vb_dirty;
1109 anv_cmd_dirty_mask_t dirty;
1110 anv_cmd_dirty_mask_t compute_dirty;
1111 uint32_t num_workgroups_offset;
1112 struct anv_bo *num_workgroups_bo;
1113 VkShaderStageFlags descriptors_dirty;
1114 VkShaderStageFlags push_constants_dirty;
1115 uint32_t scratch_size;
1116 struct anv_pipeline * pipeline;
1117 struct anv_pipeline * compute_pipeline;
1118 struct anv_framebuffer * framebuffer;
1119 struct anv_render_pass * pass;
1120 struct anv_subpass * subpass;
1121 uint32_t restart_index;
1122 struct anv_vertex_binding vertex_bindings[MAX_VBS];
1123 struct anv_descriptor_set * descriptors[MAX_SETS];
1124 struct anv_push_constants * push_constants[MESA_SHADER_STAGES];
1125 struct anv_state binding_tables[MESA_SHADER_STAGES];
1126 struct anv_state samplers[MESA_SHADER_STAGES];
1127 struct anv_dynamic_state dynamic;
1128 bool need_query_wa;
1129
1130 /**
1131 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1132 * valid only when recording a render pass instance.
1133 */
1134 struct anv_attachment_state * attachments;
1135
1136 struct {
1137 struct anv_buffer * index_buffer;
1138 uint32_t index_type; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1139 uint32_t index_offset;
1140 } gen7;
1141 };
1142
1143 struct anv_cmd_pool {
1144 VkAllocationCallbacks alloc;
1145 struct list_head cmd_buffers;
1146 };
1147
1148 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1149
1150 enum anv_cmd_buffer_exec_mode {
1151 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY,
1152 ANV_CMD_BUFFER_EXEC_MODE_EMIT,
1153 ANV_CMD_BUFFER_EXEC_MODE_CHAIN,
1154 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN,
1155 };
1156
1157 struct anv_cmd_buffer {
1158 VK_LOADER_DATA _loader_data;
1159
1160 struct anv_device * device;
1161
1162 struct anv_cmd_pool * pool;
1163 struct list_head pool_link;
1164
1165 struct anv_batch batch;
1166
1167 /* Fields required for the actual chain of anv_batch_bo's.
1168 *
1169 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1170 */
1171 struct list_head batch_bos;
1172 enum anv_cmd_buffer_exec_mode exec_mode;
1173
1174 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1175 * referenced by this command buffer
1176 *
1177 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1178 */
1179 struct anv_vector seen_bbos;
1180
1181 /* A vector of int32_t's for every block of binding tables.
1182 *
1183 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1184 */
1185 struct anv_vector bt_blocks;
1186 uint32_t bt_next;
1187 struct anv_reloc_list surface_relocs;
1188
1189 /* Information needed for execbuf
1190 *
1191 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1192 */
1193 struct {
1194 struct drm_i915_gem_execbuffer2 execbuf;
1195
1196 struct drm_i915_gem_exec_object2 * objects;
1197 uint32_t bo_count;
1198 struct anv_bo ** bos;
1199
1200 /* Allocated length of the 'objects' and 'bos' arrays */
1201 uint32_t array_length;
1202
1203 bool need_reloc;
1204 } execbuf2;
1205
1206 /* Serial for tracking buffer completion */
1207 uint32_t serial;
1208
1209 /* Stream objects for storing temporary data */
1210 struct anv_state_stream surface_state_stream;
1211 struct anv_state_stream dynamic_state_stream;
1212
1213 VkCommandBufferUsageFlags usage_flags;
1214 VkCommandBufferLevel level;
1215
1216 struct anv_cmd_state state;
1217 };
1218
1219 VkResult anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1220 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1221 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer *cmd_buffer);
1222 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer *cmd_buffer);
1223 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer *primary,
1224 struct anv_cmd_buffer *secondary);
1225 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer *cmd_buffer);
1226
1227 VkResult anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
1228 unsigned stage, struct anv_state *bt_state);
1229 VkResult anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
1230 unsigned stage, struct anv_state *state);
1231 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer);
1232 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer *cmd_buffer,
1233 uint32_t stages);
1234
1235 struct anv_state anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1236 const void *data, uint32_t size, uint32_t alignment);
1237 struct anv_state anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1238 uint32_t *a, uint32_t *b,
1239 uint32_t dwords, uint32_t alignment);
1240
1241 struct anv_address
1242 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer *cmd_buffer);
1243 struct anv_state
1244 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer *cmd_buffer,
1245 uint32_t entries, uint32_t *state_offset);
1246 struct anv_state
1247 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer);
1248 struct anv_state
1249 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer *cmd_buffer,
1250 uint32_t size, uint32_t alignment);
1251
1252 VkResult
1253 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer *cmd_buffer);
1254
1255 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer *cmd_buffer);
1256 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer *cmd_buffer);
1257
1258 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1259 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1260 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1261 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1262
1263 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer);
1264
1265 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
1266 const VkRenderPassBeginInfo *info);
1267
1268 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1269 struct anv_subpass *subpass);
1270 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1271 struct anv_subpass *subpass);
1272 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1273 struct anv_subpass *subpass);
1274 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer *cmd_buffer,
1275 struct anv_subpass *subpass);
1276
1277 void gen7_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1278 void gen75_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1279 void gen8_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1280 void gen9_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer);
1281
1282 struct anv_state
1283 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1284 gl_shader_stage stage);
1285 struct anv_state
1286 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer);
1287
1288 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer);
1289 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer *cmd_buffer);
1290
1291 const struct anv_image_view *
1292 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer);
1293
1294 void anv_cmd_buffer_dump(struct anv_cmd_buffer *cmd_buffer);
1295
1296 struct anv_fence {
1297 struct anv_bo bo;
1298 struct drm_i915_gem_execbuffer2 execbuf;
1299 struct drm_i915_gem_exec_object2 exec2_objects[1];
1300 bool ready;
1301 };
1302
1303 struct anv_event {
1304 uint32_t semaphore;
1305 struct anv_state state;
1306 };
1307
1308 struct nir_shader;
1309
1310 struct anv_shader_module {
1311 struct nir_shader * nir;
1312
1313 uint32_t size;
1314 char data[0];
1315 };
1316
1317 static inline gl_shader_stage
1318 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage)
1319 {
1320 assert(__builtin_popcount(vk_stage) == 1);
1321 return ffs(vk_stage) - 1;
1322 }
1323
1324 static inline VkShaderStageFlagBits
1325 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage)
1326 {
1327 return (1 << mesa_stage);
1328 }
1329
1330 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1331
1332 #define anv_foreach_stage(stage, stage_bits) \
1333 for (gl_shader_stage stage, \
1334 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1335 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1336 __tmp &= ~(1 << (stage)))
1337
1338 struct anv_pipeline {
1339 struct anv_device * device;
1340 struct anv_batch batch;
1341 uint32_t batch_data[512];
1342 struct anv_reloc_list batch_relocs;
1343 uint32_t dynamic_state_mask;
1344 struct anv_dynamic_state dynamic_state;
1345
1346 struct anv_pipeline_layout * layout;
1347 bool use_repclear;
1348
1349 struct brw_vs_prog_data vs_prog_data;
1350 struct brw_wm_prog_data wm_prog_data;
1351 struct brw_gs_prog_data gs_prog_data;
1352 struct brw_cs_prog_data cs_prog_data;
1353 bool writes_point_size;
1354 struct brw_stage_prog_data * prog_data[MESA_SHADER_STAGES];
1355 uint32_t scratch_start[MESA_SHADER_STAGES];
1356 uint32_t total_scratch;
1357 struct {
1358 uint32_t vs_start;
1359 uint32_t vs_size;
1360 uint32_t nr_vs_entries;
1361 uint32_t gs_start;
1362 uint32_t gs_size;
1363 uint32_t nr_gs_entries;
1364 } urb;
1365
1366 VkShaderStageFlags active_stages;
1367 struct anv_state blend_state;
1368 uint32_t vs_simd8;
1369 uint32_t vs_vec4;
1370 uint32_t ps_simd8;
1371 uint32_t ps_simd16;
1372 uint32_t ps_ksp0;
1373 uint32_t ps_ksp2;
1374 uint32_t ps_grf_start0;
1375 uint32_t ps_grf_start2;
1376 uint32_t gs_kernel;
1377 uint32_t gs_vertex_count;
1378 uint32_t cs_simd;
1379
1380 uint32_t vb_used;
1381 uint32_t binding_stride[MAX_VBS];
1382 bool instancing_enable[MAX_VBS];
1383 bool primitive_restart;
1384 uint32_t topology;
1385
1386 uint32_t cs_thread_width_max;
1387 uint32_t cs_right_mask;
1388
1389 struct {
1390 uint32_t sf[7];
1391 uint32_t depth_stencil_state[3];
1392 } gen7;
1393
1394 struct {
1395 uint32_t sf[4];
1396 uint32_t raster[5];
1397 uint32_t wm_depth_stencil[3];
1398 } gen8;
1399
1400 struct {
1401 uint32_t wm_depth_stencil[4];
1402 } gen9;
1403 };
1404
1405 struct anv_graphics_pipeline_create_info {
1406 /**
1407 * If non-negative, overrides the color attachment count of the pipeline's
1408 * subpass.
1409 */
1410 int8_t color_attachment_count;
1411
1412 bool use_repclear;
1413 bool disable_viewport;
1414 bool disable_scissor;
1415 bool disable_vs;
1416 bool use_rectlist;
1417 };
1418
1419 VkResult
1420 anv_pipeline_init(struct anv_pipeline *pipeline, struct anv_device *device,
1421 struct anv_pipeline_cache *cache,
1422 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1423 const struct anv_graphics_pipeline_create_info *extra,
1424 const VkAllocationCallbacks *alloc);
1425
1426 VkResult
1427 anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
1428 struct anv_pipeline_cache *cache,
1429 const VkComputePipelineCreateInfo *info,
1430 struct anv_shader_module *module,
1431 const char *entrypoint,
1432 const VkSpecializationInfo *spec_info);
1433
1434 VkResult
1435 anv_graphics_pipeline_create(VkDevice device,
1436 VkPipelineCache cache,
1437 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1438 const struct anv_graphics_pipeline_create_info *extra,
1439 const VkAllocationCallbacks *alloc,
1440 VkPipeline *pPipeline);
1441
1442 VkResult
1443 gen7_graphics_pipeline_create(VkDevice _device,
1444 struct anv_pipeline_cache *cache,
1445 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1446 const struct anv_graphics_pipeline_create_info *extra,
1447 const VkAllocationCallbacks *alloc,
1448 VkPipeline *pPipeline);
1449
1450 VkResult
1451 gen75_graphics_pipeline_create(VkDevice _device,
1452 struct anv_pipeline_cache *cache,
1453 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1454 const struct anv_graphics_pipeline_create_info *extra,
1455 const VkAllocationCallbacks *alloc,
1456 VkPipeline *pPipeline);
1457
1458 VkResult
1459 gen8_graphics_pipeline_create(VkDevice _device,
1460 struct anv_pipeline_cache *cache,
1461 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1462 const struct anv_graphics_pipeline_create_info *extra,
1463 const VkAllocationCallbacks *alloc,
1464 VkPipeline *pPipeline);
1465 VkResult
1466 gen9_graphics_pipeline_create(VkDevice _device,
1467 struct anv_pipeline_cache *cache,
1468 const VkGraphicsPipelineCreateInfo *pCreateInfo,
1469 const struct anv_graphics_pipeline_create_info *extra,
1470 const VkAllocationCallbacks *alloc,
1471 VkPipeline *pPipeline);
1472 VkResult
1473 gen7_compute_pipeline_create(VkDevice _device,
1474 struct anv_pipeline_cache *cache,
1475 const VkComputePipelineCreateInfo *pCreateInfo,
1476 const VkAllocationCallbacks *alloc,
1477 VkPipeline *pPipeline);
1478 VkResult
1479 gen75_compute_pipeline_create(VkDevice _device,
1480 struct anv_pipeline_cache *cache,
1481 const VkComputePipelineCreateInfo *pCreateInfo,
1482 const VkAllocationCallbacks *alloc,
1483 VkPipeline *pPipeline);
1484
1485 VkResult
1486 gen8_compute_pipeline_create(VkDevice _device,
1487 struct anv_pipeline_cache *cache,
1488 const VkComputePipelineCreateInfo *pCreateInfo,
1489 const VkAllocationCallbacks *alloc,
1490 VkPipeline *pPipeline);
1491 VkResult
1492 gen9_compute_pipeline_create(VkDevice _device,
1493 struct anv_pipeline_cache *cache,
1494 const VkComputePipelineCreateInfo *pCreateInfo,
1495 const VkAllocationCallbacks *alloc,
1496 VkPipeline *pPipeline);
1497
1498 struct anv_format_swizzle {
1499 unsigned r:2;
1500 unsigned g:2;
1501 unsigned b:2;
1502 unsigned a:2;
1503 };
1504
1505 struct anv_format {
1506 const VkFormat vk_format;
1507 const char *name;
1508 enum isl_format surface_format; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1509 const struct isl_format_layout *isl_layout;
1510 uint16_t depth_format; /**< 3DSTATE_DEPTH_BUFFER.SurfaceFormat */
1511 struct anv_format_swizzle swizzle;
1512 bool has_stencil;
1513 };
1514
1515 const struct anv_format *
1516 anv_format_for_vk_format(VkFormat format);
1517
1518 enum isl_format
1519 anv_get_isl_format(VkFormat format, VkImageAspectFlags aspect,
1520 VkImageTiling tiling, struct anv_format_swizzle *swizzle);
1521
1522 static inline bool
1523 anv_format_is_color(const struct anv_format *format)
1524 {
1525 return !format->depth_format && !format->has_stencil;
1526 }
1527
1528 static inline bool
1529 anv_format_is_depth_or_stencil(const struct anv_format *format)
1530 {
1531 return format->depth_format || format->has_stencil;
1532 }
1533
1534 /**
1535 * Subsurface of an anv_image.
1536 */
1537 struct anv_surface {
1538 struct isl_surf isl;
1539
1540 /**
1541 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1542 */
1543 uint32_t offset;
1544 };
1545
1546 struct anv_image {
1547 VkImageType type;
1548 /* The original VkFormat provided by the client. This may not match any
1549 * of the actual surface formats.
1550 */
1551 VkFormat vk_format;
1552 const struct anv_format *format;
1553 VkExtent3D extent;
1554 uint32_t levels;
1555 uint32_t array_size;
1556 uint32_t samples; /**< VkImageCreateInfo::samples */
1557 VkImageUsageFlags usage; /**< Superset of VkImageCreateInfo::usage. */
1558 VkImageTiling tiling; /** VkImageCreateInfo::tiling */
1559
1560 VkDeviceSize size;
1561 uint32_t alignment;
1562
1563 /* Set when bound */
1564 struct anv_bo *bo;
1565 VkDeviceSize offset;
1566
1567 /**
1568 * Image subsurfaces
1569 *
1570 * For each foo, anv_image::foo_surface is valid if and only if
1571 * anv_image::format has a foo aspect.
1572 *
1573 * The hardware requires that the depth buffer and stencil buffer be
1574 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1575 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1576 * allocate the depth and stencil buffers as separate surfaces in the same
1577 * bo.
1578 */
1579 union {
1580 struct anv_surface color_surface;
1581
1582 struct {
1583 struct anv_surface depth_surface;
1584 struct anv_surface stencil_surface;
1585 };
1586 };
1587 };
1588
1589 struct anv_image_view {
1590 const struct anv_image *image; /**< VkImageViewCreateInfo::image */
1591 struct anv_bo *bo;
1592 uint32_t offset; /**< Offset into bo. */
1593
1594 VkImageAspectFlags aspect_mask;
1595 VkFormat vk_format;
1596 VkComponentMapping swizzle;
1597 enum isl_format format;
1598 uint32_t base_layer;
1599 uint32_t base_mip;
1600 VkExtent3D level_0_extent; /**< Extent of ::image's level 0 adjusted for ::vk_format. */
1601 VkExtent3D extent; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1602
1603 /** RENDER_SURFACE_STATE when using image as a color render target. */
1604 struct anv_state color_rt_surface_state;
1605
1606 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1607 struct anv_state sampler_surface_state;
1608
1609 /** RENDER_SURFACE_STATE when using image as a storage image. */
1610 struct anv_state storage_surface_state;
1611 };
1612
1613 struct anv_image_create_info {
1614 const VkImageCreateInfo *vk_info;
1615 isl_tiling_flags_t isl_tiling_flags;
1616 uint32_t stride;
1617 };
1618
1619 VkResult anv_image_create(VkDevice _device,
1620 const struct anv_image_create_info *info,
1621 const VkAllocationCallbacks* alloc,
1622 VkImage *pImage);
1623
1624 struct anv_surface *
1625 anv_image_get_surface_for_aspect_mask(struct anv_image *image,
1626 VkImageAspectFlags aspect_mask);
1627
1628 void anv_image_view_init(struct anv_image_view *view,
1629 struct anv_device *device,
1630 const VkImageViewCreateInfo* pCreateInfo,
1631 struct anv_cmd_buffer *cmd_buffer,
1632 uint32_t offset);
1633
1634 void
1635 anv_fill_image_surface_state(struct anv_device *device, struct anv_state state,
1636 struct anv_image_view *iview,
1637 const VkImageViewCreateInfo *pCreateInfo,
1638 VkImageUsageFlagBits usage);
1639 void
1640 gen7_fill_image_surface_state(struct anv_device *device, void *state_map,
1641 struct anv_image_view *iview,
1642 const VkImageViewCreateInfo *pCreateInfo,
1643 VkImageUsageFlagBits usage);
1644 void
1645 gen75_fill_image_surface_state(struct anv_device *device, void *state_map,
1646 struct anv_image_view *iview,
1647 const VkImageViewCreateInfo *pCreateInfo,
1648 VkImageUsageFlagBits usage);
1649 void
1650 gen8_fill_image_surface_state(struct anv_device *device, void *state_map,
1651 struct anv_image_view *iview,
1652 const VkImageViewCreateInfo *pCreateInfo,
1653 VkImageUsageFlagBits usage);
1654 void
1655 gen9_fill_image_surface_state(struct anv_device *device, void *state_map,
1656 struct anv_image_view *iview,
1657 const VkImageViewCreateInfo *pCreateInfo,
1658 VkImageUsageFlagBits usage);
1659
1660 struct anv_buffer_view {
1661 enum isl_format format; /**< VkBufferViewCreateInfo::format */
1662 struct anv_bo *bo;
1663 uint32_t offset; /**< Offset into bo. */
1664 uint64_t range; /**< VkBufferViewCreateInfo::range */
1665
1666 struct anv_state surface_state;
1667 struct anv_state storage_surface_state;
1668 };
1669
1670 const struct anv_format *
1671 anv_format_for_descriptor_type(VkDescriptorType type);
1672
1673 void anv_fill_buffer_surface_state(struct anv_device *device,
1674 struct anv_state state,
1675 enum isl_format format,
1676 uint32_t offset, uint32_t range,
1677 uint32_t stride);
1678
1679 void gen7_fill_buffer_surface_state(void *state, enum isl_format format,
1680 uint32_t offset, uint32_t range,
1681 uint32_t stride);
1682 void gen75_fill_buffer_surface_state(void *state, enum isl_format format,
1683 uint32_t offset, uint32_t range,
1684 uint32_t stride);
1685 void gen8_fill_buffer_surface_state(void *state, enum isl_format format,
1686 uint32_t offset, uint32_t range,
1687 uint32_t stride);
1688 void gen9_fill_buffer_surface_state(void *state, enum isl_format format,
1689 uint32_t offset, uint32_t range,
1690 uint32_t stride);
1691
1692 void anv_image_view_fill_image_param(struct anv_device *device,
1693 struct anv_image_view *view,
1694 struct brw_image_param *param);
1695 void anv_buffer_view_fill_image_param(struct anv_device *device,
1696 struct anv_buffer_view *view,
1697 struct brw_image_param *param);
1698
1699 struct anv_sampler {
1700 uint32_t state[4];
1701 };
1702
1703 struct anv_framebuffer {
1704 uint32_t width;
1705 uint32_t height;
1706 uint32_t layers;
1707
1708 uint32_t attachment_count;
1709 struct anv_image_view * attachments[0];
1710 };
1711
1712 struct anv_subpass {
1713 uint32_t input_count;
1714 uint32_t * input_attachments;
1715 uint32_t color_count;
1716 uint32_t * color_attachments;
1717 uint32_t * resolve_attachments;
1718 uint32_t depth_stencil_attachment;
1719
1720 /** Subpass has at least one resolve attachment */
1721 bool has_resolve;
1722 };
1723
1724 struct anv_render_pass_attachment {
1725 const struct anv_format *format;
1726 uint32_t samples;
1727 VkAttachmentLoadOp load_op;
1728 VkAttachmentLoadOp stencil_load_op;
1729 };
1730
1731 struct anv_render_pass {
1732 uint32_t attachment_count;
1733 uint32_t subpass_count;
1734 uint32_t * subpass_attachments;
1735 struct anv_render_pass_attachment * attachments;
1736 struct anv_subpass subpasses[0];
1737 };
1738
1739 extern struct anv_render_pass anv_meta_dummy_renderpass;
1740
1741 struct anv_query_pool_slot {
1742 uint64_t begin;
1743 uint64_t end;
1744 uint64_t available;
1745 };
1746
1747 struct anv_query_pool {
1748 VkQueryType type;
1749 uint32_t slots;
1750 struct anv_bo bo;
1751 };
1752
1753 VkResult anv_device_init_meta(struct anv_device *device);
1754 void anv_device_finish_meta(struct anv_device *device);
1755
1756 void *anv_lookup_entrypoint(const char *name);
1757
1758 void anv_dump_image_to_ppm(struct anv_device *device,
1759 struct anv_image *image, unsigned miplevel,
1760 unsigned array_layer, const char *filename);
1761
1762 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1763 \
1764 static inline struct __anv_type * \
1765 __anv_type ## _from_handle(__VkType _handle) \
1766 { \
1767 return (struct __anv_type *) _handle; \
1768 } \
1769 \
1770 static inline __VkType \
1771 __anv_type ## _to_handle(struct __anv_type *_obj) \
1772 { \
1773 return (__VkType) _obj; \
1774 }
1775
1776 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1777 \
1778 static inline struct __anv_type * \
1779 __anv_type ## _from_handle(__VkType _handle) \
1780 { \
1781 return (struct __anv_type *)(uintptr_t) _handle; \
1782 } \
1783 \
1784 static inline __VkType \
1785 __anv_type ## _to_handle(struct __anv_type *_obj) \
1786 { \
1787 return (__VkType)(uintptr_t) _obj; \
1788 }
1789
1790 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1791 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1792
1793 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer, VkCommandBuffer)
1794 ANV_DEFINE_HANDLE_CASTS(anv_device, VkDevice)
1795 ANV_DEFINE_HANDLE_CASTS(anv_instance, VkInstance)
1796 ANV_DEFINE_HANDLE_CASTS(anv_physical_device, VkPhysicalDevice)
1797 ANV_DEFINE_HANDLE_CASTS(anv_queue, VkQueue)
1798
1799 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool, VkCommandPool)
1800 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer, VkBuffer)
1801 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view, VkBufferView)
1802 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set, VkDescriptorSet)
1803 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout, VkDescriptorSetLayout)
1804 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory, VkDeviceMemory)
1805 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence, VkFence)
1806 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event, VkEvent)
1807 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer, VkFramebuffer)
1808 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image, VkImage)
1809 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view, VkImageView);
1810 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache, VkPipelineCache)
1811 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline, VkPipeline)
1812 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout, VkPipelineLayout)
1813 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool, VkQueryPool)
1814 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass, VkRenderPass)
1815 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler, VkSampler)
1816 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module, VkShaderModule)
1817
1818 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1819 \
1820 static inline const __VkType * \
1821 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1822 { \
1823 return (const __VkType *) __anv_obj; \
1824 }
1825
1826 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1827 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1828
1829 ANV_DEFINE_STRUCT_CASTS(anv_common, VkMemoryBarrier)
1830 ANV_DEFINE_STRUCT_CASTS(anv_common, VkBufferMemoryBarrier)
1831 ANV_DEFINE_STRUCT_CASTS(anv_common, VkImageMemoryBarrier)
1832
1833 #ifdef __cplusplus
1834 }
1835 #endif