2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
33 anv_env_get_int(const char *name
)
35 const char *val
= getenv(name
);
40 return strtol(val
, NULL
, 0);
44 fill_physical_device(struct anv_physical_device
*device
,
45 struct anv_instance
*instance
,
50 fd
= open("/dev/dri/renderD128", O_RDWR
| O_CLOEXEC
);
52 return vk_error(VK_ERROR_UNAVAILABLE
);
54 device
->instance
= instance
;
57 device
->chipset_id
= anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device
->no_hw
= false;
59 if (device
->chipset_id
) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
63 device
->chipset_id
= anv_gem_get_param(fd
, I915_PARAM_CHIPSET_ID
);
65 if (!device
->chipset_id
)
68 device
->name
= brw_get_device_name(device
->chipset_id
);
69 device
->info
= brw_get_device_info(device
->chipset_id
, -1);
73 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_WAIT_TIMEOUT
))
76 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_EXECBUF2
))
79 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_LLC
))
82 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_EXEC_CONSTANTS
))
92 return vk_error(VK_ERROR_UNAVAILABLE
);
95 static void *default_alloc(
99 VkSystemAllocType allocType
)
104 static void default_free(
111 static const VkAllocCallbacks default_alloc_callbacks
= {
113 .pfnAlloc
= default_alloc
,
114 .pfnFree
= default_free
117 VkResult
anv_CreateInstance(
118 const VkInstanceCreateInfo
* pCreateInfo
,
119 VkInstance
* pInstance
)
121 struct anv_instance
*instance
;
122 const VkAllocCallbacks
*alloc_callbacks
= &default_alloc_callbacks
;
123 void *user_data
= NULL
;
126 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
);
128 if (pCreateInfo
->pAllocCb
) {
129 alloc_callbacks
= pCreateInfo
->pAllocCb
;
130 user_data
= pCreateInfo
->pAllocCb
->pUserData
;
132 instance
= alloc_callbacks
->pfnAlloc(user_data
, sizeof(*instance
), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
137 instance
->pAllocUserData
= alloc_callbacks
->pUserData
;
138 instance
->pfnAlloc
= alloc_callbacks
->pfnAlloc
;
139 instance
->pfnFree
= alloc_callbacks
->pfnFree
;
140 instance
->apiVersion
= pCreateInfo
->pAppInfo
->apiVersion
;
142 instance
->physicalDeviceCount
= 0;
143 result
= fill_physical_device(&instance
->physicalDevice
,
144 instance
, "/dev/dri/renderD128");
146 if (result
!= VK_SUCCESS
)
149 instance
->physicalDeviceCount
++;
150 *pInstance
= (VkInstance
) instance
;
155 VkResult
anv_DestroyInstance(
156 VkInstance _instance
)
158 struct anv_instance
*instance
= (struct anv_instance
*) _instance
;
160 instance
->pfnFree(instance
->pAllocUserData
, instance
);
165 VkResult
anv_EnumeratePhysicalDevices(
166 VkInstance _instance
,
167 uint32_t* pPhysicalDeviceCount
,
168 VkPhysicalDevice
* pPhysicalDevices
)
170 struct anv_instance
*instance
= (struct anv_instance
*) _instance
;
172 if (*pPhysicalDeviceCount
>= 1)
173 pPhysicalDevices
[0] = (VkPhysicalDevice
) &instance
->physicalDevice
;
174 *pPhysicalDeviceCount
= instance
->physicalDeviceCount
;
179 VkResult
anv_GetPhysicalDeviceInfo(
180 VkPhysicalDevice physicalDevice
,
181 VkPhysicalDeviceInfoType infoType
,
185 struct anv_physical_device
*device
= (struct anv_physical_device
*) physicalDevice
;
186 VkPhysicalDeviceProperties
*properties
;
187 VkPhysicalDevicePerformance
*performance
;
188 VkPhysicalDeviceQueueProperties
*queue_properties
;
189 VkPhysicalDeviceMemoryProperties
*memory_properties
;
190 VkDisplayPropertiesWSI
*display_properties
;
191 uint64_t ns_per_tick
= 80;
193 switch ((uint32_t) infoType
) {
194 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES
:
197 *pDataSize
= sizeof(*properties
);
201 properties
->apiVersion
= 1;
202 properties
->driverVersion
= 1;
203 properties
->vendorId
= 0x8086;
204 properties
->deviceId
= device
->chipset_id
;
205 properties
->deviceType
= VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU
;
206 strcpy(properties
->deviceName
, device
->name
);
207 properties
->maxInlineMemoryUpdateSize
= 0;
208 properties
->maxBoundDescriptorSets
= MAX_SETS
;
209 properties
->maxThreadGroupSize
= 512;
210 properties
->timestampFrequency
= 1000 * 1000 * 1000 / ns_per_tick
;
211 properties
->multiColorAttachmentClears
= true;
212 properties
->maxDescriptorSets
= 8;
213 properties
->maxViewports
= 16;
214 properties
->maxColorAttachments
= 8;
217 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE
:
220 *pDataSize
= sizeof(*performance
);
224 performance
->maxDeviceClock
= 1.0;
225 performance
->aluPerClock
= 1.0;
226 performance
->texPerClock
= 1.0;
227 performance
->primsPerClock
= 1.0;
228 performance
->pixelsPerClock
= 1.0;
231 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES
:
232 queue_properties
= pData
;
234 *pDataSize
= sizeof(*queue_properties
);
238 queue_properties
->queueFlags
= 0;
239 queue_properties
->queueCount
= 1;
240 queue_properties
->supportsTimestamps
= true;
243 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES
:
244 memory_properties
= pData
;
246 *pDataSize
= sizeof(*memory_properties
);
250 memory_properties
->supportsMigration
= false;
251 memory_properties
->supportsPinning
= false;
254 case VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI
:
255 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI");
257 *pDataSize
= sizeof(*display_properties
);
261 display_properties
= pData
;
262 display_properties
->display
= 0;
263 display_properties
->physicalResolution
= (VkExtent2D
) { 0, 0 };
266 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI
:
267 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI");
272 return VK_UNSUPPORTED
;
277 void * vkGetProcAddr(
278 VkPhysicalDevice physicalDevice
,
281 return anv_lookup_entrypoint(pName
);
285 parse_debug_flags(struct anv_device
*device
)
287 const char *debug
, *p
, *end
;
289 debug
= getenv("INTEL_DEBUG");
290 device
->dump_aub
= false;
292 for (p
= debug
; *p
; p
= end
+ 1) {
293 end
= strchrnul(p
, ',');
294 if (end
- p
== 3 && memcmp(p
, "aub", 3) == 0)
295 device
->dump_aub
= true;
296 if (end
- p
== 5 && memcmp(p
, "no_hw", 5) == 0)
297 device
->no_hw
= true;
305 anv_queue_init(struct anv_device
*device
, struct anv_queue
*queue
)
307 queue
->device
= device
;
308 queue
->pool
= &device
->surface_state_pool
;
310 queue
->completed_serial
= anv_state_pool_alloc(queue
->pool
, 4, 4);
311 if (queue
->completed_serial
.map
== NULL
)
312 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY
);
314 *(uint32_t *)queue
->completed_serial
.map
= 0;
315 queue
->next_serial
= 1;
321 anv_queue_finish(struct anv_queue
*queue
)
324 /* This gets torn down with the device so we only need to do this if
325 * valgrind is present.
327 anv_state_pool_free(queue
->pool
, queue
->completed_serial
);
332 anv_device_init_border_colors(struct anv_device
*device
)
334 float float_border_colors
[][4] = {
335 [VK_BORDER_COLOR_OPAQUE_WHITE
] = { 1.0, 1.0, 1.0, 1.0 },
336 [VK_BORDER_COLOR_TRANSPARENT_BLACK
] = { 0.0, 0.0, 0.0, 0.0 },
337 [VK_BORDER_COLOR_OPAQUE_BLACK
] = { 0.0, 0.0, 0.0, 1.0 }
340 uint32_t uint32_border_colors
[][4] = {
341 [VK_BORDER_COLOR_OPAQUE_WHITE
] = { 1, 1, 1, 1 },
342 [VK_BORDER_COLOR_TRANSPARENT_BLACK
] = { 0, 0, 0, 0 },
343 [VK_BORDER_COLOR_OPAQUE_BLACK
] = { 0, 0, 0, 1 }
346 device
->float_border_colors
=
347 anv_state_pool_alloc(&device
->dynamic_state_pool
,
348 sizeof(float_border_colors
), 32);
349 memcpy(device
->float_border_colors
.map
,
350 float_border_colors
, sizeof(float_border_colors
));
352 device
->uint32_border_colors
=
353 anv_state_pool_alloc(&device
->dynamic_state_pool
,
354 sizeof(uint32_border_colors
), 32);
355 memcpy(device
->uint32_border_colors
.map
,
356 uint32_border_colors
, sizeof(uint32_border_colors
));
360 static const uint32_t BATCH_SIZE
= 8192;
362 VkResult
anv_CreateDevice(
363 VkPhysicalDevice _physicalDevice
,
364 const VkDeviceCreateInfo
* pCreateInfo
,
367 struct anv_physical_device
*physicalDevice
=
368 (struct anv_physical_device
*) _physicalDevice
;
369 struct anv_instance
*instance
= physicalDevice
->instance
;
370 struct anv_device
*device
;
372 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO
);
374 device
= instance
->pfnAlloc(instance
->pAllocUserData
,
376 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
378 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
380 device
->no_hw
= physicalDevice
->no_hw
;
381 parse_debug_flags(device
);
383 device
->instance
= physicalDevice
->instance
;
384 device
->fd
= open("/dev/dri/renderD128", O_RDWR
| O_CLOEXEC
);
385 if (device
->fd
== -1)
388 device
->context_id
= anv_gem_create_context(device
);
389 if (device
->context_id
== -1)
392 anv_bo_pool_init(&device
->batch_bo_pool
, device
, BATCH_SIZE
);
394 anv_block_pool_init(&device
->dynamic_state_block_pool
, device
, 2048);
396 anv_state_pool_init(&device
->dynamic_state_pool
,
397 &device
->dynamic_state_block_pool
);
399 anv_block_pool_init(&device
->instruction_block_pool
, device
, 2048);
400 anv_block_pool_init(&device
->surface_state_block_pool
, device
, 2048);
402 anv_state_pool_init(&device
->surface_state_pool
,
403 &device
->surface_state_block_pool
);
405 anv_block_pool_init(&device
->scratch_block_pool
, device
, 0x10000);
407 device
->info
= *physicalDevice
->info
;
409 device
->compiler
= anv_compiler_create(device
);
410 device
->aub_writer
= NULL
;
412 pthread_mutex_init(&device
->mutex
, NULL
);
414 anv_queue_init(device
, &device
->queue
);
416 anv_device_init_meta(device
);
418 anv_device_init_border_colors(device
);
420 *pDevice
= (VkDevice
) device
;
427 anv_device_free(device
, device
);
429 return vk_error(VK_ERROR_UNAVAILABLE
);
432 VkResult
anv_DestroyDevice(
435 struct anv_device
*device
= (struct anv_device
*) _device
;
437 anv_compiler_destroy(device
->compiler
);
439 anv_queue_finish(&device
->queue
);
441 anv_device_finish_meta(device
);
444 /* We only need to free these to prevent valgrind errors. The backing
445 * BO will go away in a couple of lines so we don't actually leak.
447 anv_state_pool_free(&device
->dynamic_state_pool
,
448 device
->float_border_colors
);
449 anv_state_pool_free(&device
->dynamic_state_pool
,
450 device
->uint32_border_colors
);
453 anv_bo_pool_finish(&device
->batch_bo_pool
);
454 anv_block_pool_finish(&device
->dynamic_state_block_pool
);
455 anv_block_pool_finish(&device
->instruction_block_pool
);
456 anv_block_pool_finish(&device
->surface_state_block_pool
);
460 if (device
->aub_writer
)
461 anv_aub_writer_destroy(device
->aub_writer
);
463 anv_device_free(device
, device
);
468 VkResult
anv_GetGlobalExtensionInfo(
469 VkExtensionInfoType infoType
,
470 uint32_t extensionIndex
,
474 static const VkExtensionProperties extensions
[] = {
476 .extName
= "VK_WSI_LunarG",
480 uint32_t count
= ARRAY_SIZE(extensions
);
483 case VK_EXTENSION_INFO_TYPE_COUNT
:
484 memcpy(pData
, &count
, sizeof(count
));
485 *pDataSize
= sizeof(count
);
488 case VK_EXTENSION_INFO_TYPE_PROPERTIES
:
489 if (extensionIndex
>= count
)
490 return vk_error(VK_ERROR_INVALID_EXTENSION
);
492 memcpy(pData
, &extensions
[extensionIndex
], sizeof(extensions
[0]));
493 *pDataSize
= sizeof(extensions
[0]);
497 return VK_UNSUPPORTED
;
501 VkResult
anv_GetPhysicalDeviceExtensionInfo(
502 VkPhysicalDevice physicalDevice
,
503 VkExtensionInfoType infoType
,
504 uint32_t extensionIndex
,
511 case VK_EXTENSION_INFO_TYPE_COUNT
:
520 case VK_EXTENSION_INFO_TYPE_PROPERTIES
:
521 return vk_error(VK_ERROR_INVALID_EXTENSION
);
524 return VK_UNSUPPORTED
;
528 VkResult
anv_EnumerateLayers(
529 VkPhysicalDevice physicalDevice
,
530 size_t maxStringSize
,
532 char* const* pOutLayers
,
540 VkResult
anv_GetDeviceQueue(
542 uint32_t queueNodeIndex
,
546 struct anv_device
*device
= (struct anv_device
*) _device
;
548 assert(queueIndex
== 0);
550 *pQueue
= (VkQueue
) &device
->queue
;
556 anv_reloc_list_init(struct anv_reloc_list
*list
, struct anv_device
*device
)
558 list
->num_relocs
= 0;
559 list
->array_length
= 256;
561 anv_device_alloc(device
, list
->array_length
* sizeof(*list
->relocs
), 8,
562 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
564 if (list
->relocs
== NULL
)
565 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
568 anv_device_alloc(device
, list
->array_length
* sizeof(*list
->reloc_bos
), 8,
569 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
571 if (list
->relocs
== NULL
) {
572 anv_device_free(device
, list
->relocs
);
573 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
580 anv_reloc_list_finish(struct anv_reloc_list
*list
, struct anv_device
*device
)
582 anv_device_free(device
, list
->relocs
);
583 anv_device_free(device
, list
->reloc_bos
);
587 anv_reloc_list_grow(struct anv_reloc_list
*list
, struct anv_device
*device
,
588 size_t num_additional_relocs
)
590 if (list
->num_relocs
+ num_additional_relocs
<= list
->array_length
)
593 size_t new_length
= list
->array_length
* 2;
594 while (new_length
< list
->num_relocs
+ num_additional_relocs
)
597 struct drm_i915_gem_relocation_entry
*new_relocs
=
598 anv_device_alloc(device
, new_length
* sizeof(*list
->relocs
), 8,
599 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
600 if (new_relocs
== NULL
)
601 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
603 struct anv_bo
**new_reloc_bos
=
604 anv_device_alloc(device
, new_length
* sizeof(*list
->reloc_bos
), 8,
605 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
606 if (new_relocs
== NULL
) {
607 anv_device_free(device
, new_relocs
);
608 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
611 memcpy(new_relocs
, list
->relocs
, list
->num_relocs
* sizeof(*list
->relocs
));
612 memcpy(new_reloc_bos
, list
->reloc_bos
,
613 list
->num_relocs
* sizeof(*list
->reloc_bos
));
615 anv_device_free(device
, list
->relocs
);
616 anv_device_free(device
, list
->reloc_bos
);
618 list
->relocs
= new_relocs
;
619 list
->reloc_bos
= new_reloc_bos
;
625 anv_batch_bo_create(struct anv_device
*device
, struct anv_batch_bo
**bbo_out
)
629 struct anv_batch_bo
*bbo
=
630 anv_device_alloc(device
, sizeof(*bbo
), 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
632 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
635 bbo
->prev_batch_bo
= NULL
;
637 result
= anv_bo_pool_alloc(&device
->batch_bo_pool
, &bbo
->bo
);
638 if (result
!= VK_SUCCESS
) {
639 anv_device_free(device
, bbo
);
649 anv_batch_bo_start(struct anv_batch_bo
*bbo
, struct anv_batch
*batch
,
650 size_t batch_padding
)
652 batch
->next
= batch
->start
= bbo
->bo
.map
;
653 batch
->end
= bbo
->bo
.map
+ bbo
->bo
.size
- batch_padding
;
654 bbo
->first_reloc
= batch
->relocs
.num_relocs
;
658 anv_batch_bo_finish(struct anv_batch_bo
*bbo
, struct anv_batch
*batch
)
660 assert(batch
->start
== bbo
->bo
.map
);
661 bbo
->length
= batch
->next
- batch
->start
;
662 VG(VALGRIND_CHECK_MEM_IS_DEFINED(batch
->start
, bbo
->length
));
663 bbo
->num_relocs
= batch
->relocs
.num_relocs
- bbo
->first_reloc
;
667 anv_batch_bo_destroy(struct anv_batch_bo
*bbo
, struct anv_device
*device
)
669 anv_bo_pool_free(&device
->batch_bo_pool
, &bbo
->bo
);
670 anv_device_free(device
, bbo
);
674 anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
)
676 if (batch
->next
+ num_dwords
* 4 > batch
->end
)
677 batch
->extend_cb(batch
, batch
->user_data
);
679 void *p
= batch
->next
;
681 batch
->next
+= num_dwords
* 4;
682 assert(batch
->next
<= batch
->end
);
688 anv_reloc_list_append(struct anv_reloc_list
*list
, struct anv_device
*device
,
689 struct anv_reloc_list
*other
, uint32_t offset
)
691 anv_reloc_list_grow(list
, device
, other
->num_relocs
);
692 /* TODO: Handle failure */
694 memcpy(&list
->relocs
[list
->num_relocs
], &other
->relocs
[0],
695 other
->num_relocs
* sizeof(other
->relocs
[0]));
696 memcpy(&list
->reloc_bos
[list
->num_relocs
], &other
->reloc_bos
[0],
697 other
->num_relocs
* sizeof(other
->reloc_bos
[0]));
699 for (uint32_t i
= 0; i
< other
->num_relocs
; i
++)
700 list
->relocs
[i
+ list
->num_relocs
].offset
+= offset
;
702 list
->num_relocs
+= other
->num_relocs
;
706 anv_reloc_list_add(struct anv_reloc_list
*list
, struct anv_device
*device
,
707 uint32_t offset
, struct anv_bo
*target_bo
, uint32_t delta
)
709 struct drm_i915_gem_relocation_entry
*entry
;
712 anv_reloc_list_grow(list
, device
, 1);
713 /* TODO: Handle failure */
715 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
716 index
= list
->num_relocs
++;
717 list
->reloc_bos
[index
] = target_bo
;
718 entry
= &list
->relocs
[index
];
719 entry
->target_handle
= target_bo
->gem_handle
;
720 entry
->delta
= delta
;
721 entry
->offset
= offset
;
722 entry
->presumed_offset
= target_bo
->offset
;
723 entry
->read_domains
= 0;
724 entry
->write_domain
= 0;
726 return target_bo
->offset
+ delta
;
730 anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
)
732 uint32_t size
, offset
;
734 size
= other
->next
- other
->start
;
735 assert(size
% 4 == 0);
737 if (batch
->next
+ size
> batch
->end
)
738 batch
->extend_cb(batch
, batch
->user_data
);
740 assert(batch
->next
+ size
<= batch
->end
);
742 memcpy(batch
->next
, other
->start
, size
);
744 offset
= batch
->next
- batch
->start
;
745 anv_reloc_list_append(&batch
->relocs
, batch
->device
,
746 &other
->relocs
, offset
);
752 anv_batch_emit_reloc(struct anv_batch
*batch
,
753 void *location
, struct anv_bo
*bo
, uint32_t delta
)
755 return anv_reloc_list_add(&batch
->relocs
, batch
->device
,
756 location
- batch
->start
, bo
, delta
);
759 VkResult
anv_QueueSubmit(
761 uint32_t cmdBufferCount
,
762 const VkCmdBuffer
* pCmdBuffers
,
765 struct anv_queue
*queue
= (struct anv_queue
*) _queue
;
766 struct anv_device
*device
= queue
->device
;
767 struct anv_fence
*fence
= (struct anv_fence
*) _fence
;
770 for (uint32_t i
= 0; i
< cmdBufferCount
; i
++) {
771 struct anv_cmd_buffer
*cmd_buffer
=
772 (struct anv_cmd_buffer
*) pCmdBuffers
[i
];
774 if (device
->dump_aub
)
775 anv_cmd_buffer_dump(cmd_buffer
);
777 if (!device
->no_hw
) {
778 ret
= anv_gem_execbuffer(device
, &cmd_buffer
->execbuf
);
780 return vk_error(VK_ERROR_UNKNOWN
);
783 ret
= anv_gem_execbuffer(device
, &fence
->execbuf
);
785 return vk_error(VK_ERROR_UNKNOWN
);
788 for (uint32_t i
= 0; i
< cmd_buffer
->bo_count
; i
++)
789 cmd_buffer
->exec2_bos
[i
]->offset
= cmd_buffer
->exec2_objects
[i
].offset
;
791 *(uint32_t *)queue
->completed_serial
.map
= cmd_buffer
->serial
;
798 VkResult
anv_QueueWaitIdle(
801 struct anv_queue
*queue
= (struct anv_queue
*) _queue
;
803 return vkDeviceWaitIdle((VkDevice
) queue
->device
);
806 VkResult
anv_DeviceWaitIdle(
809 struct anv_device
*device
= (struct anv_device
*) _device
;
810 struct anv_state state
;
811 struct anv_batch batch
;
812 struct drm_i915_gem_execbuffer2 execbuf
;
813 struct drm_i915_gem_exec_object2 exec2_objects
[1];
814 struct anv_bo
*bo
= NULL
;
819 state
= anv_state_pool_alloc(&device
->dynamic_state_pool
, 32, 32);
820 bo
= &device
->dynamic_state_pool
.block_pool
->bo
;
821 batch
.start
= batch
.next
= state
.map
;
822 batch
.end
= state
.map
+ 32;
823 anv_batch_emit(&batch
, GEN8_MI_BATCH_BUFFER_END
);
824 anv_batch_emit(&batch
, GEN8_MI_NOOP
);
826 exec2_objects
[0].handle
= bo
->gem_handle
;
827 exec2_objects
[0].relocation_count
= 0;
828 exec2_objects
[0].relocs_ptr
= 0;
829 exec2_objects
[0].alignment
= 0;
830 exec2_objects
[0].offset
= bo
->offset
;
831 exec2_objects
[0].flags
= 0;
832 exec2_objects
[0].rsvd1
= 0;
833 exec2_objects
[0].rsvd2
= 0;
835 execbuf
.buffers_ptr
= (uintptr_t) exec2_objects
;
836 execbuf
.buffer_count
= 1;
837 execbuf
.batch_start_offset
= state
.offset
;
838 execbuf
.batch_len
= batch
.next
- state
.map
;
839 execbuf
.cliprects_ptr
= 0;
840 execbuf
.num_cliprects
= 0;
845 I915_EXEC_HANDLE_LUT
| I915_EXEC_NO_RELOC
| I915_EXEC_RENDER
;
846 execbuf
.rsvd1
= device
->context_id
;
849 if (!device
->no_hw
) {
850 ret
= anv_gem_execbuffer(device
, &execbuf
);
852 result
= vk_error(VK_ERROR_UNKNOWN
);
857 ret
= anv_gem_wait(device
, bo
->gem_handle
, &timeout
);
859 result
= vk_error(VK_ERROR_UNKNOWN
);
864 anv_state_pool_free(&device
->dynamic_state_pool
, state
);
869 anv_state_pool_free(&device
->dynamic_state_pool
, state
);
875 anv_device_alloc(struct anv_device
* device
,
878 VkSystemAllocType allocType
)
880 return device
->instance
->pfnAlloc(device
->instance
->pAllocUserData
,
887 anv_device_free(struct anv_device
* device
,
890 return device
->instance
->pfnFree(device
->instance
->pAllocUserData
,
895 anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
)
897 bo
->gem_handle
= anv_gem_create(device
, size
);
899 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY
);
909 VkResult
anv_AllocMemory(
911 const VkMemoryAllocInfo
* pAllocInfo
,
912 VkDeviceMemory
* pMem
)
914 struct anv_device
*device
= (struct anv_device
*) _device
;
915 struct anv_device_memory
*mem
;
918 assert(pAllocInfo
->sType
== VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO
);
920 mem
= anv_device_alloc(device
, sizeof(*mem
), 8,
921 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
923 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
925 result
= anv_bo_init_new(&mem
->bo
, device
, pAllocInfo
->allocationSize
);
926 if (result
!= VK_SUCCESS
)
929 *pMem
= (VkDeviceMemory
) mem
;
934 anv_device_free(device
, mem
);
939 VkResult
anv_FreeMemory(
943 struct anv_device
*device
= (struct anv_device
*) _device
;
944 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
947 anv_gem_munmap(mem
->bo
.map
, mem
->bo
.size
);
949 if (mem
->bo
.gem_handle
!= 0)
950 anv_gem_close(device
, mem
->bo
.gem_handle
);
952 anv_device_free(device
, mem
);
957 VkResult
anv_MapMemory(
962 VkMemoryMapFlags flags
,
965 struct anv_device
*device
= (struct anv_device
*) _device
;
966 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
968 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
969 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
970 * at a time is valid. We could just mmap up front and return an offset
971 * pointer here, but that may exhaust virtual memory on 32 bit
974 mem
->map
= anv_gem_mmap(device
, mem
->bo
.gem_handle
, offset
, size
);
975 mem
->map_size
= size
;
982 VkResult
anv_UnmapMemory(
986 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
988 anv_gem_munmap(mem
->map
, mem
->map_size
);
993 VkResult
anv_FlushMappedMemory(
999 /* clflush here for !llc platforms */
1004 VkResult
anv_PinSystemMemory(
1006 const void* pSysMem
,
1008 VkDeviceMemory
* pMem
)
1013 VkResult
anv_DestroyObject(
1015 VkObjectType objType
,
1018 struct anv_device
*device
= (struct anv_device
*) _device
;
1019 struct anv_object
*object
= (struct anv_object
*) _object
;
1022 case VK_OBJECT_TYPE_INSTANCE
:
1023 return anv_DestroyInstance((VkInstance
) _object
);
1025 case VK_OBJECT_TYPE_PHYSICAL_DEVICE
:
1026 /* We don't want to actually destroy physical devices */
1029 case VK_OBJECT_TYPE_DEVICE
:
1030 assert(_device
== (VkDevice
) _object
);
1031 return anv_DestroyDevice((VkDevice
) _object
);
1033 case VK_OBJECT_TYPE_QUEUE
:
1037 case VK_OBJECT_TYPE_DEVICE_MEMORY
:
1038 return anv_FreeMemory(_device
, (VkDeviceMemory
) _object
);
1040 case VK_OBJECT_TYPE_DESCRIPTOR_POOL
:
1041 /* These are just dummys anyway, so we don't need to destroy them */
1044 case VK_OBJECT_TYPE_BUFFER
:
1045 case VK_OBJECT_TYPE_IMAGE
:
1046 case VK_OBJECT_TYPE_DEPTH_STENCIL_VIEW
:
1047 case VK_OBJECT_TYPE_SHADER
:
1048 case VK_OBJECT_TYPE_PIPELINE_LAYOUT
:
1049 case VK_OBJECT_TYPE_SAMPLER
:
1050 case VK_OBJECT_TYPE_DESCRIPTOR_SET
:
1051 case VK_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT
:
1052 case VK_OBJECT_TYPE_DYNAMIC_RS_STATE
:
1053 case VK_OBJECT_TYPE_DYNAMIC_CB_STATE
:
1054 case VK_OBJECT_TYPE_DYNAMIC_DS_STATE
:
1055 case VK_OBJECT_TYPE_RENDER_PASS
:
1056 /* These are trivially destroyable */
1057 anv_device_free(device
, (void *) _object
);
1060 case VK_OBJECT_TYPE_COMMAND_BUFFER
:
1061 case VK_OBJECT_TYPE_PIPELINE
:
1062 case VK_OBJECT_TYPE_DYNAMIC_VP_STATE
:
1063 case VK_OBJECT_TYPE_FENCE
:
1064 case VK_OBJECT_TYPE_QUERY_POOL
:
1065 case VK_OBJECT_TYPE_FRAMEBUFFER
:
1066 case VK_OBJECT_TYPE_BUFFER_VIEW
:
1067 case VK_OBJECT_TYPE_IMAGE_VIEW
:
1068 case VK_OBJECT_TYPE_COLOR_ATTACHMENT_VIEW
:
1069 (object
->destructor
)(device
, object
, objType
);
1072 case VK_OBJECT_TYPE_SEMAPHORE
:
1073 case VK_OBJECT_TYPE_EVENT
:
1074 stub_return(VK_UNSUPPORTED
);
1077 unreachable("Invalid object type");
1082 fill_memory_requirements(
1083 VkObjectType objType
,
1085 VkMemoryRequirements
* memory_requirements
)
1087 struct anv_buffer
*buffer
;
1088 struct anv_image
*image
;
1090 memory_requirements
->memPropsAllowed
=
1091 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT
|
1092 /* VK_MEMORY_PROPERTY_HOST_NON_COHERENT_BIT | */
1093 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1094 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT
;
1096 memory_requirements
->memPropsRequired
= 0;
1099 case VK_OBJECT_TYPE_BUFFER
:
1100 buffer
= (struct anv_buffer
*) object
;
1101 memory_requirements
->size
= buffer
->size
;
1102 memory_requirements
->alignment
= 16;
1104 case VK_OBJECT_TYPE_IMAGE
:
1105 image
= (struct anv_image
*) object
;
1106 memory_requirements
->size
= image
->size
;
1107 memory_requirements
->alignment
= image
->alignment
;
1110 memory_requirements
->size
= 0;
1116 get_allocation_count(VkObjectType objType
)
1119 case VK_OBJECT_TYPE_BUFFER
:
1120 case VK_OBJECT_TYPE_IMAGE
:
1127 VkResult
anv_GetObjectInfo(
1129 VkObjectType objType
,
1131 VkObjectInfoType infoType
,
1135 VkMemoryRequirements memory_requirements
;
1139 case VK_OBJECT_INFO_TYPE_MEMORY_REQUIREMENTS
:
1140 *pDataSize
= sizeof(memory_requirements
);
1144 fill_memory_requirements(objType
, object
, pData
);
1147 case VK_OBJECT_INFO_TYPE_MEMORY_ALLOCATION_COUNT
:
1148 *pDataSize
= sizeof(count
);
1153 *count
= get_allocation_count(objType
);
1157 return vk_error(VK_UNSUPPORTED
);
1162 VkResult
anv_QueueBindObjectMemory(
1164 VkObjectType objType
,
1166 uint32_t allocationIdx
,
1167 VkDeviceMemory _mem
,
1168 VkDeviceSize memOffset
)
1170 struct anv_buffer
*buffer
;
1171 struct anv_image
*image
;
1172 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
1175 case VK_OBJECT_TYPE_BUFFER
:
1176 buffer
= (struct anv_buffer
*) object
;
1177 buffer
->bo
= &mem
->bo
;
1178 buffer
->offset
= memOffset
;
1180 case VK_OBJECT_TYPE_IMAGE
:
1181 image
= (struct anv_image
*) object
;
1182 image
->bo
= &mem
->bo
;
1183 image
->offset
= memOffset
;
1192 VkResult
anv_QueueBindObjectMemoryRange(
1194 VkObjectType objType
,
1196 uint32_t allocationIdx
,
1197 VkDeviceSize rangeOffset
,
1198 VkDeviceSize rangeSize
,
1200 VkDeviceSize memOffset
)
1202 stub_return(VK_UNSUPPORTED
);
1205 VkResult
anv_QueueBindImageMemoryRange(
1208 uint32_t allocationIdx
,
1209 const VkImageMemoryBindInfo
* pBindInfo
,
1211 VkDeviceSize memOffset
)
1213 stub_return(VK_UNSUPPORTED
);
1217 anv_fence_destroy(struct anv_device
*device
,
1218 struct anv_object
*object
,
1219 VkObjectType obj_type
)
1221 struct anv_fence
*fence
= (struct anv_fence
*) object
;
1223 assert(obj_type
== VK_OBJECT_TYPE_FENCE
);
1225 anv_gem_munmap(fence
->bo
.map
, fence
->bo
.size
);
1226 anv_gem_close(device
, fence
->bo
.gem_handle
);
1227 anv_device_free(device
, fence
);
1230 VkResult
anv_CreateFence(
1232 const VkFenceCreateInfo
* pCreateInfo
,
1235 struct anv_device
*device
= (struct anv_device
*) _device
;
1236 struct anv_fence
*fence
;
1237 struct anv_batch batch
;
1240 const uint32_t fence_size
= 128;
1242 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FENCE_CREATE_INFO
);
1244 fence
= anv_device_alloc(device
, sizeof(*fence
), 8,
1245 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1247 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1249 result
= anv_bo_init_new(&fence
->bo
, device
, fence_size
);
1250 if (result
!= VK_SUCCESS
)
1253 fence
->base
.destructor
= anv_fence_destroy
;
1256 anv_gem_mmap(device
, fence
->bo
.gem_handle
, 0, fence
->bo
.size
);
1257 batch
.next
= batch
.start
= fence
->bo
.map
;
1258 batch
.end
= fence
->bo
.map
+ fence
->bo
.size
;
1259 anv_batch_emit(&batch
, GEN8_MI_BATCH_BUFFER_END
);
1260 anv_batch_emit(&batch
, GEN8_MI_NOOP
);
1262 fence
->exec2_objects
[0].handle
= fence
->bo
.gem_handle
;
1263 fence
->exec2_objects
[0].relocation_count
= 0;
1264 fence
->exec2_objects
[0].relocs_ptr
= 0;
1265 fence
->exec2_objects
[0].alignment
= 0;
1266 fence
->exec2_objects
[0].offset
= fence
->bo
.offset
;
1267 fence
->exec2_objects
[0].flags
= 0;
1268 fence
->exec2_objects
[0].rsvd1
= 0;
1269 fence
->exec2_objects
[0].rsvd2
= 0;
1271 fence
->execbuf
.buffers_ptr
= (uintptr_t) fence
->exec2_objects
;
1272 fence
->execbuf
.buffer_count
= 1;
1273 fence
->execbuf
.batch_start_offset
= 0;
1274 fence
->execbuf
.batch_len
= batch
.next
- fence
->bo
.map
;
1275 fence
->execbuf
.cliprects_ptr
= 0;
1276 fence
->execbuf
.num_cliprects
= 0;
1277 fence
->execbuf
.DR1
= 0;
1278 fence
->execbuf
.DR4
= 0;
1280 fence
->execbuf
.flags
=
1281 I915_EXEC_HANDLE_LUT
| I915_EXEC_NO_RELOC
| I915_EXEC_RENDER
;
1282 fence
->execbuf
.rsvd1
= device
->context_id
;
1283 fence
->execbuf
.rsvd2
= 0;
1285 *pFence
= (VkFence
) fence
;
1290 anv_device_free(device
, fence
);
1295 VkResult
anv_ResetFences(
1297 uint32_t fenceCount
,
1300 struct anv_fence
**fences
= (struct anv_fence
**) pFences
;
1302 for (uint32_t i
= 0; i
< fenceCount
; i
++)
1303 fences
[i
]->ready
= false;
1308 VkResult
anv_GetFenceStatus(
1312 struct anv_device
*device
= (struct anv_device
*) _device
;
1313 struct anv_fence
*fence
= (struct anv_fence
*) _fence
;
1320 ret
= anv_gem_wait(device
, fence
->bo
.gem_handle
, &t
);
1322 fence
->ready
= true;
1326 return VK_NOT_READY
;
1329 VkResult
anv_WaitForFences(
1331 uint32_t fenceCount
,
1332 const VkFence
* pFences
,
1336 struct anv_device
*device
= (struct anv_device
*) _device
;
1337 struct anv_fence
**fences
= (struct anv_fence
**) pFences
;
1338 int64_t t
= timeout
;
1341 /* FIXME: handle !waitAll */
1343 for (uint32_t i
= 0; i
< fenceCount
; i
++) {
1344 ret
= anv_gem_wait(device
, fences
[i
]->bo
.gem_handle
, &t
);
1345 if (ret
== -1 && errno
== ETIME
)
1348 return vk_error(VK_ERROR_UNKNOWN
);
1354 // Queue semaphore functions
1356 VkResult
anv_CreateSemaphore(
1358 const VkSemaphoreCreateInfo
* pCreateInfo
,
1359 VkSemaphore
* pSemaphore
)
1361 stub_return(VK_UNSUPPORTED
);
1364 VkResult
anv_QueueSignalSemaphore(
1366 VkSemaphore semaphore
)
1368 stub_return(VK_UNSUPPORTED
);
1371 VkResult
anv_QueueWaitSemaphore(
1373 VkSemaphore semaphore
)
1375 stub_return(VK_UNSUPPORTED
);
1380 VkResult
anv_CreateEvent(
1382 const VkEventCreateInfo
* pCreateInfo
,
1385 stub_return(VK_UNSUPPORTED
);
1388 VkResult
anv_GetEventStatus(
1392 stub_return(VK_UNSUPPORTED
);
1395 VkResult
anv_SetEvent(
1399 stub_return(VK_UNSUPPORTED
);
1402 VkResult
anv_ResetEvent(
1406 stub_return(VK_UNSUPPORTED
);
1411 VkResult
anv_CreateBuffer(
1413 const VkBufferCreateInfo
* pCreateInfo
,
1416 struct anv_device
*device
= (struct anv_device
*) _device
;
1417 struct anv_buffer
*buffer
;
1419 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO
);
1421 buffer
= anv_device_alloc(device
, sizeof(*buffer
), 8,
1422 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1424 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1426 buffer
->size
= pCreateInfo
->size
;
1430 *pBuffer
= (VkBuffer
) buffer
;
1435 // Buffer view functions
1438 fill_buffer_surface_state(void *state
, VkFormat format
,
1439 uint32_t offset
, uint32_t range
)
1441 const struct anv_format
*info
;
1443 info
= anv_format_for_vk_format(format
);
1444 /* This assumes RGBA float format. */
1445 uint32_t stride
= 4;
1446 uint32_t num_elements
= range
/ stride
;
1448 struct GEN8_RENDER_SURFACE_STATE surface_state
= {
1449 .SurfaceType
= SURFTYPE_BUFFER
,
1450 .SurfaceArray
= false,
1451 .SurfaceFormat
= info
->surface_format
,
1452 .SurfaceVerticalAlignment
= VALIGN4
,
1453 .SurfaceHorizontalAlignment
= HALIGN4
,
1455 .VerticalLineStride
= 0,
1456 .VerticalLineStrideOffset
= 0,
1457 .SamplerL2BypassModeDisable
= true,
1458 .RenderCacheReadWriteMode
= WriteOnlyCache
,
1459 .MemoryObjectControlState
= GEN8_MOCS
,
1460 .BaseMipLevel
= 0.0,
1462 .Height
= (num_elements
>> 7) & 0x3fff,
1463 .Width
= num_elements
& 0x7f,
1464 .Depth
= (num_elements
>> 21) & 0x3f,
1465 .SurfacePitch
= stride
- 1,
1466 .MinimumArrayElement
= 0,
1467 .NumberofMultisamples
= MULTISAMPLECOUNT_1
,
1472 .AuxiliarySurfaceMode
= AUX_NONE
,
1474 .GreenClearColor
= 0,
1475 .BlueClearColor
= 0,
1476 .AlphaClearColor
= 0,
1477 .ShaderChannelSelectRed
= SCS_RED
,
1478 .ShaderChannelSelectGreen
= SCS_GREEN
,
1479 .ShaderChannelSelectBlue
= SCS_BLUE
,
1480 .ShaderChannelSelectAlpha
= SCS_ALPHA
,
1481 .ResourceMinLOD
= 0.0,
1482 /* FIXME: We assume that the image must be bound at this time. */
1483 .SurfaceBaseAddress
= { NULL
, offset
},
1486 GEN8_RENDER_SURFACE_STATE_pack(NULL
, state
, &surface_state
);
1489 VkResult
anv_CreateBufferView(
1491 const VkBufferViewCreateInfo
* pCreateInfo
,
1492 VkBufferView
* pView
)
1494 struct anv_device
*device
= (struct anv_device
*) _device
;
1495 struct anv_buffer
*buffer
= (struct anv_buffer
*) pCreateInfo
->buffer
;
1496 struct anv_surface_view
*view
;
1498 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO
);
1500 view
= anv_device_alloc(device
, sizeof(*view
), 8,
1501 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1503 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1505 view
->base
.destructor
= anv_surface_view_destroy
;
1507 view
->bo
= buffer
->bo
;
1508 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
1509 view
->surface_state
=
1510 anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1511 view
->format
= pCreateInfo
->format
;
1512 view
->range
= pCreateInfo
->range
;
1514 fill_buffer_surface_state(view
->surface_state
.map
,
1515 pCreateInfo
->format
, view
->offset
, pCreateInfo
->range
);
1517 *pView
= (VkBufferView
) view
;
1522 // Sampler functions
1524 VkResult
anv_CreateSampler(
1526 const VkSamplerCreateInfo
* pCreateInfo
,
1527 VkSampler
* pSampler
)
1529 struct anv_device
*device
= (struct anv_device
*) _device
;
1530 struct anv_sampler
*sampler
;
1531 uint32_t mag_filter
, min_filter
, max_anisotropy
;
1533 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO
);
1535 sampler
= anv_device_alloc(device
, sizeof(*sampler
), 8,
1536 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1538 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1540 static const uint32_t vk_to_gen_tex_filter
[] = {
1541 [VK_TEX_FILTER_NEAREST
] = MAPFILTER_NEAREST
,
1542 [VK_TEX_FILTER_LINEAR
] = MAPFILTER_LINEAR
1545 static const uint32_t vk_to_gen_mipmap_mode
[] = {
1546 [VK_TEX_MIPMAP_MODE_BASE
] = MIPFILTER_NONE
,
1547 [VK_TEX_MIPMAP_MODE_NEAREST
] = MIPFILTER_NEAREST
,
1548 [VK_TEX_MIPMAP_MODE_LINEAR
] = MIPFILTER_LINEAR
1551 static const uint32_t vk_to_gen_tex_address
[] = {
1552 [VK_TEX_ADDRESS_WRAP
] = TCM_WRAP
,
1553 [VK_TEX_ADDRESS_MIRROR
] = TCM_MIRROR
,
1554 [VK_TEX_ADDRESS_CLAMP
] = TCM_CLAMP
,
1555 [VK_TEX_ADDRESS_MIRROR_ONCE
] = TCM_MIRROR_ONCE
,
1556 [VK_TEX_ADDRESS_CLAMP_BORDER
] = TCM_CLAMP_BORDER
,
1559 static const uint32_t vk_to_gen_compare_op
[] = {
1560 [VK_COMPARE_OP_NEVER
] = PREFILTEROPNEVER
,
1561 [VK_COMPARE_OP_LESS
] = PREFILTEROPLESS
,
1562 [VK_COMPARE_OP_EQUAL
] = PREFILTEROPEQUAL
,
1563 [VK_COMPARE_OP_LESS_EQUAL
] = PREFILTEROPLEQUAL
,
1564 [VK_COMPARE_OP_GREATER
] = PREFILTEROPGREATER
,
1565 [VK_COMPARE_OP_NOT_EQUAL
] = PREFILTEROPNOTEQUAL
,
1566 [VK_COMPARE_OP_GREATER_EQUAL
] = PREFILTEROPGEQUAL
,
1567 [VK_COMPARE_OP_ALWAYS
] = PREFILTEROPALWAYS
,
1570 if (pCreateInfo
->maxAnisotropy
> 1) {
1571 mag_filter
= MAPFILTER_ANISOTROPIC
;
1572 min_filter
= MAPFILTER_ANISOTROPIC
;
1573 max_anisotropy
= (pCreateInfo
->maxAnisotropy
- 2) / 2;
1575 mag_filter
= vk_to_gen_tex_filter
[pCreateInfo
->magFilter
];
1576 min_filter
= vk_to_gen_tex_filter
[pCreateInfo
->minFilter
];
1577 max_anisotropy
= RATIO21
;
1580 struct GEN8_SAMPLER_STATE sampler_state
= {
1581 .SamplerDisable
= false,
1582 .TextureBorderColorMode
= DX10OGL
,
1583 .LODPreClampMode
= 0,
1584 .BaseMipLevel
= 0.0,
1585 .MipModeFilter
= vk_to_gen_mipmap_mode
[pCreateInfo
->mipMode
],
1586 .MagModeFilter
= mag_filter
,
1587 .MinModeFilter
= min_filter
,
1588 .TextureLODBias
= pCreateInfo
->mipLodBias
* 256,
1589 .AnisotropicAlgorithm
= EWAApproximation
,
1590 .MinLOD
= pCreateInfo
->minLod
,
1591 .MaxLOD
= pCreateInfo
->maxLod
,
1592 .ChromaKeyEnable
= 0,
1593 .ChromaKeyIndex
= 0,
1595 .ShadowFunction
= vk_to_gen_compare_op
[pCreateInfo
->compareOp
],
1596 .CubeSurfaceControlMode
= 0,
1598 .IndirectStatePointer
=
1599 device
->float_border_colors
.offset
+
1600 pCreateInfo
->borderColor
* sizeof(float) * 4,
1602 .LODClampMagnificationMode
= MIPNONE
,
1603 .MaximumAnisotropy
= max_anisotropy
,
1604 .RAddressMinFilterRoundingEnable
= 0,
1605 .RAddressMagFilterRoundingEnable
= 0,
1606 .VAddressMinFilterRoundingEnable
= 0,
1607 .VAddressMagFilterRoundingEnable
= 0,
1608 .UAddressMinFilterRoundingEnable
= 0,
1609 .UAddressMagFilterRoundingEnable
= 0,
1610 .TrilinearFilterQuality
= 0,
1611 .NonnormalizedCoordinateEnable
= 0,
1612 .TCXAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressU
],
1613 .TCYAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressV
],
1614 .TCZAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressW
],
1617 GEN8_SAMPLER_STATE_pack(NULL
, sampler
->state
, &sampler_state
);
1619 *pSampler
= (VkSampler
) sampler
;
1624 // Descriptor set functions
1626 VkResult
anv_CreateDescriptorSetLayout(
1628 const VkDescriptorSetLayoutCreateInfo
* pCreateInfo
,
1629 VkDescriptorSetLayout
* pSetLayout
)
1631 struct anv_device
*device
= (struct anv_device
*) _device
;
1632 struct anv_descriptor_set_layout
*set_layout
;
1634 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO
);
1636 uint32_t sampler_count
[VK_SHADER_STAGE_NUM
] = { 0, };
1637 uint32_t surface_count
[VK_SHADER_STAGE_NUM
] = { 0, };
1638 uint32_t num_dynamic_buffers
= 0;
1640 uint32_t stages
= 0;
1643 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1644 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1645 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1646 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1647 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1648 sampler_count
[s
] += pCreateInfo
->pBinding
[i
].arraySize
;
1654 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1655 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1656 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1657 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1658 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1659 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1660 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1661 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1662 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1663 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1664 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1665 surface_count
[s
] += pCreateInfo
->pBinding
[i
].arraySize
;
1671 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1672 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1673 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1674 num_dynamic_buffers
+= pCreateInfo
->pBinding
[i
].arraySize
;
1680 stages
|= pCreateInfo
->pBinding
[i
].stageFlags
;
1681 count
+= pCreateInfo
->pBinding
[i
].arraySize
;
1684 uint32_t sampler_total
= 0;
1685 uint32_t surface_total
= 0;
1686 for (uint32_t s
= 0; s
< VK_SHADER_STAGE_NUM
; s
++) {
1687 sampler_total
+= sampler_count
[s
];
1688 surface_total
+= surface_count
[s
];
1691 size_t size
= sizeof(*set_layout
) +
1692 (sampler_total
+ surface_total
) * sizeof(set_layout
->entries
[0]);
1693 set_layout
= anv_device_alloc(device
, size
, 8,
1694 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1696 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1698 set_layout
->num_dynamic_buffers
= num_dynamic_buffers
;
1699 set_layout
->count
= count
;
1700 set_layout
->shader_stages
= stages
;
1702 struct anv_descriptor_slot
*p
= set_layout
->entries
;
1703 struct anv_descriptor_slot
*sampler
[VK_SHADER_STAGE_NUM
];
1704 struct anv_descriptor_slot
*surface
[VK_SHADER_STAGE_NUM
];
1705 for (uint32_t s
= 0; s
< VK_SHADER_STAGE_NUM
; s
++) {
1706 set_layout
->stage
[s
].surface_count
= surface_count
[s
];
1707 set_layout
->stage
[s
].surface_start
= surface
[s
] = p
;
1708 p
+= surface_count
[s
];
1709 set_layout
->stage
[s
].sampler_count
= sampler_count
[s
];
1710 set_layout
->stage
[s
].sampler_start
= sampler
[s
] = p
;
1711 p
+= sampler_count
[s
];
1714 uint32_t descriptor
= 0;
1715 int8_t dynamic_slot
= 0;
1717 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1718 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1719 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1720 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1721 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1722 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].arraySize
; j
++) {
1723 sampler
[s
]->index
= descriptor
+ j
;
1724 sampler
[s
]->dynamic_slot
= -1;
1732 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1733 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1734 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1742 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1743 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1744 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1745 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1746 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1747 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1748 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1749 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1750 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1751 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1752 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1753 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].arraySize
; j
++) {
1754 surface
[s
]->index
= descriptor
+ j
;
1756 surface
[s
]->dynamic_slot
= dynamic_slot
+ j
;
1758 surface
[s
]->dynamic_slot
= -1;
1767 dynamic_slot
+= pCreateInfo
->pBinding
[i
].arraySize
;
1769 descriptor
+= pCreateInfo
->pBinding
[i
].arraySize
;
1772 *pSetLayout
= (VkDescriptorSetLayout
) set_layout
;
1777 VkResult
anv_CreateDescriptorPool(
1779 VkDescriptorPoolUsage poolUsage
,
1781 const VkDescriptorPoolCreateInfo
* pCreateInfo
,
1782 VkDescriptorPool
* pDescriptorPool
)
1784 *pDescriptorPool
= 1;
1789 VkResult
anv_ResetDescriptorPool(
1791 VkDescriptorPool descriptorPool
)
1796 VkResult
anv_AllocDescriptorSets(
1798 VkDescriptorPool descriptorPool
,
1799 VkDescriptorSetUsage setUsage
,
1801 const VkDescriptorSetLayout
* pSetLayouts
,
1802 VkDescriptorSet
* pDescriptorSets
,
1805 struct anv_device
*device
= (struct anv_device
*) _device
;
1806 const struct anv_descriptor_set_layout
*layout
;
1807 struct anv_descriptor_set
*set
;
1810 for (uint32_t i
= 0; i
< count
; i
++) {
1811 layout
= (struct anv_descriptor_set_layout
*) pSetLayouts
[i
];
1812 size
= sizeof(*set
) + layout
->count
* sizeof(set
->descriptors
[0]);
1813 set
= anv_device_alloc(device
, size
, 8,
1814 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1817 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1820 /* Descriptor sets may not be 100% filled out so we need to memset to
1821 * ensure that we can properly detect and handle holes.
1823 memset(set
, 0, size
);
1825 pDescriptorSets
[i
] = (VkDescriptorSet
) set
;
1833 void anv_UpdateDescriptors(
1835 VkDescriptorSet descriptorSet
,
1836 uint32_t updateCount
,
1837 const void** ppUpdateArray
)
1839 struct anv_descriptor_set
*set
= (struct anv_descriptor_set
*) descriptorSet
;
1840 VkUpdateSamplers
*update_samplers
;
1841 VkUpdateSamplerTextures
*update_sampler_textures
;
1842 VkUpdateImages
*update_images
;
1843 VkUpdateBuffers
*update_buffers
;
1844 VkUpdateAsCopy
*update_as_copy
;
1846 for (uint32_t i
= 0; i
< updateCount
; i
++) {
1847 const struct anv_common
*common
= ppUpdateArray
[i
];
1849 switch (common
->sType
) {
1850 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS
:
1851 update_samplers
= (VkUpdateSamplers
*) common
;
1853 for (uint32_t j
= 0; j
< update_samplers
->count
; j
++) {
1854 set
->descriptors
[update_samplers
->binding
+ j
].sampler
=
1855 (struct anv_sampler
*) update_samplers
->pSamplers
[j
];
1859 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES
:
1860 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1861 update_sampler_textures
= (VkUpdateSamplerTextures
*) common
;
1863 for (uint32_t j
= 0; j
< update_sampler_textures
->count
; j
++) {
1864 set
->descriptors
[update_sampler_textures
->binding
+ j
].view
=
1865 (struct anv_surface_view
*)
1866 update_sampler_textures
->pSamplerImageViews
[j
].pImageView
->view
;
1867 set
->descriptors
[update_sampler_textures
->binding
+ j
].sampler
=
1868 (struct anv_sampler
*)
1869 update_sampler_textures
->pSamplerImageViews
[j
].sampler
;
1873 case VK_STRUCTURE_TYPE_UPDATE_IMAGES
:
1874 update_images
= (VkUpdateImages
*) common
;
1876 for (uint32_t j
= 0; j
< update_images
->count
; j
++) {
1877 set
->descriptors
[update_images
->binding
+ j
].view
=
1878 (struct anv_surface_view
*) update_images
->pImageViews
[j
].view
;
1882 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS
:
1883 update_buffers
= (VkUpdateBuffers
*) common
;
1885 for (uint32_t j
= 0; j
< update_buffers
->count
; j
++) {
1886 set
->descriptors
[update_buffers
->binding
+ j
].view
=
1887 (struct anv_surface_view
*) update_buffers
->pBufferViews
[j
].view
;
1889 /* FIXME: descriptor arrays? */
1892 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY
:
1893 update_as_copy
= (VkUpdateAsCopy
*) common
;
1894 (void) update_as_copy
;
1903 // State object functions
1905 static inline int64_t
1906 clamp_int64(int64_t x
, int64_t min
, int64_t max
)
1917 anv_dynamic_vp_state_destroy(struct anv_device
*device
,
1918 struct anv_object
*object
,
1919 VkObjectType obj_type
)
1921 struct anv_dynamic_vp_state
*state
= (void *)object
;
1923 assert(obj_type
== VK_OBJECT_TYPE_DYNAMIC_VP_STATE
);
1925 anv_state_pool_free(&device
->dynamic_state_pool
, state
->sf_clip_vp
);
1926 anv_state_pool_free(&device
->dynamic_state_pool
, state
->cc_vp
);
1927 anv_state_pool_free(&device
->dynamic_state_pool
, state
->scissor
);
1929 anv_device_free(device
, state
);
1932 VkResult
anv_CreateDynamicViewportState(
1934 const VkDynamicVpStateCreateInfo
* pCreateInfo
,
1935 VkDynamicVpState
* pState
)
1937 struct anv_device
*device
= (struct anv_device
*) _device
;
1938 struct anv_dynamic_vp_state
*state
;
1940 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO
);
1942 state
= anv_device_alloc(device
, sizeof(*state
), 8,
1943 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1945 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1947 state
->base
.destructor
= anv_dynamic_vp_state_destroy
;
1949 unsigned count
= pCreateInfo
->viewportAndScissorCount
;
1950 state
->sf_clip_vp
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1952 state
->cc_vp
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1954 state
->scissor
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1957 for (uint32_t i
= 0; i
< pCreateInfo
->viewportAndScissorCount
; i
++) {
1958 const VkViewport
*vp
= &pCreateInfo
->pViewports
[i
];
1959 const VkRect2D
*s
= &pCreateInfo
->pScissors
[i
];
1961 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport
= {
1962 .ViewportMatrixElementm00
= vp
->width
/ 2,
1963 .ViewportMatrixElementm11
= vp
->height
/ 2,
1964 .ViewportMatrixElementm22
= (vp
->maxDepth
- vp
->minDepth
) / 2,
1965 .ViewportMatrixElementm30
= vp
->originX
+ vp
->width
/ 2,
1966 .ViewportMatrixElementm31
= vp
->originY
+ vp
->height
/ 2,
1967 .ViewportMatrixElementm32
= (vp
->maxDepth
+ vp
->minDepth
) / 2,
1968 .XMinClipGuardband
= -1.0f
,
1969 .XMaxClipGuardband
= 1.0f
,
1970 .YMinClipGuardband
= -1.0f
,
1971 .YMaxClipGuardband
= 1.0f
,
1972 .XMinViewPort
= vp
->originX
,
1973 .XMaxViewPort
= vp
->originX
+ vp
->width
- 1,
1974 .YMinViewPort
= vp
->originY
,
1975 .YMaxViewPort
= vp
->originY
+ vp
->height
- 1,
1978 struct GEN8_CC_VIEWPORT cc_viewport
= {
1979 .MinimumDepth
= vp
->minDepth
,
1980 .MaximumDepth
= vp
->maxDepth
1983 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
1984 * ymax < ymin for empty clips. In case clip x, y, width height are all
1985 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
1986 * what we want. Just special case empty clips and produce a canonical
1988 static const struct GEN8_SCISSOR_RECT empty_scissor
= {
1989 .ScissorRectangleYMin
= 1,
1990 .ScissorRectangleXMin
= 1,
1991 .ScissorRectangleYMax
= 0,
1992 .ScissorRectangleXMax
= 0
1995 const int max
= 0xffff;
1996 struct GEN8_SCISSOR_RECT scissor
= {
1997 /* Do this math using int64_t so overflow gets clamped correctly. */
1998 .ScissorRectangleYMin
= clamp_int64(s
->offset
.y
, 0, max
),
1999 .ScissorRectangleXMin
= clamp_int64(s
->offset
.x
, 0, max
),
2000 .ScissorRectangleYMax
= clamp_int64((uint64_t) s
->offset
.y
+ s
->extent
.height
- 1, 0, max
),
2001 .ScissorRectangleXMax
= clamp_int64((uint64_t) s
->offset
.x
+ s
->extent
.width
- 1, 0, max
)
2004 GEN8_SF_CLIP_VIEWPORT_pack(NULL
, state
->sf_clip_vp
.map
+ i
* 64, &sf_clip_viewport
);
2005 GEN8_CC_VIEWPORT_pack(NULL
, state
->cc_vp
.map
+ i
* 32, &cc_viewport
);
2007 if (s
->extent
.width
<= 0 || s
->extent
.height
<= 0) {
2008 GEN8_SCISSOR_RECT_pack(NULL
, state
->scissor
.map
+ i
* 32, &empty_scissor
);
2010 GEN8_SCISSOR_RECT_pack(NULL
, state
->scissor
.map
+ i
* 32, &scissor
);
2014 *pState
= (VkDynamicVpState
) state
;
2019 VkResult
anv_CreateDynamicRasterState(
2021 const VkDynamicRsStateCreateInfo
* pCreateInfo
,
2022 VkDynamicRsState
* pState
)
2024 struct anv_device
*device
= (struct anv_device
*) _device
;
2025 struct anv_dynamic_rs_state
*state
;
2027 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO
);
2029 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2030 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2032 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2034 struct GEN8_3DSTATE_SF sf
= {
2035 GEN8_3DSTATE_SF_header
,
2036 .LineWidth
= pCreateInfo
->lineWidth
,
2040 GEN8_3DSTATE_SF_pack(NULL
, state
->state_sf
, &sf
);
2042 bool enable_bias
= pCreateInfo
->depthBias
!= 0.0f
||
2043 pCreateInfo
->slopeScaledDepthBias
!= 0.0f
;
2044 struct GEN8_3DSTATE_RASTER raster
= {
2045 .GlobalDepthOffsetEnableSolid
= enable_bias
,
2046 .GlobalDepthOffsetEnableWireframe
= enable_bias
,
2047 .GlobalDepthOffsetEnablePoint
= enable_bias
,
2048 .GlobalDepthOffsetConstant
= pCreateInfo
->depthBias
,
2049 .GlobalDepthOffsetScale
= pCreateInfo
->slopeScaledDepthBias
,
2050 .GlobalDepthOffsetClamp
= pCreateInfo
->depthBiasClamp
2053 GEN8_3DSTATE_RASTER_pack(NULL
, state
->state_raster
, &raster
);
2055 *pState
= (VkDynamicRsState
) state
;
2060 VkResult
anv_CreateDynamicColorBlendState(
2062 const VkDynamicCbStateCreateInfo
* pCreateInfo
,
2063 VkDynamicCbState
* pState
)
2065 struct anv_device
*device
= (struct anv_device
*) _device
;
2066 struct anv_dynamic_cb_state
*state
;
2068 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO
);
2070 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2071 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2073 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2075 struct GEN8_COLOR_CALC_STATE color_calc_state
= {
2076 .BlendConstantColorRed
= pCreateInfo
->blendConst
[0],
2077 .BlendConstantColorGreen
= pCreateInfo
->blendConst
[1],
2078 .BlendConstantColorBlue
= pCreateInfo
->blendConst
[2],
2079 .BlendConstantColorAlpha
= pCreateInfo
->blendConst
[3]
2082 GEN8_COLOR_CALC_STATE_pack(NULL
, state
->state_color_calc
, &color_calc_state
);
2084 *pState
= (VkDynamicCbState
) state
;
2089 VkResult
anv_CreateDynamicDepthStencilState(
2091 const VkDynamicDsStateCreateInfo
* pCreateInfo
,
2092 VkDynamicDsState
* pState
)
2094 struct anv_device
*device
= (struct anv_device
*) _device
;
2095 struct anv_dynamic_ds_state
*state
;
2097 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_DS_STATE_CREATE_INFO
);
2099 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2100 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2102 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2104 struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil
= {
2105 GEN8_3DSTATE_WM_DEPTH_STENCIL_header
,
2107 /* Is this what we need to do? */
2108 .StencilBufferWriteEnable
= pCreateInfo
->stencilWriteMask
!= 0,
2110 .StencilTestMask
= pCreateInfo
->stencilReadMask
& 0xff,
2111 .StencilWriteMask
= pCreateInfo
->stencilWriteMask
& 0xff,
2113 .BackfaceStencilTestMask
= pCreateInfo
->stencilReadMask
& 0xff,
2114 .BackfaceStencilWriteMask
= pCreateInfo
->stencilWriteMask
& 0xff,
2117 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL
, state
->state_wm_depth_stencil
,
2120 struct GEN8_COLOR_CALC_STATE color_calc_state
= {
2121 .StencilReferenceValue
= pCreateInfo
->stencilFrontRef
,
2122 .BackFaceStencilReferenceValue
= pCreateInfo
->stencilBackRef
2125 GEN8_COLOR_CALC_STATE_pack(NULL
, state
->state_color_calc
, &color_calc_state
);
2127 *pState
= (VkDynamicDsState
) state
;
2132 // Command buffer functions
2135 anv_cmd_buffer_destroy(struct anv_device
*device
,
2136 struct anv_object
*object
,
2137 VkObjectType obj_type
)
2139 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) object
;
2141 assert(obj_type
== VK_OBJECT_TYPE_COMMAND_BUFFER
);
2143 /* Destroy all of the batch buffers */
2144 struct anv_batch_bo
*bbo
= cmd_buffer
->last_batch_bo
;
2146 struct anv_batch_bo
*prev
= bbo
->prev_batch_bo
;
2147 anv_batch_bo_destroy(bbo
, device
);
2150 anv_reloc_list_finish(&cmd_buffer
->batch
.relocs
, device
);
2152 /* Destroy all of the surface state buffers */
2153 bbo
= cmd_buffer
->surface_batch_bo
;
2155 struct anv_batch_bo
*prev
= bbo
->prev_batch_bo
;
2156 anv_batch_bo_destroy(bbo
, device
);
2159 anv_reloc_list_finish(&cmd_buffer
->surface_relocs
, device
);
2161 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
2162 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
2163 anv_device_free(device
, cmd_buffer
->exec2_objects
);
2164 anv_device_free(device
, cmd_buffer
->exec2_bos
);
2165 anv_device_free(device
, cmd_buffer
);
2169 anv_cmd_buffer_chain_batch(struct anv_batch
*batch
, void *_data
)
2171 struct anv_cmd_buffer
*cmd_buffer
= _data
;
2173 struct anv_batch_bo
*new_bbo
, *old_bbo
= cmd_buffer
->last_batch_bo
;
2175 VkResult result
= anv_batch_bo_create(cmd_buffer
->device
, &new_bbo
);
2176 if (result
!= VK_SUCCESS
)
2179 /* We set the end of the batch a little short so we would be sure we
2180 * have room for the chaining command. Since we're about to emit the
2181 * chaining command, let's set it back where it should go.
2183 batch
->end
+= GEN8_MI_BATCH_BUFFER_START_length
* 4;
2184 assert(batch
->end
== old_bbo
->bo
.map
+ old_bbo
->bo
.size
);
2186 anv_batch_emit(batch
, GEN8_MI_BATCH_BUFFER_START
,
2187 GEN8_MI_BATCH_BUFFER_START_header
,
2188 ._2ndLevelBatchBuffer
= _1stlevelbatch
,
2189 .AddressSpaceIndicator
= ASI_PPGTT
,
2190 .BatchBufferStartAddress
= { &new_bbo
->bo
, 0 },
2193 /* Pad out to a 2-dword aligned boundary with zeros */
2194 if ((uintptr_t)batch
->next
% 8 != 0) {
2195 *(uint32_t *)batch
->next
= 0;
2199 anv_batch_bo_finish(cmd_buffer
->last_batch_bo
, batch
);
2201 new_bbo
->prev_batch_bo
= old_bbo
;
2202 cmd_buffer
->last_batch_bo
= new_bbo
;
2204 anv_batch_bo_start(new_bbo
, batch
, GEN8_MI_BATCH_BUFFER_START_length
* 4);
2209 VkResult
anv_CreateCommandBuffer(
2211 const VkCmdBufferCreateInfo
* pCreateInfo
,
2212 VkCmdBuffer
* pCmdBuffer
)
2214 struct anv_device
*device
= (struct anv_device
*) _device
;
2215 struct anv_cmd_buffer
*cmd_buffer
;
2218 cmd_buffer
= anv_device_alloc(device
, sizeof(*cmd_buffer
), 8,
2219 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2220 if (cmd_buffer
== NULL
)
2221 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2223 cmd_buffer
->base
.destructor
= anv_cmd_buffer_destroy
;
2225 cmd_buffer
->device
= device
;
2226 cmd_buffer
->rs_state
= NULL
;
2227 cmd_buffer
->vp_state
= NULL
;
2228 cmd_buffer
->cb_state
= NULL
;
2229 cmd_buffer
->ds_state
= NULL
;
2230 memset(&cmd_buffer
->state_vf
, 0, sizeof(cmd_buffer
->state_vf
));
2231 memset(&cmd_buffer
->descriptors
, 0, sizeof(cmd_buffer
->descriptors
));
2233 result
= anv_batch_bo_create(device
, &cmd_buffer
->last_batch_bo
);
2234 if (result
!= VK_SUCCESS
)
2237 result
= anv_reloc_list_init(&cmd_buffer
->batch
.relocs
, device
);
2238 if (result
!= VK_SUCCESS
)
2241 cmd_buffer
->batch
.device
= device
;
2242 cmd_buffer
->batch
.extend_cb
= anv_cmd_buffer_chain_batch
;
2243 cmd_buffer
->batch
.user_data
= cmd_buffer
;
2245 anv_batch_bo_start(cmd_buffer
->last_batch_bo
, &cmd_buffer
->batch
,
2246 GEN8_MI_BATCH_BUFFER_START_length
* 4);
2248 result
= anv_batch_bo_create(device
, &cmd_buffer
->surface_batch_bo
);
2249 if (result
!= VK_SUCCESS
)
2250 goto fail_batch_relocs
;
2251 cmd_buffer
->surface_batch_bo
->first_reloc
= 0;
2253 result
= anv_reloc_list_init(&cmd_buffer
->surface_relocs
, device
);
2254 if (result
!= VK_SUCCESS
)
2255 goto fail_ss_batch_bo
;
2257 /* Start surface_next at 1 so surface offset 0 is invalid. */
2258 cmd_buffer
->surface_next
= 1;
2260 cmd_buffer
->exec2_objects
= NULL
;
2261 cmd_buffer
->exec2_bos
= NULL
;
2262 cmd_buffer
->exec2_array_length
= 0;
2264 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
2265 &device
->surface_state_block_pool
);
2266 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
2267 &device
->dynamic_state_block_pool
);
2269 cmd_buffer
->dirty
= 0;
2270 cmd_buffer
->vb_dirty
= 0;
2271 cmd_buffer
->descriptors_dirty
= 0;
2272 cmd_buffer
->pipeline
= NULL
;
2273 cmd_buffer
->vp_state
= NULL
;
2274 cmd_buffer
->rs_state
= NULL
;
2275 cmd_buffer
->ds_state
= NULL
;
2277 *pCmdBuffer
= (VkCmdBuffer
) cmd_buffer
;
2282 anv_batch_bo_destroy(cmd_buffer
->surface_batch_bo
, device
);
2284 anv_reloc_list_finish(&cmd_buffer
->batch
.relocs
, device
);
2286 anv_batch_bo_destroy(cmd_buffer
->last_batch_bo
, device
);
2288 anv_device_free(device
, cmd_buffer
);
2294 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
)
2296 struct anv_device
*device
= cmd_buffer
->device
;
2297 struct anv_bo
*scratch_bo
= NULL
;
2299 cmd_buffer
->scratch_size
= device
->scratch_block_pool
.size
;
2300 if (cmd_buffer
->scratch_size
> 0)
2301 scratch_bo
= &device
->scratch_block_pool
.bo
;
2303 anv_batch_emit(&cmd_buffer
->batch
, GEN8_STATE_BASE_ADDRESS
,
2304 .GeneralStateBaseAddress
= { scratch_bo
, 0 },
2305 .GeneralStateMemoryObjectControlState
= GEN8_MOCS
,
2306 .GeneralStateBaseAddressModifyEnable
= true,
2307 .GeneralStateBufferSize
= 0xfffff,
2308 .GeneralStateBufferSizeModifyEnable
= true,
2310 .SurfaceStateBaseAddress
= { &cmd_buffer
->surface_batch_bo
->bo
, 0 },
2311 .SurfaceStateMemoryObjectControlState
= GEN8_MOCS
,
2312 .SurfaceStateBaseAddressModifyEnable
= true,
2314 .DynamicStateBaseAddress
= { &device
->dynamic_state_block_pool
.bo
, 0 },
2315 .DynamicStateMemoryObjectControlState
= GEN8_MOCS
,
2316 .DynamicStateBaseAddressModifyEnable
= true,
2317 .DynamicStateBufferSize
= 0xfffff,
2318 .DynamicStateBufferSizeModifyEnable
= true,
2320 .IndirectObjectBaseAddress
= { NULL
, 0 },
2321 .IndirectObjectMemoryObjectControlState
= GEN8_MOCS
,
2322 .IndirectObjectBaseAddressModifyEnable
= true,
2323 .IndirectObjectBufferSize
= 0xfffff,
2324 .IndirectObjectBufferSizeModifyEnable
= true,
2326 .InstructionBaseAddress
= { &device
->instruction_block_pool
.bo
, 0 },
2327 .InstructionMemoryObjectControlState
= GEN8_MOCS
,
2328 .InstructionBaseAddressModifyEnable
= true,
2329 .InstructionBufferSize
= 0xfffff,
2330 .InstructionBuffersizeModifyEnable
= true);
2333 VkResult
anv_BeginCommandBuffer(
2334 VkCmdBuffer cmdBuffer
,
2335 const VkCmdBufferBeginInfo
* pBeginInfo
)
2337 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2339 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
2340 cmd_buffer
->current_pipeline
= UINT32_MAX
;
2346 anv_cmd_buffer_add_bo(struct anv_cmd_buffer
*cmd_buffer
,
2348 struct drm_i915_gem_relocation_entry
*relocs
,
2351 struct drm_i915_gem_exec_object2
*obj
;
2353 if (bo
->index
< cmd_buffer
->bo_count
&&
2354 cmd_buffer
->exec2_bos
[bo
->index
] == bo
)
2357 if (cmd_buffer
->bo_count
>= cmd_buffer
->exec2_array_length
) {
2358 uint32_t new_len
= cmd_buffer
->exec2_objects
?
2359 cmd_buffer
->exec2_array_length
* 2 : 64;
2361 struct drm_i915_gem_exec_object2
*new_objects
=
2362 anv_device_alloc(cmd_buffer
->device
, new_len
* sizeof(*new_objects
),
2363 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
2364 if (new_objects
== NULL
)
2365 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2367 struct anv_bo
**new_bos
=
2368 anv_device_alloc(cmd_buffer
->device
, new_len
* sizeof(*new_bos
),
2369 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
2370 if (new_objects
== NULL
) {
2371 anv_device_free(cmd_buffer
->device
, new_objects
);
2372 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2375 if (cmd_buffer
->exec2_objects
) {
2376 memcpy(new_objects
, cmd_buffer
->exec2_objects
,
2377 cmd_buffer
->bo_count
* sizeof(*new_objects
));
2378 memcpy(new_bos
, cmd_buffer
->exec2_bos
,
2379 cmd_buffer
->bo_count
* sizeof(*new_bos
));
2382 cmd_buffer
->exec2_objects
= new_objects
;
2383 cmd_buffer
->exec2_bos
= new_bos
;
2384 cmd_buffer
->exec2_array_length
= new_len
;
2387 assert(cmd_buffer
->bo_count
< cmd_buffer
->exec2_array_length
);
2389 bo
->index
= cmd_buffer
->bo_count
++;
2390 obj
= &cmd_buffer
->exec2_objects
[bo
->index
];
2391 cmd_buffer
->exec2_bos
[bo
->index
] = bo
;
2393 obj
->handle
= bo
->gem_handle
;
2394 obj
->relocation_count
= 0;
2395 obj
->relocs_ptr
= 0;
2397 obj
->offset
= bo
->offset
;
2403 obj
->relocation_count
= num_relocs
;
2404 obj
->relocs_ptr
= (uintptr_t) relocs
;
2411 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer
*cmd_buffer
,
2412 struct anv_reloc_list
*list
)
2414 for (size_t i
= 0; i
< list
->num_relocs
; i
++)
2415 anv_cmd_buffer_add_bo(cmd_buffer
, list
->reloc_bos
[i
], NULL
, 0);
2419 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer
*cmd_buffer
,
2420 struct anv_reloc_list
*list
)
2424 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2425 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2426 * all bos haven't moved it will skip relocation processing alltogether.
2427 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2428 * value of offset so we can set it either way. For that to work we need
2429 * to make sure all relocs use the same presumed offset.
2432 for (size_t i
= 0; i
< list
->num_relocs
; i
++) {
2433 bo
= list
->reloc_bos
[i
];
2434 if (bo
->offset
!= list
->relocs
[i
].presumed_offset
)
2435 cmd_buffer
->need_reloc
= true;
2437 list
->relocs
[i
].target_handle
= bo
->index
;
2441 VkResult
anv_EndCommandBuffer(
2442 VkCmdBuffer cmdBuffer
)
2444 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2445 struct anv_device
*device
= cmd_buffer
->device
;
2446 struct anv_batch
*batch
= &cmd_buffer
->batch
;
2448 anv_batch_emit(batch
, GEN8_MI_BATCH_BUFFER_END
);
2450 /* Round batch up to an even number of dwords. */
2451 if ((batch
->next
- batch
->start
) & 4)
2452 anv_batch_emit(batch
, GEN8_MI_NOOP
);
2454 anv_batch_bo_finish(cmd_buffer
->last_batch_bo
, &cmd_buffer
->batch
);
2455 cmd_buffer
->surface_batch_bo
->num_relocs
=
2456 cmd_buffer
->surface_relocs
.num_relocs
- cmd_buffer
->surface_batch_bo
->first_reloc
;
2457 cmd_buffer
->surface_batch_bo
->length
= cmd_buffer
->surface_next
;
2459 cmd_buffer
->bo_count
= 0;
2460 cmd_buffer
->need_reloc
= false;
2462 /* Lock for access to bo->index. */
2463 pthread_mutex_lock(&device
->mutex
);
2465 /* Add surface state bos first so we can add them with their relocs. */
2466 for (struct anv_batch_bo
*bbo
= cmd_buffer
->surface_batch_bo
;
2467 bbo
!= NULL
; bbo
= bbo
->prev_batch_bo
) {
2468 anv_cmd_buffer_add_bo(cmd_buffer
, &bbo
->bo
,
2469 &cmd_buffer
->surface_relocs
.relocs
[bbo
->first_reloc
],
2473 /* Add all of the BOs referenced by surface state */
2474 anv_cmd_buffer_add_validate_bos(cmd_buffer
, &cmd_buffer
->surface_relocs
);
2476 /* Add all but the first batch BO */
2477 struct anv_batch_bo
*batch_bo
= cmd_buffer
->last_batch_bo
;
2478 while (batch_bo
->prev_batch_bo
) {
2479 anv_cmd_buffer_add_bo(cmd_buffer
, &batch_bo
->bo
,
2480 &batch
->relocs
.relocs
[batch_bo
->first_reloc
],
2481 batch_bo
->num_relocs
);
2482 batch_bo
= batch_bo
->prev_batch_bo
;
2485 /* Add everything referenced by the batches */
2486 anv_cmd_buffer_add_validate_bos(cmd_buffer
, &batch
->relocs
);
2488 /* Add the first batch bo last */
2489 assert(batch_bo
->prev_batch_bo
== NULL
&& batch_bo
->first_reloc
== 0);
2490 anv_cmd_buffer_add_bo(cmd_buffer
, &batch_bo
->bo
,
2491 &batch
->relocs
.relocs
[batch_bo
->first_reloc
],
2492 batch_bo
->num_relocs
);
2493 assert(batch_bo
->bo
.index
== cmd_buffer
->bo_count
- 1);
2495 anv_cmd_buffer_process_relocs(cmd_buffer
, &cmd_buffer
->surface_relocs
);
2496 anv_cmd_buffer_process_relocs(cmd_buffer
, &batch
->relocs
);
2498 cmd_buffer
->execbuf
.buffers_ptr
= (uintptr_t) cmd_buffer
->exec2_objects
;
2499 cmd_buffer
->execbuf
.buffer_count
= cmd_buffer
->bo_count
;
2500 cmd_buffer
->execbuf
.batch_start_offset
= 0;
2501 cmd_buffer
->execbuf
.batch_len
= batch
->next
- batch
->start
;
2502 cmd_buffer
->execbuf
.cliprects_ptr
= 0;
2503 cmd_buffer
->execbuf
.num_cliprects
= 0;
2504 cmd_buffer
->execbuf
.DR1
= 0;
2505 cmd_buffer
->execbuf
.DR4
= 0;
2507 cmd_buffer
->execbuf
.flags
= I915_EXEC_HANDLE_LUT
;
2508 if (!cmd_buffer
->need_reloc
)
2509 cmd_buffer
->execbuf
.flags
|= I915_EXEC_NO_RELOC
;
2510 cmd_buffer
->execbuf
.flags
|= I915_EXEC_RENDER
;
2511 cmd_buffer
->execbuf
.rsvd1
= device
->context_id
;
2512 cmd_buffer
->execbuf
.rsvd2
= 0;
2514 pthread_mutex_unlock(&device
->mutex
);
2519 VkResult
anv_ResetCommandBuffer(
2520 VkCmdBuffer cmdBuffer
)
2522 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2524 /* Delete all but the first batch bo */
2525 while (cmd_buffer
->last_batch_bo
->prev_batch_bo
) {
2526 struct anv_batch_bo
*prev
= cmd_buffer
->last_batch_bo
->prev_batch_bo
;
2527 anv_batch_bo_destroy(cmd_buffer
->last_batch_bo
, cmd_buffer
->device
);
2528 cmd_buffer
->last_batch_bo
= prev
;
2530 assert(cmd_buffer
->last_batch_bo
->prev_batch_bo
== NULL
);
2532 cmd_buffer
->batch
.relocs
.num_relocs
= 0;
2533 anv_batch_bo_start(cmd_buffer
->last_batch_bo
, &cmd_buffer
->batch
,
2534 GEN8_MI_BATCH_BUFFER_START_length
* 4);
2536 /* Delete all but the first batch bo */
2537 while (cmd_buffer
->surface_batch_bo
->prev_batch_bo
) {
2538 struct anv_batch_bo
*prev
= cmd_buffer
->surface_batch_bo
->prev_batch_bo
;
2539 anv_batch_bo_destroy(cmd_buffer
->surface_batch_bo
, cmd_buffer
->device
);
2540 cmd_buffer
->surface_batch_bo
= prev
;
2542 assert(cmd_buffer
->surface_batch_bo
->prev_batch_bo
== NULL
);
2544 cmd_buffer
->surface_next
= 1;
2545 cmd_buffer
->surface_relocs
.num_relocs
= 0;
2547 cmd_buffer
->rs_state
= NULL
;
2548 cmd_buffer
->vp_state
= NULL
;
2549 cmd_buffer
->cb_state
= NULL
;
2550 cmd_buffer
->ds_state
= NULL
;
2555 // Command buffer building functions
2557 void anv_CmdBindPipeline(
2558 VkCmdBuffer cmdBuffer
,
2559 VkPipelineBindPoint pipelineBindPoint
,
2560 VkPipeline _pipeline
)
2562 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2563 struct anv_pipeline
*pipeline
= (struct anv_pipeline
*) _pipeline
;
2565 switch (pipelineBindPoint
) {
2566 case VK_PIPELINE_BIND_POINT_COMPUTE
:
2567 cmd_buffer
->compute_pipeline
= pipeline
;
2568 cmd_buffer
->compute_dirty
|= ANV_CMD_BUFFER_PIPELINE_DIRTY
;
2571 case VK_PIPELINE_BIND_POINT_GRAPHICS
:
2572 cmd_buffer
->pipeline
= pipeline
;
2573 cmd_buffer
->vb_dirty
|= pipeline
->vb_used
;
2574 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_PIPELINE_DIRTY
;
2578 assert(!"invalid bind point");
2583 void anv_CmdBindDynamicStateObject(
2584 VkCmdBuffer cmdBuffer
,
2585 VkStateBindPoint stateBindPoint
,
2586 VkDynamicStateObject dynamicState
)
2588 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2590 switch (stateBindPoint
) {
2591 case VK_STATE_BIND_POINT_VIEWPORT
:
2592 cmd_buffer
->vp_state
= (struct anv_dynamic_vp_state
*) dynamicState
;
2593 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_VP_DIRTY
;
2595 case VK_STATE_BIND_POINT_RASTER
:
2596 cmd_buffer
->rs_state
= (struct anv_dynamic_rs_state
*) dynamicState
;
2597 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_RS_DIRTY
;
2599 case VK_STATE_BIND_POINT_COLOR_BLEND
:
2600 cmd_buffer
->cb_state
= (struct anv_dynamic_cb_state
*) dynamicState
;
2601 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_CB_DIRTY
;
2603 case VK_STATE_BIND_POINT_DEPTH_STENCIL
:
2604 cmd_buffer
->ds_state
= (struct anv_dynamic_ds_state
*) dynamicState
;
2605 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_DS_DIRTY
;
2612 static struct anv_state
2613 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
,
2614 uint32_t size
, uint32_t alignment
)
2616 struct anv_state state
;
2618 state
.offset
= align_u32(cmd_buffer
->surface_next
, alignment
);
2619 if (state
.offset
+ size
> cmd_buffer
->surface_batch_bo
->bo
.size
)
2620 return (struct anv_state
) { 0 };
2622 state
.map
= cmd_buffer
->surface_batch_bo
->bo
.map
+ state
.offset
;
2623 state
.alloc_size
= size
;
2624 cmd_buffer
->surface_next
= state
.offset
+ size
;
2626 assert(state
.offset
+ size
<= cmd_buffer
->surface_batch_bo
->bo
.size
);
2632 anv_cmd_buffer_new_surface_state_bo(struct anv_cmd_buffer
*cmd_buffer
)
2634 struct anv_batch_bo
*new_bbo
, *old_bbo
= cmd_buffer
->surface_batch_bo
;
2636 /* Finish off the old buffer */
2637 old_bbo
->num_relocs
=
2638 cmd_buffer
->surface_relocs
.num_relocs
- old_bbo
->first_reloc
;
2639 old_bbo
->length
= cmd_buffer
->surface_next
;
2641 VkResult result
= anv_batch_bo_create(cmd_buffer
->device
, &new_bbo
);
2642 if (result
!= VK_SUCCESS
)
2645 new_bbo
->first_reloc
= cmd_buffer
->surface_relocs
.num_relocs
;
2646 cmd_buffer
->surface_next
= 1;
2648 new_bbo
->prev_batch_bo
= old_bbo
;
2649 cmd_buffer
->surface_batch_bo
= new_bbo
;
2651 /* Re-emit state base addresses so we get the new surface state base
2652 * address before we start emitting binding tables etc.
2654 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
2656 /* It seems like just changing the state base addresses isn't enough.
2657 * Invalidating the cache seems to be enough to cause things to
2658 * propagate. However, I'm not 100% sure what we're supposed to do.
2660 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
2661 .TextureCacheInvalidationEnable
= true);
2666 void anv_CmdBindDescriptorSets(
2667 VkCmdBuffer cmdBuffer
,
2668 VkPipelineBindPoint pipelineBindPoint
,
2671 const VkDescriptorSet
* pDescriptorSets
,
2672 uint32_t dynamicOffsetCount
,
2673 const uint32_t* pDynamicOffsets
)
2675 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2676 struct anv_pipeline_layout
*layout
;
2677 struct anv_descriptor_set
*set
;
2678 struct anv_descriptor_set_layout
*set_layout
;
2680 assert(firstSet
+ setCount
< MAX_SETS
);
2682 if (pipelineBindPoint
== VK_PIPELINE_BIND_POINT_GRAPHICS
)
2683 layout
= cmd_buffer
->pipeline
->layout
;
2685 layout
= cmd_buffer
->compute_pipeline
->layout
;
2687 uint32_t dynamic_slot
= 0;
2688 for (uint32_t i
= 0; i
< setCount
; i
++) {
2689 set
= (struct anv_descriptor_set
*) pDescriptorSets
[i
];
2690 set_layout
= layout
->set
[firstSet
+ i
].layout
;
2692 cmd_buffer
->descriptors
[firstSet
+ i
].set
= set
;
2694 assert(set_layout
->num_dynamic_buffers
<
2695 ARRAY_SIZE(cmd_buffer
->descriptors
[0].dynamic_offsets
));
2696 memcpy(cmd_buffer
->descriptors
[firstSet
+ i
].dynamic_offsets
,
2697 pDynamicOffsets
+ dynamic_slot
,
2698 set_layout
->num_dynamic_buffers
* sizeof(*pDynamicOffsets
));
2700 cmd_buffer
->descriptors_dirty
|= set_layout
->shader_stages
;
2702 dynamic_slot
+= set_layout
->num_dynamic_buffers
;
2706 void anv_CmdBindIndexBuffer(
2707 VkCmdBuffer cmdBuffer
,
2709 VkDeviceSize offset
,
2710 VkIndexType indexType
)
2712 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2713 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
2715 static const uint32_t vk_to_gen_index_type
[] = {
2716 [VK_INDEX_TYPE_UINT16
] = INDEX_WORD
,
2717 [VK_INDEX_TYPE_UINT32
] = INDEX_DWORD
,
2720 struct GEN8_3DSTATE_VF vf
= {
2721 GEN8_3DSTATE_VF_header
,
2722 .CutIndex
= (indexType
== VK_INDEX_TYPE_UINT16
) ? UINT16_MAX
: UINT32_MAX
,
2724 GEN8_3DSTATE_VF_pack(NULL
, cmd_buffer
->state_vf
, &vf
);
2726 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_INDEX_BUFFER_DIRTY
;
2728 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_INDEX_BUFFER
,
2729 .IndexFormat
= vk_to_gen_index_type
[indexType
],
2730 .MemoryObjectControlState
= GEN8_MOCS
,
2731 .BufferStartingAddress
= { buffer
->bo
, buffer
->offset
+ offset
},
2732 .BufferSize
= buffer
->size
- offset
);
2735 void anv_CmdBindVertexBuffers(
2736 VkCmdBuffer cmdBuffer
,
2737 uint32_t startBinding
,
2738 uint32_t bindingCount
,
2739 const VkBuffer
* pBuffers
,
2740 const VkDeviceSize
* pOffsets
)
2742 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2743 struct anv_vertex_binding
*vb
= cmd_buffer
->vertex_bindings
;
2745 /* We have to defer setting up vertex buffer since we need the buffer
2746 * stride from the pipeline. */
2748 assert(startBinding
+ bindingCount
< MAX_VBS
);
2749 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
2750 vb
[startBinding
+ i
].buffer
= (struct anv_buffer
*) pBuffers
[i
];
2751 vb
[startBinding
+ i
].offset
= pOffsets
[i
];
2752 cmd_buffer
->vb_dirty
|= 1 << (startBinding
+ i
);
2757 cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
2758 unsigned stage
, struct anv_state
*bt_state
)
2760 struct anv_pipeline_layout
*layout
;
2761 uint32_t color_attachments
, bias
, size
;
2763 if (stage
== VK_SHADER_STAGE_COMPUTE
)
2764 layout
= cmd_buffer
->compute_pipeline
->layout
;
2766 layout
= cmd_buffer
->pipeline
->layout
;
2768 if (stage
== VK_SHADER_STAGE_FRAGMENT
) {
2770 color_attachments
= cmd_buffer
->framebuffer
->color_attachment_count
;
2773 color_attachments
= 0;
2776 /* This is a little awkward: layout can be NULL but we still have to
2777 * allocate and set a binding table for the PS stage for render
2779 uint32_t surface_count
= layout
? layout
->stage
[stage
].surface_count
: 0;
2781 if (color_attachments
+ surface_count
== 0)
2784 size
= (bias
+ surface_count
) * sizeof(uint32_t);
2785 *bt_state
= anv_cmd_buffer_alloc_surface_state(cmd_buffer
, size
, 32);
2786 uint32_t *bt_map
= bt_state
->map
;
2788 if (bt_state
->map
== NULL
)
2789 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2791 for (uint32_t ca
= 0; ca
< color_attachments
; ca
++) {
2792 const struct anv_surface_view
*view
=
2793 cmd_buffer
->framebuffer
->color_attachments
[ca
];
2795 struct anv_state state
=
2796 anv_cmd_buffer_alloc_surface_state(cmd_buffer
, 64, 64);
2798 if (state
.map
== NULL
)
2799 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2801 memcpy(state
.map
, view
->surface_state
.map
, 64);
2803 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2804 *(uint64_t *)(state
.map
+ 8 * 4) =
2805 anv_reloc_list_add(&cmd_buffer
->surface_relocs
,
2807 state
.offset
+ 8 * 4,
2808 view
->bo
, view
->offset
);
2810 bt_map
[ca
] = state
.offset
;
2816 for (uint32_t set
= 0; set
< layout
->num_sets
; set
++) {
2817 struct anv_descriptor_set_binding
*d
= &cmd_buffer
->descriptors
[set
];
2818 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[set
].layout
;
2819 struct anv_descriptor_slot
*surface_slots
=
2820 set_layout
->stage
[stage
].surface_start
;
2822 uint32_t start
= bias
+ layout
->set
[set
].surface_start
[stage
];
2824 for (uint32_t b
= 0; b
< set_layout
->stage
[stage
].surface_count
; b
++) {
2825 struct anv_surface_view
*view
=
2826 d
->set
->descriptors
[surface_slots
[b
].index
].view
;
2831 struct anv_state state
=
2832 anv_cmd_buffer_alloc_surface_state(cmd_buffer
, 64, 64);
2834 if (state
.map
== NULL
)
2835 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2838 if (surface_slots
[b
].dynamic_slot
>= 0) {
2839 uint32_t dynamic_offset
=
2840 d
->dynamic_offsets
[surface_slots
[b
].dynamic_slot
];
2842 offset
= view
->offset
+ dynamic_offset
;
2843 fill_buffer_surface_state(state
.map
, view
->format
, offset
,
2844 view
->range
- dynamic_offset
);
2846 offset
= view
->offset
;
2847 memcpy(state
.map
, view
->surface_state
.map
, 64);
2850 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2851 *(uint64_t *)(state
.map
+ 8 * 4) =
2852 anv_reloc_list_add(&cmd_buffer
->surface_relocs
,
2854 state
.offset
+ 8 * 4,
2857 bt_map
[start
+ b
] = state
.offset
;
2865 cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
2866 unsigned stage
, struct anv_state
*state
)
2868 struct anv_pipeline_layout
*layout
;
2869 uint32_t sampler_count
;
2871 if (stage
== VK_SHADER_STAGE_COMPUTE
)
2872 layout
= cmd_buffer
->compute_pipeline
->layout
;
2874 layout
= cmd_buffer
->pipeline
->layout
;
2876 sampler_count
= layout
? layout
->stage
[stage
].sampler_count
: 0;
2877 if (sampler_count
== 0)
2880 uint32_t size
= sampler_count
* 16;
2881 *state
= anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
, size
, 32);
2883 if (state
->map
== NULL
)
2884 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2886 for (uint32_t set
= 0; set
< layout
->num_sets
; set
++) {
2887 struct anv_descriptor_set_binding
*d
= &cmd_buffer
->descriptors
[set
];
2888 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[set
].layout
;
2889 struct anv_descriptor_slot
*sampler_slots
=
2890 set_layout
->stage
[stage
].sampler_start
;
2892 uint32_t start
= layout
->set
[set
].sampler_start
[stage
];
2894 for (uint32_t b
= 0; b
< set_layout
->stage
[stage
].sampler_count
; b
++) {
2895 struct anv_sampler
*sampler
=
2896 d
->set
->descriptors
[sampler_slots
[b
].index
].sampler
;
2901 memcpy(state
->map
+ (start
+ b
) * 16,
2902 sampler
->state
, sizeof(sampler
->state
));
2910 flush_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
, uint32_t stage
)
2912 struct anv_state surfaces
= { 0, }, samplers
= { 0, };
2915 result
= cmd_buffer_emit_samplers(cmd_buffer
, stage
, &samplers
);
2916 if (result
!= VK_SUCCESS
)
2918 result
= cmd_buffer_emit_binding_table(cmd_buffer
, stage
, &surfaces
);
2919 if (result
!= VK_SUCCESS
)
2922 static const uint32_t sampler_state_opcodes
[] = {
2923 [VK_SHADER_STAGE_VERTEX
] = 43,
2924 [VK_SHADER_STAGE_TESS_CONTROL
] = 44, /* HS */
2925 [VK_SHADER_STAGE_TESS_EVALUATION
] = 45, /* DS */
2926 [VK_SHADER_STAGE_GEOMETRY
] = 46,
2927 [VK_SHADER_STAGE_FRAGMENT
] = 47,
2928 [VK_SHADER_STAGE_COMPUTE
] = 0,
2931 static const uint32_t binding_table_opcodes
[] = {
2932 [VK_SHADER_STAGE_VERTEX
] = 38,
2933 [VK_SHADER_STAGE_TESS_CONTROL
] = 39,
2934 [VK_SHADER_STAGE_TESS_EVALUATION
] = 40,
2935 [VK_SHADER_STAGE_GEOMETRY
] = 41,
2936 [VK_SHADER_STAGE_FRAGMENT
] = 42,
2937 [VK_SHADER_STAGE_COMPUTE
] = 0,
2940 if (samplers
.alloc_size
> 0) {
2941 anv_batch_emit(&cmd_buffer
->batch
,
2942 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS
,
2943 ._3DCommandSubOpcode
= sampler_state_opcodes
[stage
],
2944 .PointertoVSSamplerState
= samplers
.offset
);
2947 if (surfaces
.alloc_size
> 0) {
2948 anv_batch_emit(&cmd_buffer
->batch
,
2949 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS
,
2950 ._3DCommandSubOpcode
= binding_table_opcodes
[stage
],
2951 .PointertoVSBindingTable
= surfaces
.offset
);
2958 flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
)
2960 uint32_t s
, dirty
= cmd_buffer
->descriptors_dirty
&
2961 cmd_buffer
->pipeline
->active_stages
;
2964 for_each_bit(s
, dirty
) {
2965 result
= flush_descriptor_set(cmd_buffer
, s
);
2966 if (result
!= VK_SUCCESS
)
2970 if (result
!= VK_SUCCESS
) {
2971 assert(result
== VK_ERROR_OUT_OF_DEVICE_MEMORY
);
2973 result
= anv_cmd_buffer_new_surface_state_bo(cmd_buffer
);
2974 assert(result
== VK_SUCCESS
);
2976 /* Re-emit all active binding tables */
2977 for_each_bit(s
, cmd_buffer
->pipeline
->active_stages
) {
2978 result
= flush_descriptor_set(cmd_buffer
, s
);
2980 /* It had better succeed this time */
2981 assert(result
== VK_SUCCESS
);
2985 cmd_buffer
->descriptors_dirty
&= ~cmd_buffer
->pipeline
->active_stages
;
2988 static struct anv_state
2989 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
2990 uint32_t *a
, uint32_t dwords
, uint32_t alignment
)
2992 struct anv_state state
;
2994 state
= anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
,
2995 dwords
* 4, alignment
);
2996 memcpy(state
.map
, a
, dwords
* 4);
2998 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state
.map
, dwords
* 4));
3003 static struct anv_state
3004 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
3005 uint32_t *a
, uint32_t *b
,
3006 uint32_t dwords
, uint32_t alignment
)
3008 struct anv_state state
;
3011 state
= anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
,
3012 dwords
* 4, alignment
);
3014 for (uint32_t i
= 0; i
< dwords
; i
++)
3017 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p
, dwords
* 4));
3023 flush_compute_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
)
3025 struct anv_device
*device
= cmd_buffer
->device
;
3026 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3027 struct anv_state surfaces
= { 0, }, samplers
= { 0, };
3030 result
= cmd_buffer_emit_samplers(cmd_buffer
,
3031 VK_SHADER_STAGE_COMPUTE
, &samplers
);
3032 if (result
!= VK_SUCCESS
)
3034 result
= cmd_buffer_emit_binding_table(cmd_buffer
,
3035 VK_SHADER_STAGE_COMPUTE
, &surfaces
);
3036 if (result
!= VK_SUCCESS
)
3039 struct GEN8_INTERFACE_DESCRIPTOR_DATA desc
= {
3040 .KernelStartPointer
= pipeline
->cs_simd
,
3041 .KernelStartPointerHigh
= 0,
3042 .BindingTablePointer
= surfaces
.offset
,
3043 .BindingTableEntryCount
= 0,
3044 .SamplerStatePointer
= samplers
.offset
,
3046 .NumberofThreadsinGPGPUThreadGroup
= 0 /* FIXME: Really? */
3049 uint32_t size
= GEN8_INTERFACE_DESCRIPTOR_DATA_length
* sizeof(uint32_t);
3050 struct anv_state state
=
3051 anv_state_pool_alloc(&device
->dynamic_state_pool
, size
, 64);
3053 GEN8_INTERFACE_DESCRIPTOR_DATA_pack(NULL
, state
.map
, &desc
);
3055 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD
,
3056 .InterfaceDescriptorTotalLength
= size
,
3057 .InterfaceDescriptorDataStartAddress
= state
.offset
);
3063 anv_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
)
3065 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3068 assert(pipeline
->active_stages
== VK_SHADER_STAGE_COMPUTE_BIT
);
3070 if (cmd_buffer
->current_pipeline
!= GPGPU
) {
3071 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPELINE_SELECT
,
3072 .PipelineSelection
= GPGPU
);
3073 cmd_buffer
->current_pipeline
= GPGPU
;
3076 if (cmd_buffer
->compute_dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
)
3077 anv_batch_emit_batch(&cmd_buffer
->batch
, &pipeline
->batch
);
3079 if ((cmd_buffer
->descriptors_dirty
& VK_SHADER_STAGE_COMPUTE_BIT
) ||
3080 (cmd_buffer
->compute_dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
)) {
3081 result
= flush_compute_descriptor_set(cmd_buffer
);
3082 if (result
!= VK_SUCCESS
) {
3083 result
= anv_cmd_buffer_new_surface_state_bo(cmd_buffer
);
3084 assert(result
== VK_SUCCESS
);
3085 result
= flush_compute_descriptor_set(cmd_buffer
);
3086 assert(result
== VK_SUCCESS
);
3088 cmd_buffer
->descriptors_dirty
&= ~VK_SHADER_STAGE_COMPUTE
;
3091 cmd_buffer
->compute_dirty
= 0;
3095 anv_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
)
3097 struct anv_pipeline
*pipeline
= cmd_buffer
->pipeline
;
3100 uint32_t vb_emit
= cmd_buffer
->vb_dirty
& pipeline
->vb_used
;
3102 assert((pipeline
->active_stages
& VK_SHADER_STAGE_COMPUTE_BIT
) == 0);
3104 if (cmd_buffer
->current_pipeline
!= _3D
) {
3105 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPELINE_SELECT
,
3106 .PipelineSelection
= _3D
);
3107 cmd_buffer
->current_pipeline
= _3D
;
3111 const uint32_t num_buffers
= __builtin_popcount(vb_emit
);
3112 const uint32_t num_dwords
= 1 + num_buffers
* 4;
3114 p
= anv_batch_emitn(&cmd_buffer
->batch
, num_dwords
,
3115 GEN8_3DSTATE_VERTEX_BUFFERS
);
3117 for_each_bit(vb
, vb_emit
) {
3118 struct anv_buffer
*buffer
= cmd_buffer
->vertex_bindings
[vb
].buffer
;
3119 uint32_t offset
= cmd_buffer
->vertex_bindings
[vb
].offset
;
3121 struct GEN8_VERTEX_BUFFER_STATE state
= {
3122 .VertexBufferIndex
= vb
,
3123 .MemoryObjectControlState
= GEN8_MOCS
,
3124 .AddressModifyEnable
= true,
3125 .BufferPitch
= pipeline
->binding_stride
[vb
],
3126 .BufferStartingAddress
= { buffer
->bo
, buffer
->offset
+ offset
},
3127 .BufferSize
= buffer
->size
- offset
3130 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer
->batch
, &p
[1 + i
* 4], &state
);
3135 if (cmd_buffer
->dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
) {
3136 /* If somebody compiled a pipeline after starting a command buffer the
3137 * scratch bo may have grown since we started this cmd buffer (and
3138 * emitted STATE_BASE_ADDRESS). If we're binding that pipeline now,
3139 * reemit STATE_BASE_ADDRESS so that we use the bigger scratch bo. */
3140 if (cmd_buffer
->scratch_size
< pipeline
->total_scratch
)
3141 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
3143 anv_batch_emit_batch(&cmd_buffer
->batch
, &pipeline
->batch
);
3146 if (cmd_buffer
->descriptors_dirty
)
3147 flush_descriptor_sets(cmd_buffer
);
3149 if (cmd_buffer
->dirty
& ANV_CMD_BUFFER_VP_DIRTY
) {
3150 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_SCISSOR_STATE_POINTERS
,
3151 .ScissorRectPointer
= cmd_buffer
->vp_state
->scissor
.offset
);
3152 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC
,
3153 .CCViewportPointer
= cmd_buffer
->vp_state
->cc_vp
.offset
);
3154 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
,
3155 .SFClipViewportPointer
= cmd_buffer
->vp_state
->sf_clip_vp
.offset
);
3158 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_RS_DIRTY
)) {
3159 anv_batch_emit_merge(&cmd_buffer
->batch
,
3160 cmd_buffer
->rs_state
->state_sf
, pipeline
->state_sf
);
3161 anv_batch_emit_merge(&cmd_buffer
->batch
,
3162 cmd_buffer
->rs_state
->state_raster
, pipeline
->state_raster
);
3165 if (cmd_buffer
->ds_state
&&
3166 (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_DS_DIRTY
)))
3167 anv_batch_emit_merge(&cmd_buffer
->batch
,
3168 cmd_buffer
->ds_state
->state_wm_depth_stencil
,
3169 pipeline
->state_wm_depth_stencil
);
3171 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_CB_DIRTY
| ANV_CMD_BUFFER_DS_DIRTY
)) {
3172 struct anv_state state
;
3173 if (cmd_buffer
->ds_state
== NULL
)
3174 state
= anv_cmd_buffer_emit_dynamic(cmd_buffer
,
3175 cmd_buffer
->cb_state
->state_color_calc
,
3176 GEN8_COLOR_CALC_STATE_length
, 64);
3177 else if (cmd_buffer
->cb_state
== NULL
)
3178 state
= anv_cmd_buffer_emit_dynamic(cmd_buffer
,
3179 cmd_buffer
->ds_state
->state_color_calc
,
3180 GEN8_COLOR_CALC_STATE_length
, 64);
3182 state
= anv_cmd_buffer_merge_dynamic(cmd_buffer
,
3183 cmd_buffer
->ds_state
->state_color_calc
,
3184 cmd_buffer
->cb_state
->state_color_calc
,
3185 GEN8_COLOR_CALC_STATE_length
, 64);
3187 anv_batch_emit(&cmd_buffer
->batch
,
3188 GEN8_3DSTATE_CC_STATE_POINTERS
,
3189 .ColorCalcStatePointer
= state
.offset
,
3190 .ColorCalcStatePointerValid
= true);
3193 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_INDEX_BUFFER_DIRTY
)) {
3194 anv_batch_emit_merge(&cmd_buffer
->batch
,
3195 cmd_buffer
->state_vf
, pipeline
->state_vf
);
3198 cmd_buffer
->vb_dirty
&= ~vb_emit
;
3199 cmd_buffer
->dirty
= 0;
3203 VkCmdBuffer cmdBuffer
,
3204 uint32_t firstVertex
,
3205 uint32_t vertexCount
,
3206 uint32_t firstInstance
,
3207 uint32_t instanceCount
)
3209 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3211 anv_cmd_buffer_flush_state(cmd_buffer
);
3213 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3214 .VertexAccessType
= SEQUENTIAL
,
3215 .VertexCountPerInstance
= vertexCount
,
3216 .StartVertexLocation
= firstVertex
,
3217 .InstanceCount
= instanceCount
,
3218 .StartInstanceLocation
= firstInstance
,
3219 .BaseVertexLocation
= 0);
3222 void anv_CmdDrawIndexed(
3223 VkCmdBuffer cmdBuffer
,
3224 uint32_t firstIndex
,
3225 uint32_t indexCount
,
3226 int32_t vertexOffset
,
3227 uint32_t firstInstance
,
3228 uint32_t instanceCount
)
3230 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3232 anv_cmd_buffer_flush_state(cmd_buffer
);
3234 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3235 .VertexAccessType
= RANDOM
,
3236 .VertexCountPerInstance
= indexCount
,
3237 .StartVertexLocation
= firstIndex
,
3238 .InstanceCount
= instanceCount
,
3239 .StartInstanceLocation
= firstInstance
,
3240 .BaseVertexLocation
= vertexOffset
);
3244 anv_batch_lrm(struct anv_batch
*batch
,
3245 uint32_t reg
, struct anv_bo
*bo
, uint32_t offset
)
3247 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_MEM
,
3248 .RegisterAddress
= reg
,
3249 .MemoryAddress
= { bo
, offset
});
3253 anv_batch_lri(struct anv_batch
*batch
, uint32_t reg
, uint32_t imm
)
3255 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_IMM
,
3256 .RegisterOffset
= reg
,
3260 /* Auto-Draw / Indirect Registers */
3261 #define GEN7_3DPRIM_END_OFFSET 0x2420
3262 #define GEN7_3DPRIM_START_VERTEX 0x2430
3263 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
3264 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
3265 #define GEN7_3DPRIM_START_INSTANCE 0x243C
3266 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
3268 void anv_CmdDrawIndirect(
3269 VkCmdBuffer cmdBuffer
,
3271 VkDeviceSize offset
,
3275 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3276 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
3277 struct anv_bo
*bo
= buffer
->bo
;
3278 uint32_t bo_offset
= buffer
->offset
+ offset
;
3280 anv_cmd_buffer_flush_state(cmd_buffer
);
3282 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_VERTEX_COUNT
, bo
, bo_offset
);
3283 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_INSTANCE_COUNT
, bo
, bo_offset
+ 4);
3284 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_VERTEX
, bo
, bo_offset
+ 8);
3285 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_INSTANCE
, bo
, bo_offset
+ 12);
3286 anv_batch_lri(&cmd_buffer
->batch
, GEN7_3DPRIM_BASE_VERTEX
, 0);
3288 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3289 .IndirectParameterEnable
= true,
3290 .VertexAccessType
= SEQUENTIAL
);
3293 void anv_CmdDrawIndexedIndirect(
3294 VkCmdBuffer cmdBuffer
,
3296 VkDeviceSize offset
,
3300 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3301 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
3302 struct anv_bo
*bo
= buffer
->bo
;
3303 uint32_t bo_offset
= buffer
->offset
+ offset
;
3305 anv_cmd_buffer_flush_state(cmd_buffer
);
3307 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_VERTEX_COUNT
, bo
, bo_offset
);
3308 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_INSTANCE_COUNT
, bo
, bo_offset
+ 4);
3309 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_VERTEX
, bo
, bo_offset
+ 8);
3310 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_BASE_VERTEX
, bo
, bo_offset
+ 12);
3311 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_INSTANCE
, bo
, bo_offset
+ 16);
3313 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3314 .IndirectParameterEnable
= true,
3315 .VertexAccessType
= RANDOM
);
3318 void anv_CmdDispatch(
3319 VkCmdBuffer cmdBuffer
,
3324 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3325 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3326 struct brw_cs_prog_data
*prog_data
= &pipeline
->cs_prog_data
;
3328 anv_cmd_buffer_flush_compute_state(cmd_buffer
);
3330 anv_batch_emit(&cmd_buffer
->batch
, GEN8_GPGPU_WALKER
,
3331 .SIMDSize
= prog_data
->simd_size
/ 16,
3332 .ThreadDepthCounterMaximum
= 0,
3333 .ThreadHeightCounterMaximum
= 0,
3334 .ThreadWidthCounterMaximum
= pipeline
->cs_thread_width_max
,
3335 .ThreadGroupIDXDimension
= x
,
3336 .ThreadGroupIDYDimension
= y
,
3337 .ThreadGroupIDZDimension
= z
,
3338 .RightExecutionMask
= pipeline
->cs_right_mask
,
3339 .BottomExecutionMask
= 0xffffffff);
3341 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MEDIA_STATE_FLUSH
);
3344 #define GPGPU_DISPATCHDIMX 0x2500
3345 #define GPGPU_DISPATCHDIMY 0x2504
3346 #define GPGPU_DISPATCHDIMZ 0x2508
3348 void anv_CmdDispatchIndirect(
3349 VkCmdBuffer cmdBuffer
,
3351 VkDeviceSize offset
)
3353 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3354 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3355 struct brw_cs_prog_data
*prog_data
= &pipeline
->cs_prog_data
;
3356 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
3357 struct anv_bo
*bo
= buffer
->bo
;
3358 uint32_t bo_offset
= buffer
->offset
+ offset
;
3360 anv_cmd_buffer_flush_compute_state(cmd_buffer
);
3362 anv_batch_lrm(&cmd_buffer
->batch
, GPGPU_DISPATCHDIMX
, bo
, bo_offset
);
3363 anv_batch_lrm(&cmd_buffer
->batch
, GPGPU_DISPATCHDIMY
, bo
, bo_offset
+ 4);
3364 anv_batch_lrm(&cmd_buffer
->batch
, GPGPU_DISPATCHDIMZ
, bo
, bo_offset
+ 8);
3366 anv_batch_emit(&cmd_buffer
->batch
, GEN8_GPGPU_WALKER
,
3367 .IndirectParameterEnable
= true,
3368 .SIMDSize
= prog_data
->simd_size
/ 16,
3369 .ThreadDepthCounterMaximum
= 0,
3370 .ThreadHeightCounterMaximum
= 0,
3371 .ThreadWidthCounterMaximum
= pipeline
->cs_thread_width_max
,
3372 .RightExecutionMask
= pipeline
->cs_right_mask
,
3373 .BottomExecutionMask
= 0xffffffff);
3375 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MEDIA_STATE_FLUSH
);
3378 void anv_CmdSetEvent(
3379 VkCmdBuffer cmdBuffer
,
3381 VkPipeEvent pipeEvent
)
3386 void anv_CmdResetEvent(
3387 VkCmdBuffer cmdBuffer
,
3389 VkPipeEvent pipeEvent
)
3394 void anv_CmdWaitEvents(
3395 VkCmdBuffer cmdBuffer
,
3396 VkWaitEvent waitEvent
,
3397 uint32_t eventCount
,
3398 const VkEvent
* pEvents
,
3399 uint32_t memBarrierCount
,
3400 const void** ppMemBarriers
)
3405 void anv_CmdPipelineBarrier(
3406 VkCmdBuffer cmdBuffer
,
3407 VkWaitEvent waitEvent
,
3408 uint32_t pipeEventCount
,
3409 const VkPipeEvent
* pPipeEvents
,
3410 uint32_t memBarrierCount
,
3411 const void** ppMemBarriers
)
3413 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*)cmdBuffer
;
3416 struct GEN8_PIPE_CONTROL cmd
= {
3417 GEN8_PIPE_CONTROL_header
,
3418 .PostSyncOperation
= NoWrite
,
3421 /* XXX: I think waitEvent is a no-op on our HW. We should verify that. */
3423 for (uint32_t i
= 0; i
< pipeEventCount
; i
++) {
3424 switch (pPipeEvents
[i
]) {
3425 case VK_PIPE_EVENT_TOP_OF_PIPE
:
3426 /* This is just what PIPE_CONTROL does */
3428 case VK_PIPE_EVENT_VERTEX_PROCESSING_COMPLETE
:
3429 case VK_PIPE_EVENT_LOCAL_FRAGMENT_PROCESSING_COMPLETE
:
3430 case VK_PIPE_EVENT_FRAGMENT_PROCESSING_COMPLETE
:
3431 cmd
.StallAtPixelScoreboard
= true;
3433 case VK_PIPE_EVENT_GRAPHICS_PIPELINE_COMPLETE
:
3434 case VK_PIPE_EVENT_COMPUTE_PIPELINE_COMPLETE
:
3435 case VK_PIPE_EVENT_TRANSFER_COMPLETE
:
3436 case VK_PIPE_EVENT_COMMANDS_COMPLETE
:
3437 cmd
.CommandStreamerStallEnable
= true;
3440 unreachable("Invalid VkPipeEvent");
3444 /* XXX: Right now, we're really dumb and just flush whatever categories
3445 * the app asks for. One of these days we may make this a bit better
3446 * but right now that's all the hardware allows for in most areas.
3448 VkMemoryOutputFlags out_flags
= 0;
3449 VkMemoryInputFlags in_flags
= 0;
3451 for (uint32_t i
= 0; i
< memBarrierCount
; i
++) {
3452 const struct anv_common
*common
= ppMemBarriers
[i
];
3453 switch (common
->sType
) {
3454 case VK_STRUCTURE_TYPE_MEMORY_BARRIER
: {
3455 const VkMemoryBarrier
*barrier
= (VkMemoryBarrier
*)common
;
3456 out_flags
|= barrier
->outputMask
;
3457 in_flags
|= barrier
->inputMask
;
3460 case VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER
: {
3461 const VkBufferMemoryBarrier
*barrier
= (VkBufferMemoryBarrier
*)common
;
3462 out_flags
|= barrier
->outputMask
;
3463 in_flags
|= barrier
->inputMask
;
3466 case VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER
: {
3467 const VkImageMemoryBarrier
*barrier
= (VkImageMemoryBarrier
*)common
;
3468 out_flags
|= barrier
->outputMask
;
3469 in_flags
|= barrier
->inputMask
;
3473 unreachable("Invalid memory barrier type");
3477 for_each_bit(b
, out_flags
) {
3478 switch ((VkMemoryOutputFlags
)(1 << b
)) {
3479 case VK_MEMORY_OUTPUT_HOST_WRITE_BIT
:
3480 break; /* FIXME: Little-core systems */
3481 case VK_MEMORY_OUTPUT_SHADER_WRITE_BIT
:
3482 cmd
.DCFlushEnable
= true;
3484 case VK_MEMORY_OUTPUT_COLOR_ATTACHMENT_BIT
:
3485 cmd
.RenderTargetCacheFlushEnable
= true;
3487 case VK_MEMORY_OUTPUT_DEPTH_STENCIL_ATTACHMENT_BIT
:
3488 cmd
.DepthCacheFlushEnable
= true;
3490 case VK_MEMORY_OUTPUT_TRANSFER_BIT
:
3491 cmd
.RenderTargetCacheFlushEnable
= true;
3492 cmd
.DepthCacheFlushEnable
= true;
3495 unreachable("Invalid memory output flag");
3499 for_each_bit(b
, out_flags
) {
3500 switch ((VkMemoryInputFlags
)(1 << b
)) {
3501 case VK_MEMORY_INPUT_HOST_READ_BIT
:
3502 break; /* FIXME: Little-core systems */
3503 case VK_MEMORY_INPUT_INDIRECT_COMMAND_BIT
:
3504 case VK_MEMORY_INPUT_INDEX_FETCH_BIT
:
3505 case VK_MEMORY_INPUT_VERTEX_ATTRIBUTE_FETCH_BIT
:
3506 cmd
.VFCacheInvalidationEnable
= true;
3508 case VK_MEMORY_INPUT_UNIFORM_READ_BIT
:
3509 cmd
.ConstantCacheInvalidationEnable
= true;
3511 case VK_MEMORY_INPUT_SHADER_READ_BIT
:
3512 cmd
.DCFlushEnable
= true;
3513 cmd
.TextureCacheInvalidationEnable
= true;
3515 case VK_MEMORY_INPUT_COLOR_ATTACHMENT_BIT
:
3516 case VK_MEMORY_INPUT_DEPTH_STENCIL_ATTACHMENT_BIT
:
3517 break; /* XXX: Hunh? */
3518 case VK_MEMORY_INPUT_TRANSFER_BIT
:
3519 cmd
.TextureCacheInvalidationEnable
= true;
3524 dw
= anv_batch_emit_dwords(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL_length
);
3525 GEN8_PIPE_CONTROL_pack(&cmd_buffer
->batch
, dw
, &cmd
);
3529 anv_framebuffer_destroy(struct anv_device
*device
,
3530 struct anv_object
*object
,
3531 VkObjectType obj_type
)
3533 struct anv_framebuffer
*fb
= (struct anv_framebuffer
*)object
;
3535 assert(obj_type
== VK_OBJECT_TYPE_FRAMEBUFFER
);
3537 anv_DestroyObject((VkDevice
) device
,
3538 VK_OBJECT_TYPE_DYNAMIC_VP_STATE
,
3541 anv_device_free(device
, fb
);
3544 VkResult
anv_CreateFramebuffer(
3546 const VkFramebufferCreateInfo
* pCreateInfo
,
3547 VkFramebuffer
* pFramebuffer
)
3549 struct anv_device
*device
= (struct anv_device
*) _device
;
3550 struct anv_framebuffer
*framebuffer
;
3552 static const struct anv_depth_stencil_view null_view
=
3553 { .depth_format
= D16_UNORM
, .depth_stride
= 0, .stencil_stride
= 0 };
3555 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO
);
3557 framebuffer
= anv_device_alloc(device
, sizeof(*framebuffer
), 8,
3558 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
3559 if (framebuffer
== NULL
)
3560 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
3562 framebuffer
->base
.destructor
= anv_framebuffer_destroy
;
3564 framebuffer
->color_attachment_count
= pCreateInfo
->colorAttachmentCount
;
3565 for (uint32_t i
= 0; i
< pCreateInfo
->colorAttachmentCount
; i
++) {
3566 framebuffer
->color_attachments
[i
] =
3567 (struct anv_surface_view
*) pCreateInfo
->pColorAttachments
[i
].view
;
3570 if (pCreateInfo
->pDepthStencilAttachment
) {
3571 framebuffer
->depth_stencil
=
3572 (struct anv_depth_stencil_view
*) pCreateInfo
->pDepthStencilAttachment
->view
;
3574 framebuffer
->depth_stencil
= &null_view
;
3577 framebuffer
->sample_count
= pCreateInfo
->sampleCount
;
3578 framebuffer
->width
= pCreateInfo
->width
;
3579 framebuffer
->height
= pCreateInfo
->height
;
3580 framebuffer
->layers
= pCreateInfo
->layers
;
3582 anv_CreateDynamicViewportState((VkDevice
) device
,
3583 &(VkDynamicVpStateCreateInfo
) {
3584 .sType
= VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO
,
3585 .viewportAndScissorCount
= 1,
3586 .pViewports
= (VkViewport
[]) {
3590 .width
= pCreateInfo
->width
,
3591 .height
= pCreateInfo
->height
,
3596 .pScissors
= (VkRect2D
[]) {
3598 { pCreateInfo
->width
, pCreateInfo
->height
} },
3601 &framebuffer
->vp_state
);
3603 *pFramebuffer
= (VkFramebuffer
) framebuffer
;
3608 VkResult
anv_CreateRenderPass(
3610 const VkRenderPassCreateInfo
* pCreateInfo
,
3611 VkRenderPass
* pRenderPass
)
3613 struct anv_device
*device
= (struct anv_device
*) _device
;
3614 struct anv_render_pass
*pass
;
3617 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO
);
3619 size
= sizeof(*pass
) +
3620 pCreateInfo
->layers
* sizeof(struct anv_render_pass_layer
);
3621 pass
= anv_device_alloc(device
, size
, 8,
3622 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
3624 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
3626 pass
->render_area
= pCreateInfo
->renderArea
;
3628 pass
->num_layers
= pCreateInfo
->layers
;
3630 pass
->num_clear_layers
= 0;
3631 for (uint32_t i
= 0; i
< pCreateInfo
->layers
; i
++) {
3632 pass
->layers
[i
].color_load_op
= pCreateInfo
->pColorLoadOps
[i
];
3633 pass
->layers
[i
].clear_color
= pCreateInfo
->pColorLoadClearValues
[i
];
3634 if (pass
->layers
[i
].color_load_op
== VK_ATTACHMENT_LOAD_OP_CLEAR
)
3635 pass
->num_clear_layers
++;
3638 *pRenderPass
= (VkRenderPass
) pass
;
3644 anv_cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer
*cmd_buffer
,
3645 struct anv_render_pass
*pass
)
3647 const struct anv_depth_stencil_view
*view
=
3648 cmd_buffer
->framebuffer
->depth_stencil
;
3650 /* FIXME: Implement the PMA stall W/A */
3651 /* FIXME: Width and Height are wrong */
3653 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DEPTH_BUFFER
,
3654 .SurfaceType
= SURFTYPE_2D
,
3655 .DepthWriteEnable
= view
->depth_stride
> 0,
3656 .StencilWriteEnable
= view
->stencil_stride
> 0,
3657 .HierarchicalDepthBufferEnable
= false,
3658 .SurfaceFormat
= view
->depth_format
,
3659 .SurfacePitch
= view
->depth_stride
> 0 ? view
->depth_stride
- 1 : 0,
3660 .SurfaceBaseAddress
= { view
->bo
, view
->depth_offset
},
3661 .Height
= pass
->render_area
.extent
.height
- 1,
3662 .Width
= pass
->render_area
.extent
.width
- 1,
3665 .MinimumArrayElement
= 0,
3666 .DepthBufferObjectControlState
= GEN8_MOCS
,
3667 .RenderTargetViewExtent
= 1 - 1,
3668 .SurfaceQPitch
= view
->depth_qpitch
>> 2);
3670 /* Disable hierarchial depth buffers. */
3671 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_HIER_DEPTH_BUFFER
);
3673 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_STENCIL_BUFFER
,
3674 .StencilBufferEnable
= view
->stencil_stride
> 0,
3675 .StencilBufferObjectControlState
= GEN8_MOCS
,
3676 .SurfacePitch
= view
->stencil_stride
> 0 ? view
->stencil_stride
- 1 : 0,
3677 .SurfaceBaseAddress
= { view
->bo
, view
->stencil_offset
},
3678 .SurfaceQPitch
= view
->stencil_qpitch
>> 2);
3680 /* Clear the clear params. */
3681 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_CLEAR_PARAMS
);
3684 void anv_CmdBeginRenderPass(
3685 VkCmdBuffer cmdBuffer
,
3686 const VkRenderPassBegin
* pRenderPassBegin
)
3688 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3689 struct anv_render_pass
*pass
= (struct anv_render_pass
*) pRenderPassBegin
->renderPass
;
3690 struct anv_framebuffer
*framebuffer
=
3691 (struct anv_framebuffer
*) pRenderPassBegin
->framebuffer
;
3693 cmd_buffer
->framebuffer
= framebuffer
;
3695 cmd_buffer
->descriptors_dirty
|= VK_SHADER_STAGE_FRAGMENT_BIT
;
3697 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DRAWING_RECTANGLE
,
3698 .ClippedDrawingRectangleYMin
= pass
->render_area
.offset
.y
,
3699 .ClippedDrawingRectangleXMin
= pass
->render_area
.offset
.x
,
3700 .ClippedDrawingRectangleYMax
=
3701 pass
->render_area
.offset
.y
+ pass
->render_area
.extent
.height
- 1,
3702 .ClippedDrawingRectangleXMax
=
3703 pass
->render_area
.offset
.x
+ pass
->render_area
.extent
.width
- 1,
3704 .DrawingRectangleOriginY
= 0,
3705 .DrawingRectangleOriginX
= 0);
3707 anv_cmd_buffer_emit_depth_stencil(cmd_buffer
, pass
);
3709 anv_cmd_buffer_clear(cmd_buffer
, pass
);
3712 void anv_CmdEndRenderPass(
3713 VkCmdBuffer cmdBuffer
,
3714 VkRenderPass renderPass
)
3716 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3717 * hack but it ensures that render targets always actually get written.
3718 * Eventually, we should do flushing based on image format transitions
3719 * or something of that nature.
3721 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*)cmdBuffer
;
3722 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
3723 .PostSyncOperation
= NoWrite
,
3724 .RenderTargetCacheFlushEnable
= true,
3725 .InstructionCacheInvalidateEnable
= true,
3726 .DepthCacheFlushEnable
= true,
3727 .VFCacheInvalidationEnable
= true,
3728 .TextureCacheInvalidationEnable
= true,
3729 .CommandStreamerStallEnable
= true);
3732 void vkCmdDbgMarkerBegin(
3733 VkCmdBuffer cmdBuffer
,
3734 const char* pMarker
)
3735 __attribute__ ((visibility ("default")));
3737 void vkCmdDbgMarkerEnd(
3738 VkCmdBuffer cmdBuffer
)
3739 __attribute__ ((visibility ("default")));
3741 VkResult
vkDbgSetObjectTag(
3746 __attribute__ ((visibility ("default")));
3749 void vkCmdDbgMarkerBegin(
3750 VkCmdBuffer cmdBuffer
,
3751 const char* pMarker
)
3755 void vkCmdDbgMarkerEnd(
3756 VkCmdBuffer cmdBuffer
)
3760 VkResult
vkDbgSetObjectTag(