2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
33 anv_env_get_int(const char *name
)
35 const char *val
= getenv(name
);
40 return strtol(val
, NULL
, 0);
44 fill_physical_device(struct anv_physical_device
*device
,
45 struct anv_instance
*instance
,
50 fd
= open("/dev/dri/renderD128", O_RDWR
| O_CLOEXEC
);
52 return vk_error(VK_ERROR_UNAVAILABLE
);
54 device
->instance
= instance
;
57 device
->chipset_id
= anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device
->no_hw
= false;
59 if (device
->chipset_id
) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
63 device
->chipset_id
= anv_gem_get_param(fd
, I915_PARAM_CHIPSET_ID
);
65 if (!device
->chipset_id
)
68 device
->name
= brw_get_device_name(device
->chipset_id
);
69 device
->info
= brw_get_device_info(device
->chipset_id
, -1);
73 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_WAIT_TIMEOUT
))
76 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_EXECBUF2
))
79 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_LLC
))
82 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_EXEC_CONSTANTS
))
92 return vk_error(VK_ERROR_UNAVAILABLE
);
95 static void *default_alloc(
99 VkSystemAllocType allocType
)
104 static void default_free(
111 static const VkAllocCallbacks default_alloc_callbacks
= {
113 .pfnAlloc
= default_alloc
,
114 .pfnFree
= default_free
117 VkResult
anv_CreateInstance(
118 const VkInstanceCreateInfo
* pCreateInfo
,
119 VkInstance
* pInstance
)
121 struct anv_instance
*instance
;
122 const VkAllocCallbacks
*alloc_callbacks
= &default_alloc_callbacks
;
123 void *user_data
= NULL
;
126 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
);
128 if (pCreateInfo
->pAllocCb
) {
129 alloc_callbacks
= pCreateInfo
->pAllocCb
;
130 user_data
= pCreateInfo
->pAllocCb
->pUserData
;
132 instance
= alloc_callbacks
->pfnAlloc(user_data
, sizeof(*instance
), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
137 instance
->pAllocUserData
= alloc_callbacks
->pUserData
;
138 instance
->pfnAlloc
= alloc_callbacks
->pfnAlloc
;
139 instance
->pfnFree
= alloc_callbacks
->pfnFree
;
140 instance
->apiVersion
= pCreateInfo
->pAppInfo
->apiVersion
;
142 instance
->physicalDeviceCount
= 0;
143 result
= fill_physical_device(&instance
->physicalDevice
,
144 instance
, "/dev/dri/renderD128");
146 if (result
!= VK_SUCCESS
)
149 instance
->physicalDeviceCount
++;
150 *pInstance
= (VkInstance
) instance
;
155 VkResult
anv_DestroyInstance(
156 VkInstance _instance
)
158 struct anv_instance
*instance
= (struct anv_instance
*) _instance
;
160 instance
->pfnFree(instance
->pAllocUserData
, instance
);
165 VkResult
anv_EnumeratePhysicalDevices(
166 VkInstance _instance
,
167 uint32_t* pPhysicalDeviceCount
,
168 VkPhysicalDevice
* pPhysicalDevices
)
170 struct anv_instance
*instance
= (struct anv_instance
*) _instance
;
172 if (*pPhysicalDeviceCount
>= 1)
173 pPhysicalDevices
[0] = (VkPhysicalDevice
) &instance
->physicalDevice
;
174 *pPhysicalDeviceCount
= instance
->physicalDeviceCount
;
179 VkResult
anv_GetPhysicalDeviceInfo(
180 VkPhysicalDevice physicalDevice
,
181 VkPhysicalDeviceInfoType infoType
,
185 struct anv_physical_device
*device
= (struct anv_physical_device
*) physicalDevice
;
186 VkPhysicalDeviceProperties
*properties
;
187 VkPhysicalDevicePerformance
*performance
;
188 VkPhysicalDeviceQueueProperties
*queue_properties
;
189 VkPhysicalDeviceMemoryProperties
*memory_properties
;
190 VkDisplayPropertiesWSI
*display_properties
;
191 uint64_t ns_per_tick
= 80;
193 switch ((uint32_t) infoType
) {
194 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES
:
197 *pDataSize
= sizeof(*properties
);
201 properties
->apiVersion
= 1;
202 properties
->driverVersion
= 1;
203 properties
->vendorId
= 0x8086;
204 properties
->deviceId
= device
->chipset_id
;
205 properties
->deviceType
= VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU
;
206 strcpy(properties
->deviceName
, device
->name
);
207 properties
->maxInlineMemoryUpdateSize
= 0;
208 properties
->maxBoundDescriptorSets
= MAX_SETS
;
209 properties
->maxThreadGroupSize
= 512;
210 properties
->timestampFrequency
= 1000 * 1000 * 1000 / ns_per_tick
;
211 properties
->multiColorAttachmentClears
= true;
212 properties
->maxDescriptorSets
= 8;
213 properties
->maxViewports
= 16;
214 properties
->maxColorAttachments
= 8;
217 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE
:
220 *pDataSize
= sizeof(*performance
);
224 performance
->maxDeviceClock
= 1.0;
225 performance
->aluPerClock
= 1.0;
226 performance
->texPerClock
= 1.0;
227 performance
->primsPerClock
= 1.0;
228 performance
->pixelsPerClock
= 1.0;
231 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES
:
232 queue_properties
= pData
;
234 *pDataSize
= sizeof(*queue_properties
);
238 queue_properties
->queueFlags
= 0;
239 queue_properties
->queueCount
= 1;
240 queue_properties
->supportsTimestamps
= true;
243 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES
:
244 memory_properties
= pData
;
246 *pDataSize
= sizeof(*memory_properties
);
250 memory_properties
->supportsMigration
= false;
251 memory_properties
->supportsPinning
= false;
254 case VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI
:
255 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI");
257 *pDataSize
= sizeof(*display_properties
);
261 display_properties
= pData
;
262 display_properties
->display
= 0;
263 display_properties
->physicalResolution
= (VkExtent2D
) { 0, 0 };
266 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI
:
267 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI");
272 return VK_UNSUPPORTED
;
277 void * vkGetProcAddr(
278 VkPhysicalDevice physicalDevice
,
281 return anv_lookup_entrypoint(pName
);
285 parse_debug_flags(struct anv_device
*device
)
287 const char *debug
, *p
, *end
;
289 debug
= getenv("INTEL_DEBUG");
290 device
->dump_aub
= false;
292 for (p
= debug
; *p
; p
= end
+ 1) {
293 end
= strchrnul(p
, ',');
294 if (end
- p
== 3 && memcmp(p
, "aub", 3) == 0)
295 device
->dump_aub
= true;
296 if (end
- p
== 5 && memcmp(p
, "no_hw", 5) == 0)
297 device
->no_hw
= true;
305 anv_queue_init(struct anv_device
*device
, struct anv_queue
*queue
)
307 queue
->device
= device
;
308 queue
->pool
= &device
->surface_state_pool
;
310 queue
->completed_serial
= anv_state_pool_alloc(queue
->pool
, 4, 4);
311 if (queue
->completed_serial
.map
== NULL
)
312 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY
);
314 *(uint32_t *)queue
->completed_serial
.map
= 0;
315 queue
->next_serial
= 1;
321 anv_queue_finish(struct anv_queue
*queue
)
324 /* This gets torn down with the device so we only need to do this if
325 * valgrind is present.
327 anv_state_pool_free(queue
->pool
, queue
->completed_serial
);
332 anv_device_init_border_colors(struct anv_device
*device
)
334 float float_border_colors
[][4] = {
335 [VK_BORDER_COLOR_OPAQUE_WHITE
] = { 1.0, 1.0, 1.0, 1.0 },
336 [VK_BORDER_COLOR_TRANSPARENT_BLACK
] = { 0.0, 0.0, 0.0, 0.0 },
337 [VK_BORDER_COLOR_OPAQUE_BLACK
] = { 0.0, 0.0, 0.0, 1.0 }
340 uint32_t uint32_border_colors
[][4] = {
341 [VK_BORDER_COLOR_OPAQUE_WHITE
] = { 1, 1, 1, 1 },
342 [VK_BORDER_COLOR_TRANSPARENT_BLACK
] = { 0, 0, 0, 0 },
343 [VK_BORDER_COLOR_OPAQUE_BLACK
] = { 0, 0, 0, 1 }
346 device
->float_border_colors
=
347 anv_state_pool_alloc(&device
->dynamic_state_pool
,
348 sizeof(float_border_colors
), 32);
349 memcpy(device
->float_border_colors
.map
,
350 float_border_colors
, sizeof(float_border_colors
));
352 device
->uint32_border_colors
=
353 anv_state_pool_alloc(&device
->dynamic_state_pool
,
354 sizeof(uint32_border_colors
), 32);
355 memcpy(device
->uint32_border_colors
.map
,
356 uint32_border_colors
, sizeof(uint32_border_colors
));
360 static const uint32_t BATCH_SIZE
= 8192;
362 VkResult
anv_CreateDevice(
363 VkPhysicalDevice _physicalDevice
,
364 const VkDeviceCreateInfo
* pCreateInfo
,
367 struct anv_physical_device
*physicalDevice
=
368 (struct anv_physical_device
*) _physicalDevice
;
369 struct anv_instance
*instance
= physicalDevice
->instance
;
370 struct anv_device
*device
;
372 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO
);
374 device
= instance
->pfnAlloc(instance
->pAllocUserData
,
376 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
378 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
380 device
->no_hw
= physicalDevice
->no_hw
;
381 parse_debug_flags(device
);
383 device
->instance
= physicalDevice
->instance
;
384 device
->fd
= open("/dev/dri/renderD128", O_RDWR
| O_CLOEXEC
);
385 if (device
->fd
== -1)
388 device
->context_id
= anv_gem_create_context(device
);
389 if (device
->context_id
== -1)
392 anv_bo_pool_init(&device
->batch_bo_pool
, device
, BATCH_SIZE
);
394 anv_block_pool_init(&device
->dynamic_state_block_pool
, device
, 2048);
396 anv_state_pool_init(&device
->dynamic_state_pool
,
397 &device
->dynamic_state_block_pool
);
399 anv_block_pool_init(&device
->instruction_block_pool
, device
, 2048);
400 anv_block_pool_init(&device
->surface_state_block_pool
, device
, 2048);
402 anv_state_pool_init(&device
->surface_state_pool
,
403 &device
->surface_state_block_pool
);
405 anv_block_pool_init(&device
->scratch_block_pool
, device
, 0x10000);
407 device
->info
= *physicalDevice
->info
;
409 device
->compiler
= anv_compiler_create(device
);
410 device
->aub_writer
= NULL
;
412 pthread_mutex_init(&device
->mutex
, NULL
);
414 anv_queue_init(device
, &device
->queue
);
416 anv_device_init_meta(device
);
418 anv_device_init_border_colors(device
);
420 *pDevice
= (VkDevice
) device
;
427 anv_device_free(device
, device
);
429 return vk_error(VK_ERROR_UNAVAILABLE
);
432 VkResult
anv_DestroyDevice(
435 struct anv_device
*device
= (struct anv_device
*) _device
;
437 anv_compiler_destroy(device
->compiler
);
439 anv_queue_finish(&device
->queue
);
441 anv_device_finish_meta(device
);
444 /* We only need to free these to prevent valgrind errors. The backing
445 * BO will go away in a couple of lines so we don't actually leak.
447 anv_state_pool_free(&device
->dynamic_state_pool
,
448 device
->float_border_colors
);
449 anv_state_pool_free(&device
->dynamic_state_pool
,
450 device
->uint32_border_colors
);
453 anv_bo_pool_finish(&device
->batch_bo_pool
);
454 anv_block_pool_finish(&device
->dynamic_state_block_pool
);
455 anv_block_pool_finish(&device
->instruction_block_pool
);
456 anv_block_pool_finish(&device
->surface_state_block_pool
);
460 if (device
->aub_writer
)
461 anv_aub_writer_destroy(device
->aub_writer
);
463 anv_device_free(device
, device
);
468 VkResult
anv_GetGlobalExtensionInfo(
469 VkExtensionInfoType infoType
,
470 uint32_t extensionIndex
,
474 static const VkExtensionProperties extensions
[] = {
476 .extName
= "VK_WSI_LunarG",
480 uint32_t count
= ARRAY_SIZE(extensions
);
483 case VK_EXTENSION_INFO_TYPE_COUNT
:
484 memcpy(pData
, &count
, sizeof(count
));
485 *pDataSize
= sizeof(count
);
488 case VK_EXTENSION_INFO_TYPE_PROPERTIES
:
489 if (extensionIndex
>= count
)
490 return vk_error(VK_ERROR_INVALID_EXTENSION
);
492 memcpy(pData
, &extensions
[extensionIndex
], sizeof(extensions
[0]));
493 *pDataSize
= sizeof(extensions
[0]);
497 return VK_UNSUPPORTED
;
501 VkResult
anv_GetPhysicalDeviceExtensionInfo(
502 VkPhysicalDevice physicalDevice
,
503 VkExtensionInfoType infoType
,
504 uint32_t extensionIndex
,
511 case VK_EXTENSION_INFO_TYPE_COUNT
:
520 case VK_EXTENSION_INFO_TYPE_PROPERTIES
:
521 return vk_error(VK_ERROR_INVALID_EXTENSION
);
524 return VK_UNSUPPORTED
;
528 VkResult
anv_EnumerateLayers(
529 VkPhysicalDevice physicalDevice
,
530 size_t maxStringSize
,
532 char* const* pOutLayers
,
540 VkResult
anv_GetDeviceQueue(
542 uint32_t queueNodeIndex
,
546 struct anv_device
*device
= (struct anv_device
*) _device
;
548 assert(queueIndex
== 0);
550 *pQueue
= (VkQueue
) &device
->queue
;
556 anv_reloc_list_init(struct anv_reloc_list
*list
, struct anv_device
*device
)
558 list
->num_relocs
= 0;
559 list
->array_length
= 256;
561 anv_device_alloc(device
, list
->array_length
* sizeof(*list
->relocs
), 8,
562 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
564 if (list
->relocs
== NULL
)
565 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
568 anv_device_alloc(device
, list
->array_length
* sizeof(*list
->reloc_bos
), 8,
569 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
571 if (list
->relocs
== NULL
) {
572 anv_device_free(device
, list
->relocs
);
573 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
580 anv_reloc_list_finish(struct anv_reloc_list
*list
, struct anv_device
*device
)
582 anv_device_free(device
, list
->relocs
);
583 anv_device_free(device
, list
->reloc_bos
);
587 anv_reloc_list_grow(struct anv_reloc_list
*list
, struct anv_device
*device
,
588 size_t num_additional_relocs
)
590 if (list
->num_relocs
+ num_additional_relocs
<= list
->array_length
)
593 size_t new_length
= list
->array_length
* 2;
594 while (new_length
< list
->num_relocs
+ num_additional_relocs
)
597 struct drm_i915_gem_relocation_entry
*new_relocs
=
598 anv_device_alloc(device
, new_length
* sizeof(*list
->relocs
), 8,
599 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
600 if (new_relocs
== NULL
)
601 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
603 struct anv_bo
**new_reloc_bos
=
604 anv_device_alloc(device
, new_length
* sizeof(*list
->reloc_bos
), 8,
605 VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
606 if (new_relocs
== NULL
) {
607 anv_device_free(device
, new_relocs
);
608 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
611 memcpy(new_relocs
, list
->relocs
, list
->num_relocs
* sizeof(*list
->relocs
));
612 memcpy(new_reloc_bos
, list
->reloc_bos
,
613 list
->num_relocs
* sizeof(*list
->reloc_bos
));
615 anv_device_free(device
, list
->relocs
);
616 anv_device_free(device
, list
->reloc_bos
);
618 list
->relocs
= new_relocs
;
619 list
->reloc_bos
= new_reloc_bos
;
625 anv_batch_bo_create(struct anv_device
*device
, struct anv_batch_bo
**bbo_out
)
629 struct anv_batch_bo
*bbo
=
630 anv_device_alloc(device
, sizeof(*bbo
), 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
632 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
635 bbo
->prev_batch_bo
= NULL
;
637 result
= anv_bo_pool_alloc(&device
->batch_bo_pool
, &bbo
->bo
);
638 if (result
!= VK_SUCCESS
) {
639 anv_device_free(device
, bbo
);
649 anv_batch_bo_start(struct anv_batch_bo
*bbo
, struct anv_batch
*batch
,
650 size_t batch_padding
)
652 batch
->next
= batch
->start
= bbo
->bo
.map
;
653 batch
->end
= bbo
->bo
.map
+ bbo
->bo
.size
- batch_padding
;
654 bbo
->first_reloc
= batch
->relocs
.num_relocs
;
658 anv_batch_bo_finish(struct anv_batch_bo
*bbo
, struct anv_batch
*batch
)
660 assert(batch
->start
== bbo
->bo
.map
);
661 bbo
->length
= batch
->next
- batch
->start
;
662 VG(VALGRIND_CHECK_MEM_IS_DEFINED(batch
->start
, bbo
->length
));
663 bbo
->num_relocs
= batch
->relocs
.num_relocs
- bbo
->first_reloc
;
667 anv_batch_bo_destroy(struct anv_batch_bo
*bbo
, struct anv_device
*device
)
669 anv_bo_pool_free(&device
->batch_bo_pool
, &bbo
->bo
);
670 anv_device_free(device
, bbo
);
674 anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
)
676 if (batch
->next
+ num_dwords
* 4 > batch
->end
)
677 batch
->extend_cb(batch
, batch
->user_data
);
679 void *p
= batch
->next
;
681 batch
->next
+= num_dwords
* 4;
682 assert(batch
->next
<= batch
->end
);
688 anv_reloc_list_append(struct anv_reloc_list
*list
, struct anv_device
*device
,
689 struct anv_reloc_list
*other
, uint32_t offset
)
691 anv_reloc_list_grow(list
, device
, other
->num_relocs
);
692 /* TODO: Handle failure */
694 memcpy(&list
->relocs
[list
->num_relocs
], &other
->relocs
[0],
695 other
->num_relocs
* sizeof(other
->relocs
[0]));
696 memcpy(&list
->reloc_bos
[list
->num_relocs
], &other
->reloc_bos
[0],
697 other
->num_relocs
* sizeof(other
->reloc_bos
[0]));
699 for (uint32_t i
= 0; i
< other
->num_relocs
; i
++)
700 list
->relocs
[i
+ list
->num_relocs
].offset
+= offset
;
702 list
->num_relocs
+= other
->num_relocs
;
706 anv_reloc_list_add(struct anv_reloc_list
*list
, struct anv_device
*device
,
707 uint32_t offset
, struct anv_bo
*target_bo
, uint32_t delta
)
709 struct drm_i915_gem_relocation_entry
*entry
;
712 anv_reloc_list_grow(list
, device
, 1);
713 /* TODO: Handle failure */
715 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
716 index
= list
->num_relocs
++;
717 list
->reloc_bos
[index
] = target_bo
;
718 entry
= &list
->relocs
[index
];
719 entry
->target_handle
= target_bo
->gem_handle
;
720 entry
->delta
= delta
;
721 entry
->offset
= offset
;
722 entry
->presumed_offset
= target_bo
->offset
;
723 entry
->read_domains
= 0;
724 entry
->write_domain
= 0;
726 return target_bo
->offset
+ delta
;
730 anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
)
732 uint32_t size
, offset
;
734 size
= other
->next
- other
->start
;
735 assert(size
% 4 == 0);
737 if (batch
->next
+ size
> batch
->end
)
738 batch
->extend_cb(batch
, batch
->user_data
);
740 assert(batch
->next
+ size
<= batch
->end
);
742 memcpy(batch
->next
, other
->start
, size
);
744 offset
= batch
->next
- batch
->start
;
745 anv_reloc_list_append(&batch
->relocs
, batch
->device
,
746 &other
->relocs
, offset
);
752 anv_batch_emit_reloc(struct anv_batch
*batch
,
753 void *location
, struct anv_bo
*bo
, uint32_t delta
)
755 return anv_reloc_list_add(&batch
->relocs
, batch
->device
,
756 location
- batch
->start
, bo
, delta
);
759 VkResult
anv_QueueSubmit(
761 uint32_t cmdBufferCount
,
762 const VkCmdBuffer
* pCmdBuffers
,
765 struct anv_queue
*queue
= (struct anv_queue
*) _queue
;
766 struct anv_device
*device
= queue
->device
;
767 struct anv_fence
*fence
= (struct anv_fence
*) _fence
;
770 for (uint32_t i
= 0; i
< cmdBufferCount
; i
++) {
771 struct anv_cmd_buffer
*cmd_buffer
=
772 (struct anv_cmd_buffer
*) pCmdBuffers
[i
];
774 if (device
->dump_aub
)
775 anv_cmd_buffer_dump(cmd_buffer
);
777 if (!device
->no_hw
) {
778 ret
= anv_gem_execbuffer(device
, &cmd_buffer
->execbuf
);
780 return vk_error(VK_ERROR_UNKNOWN
);
783 ret
= anv_gem_execbuffer(device
, &fence
->execbuf
);
785 return vk_error(VK_ERROR_UNKNOWN
);
788 for (uint32_t i
= 0; i
< cmd_buffer
->bo_count
; i
++)
789 cmd_buffer
->exec2_bos
[i
]->offset
= cmd_buffer
->exec2_objects
[i
].offset
;
791 *(uint32_t *)queue
->completed_serial
.map
= cmd_buffer
->serial
;
798 VkResult
anv_QueueWaitIdle(
801 struct anv_queue
*queue
= (struct anv_queue
*) _queue
;
803 return vkDeviceWaitIdle((VkDevice
) queue
->device
);
806 VkResult
anv_DeviceWaitIdle(
809 struct anv_device
*device
= (struct anv_device
*) _device
;
810 struct anv_state state
;
811 struct anv_batch batch
;
812 struct drm_i915_gem_execbuffer2 execbuf
;
813 struct drm_i915_gem_exec_object2 exec2_objects
[1];
814 struct anv_bo
*bo
= NULL
;
819 state
= anv_state_pool_alloc(&device
->dynamic_state_pool
, 32, 32);
820 bo
= &device
->dynamic_state_pool
.block_pool
->bo
;
821 batch
.start
= batch
.next
= state
.map
;
822 batch
.end
= state
.map
+ 32;
823 anv_batch_emit(&batch
, GEN8_MI_BATCH_BUFFER_END
);
824 anv_batch_emit(&batch
, GEN8_MI_NOOP
);
826 exec2_objects
[0].handle
= bo
->gem_handle
;
827 exec2_objects
[0].relocation_count
= 0;
828 exec2_objects
[0].relocs_ptr
= 0;
829 exec2_objects
[0].alignment
= 0;
830 exec2_objects
[0].offset
= bo
->offset
;
831 exec2_objects
[0].flags
= 0;
832 exec2_objects
[0].rsvd1
= 0;
833 exec2_objects
[0].rsvd2
= 0;
835 execbuf
.buffers_ptr
= (uintptr_t) exec2_objects
;
836 execbuf
.buffer_count
= 1;
837 execbuf
.batch_start_offset
= state
.offset
;
838 execbuf
.batch_len
= batch
.next
- state
.map
;
839 execbuf
.cliprects_ptr
= 0;
840 execbuf
.num_cliprects
= 0;
845 I915_EXEC_HANDLE_LUT
| I915_EXEC_NO_RELOC
| I915_EXEC_RENDER
;
846 execbuf
.rsvd1
= device
->context_id
;
849 if (!device
->no_hw
) {
850 ret
= anv_gem_execbuffer(device
, &execbuf
);
852 result
= vk_error(VK_ERROR_UNKNOWN
);
857 ret
= anv_gem_wait(device
, bo
->gem_handle
, &timeout
);
859 result
= vk_error(VK_ERROR_UNKNOWN
);
864 anv_state_pool_free(&device
->dynamic_state_pool
, state
);
869 anv_state_pool_free(&device
->dynamic_state_pool
, state
);
875 anv_device_alloc(struct anv_device
* device
,
878 VkSystemAllocType allocType
)
880 return device
->instance
->pfnAlloc(device
->instance
->pAllocUserData
,
887 anv_device_free(struct anv_device
* device
,
890 return device
->instance
->pfnFree(device
->instance
->pAllocUserData
,
895 anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
)
897 bo
->gem_handle
= anv_gem_create(device
, size
);
899 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY
);
909 VkResult
anv_AllocMemory(
911 const VkMemoryAllocInfo
* pAllocInfo
,
912 VkDeviceMemory
* pMem
)
914 struct anv_device
*device
= (struct anv_device
*) _device
;
915 struct anv_device_memory
*mem
;
918 assert(pAllocInfo
->sType
== VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO
);
920 mem
= anv_device_alloc(device
, sizeof(*mem
), 8,
921 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
923 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
925 result
= anv_bo_init_new(&mem
->bo
, device
, pAllocInfo
->allocationSize
);
926 if (result
!= VK_SUCCESS
)
929 *pMem
= (VkDeviceMemory
) mem
;
934 anv_device_free(device
, mem
);
939 VkResult
anv_FreeMemory(
943 struct anv_device
*device
= (struct anv_device
*) _device
;
944 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
947 anv_gem_munmap(mem
->bo
.map
, mem
->bo
.size
);
949 if (mem
->bo
.gem_handle
!= 0)
950 anv_gem_close(device
, mem
->bo
.gem_handle
);
952 anv_device_free(device
, mem
);
957 VkResult
anv_MapMemory(
962 VkMemoryMapFlags flags
,
965 struct anv_device
*device
= (struct anv_device
*) _device
;
966 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
968 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
969 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
970 * at a time is valid. We could just mmap up front and return an offset
971 * pointer here, but that may exhaust virtual memory on 32 bit
974 mem
->map
= anv_gem_mmap(device
, mem
->bo
.gem_handle
, offset
, size
);
975 mem
->map_size
= size
;
982 VkResult
anv_UnmapMemory(
986 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
988 anv_gem_munmap(mem
->map
, mem
->map_size
);
993 VkResult
anv_FlushMappedMemoryRanges(
995 uint32_t memRangeCount
,
996 const VkMappedMemoryRange
* pMemRanges
)
998 /* clflush here for !llc platforms */
1003 VkResult
anv_InvalidateMappedMemoryRanges(
1005 uint32_t memRangeCount
,
1006 const VkMappedMemoryRange
* pMemRanges
)
1008 return anv_FlushMappedMemoryRanges(device
, memRangeCount
, pMemRanges
);
1011 VkResult
anv_DestroyObject(
1013 VkObjectType objType
,
1016 struct anv_device
*device
= (struct anv_device
*) _device
;
1017 struct anv_object
*object
= (struct anv_object
*) _object
;
1020 case VK_OBJECT_TYPE_INSTANCE
:
1021 return anv_DestroyInstance((VkInstance
) _object
);
1023 case VK_OBJECT_TYPE_PHYSICAL_DEVICE
:
1024 /* We don't want to actually destroy physical devices */
1027 case VK_OBJECT_TYPE_DEVICE
:
1028 assert(_device
== (VkDevice
) _object
);
1029 return anv_DestroyDevice((VkDevice
) _object
);
1031 case VK_OBJECT_TYPE_QUEUE
:
1035 case VK_OBJECT_TYPE_DEVICE_MEMORY
:
1036 return anv_FreeMemory(_device
, (VkDeviceMemory
) _object
);
1038 case VK_OBJECT_TYPE_DESCRIPTOR_POOL
:
1039 /* These are just dummys anyway, so we don't need to destroy them */
1042 case VK_OBJECT_TYPE_BUFFER
:
1043 case VK_OBJECT_TYPE_IMAGE
:
1044 case VK_OBJECT_TYPE_DEPTH_STENCIL_VIEW
:
1045 case VK_OBJECT_TYPE_SHADER
:
1046 case VK_OBJECT_TYPE_PIPELINE_LAYOUT
:
1047 case VK_OBJECT_TYPE_SAMPLER
:
1048 case VK_OBJECT_TYPE_DESCRIPTOR_SET
:
1049 case VK_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT
:
1050 case VK_OBJECT_TYPE_DYNAMIC_RS_STATE
:
1051 case VK_OBJECT_TYPE_DYNAMIC_CB_STATE
:
1052 case VK_OBJECT_TYPE_DYNAMIC_DS_STATE
:
1053 case VK_OBJECT_TYPE_RENDER_PASS
:
1054 /* These are trivially destroyable */
1055 anv_device_free(device
, (void *) _object
);
1058 case VK_OBJECT_TYPE_COMMAND_BUFFER
:
1059 case VK_OBJECT_TYPE_PIPELINE
:
1060 case VK_OBJECT_TYPE_DYNAMIC_VP_STATE
:
1061 case VK_OBJECT_TYPE_FENCE
:
1062 case VK_OBJECT_TYPE_QUERY_POOL
:
1063 case VK_OBJECT_TYPE_FRAMEBUFFER
:
1064 case VK_OBJECT_TYPE_BUFFER_VIEW
:
1065 case VK_OBJECT_TYPE_IMAGE_VIEW
:
1066 case VK_OBJECT_TYPE_COLOR_ATTACHMENT_VIEW
:
1067 (object
->destructor
)(device
, object
, objType
);
1070 case VK_OBJECT_TYPE_SEMAPHORE
:
1071 case VK_OBJECT_TYPE_EVENT
:
1072 stub_return(VK_UNSUPPORTED
);
1075 unreachable("Invalid object type");
1079 VkResult
anv_GetObjectMemoryRequirements(
1081 VkObjectType objType
,
1083 VkMemoryRequirements
* pMemoryRequirements
)
1085 pMemoryRequirements
->memPropsAllowed
=
1086 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT
|
1087 /* VK_MEMORY_PROPERTY_HOST_NON_COHERENT_BIT | */
1088 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1089 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT
;
1091 pMemoryRequirements
->memPropsRequired
= 0;
1094 case VK_OBJECT_TYPE_BUFFER
: {
1095 struct anv_buffer
*buffer
= (struct anv_buffer
*) object
;
1096 pMemoryRequirements
->size
= buffer
->size
;
1097 pMemoryRequirements
->alignment
= 16;
1100 case VK_OBJECT_TYPE_IMAGE
: {
1101 struct anv_image
*image
= (struct anv_image
*) object
;
1102 pMemoryRequirements
->size
= image
->size
;
1103 pMemoryRequirements
->alignment
= image
->alignment
;
1107 pMemoryRequirements
->size
= 0;
1114 VkResult
anv_QueueBindObjectMemory(
1116 VkObjectType objType
,
1118 uint32_t allocationIdx
,
1119 VkDeviceMemory _mem
,
1120 VkDeviceSize memOffset
)
1122 struct anv_buffer
*buffer
;
1123 struct anv_image
*image
;
1124 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
1127 case VK_OBJECT_TYPE_BUFFER
:
1128 buffer
= (struct anv_buffer
*) object
;
1129 buffer
->bo
= &mem
->bo
;
1130 buffer
->offset
= memOffset
;
1132 case VK_OBJECT_TYPE_IMAGE
:
1133 image
= (struct anv_image
*) object
;
1134 image
->bo
= &mem
->bo
;
1135 image
->offset
= memOffset
;
1144 VkResult
anv_QueueBindObjectMemoryRange(
1146 VkObjectType objType
,
1148 uint32_t allocationIdx
,
1149 VkDeviceSize rangeOffset
,
1150 VkDeviceSize rangeSize
,
1152 VkDeviceSize memOffset
)
1154 stub_return(VK_UNSUPPORTED
);
1157 VkResult
anv_QueueBindImageMemoryRange(
1160 uint32_t allocationIdx
,
1161 const VkImageMemoryBindInfo
* pBindInfo
,
1163 VkDeviceSize memOffset
)
1165 stub_return(VK_UNSUPPORTED
);
1169 anv_fence_destroy(struct anv_device
*device
,
1170 struct anv_object
*object
,
1171 VkObjectType obj_type
)
1173 struct anv_fence
*fence
= (struct anv_fence
*) object
;
1175 assert(obj_type
== VK_OBJECT_TYPE_FENCE
);
1177 anv_gem_munmap(fence
->bo
.map
, fence
->bo
.size
);
1178 anv_gem_close(device
, fence
->bo
.gem_handle
);
1179 anv_device_free(device
, fence
);
1182 VkResult
anv_CreateFence(
1184 const VkFenceCreateInfo
* pCreateInfo
,
1187 struct anv_device
*device
= (struct anv_device
*) _device
;
1188 struct anv_fence
*fence
;
1189 struct anv_batch batch
;
1192 const uint32_t fence_size
= 128;
1194 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FENCE_CREATE_INFO
);
1196 fence
= anv_device_alloc(device
, sizeof(*fence
), 8,
1197 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1199 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1201 result
= anv_bo_init_new(&fence
->bo
, device
, fence_size
);
1202 if (result
!= VK_SUCCESS
)
1205 fence
->base
.destructor
= anv_fence_destroy
;
1208 anv_gem_mmap(device
, fence
->bo
.gem_handle
, 0, fence
->bo
.size
);
1209 batch
.next
= batch
.start
= fence
->bo
.map
;
1210 batch
.end
= fence
->bo
.map
+ fence
->bo
.size
;
1211 anv_batch_emit(&batch
, GEN8_MI_BATCH_BUFFER_END
);
1212 anv_batch_emit(&batch
, GEN8_MI_NOOP
);
1214 fence
->exec2_objects
[0].handle
= fence
->bo
.gem_handle
;
1215 fence
->exec2_objects
[0].relocation_count
= 0;
1216 fence
->exec2_objects
[0].relocs_ptr
= 0;
1217 fence
->exec2_objects
[0].alignment
= 0;
1218 fence
->exec2_objects
[0].offset
= fence
->bo
.offset
;
1219 fence
->exec2_objects
[0].flags
= 0;
1220 fence
->exec2_objects
[0].rsvd1
= 0;
1221 fence
->exec2_objects
[0].rsvd2
= 0;
1223 fence
->execbuf
.buffers_ptr
= (uintptr_t) fence
->exec2_objects
;
1224 fence
->execbuf
.buffer_count
= 1;
1225 fence
->execbuf
.batch_start_offset
= 0;
1226 fence
->execbuf
.batch_len
= batch
.next
- fence
->bo
.map
;
1227 fence
->execbuf
.cliprects_ptr
= 0;
1228 fence
->execbuf
.num_cliprects
= 0;
1229 fence
->execbuf
.DR1
= 0;
1230 fence
->execbuf
.DR4
= 0;
1232 fence
->execbuf
.flags
=
1233 I915_EXEC_HANDLE_LUT
| I915_EXEC_NO_RELOC
| I915_EXEC_RENDER
;
1234 fence
->execbuf
.rsvd1
= device
->context_id
;
1235 fence
->execbuf
.rsvd2
= 0;
1237 *pFence
= (VkFence
) fence
;
1242 anv_device_free(device
, fence
);
1247 VkResult
anv_ResetFences(
1249 uint32_t fenceCount
,
1250 const VkFence
* pFences
)
1252 struct anv_fence
**fences
= (struct anv_fence
**) pFences
;
1254 for (uint32_t i
= 0; i
< fenceCount
; i
++)
1255 fences
[i
]->ready
= false;
1260 VkResult
anv_GetFenceStatus(
1264 struct anv_device
*device
= (struct anv_device
*) _device
;
1265 struct anv_fence
*fence
= (struct anv_fence
*) _fence
;
1272 ret
= anv_gem_wait(device
, fence
->bo
.gem_handle
, &t
);
1274 fence
->ready
= true;
1278 return VK_NOT_READY
;
1281 VkResult
anv_WaitForFences(
1283 uint32_t fenceCount
,
1284 const VkFence
* pFences
,
1288 struct anv_device
*device
= (struct anv_device
*) _device
;
1289 struct anv_fence
**fences
= (struct anv_fence
**) pFences
;
1290 int64_t t
= timeout
;
1293 /* FIXME: handle !waitAll */
1295 for (uint32_t i
= 0; i
< fenceCount
; i
++) {
1296 ret
= anv_gem_wait(device
, fences
[i
]->bo
.gem_handle
, &t
);
1297 if (ret
== -1 && errno
== ETIME
)
1300 return vk_error(VK_ERROR_UNKNOWN
);
1306 // Queue semaphore functions
1308 VkResult
anv_CreateSemaphore(
1310 const VkSemaphoreCreateInfo
* pCreateInfo
,
1311 VkSemaphore
* pSemaphore
)
1313 stub_return(VK_UNSUPPORTED
);
1316 VkResult
anv_QueueSignalSemaphore(
1318 VkSemaphore semaphore
)
1320 stub_return(VK_UNSUPPORTED
);
1323 VkResult
anv_QueueWaitSemaphore(
1325 VkSemaphore semaphore
)
1327 stub_return(VK_UNSUPPORTED
);
1332 VkResult
anv_CreateEvent(
1334 const VkEventCreateInfo
* pCreateInfo
,
1337 stub_return(VK_UNSUPPORTED
);
1340 VkResult
anv_GetEventStatus(
1344 stub_return(VK_UNSUPPORTED
);
1347 VkResult
anv_SetEvent(
1351 stub_return(VK_UNSUPPORTED
);
1354 VkResult
anv_ResetEvent(
1358 stub_return(VK_UNSUPPORTED
);
1363 VkResult
anv_CreateBuffer(
1365 const VkBufferCreateInfo
* pCreateInfo
,
1368 struct anv_device
*device
= (struct anv_device
*) _device
;
1369 struct anv_buffer
*buffer
;
1371 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO
);
1373 buffer
= anv_device_alloc(device
, sizeof(*buffer
), 8,
1374 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1376 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1378 buffer
->size
= pCreateInfo
->size
;
1382 *pBuffer
= (VkBuffer
) buffer
;
1387 // Buffer view functions
1390 fill_buffer_surface_state(void *state
, VkFormat format
,
1391 uint32_t offset
, uint32_t range
)
1393 const struct anv_format
*info
;
1395 info
= anv_format_for_vk_format(format
);
1396 /* This assumes RGBA float format. */
1397 uint32_t stride
= 4;
1398 uint32_t num_elements
= range
/ stride
;
1400 struct GEN8_RENDER_SURFACE_STATE surface_state
= {
1401 .SurfaceType
= SURFTYPE_BUFFER
,
1402 .SurfaceArray
= false,
1403 .SurfaceFormat
= info
->surface_format
,
1404 .SurfaceVerticalAlignment
= VALIGN4
,
1405 .SurfaceHorizontalAlignment
= HALIGN4
,
1407 .VerticalLineStride
= 0,
1408 .VerticalLineStrideOffset
= 0,
1409 .SamplerL2BypassModeDisable
= true,
1410 .RenderCacheReadWriteMode
= WriteOnlyCache
,
1411 .MemoryObjectControlState
= GEN8_MOCS
,
1412 .BaseMipLevel
= 0.0,
1414 .Height
= (num_elements
>> 7) & 0x3fff,
1415 .Width
= num_elements
& 0x7f,
1416 .Depth
= (num_elements
>> 21) & 0x3f,
1417 .SurfacePitch
= stride
- 1,
1418 .MinimumArrayElement
= 0,
1419 .NumberofMultisamples
= MULTISAMPLECOUNT_1
,
1424 .AuxiliarySurfaceMode
= AUX_NONE
,
1426 .GreenClearColor
= 0,
1427 .BlueClearColor
= 0,
1428 .AlphaClearColor
= 0,
1429 .ShaderChannelSelectRed
= SCS_RED
,
1430 .ShaderChannelSelectGreen
= SCS_GREEN
,
1431 .ShaderChannelSelectBlue
= SCS_BLUE
,
1432 .ShaderChannelSelectAlpha
= SCS_ALPHA
,
1433 .ResourceMinLOD
= 0.0,
1434 /* FIXME: We assume that the image must be bound at this time. */
1435 .SurfaceBaseAddress
= { NULL
, offset
},
1438 GEN8_RENDER_SURFACE_STATE_pack(NULL
, state
, &surface_state
);
1441 VkResult
anv_CreateBufferView(
1443 const VkBufferViewCreateInfo
* pCreateInfo
,
1444 VkBufferView
* pView
)
1446 struct anv_device
*device
= (struct anv_device
*) _device
;
1447 struct anv_buffer
*buffer
= (struct anv_buffer
*) pCreateInfo
->buffer
;
1448 struct anv_surface_view
*view
;
1450 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO
);
1452 view
= anv_device_alloc(device
, sizeof(*view
), 8,
1453 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1455 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1457 view
->base
.destructor
= anv_surface_view_destroy
;
1459 view
->bo
= buffer
->bo
;
1460 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
1461 view
->surface_state
=
1462 anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1463 view
->format
= pCreateInfo
->format
;
1464 view
->range
= pCreateInfo
->range
;
1466 fill_buffer_surface_state(view
->surface_state
.map
,
1467 pCreateInfo
->format
, view
->offset
, pCreateInfo
->range
);
1469 *pView
= (VkBufferView
) view
;
1474 // Sampler functions
1476 VkResult
anv_CreateSampler(
1478 const VkSamplerCreateInfo
* pCreateInfo
,
1479 VkSampler
* pSampler
)
1481 struct anv_device
*device
= (struct anv_device
*) _device
;
1482 struct anv_sampler
*sampler
;
1483 uint32_t mag_filter
, min_filter
, max_anisotropy
;
1485 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO
);
1487 sampler
= anv_device_alloc(device
, sizeof(*sampler
), 8,
1488 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1490 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1492 static const uint32_t vk_to_gen_tex_filter
[] = {
1493 [VK_TEX_FILTER_NEAREST
] = MAPFILTER_NEAREST
,
1494 [VK_TEX_FILTER_LINEAR
] = MAPFILTER_LINEAR
1497 static const uint32_t vk_to_gen_mipmap_mode
[] = {
1498 [VK_TEX_MIPMAP_MODE_BASE
] = MIPFILTER_NONE
,
1499 [VK_TEX_MIPMAP_MODE_NEAREST
] = MIPFILTER_NEAREST
,
1500 [VK_TEX_MIPMAP_MODE_LINEAR
] = MIPFILTER_LINEAR
1503 static const uint32_t vk_to_gen_tex_address
[] = {
1504 [VK_TEX_ADDRESS_WRAP
] = TCM_WRAP
,
1505 [VK_TEX_ADDRESS_MIRROR
] = TCM_MIRROR
,
1506 [VK_TEX_ADDRESS_CLAMP
] = TCM_CLAMP
,
1507 [VK_TEX_ADDRESS_MIRROR_ONCE
] = TCM_MIRROR_ONCE
,
1508 [VK_TEX_ADDRESS_CLAMP_BORDER
] = TCM_CLAMP_BORDER
,
1511 static const uint32_t vk_to_gen_compare_op
[] = {
1512 [VK_COMPARE_OP_NEVER
] = PREFILTEROPNEVER
,
1513 [VK_COMPARE_OP_LESS
] = PREFILTEROPLESS
,
1514 [VK_COMPARE_OP_EQUAL
] = PREFILTEROPEQUAL
,
1515 [VK_COMPARE_OP_LESS_EQUAL
] = PREFILTEROPLEQUAL
,
1516 [VK_COMPARE_OP_GREATER
] = PREFILTEROPGREATER
,
1517 [VK_COMPARE_OP_NOT_EQUAL
] = PREFILTEROPNOTEQUAL
,
1518 [VK_COMPARE_OP_GREATER_EQUAL
] = PREFILTEROPGEQUAL
,
1519 [VK_COMPARE_OP_ALWAYS
] = PREFILTEROPALWAYS
,
1522 if (pCreateInfo
->maxAnisotropy
> 1) {
1523 mag_filter
= MAPFILTER_ANISOTROPIC
;
1524 min_filter
= MAPFILTER_ANISOTROPIC
;
1525 max_anisotropy
= (pCreateInfo
->maxAnisotropy
- 2) / 2;
1527 mag_filter
= vk_to_gen_tex_filter
[pCreateInfo
->magFilter
];
1528 min_filter
= vk_to_gen_tex_filter
[pCreateInfo
->minFilter
];
1529 max_anisotropy
= RATIO21
;
1532 struct GEN8_SAMPLER_STATE sampler_state
= {
1533 .SamplerDisable
= false,
1534 .TextureBorderColorMode
= DX10OGL
,
1535 .LODPreClampMode
= 0,
1536 .BaseMipLevel
= 0.0,
1537 .MipModeFilter
= vk_to_gen_mipmap_mode
[pCreateInfo
->mipMode
],
1538 .MagModeFilter
= mag_filter
,
1539 .MinModeFilter
= min_filter
,
1540 .TextureLODBias
= pCreateInfo
->mipLodBias
* 256,
1541 .AnisotropicAlgorithm
= EWAApproximation
,
1542 .MinLOD
= pCreateInfo
->minLod
,
1543 .MaxLOD
= pCreateInfo
->maxLod
,
1544 .ChromaKeyEnable
= 0,
1545 .ChromaKeyIndex
= 0,
1547 .ShadowFunction
= vk_to_gen_compare_op
[pCreateInfo
->compareOp
],
1548 .CubeSurfaceControlMode
= 0,
1550 .IndirectStatePointer
=
1551 device
->float_border_colors
.offset
+
1552 pCreateInfo
->borderColor
* sizeof(float) * 4,
1554 .LODClampMagnificationMode
= MIPNONE
,
1555 .MaximumAnisotropy
= max_anisotropy
,
1556 .RAddressMinFilterRoundingEnable
= 0,
1557 .RAddressMagFilterRoundingEnable
= 0,
1558 .VAddressMinFilterRoundingEnable
= 0,
1559 .VAddressMagFilterRoundingEnable
= 0,
1560 .UAddressMinFilterRoundingEnable
= 0,
1561 .UAddressMagFilterRoundingEnable
= 0,
1562 .TrilinearFilterQuality
= 0,
1563 .NonnormalizedCoordinateEnable
= 0,
1564 .TCXAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressU
],
1565 .TCYAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressV
],
1566 .TCZAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressW
],
1569 GEN8_SAMPLER_STATE_pack(NULL
, sampler
->state
, &sampler_state
);
1571 *pSampler
= (VkSampler
) sampler
;
1576 // Descriptor set functions
1578 VkResult
anv_CreateDescriptorSetLayout(
1580 const VkDescriptorSetLayoutCreateInfo
* pCreateInfo
,
1581 VkDescriptorSetLayout
* pSetLayout
)
1583 struct anv_device
*device
= (struct anv_device
*) _device
;
1584 struct anv_descriptor_set_layout
*set_layout
;
1586 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO
);
1588 uint32_t sampler_count
[VK_SHADER_STAGE_NUM
] = { 0, };
1589 uint32_t surface_count
[VK_SHADER_STAGE_NUM
] = { 0, };
1590 uint32_t num_dynamic_buffers
= 0;
1592 uint32_t stages
= 0;
1595 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1596 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1597 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1598 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1599 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1600 sampler_count
[s
] += pCreateInfo
->pBinding
[i
].arraySize
;
1606 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1607 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1608 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1609 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1610 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1611 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1612 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1613 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1614 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1615 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1616 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1617 surface_count
[s
] += pCreateInfo
->pBinding
[i
].arraySize
;
1623 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1624 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1625 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1626 num_dynamic_buffers
+= pCreateInfo
->pBinding
[i
].arraySize
;
1632 stages
|= pCreateInfo
->pBinding
[i
].stageFlags
;
1633 count
+= pCreateInfo
->pBinding
[i
].arraySize
;
1636 uint32_t sampler_total
= 0;
1637 uint32_t surface_total
= 0;
1638 for (uint32_t s
= 0; s
< VK_SHADER_STAGE_NUM
; s
++) {
1639 sampler_total
+= sampler_count
[s
];
1640 surface_total
+= surface_count
[s
];
1643 size_t size
= sizeof(*set_layout
) +
1644 (sampler_total
+ surface_total
) * sizeof(set_layout
->entries
[0]);
1645 set_layout
= anv_device_alloc(device
, size
, 8,
1646 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1648 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1650 set_layout
->num_dynamic_buffers
= num_dynamic_buffers
;
1651 set_layout
->count
= count
;
1652 set_layout
->shader_stages
= stages
;
1654 struct anv_descriptor_slot
*p
= set_layout
->entries
;
1655 struct anv_descriptor_slot
*sampler
[VK_SHADER_STAGE_NUM
];
1656 struct anv_descriptor_slot
*surface
[VK_SHADER_STAGE_NUM
];
1657 for (uint32_t s
= 0; s
< VK_SHADER_STAGE_NUM
; s
++) {
1658 set_layout
->stage
[s
].surface_count
= surface_count
[s
];
1659 set_layout
->stage
[s
].surface_start
= surface
[s
] = p
;
1660 p
+= surface_count
[s
];
1661 set_layout
->stage
[s
].sampler_count
= sampler_count
[s
];
1662 set_layout
->stage
[s
].sampler_start
= sampler
[s
] = p
;
1663 p
+= sampler_count
[s
];
1666 uint32_t descriptor
= 0;
1667 int8_t dynamic_slot
= 0;
1669 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1670 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1671 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1672 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1673 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1674 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].arraySize
; j
++) {
1675 sampler
[s
]->index
= descriptor
+ j
;
1676 sampler
[s
]->dynamic_slot
= -1;
1684 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1685 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1686 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1694 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1695 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1696 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1697 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1698 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1699 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1700 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1701 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1702 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1703 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1704 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1705 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].arraySize
; j
++) {
1706 surface
[s
]->index
= descriptor
+ j
;
1708 surface
[s
]->dynamic_slot
= dynamic_slot
+ j
;
1710 surface
[s
]->dynamic_slot
= -1;
1719 dynamic_slot
+= pCreateInfo
->pBinding
[i
].arraySize
;
1721 descriptor
+= pCreateInfo
->pBinding
[i
].arraySize
;
1724 *pSetLayout
= (VkDescriptorSetLayout
) set_layout
;
1729 VkResult
anv_CreateDescriptorPool(
1731 VkDescriptorPoolUsage poolUsage
,
1733 const VkDescriptorPoolCreateInfo
* pCreateInfo
,
1734 VkDescriptorPool
* pDescriptorPool
)
1736 *pDescriptorPool
= 1;
1741 VkResult
anv_ResetDescriptorPool(
1743 VkDescriptorPool descriptorPool
)
1748 VkResult
anv_AllocDescriptorSets(
1750 VkDescriptorPool descriptorPool
,
1751 VkDescriptorSetUsage setUsage
,
1753 const VkDescriptorSetLayout
* pSetLayouts
,
1754 VkDescriptorSet
* pDescriptorSets
,
1757 struct anv_device
*device
= (struct anv_device
*) _device
;
1758 const struct anv_descriptor_set_layout
*layout
;
1759 struct anv_descriptor_set
*set
;
1762 for (uint32_t i
= 0; i
< count
; i
++) {
1763 layout
= (struct anv_descriptor_set_layout
*) pSetLayouts
[i
];
1764 size
= sizeof(*set
) + layout
->count
* sizeof(set
->descriptors
[0]);
1765 set
= anv_device_alloc(device
, size
, 8,
1766 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1769 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1772 /* Descriptor sets may not be 100% filled out so we need to memset to
1773 * ensure that we can properly detect and handle holes.
1775 memset(set
, 0, size
);
1777 pDescriptorSets
[i
] = (VkDescriptorSet
) set
;
1785 void anv_UpdateDescriptors(
1787 VkDescriptorSet descriptorSet
,
1788 uint32_t updateCount
,
1789 const void** ppUpdateArray
)
1791 struct anv_descriptor_set
*set
= (struct anv_descriptor_set
*) descriptorSet
;
1792 VkUpdateSamplers
*update_samplers
;
1793 VkUpdateSamplerTextures
*update_sampler_textures
;
1794 VkUpdateImages
*update_images
;
1795 VkUpdateBuffers
*update_buffers
;
1796 VkUpdateAsCopy
*update_as_copy
;
1798 for (uint32_t i
= 0; i
< updateCount
; i
++) {
1799 const struct anv_common
*common
= ppUpdateArray
[i
];
1801 switch (common
->sType
) {
1802 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS
:
1803 update_samplers
= (VkUpdateSamplers
*) common
;
1805 for (uint32_t j
= 0; j
< update_samplers
->count
; j
++) {
1806 set
->descriptors
[update_samplers
->binding
+ j
].sampler
=
1807 (struct anv_sampler
*) update_samplers
->pSamplers
[j
];
1811 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES
:
1812 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1813 update_sampler_textures
= (VkUpdateSamplerTextures
*) common
;
1815 for (uint32_t j
= 0; j
< update_sampler_textures
->count
; j
++) {
1816 set
->descriptors
[update_sampler_textures
->binding
+ j
].view
=
1817 (struct anv_surface_view
*)
1818 update_sampler_textures
->pSamplerImageViews
[j
].pImageView
->view
;
1819 set
->descriptors
[update_sampler_textures
->binding
+ j
].sampler
=
1820 (struct anv_sampler
*)
1821 update_sampler_textures
->pSamplerImageViews
[j
].sampler
;
1825 case VK_STRUCTURE_TYPE_UPDATE_IMAGES
:
1826 update_images
= (VkUpdateImages
*) common
;
1828 for (uint32_t j
= 0; j
< update_images
->count
; j
++) {
1829 set
->descriptors
[update_images
->binding
+ j
].view
=
1830 (struct anv_surface_view
*) update_images
->pImageViews
[j
].view
;
1834 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS
:
1835 update_buffers
= (VkUpdateBuffers
*) common
;
1837 for (uint32_t j
= 0; j
< update_buffers
->count
; j
++) {
1838 set
->descriptors
[update_buffers
->binding
+ j
].view
=
1839 (struct anv_surface_view
*) update_buffers
->pBufferViews
[j
].view
;
1841 /* FIXME: descriptor arrays? */
1844 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY
:
1845 update_as_copy
= (VkUpdateAsCopy
*) common
;
1846 (void) update_as_copy
;
1855 // State object functions
1857 static inline int64_t
1858 clamp_int64(int64_t x
, int64_t min
, int64_t max
)
1869 anv_dynamic_vp_state_destroy(struct anv_device
*device
,
1870 struct anv_object
*object
,
1871 VkObjectType obj_type
)
1873 struct anv_dynamic_vp_state
*state
= (void *)object
;
1875 assert(obj_type
== VK_OBJECT_TYPE_DYNAMIC_VP_STATE
);
1877 anv_state_pool_free(&device
->dynamic_state_pool
, state
->sf_clip_vp
);
1878 anv_state_pool_free(&device
->dynamic_state_pool
, state
->cc_vp
);
1879 anv_state_pool_free(&device
->dynamic_state_pool
, state
->scissor
);
1881 anv_device_free(device
, state
);
1884 VkResult
anv_CreateDynamicViewportState(
1886 const VkDynamicVpStateCreateInfo
* pCreateInfo
,
1887 VkDynamicVpState
* pState
)
1889 struct anv_device
*device
= (struct anv_device
*) _device
;
1890 struct anv_dynamic_vp_state
*state
;
1892 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO
);
1894 state
= anv_device_alloc(device
, sizeof(*state
), 8,
1895 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1897 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1899 state
->base
.destructor
= anv_dynamic_vp_state_destroy
;
1901 unsigned count
= pCreateInfo
->viewportAndScissorCount
;
1902 state
->sf_clip_vp
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1904 state
->cc_vp
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1906 state
->scissor
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1909 for (uint32_t i
= 0; i
< pCreateInfo
->viewportAndScissorCount
; i
++) {
1910 const VkViewport
*vp
= &pCreateInfo
->pViewports
[i
];
1911 const VkRect2D
*s
= &pCreateInfo
->pScissors
[i
];
1913 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport
= {
1914 .ViewportMatrixElementm00
= vp
->width
/ 2,
1915 .ViewportMatrixElementm11
= vp
->height
/ 2,
1916 .ViewportMatrixElementm22
= (vp
->maxDepth
- vp
->minDepth
) / 2,
1917 .ViewportMatrixElementm30
= vp
->originX
+ vp
->width
/ 2,
1918 .ViewportMatrixElementm31
= vp
->originY
+ vp
->height
/ 2,
1919 .ViewportMatrixElementm32
= (vp
->maxDepth
+ vp
->minDepth
) / 2,
1920 .XMinClipGuardband
= -1.0f
,
1921 .XMaxClipGuardband
= 1.0f
,
1922 .YMinClipGuardband
= -1.0f
,
1923 .YMaxClipGuardband
= 1.0f
,
1924 .XMinViewPort
= vp
->originX
,
1925 .XMaxViewPort
= vp
->originX
+ vp
->width
- 1,
1926 .YMinViewPort
= vp
->originY
,
1927 .YMaxViewPort
= vp
->originY
+ vp
->height
- 1,
1930 struct GEN8_CC_VIEWPORT cc_viewport
= {
1931 .MinimumDepth
= vp
->minDepth
,
1932 .MaximumDepth
= vp
->maxDepth
1935 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
1936 * ymax < ymin for empty clips. In case clip x, y, width height are all
1937 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
1938 * what we want. Just special case empty clips and produce a canonical
1940 static const struct GEN8_SCISSOR_RECT empty_scissor
= {
1941 .ScissorRectangleYMin
= 1,
1942 .ScissorRectangleXMin
= 1,
1943 .ScissorRectangleYMax
= 0,
1944 .ScissorRectangleXMax
= 0
1947 const int max
= 0xffff;
1948 struct GEN8_SCISSOR_RECT scissor
= {
1949 /* Do this math using int64_t so overflow gets clamped correctly. */
1950 .ScissorRectangleYMin
= clamp_int64(s
->offset
.y
, 0, max
),
1951 .ScissorRectangleXMin
= clamp_int64(s
->offset
.x
, 0, max
),
1952 .ScissorRectangleYMax
= clamp_int64((uint64_t) s
->offset
.y
+ s
->extent
.height
- 1, 0, max
),
1953 .ScissorRectangleXMax
= clamp_int64((uint64_t) s
->offset
.x
+ s
->extent
.width
- 1, 0, max
)
1956 GEN8_SF_CLIP_VIEWPORT_pack(NULL
, state
->sf_clip_vp
.map
+ i
* 64, &sf_clip_viewport
);
1957 GEN8_CC_VIEWPORT_pack(NULL
, state
->cc_vp
.map
+ i
* 32, &cc_viewport
);
1959 if (s
->extent
.width
<= 0 || s
->extent
.height
<= 0) {
1960 GEN8_SCISSOR_RECT_pack(NULL
, state
->scissor
.map
+ i
* 32, &empty_scissor
);
1962 GEN8_SCISSOR_RECT_pack(NULL
, state
->scissor
.map
+ i
* 32, &scissor
);
1966 *pState
= (VkDynamicVpState
) state
;
1971 VkResult
anv_CreateDynamicRasterState(
1973 const VkDynamicRsStateCreateInfo
* pCreateInfo
,
1974 VkDynamicRsState
* pState
)
1976 struct anv_device
*device
= (struct anv_device
*) _device
;
1977 struct anv_dynamic_rs_state
*state
;
1979 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO
);
1981 state
= anv_device_alloc(device
, sizeof(*state
), 8,
1982 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1984 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1986 struct GEN8_3DSTATE_SF sf
= {
1987 GEN8_3DSTATE_SF_header
,
1988 .LineWidth
= pCreateInfo
->lineWidth
,
1991 GEN8_3DSTATE_SF_pack(NULL
, state
->state_sf
, &sf
);
1993 bool enable_bias
= pCreateInfo
->depthBias
!= 0.0f
||
1994 pCreateInfo
->slopeScaledDepthBias
!= 0.0f
;
1995 struct GEN8_3DSTATE_RASTER raster
= {
1996 .GlobalDepthOffsetEnableSolid
= enable_bias
,
1997 .GlobalDepthOffsetEnableWireframe
= enable_bias
,
1998 .GlobalDepthOffsetEnablePoint
= enable_bias
,
1999 .GlobalDepthOffsetConstant
= pCreateInfo
->depthBias
,
2000 .GlobalDepthOffsetScale
= pCreateInfo
->slopeScaledDepthBias
,
2001 .GlobalDepthOffsetClamp
= pCreateInfo
->depthBiasClamp
2004 GEN8_3DSTATE_RASTER_pack(NULL
, state
->state_raster
, &raster
);
2006 *pState
= (VkDynamicRsState
) state
;
2011 VkResult
anv_CreateDynamicColorBlendState(
2013 const VkDynamicCbStateCreateInfo
* pCreateInfo
,
2014 VkDynamicCbState
* pState
)
2016 struct anv_device
*device
= (struct anv_device
*) _device
;
2017 struct anv_dynamic_cb_state
*state
;
2019 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO
);
2021 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2022 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2024 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2026 struct GEN8_COLOR_CALC_STATE color_calc_state
= {
2027 .BlendConstantColorRed
= pCreateInfo
->blendConst
[0],
2028 .BlendConstantColorGreen
= pCreateInfo
->blendConst
[1],
2029 .BlendConstantColorBlue
= pCreateInfo
->blendConst
[2],
2030 .BlendConstantColorAlpha
= pCreateInfo
->blendConst
[3]
2033 GEN8_COLOR_CALC_STATE_pack(NULL
, state
->state_color_calc
, &color_calc_state
);
2035 *pState
= (VkDynamicCbState
) state
;
2040 VkResult
anv_CreateDynamicDepthStencilState(
2042 const VkDynamicDsStateCreateInfo
* pCreateInfo
,
2043 VkDynamicDsState
* pState
)
2045 struct anv_device
*device
= (struct anv_device
*) _device
;
2046 struct anv_dynamic_ds_state
*state
;
2048 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_DS_STATE_CREATE_INFO
);
2050 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2051 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2053 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2055 struct GEN8_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil
= {
2056 GEN8_3DSTATE_WM_DEPTH_STENCIL_header
,
2058 /* Is this what we need to do? */
2059 .StencilBufferWriteEnable
= pCreateInfo
->stencilWriteMask
!= 0,
2061 .StencilTestMask
= pCreateInfo
->stencilReadMask
& 0xff,
2062 .StencilWriteMask
= pCreateInfo
->stencilWriteMask
& 0xff,
2064 .BackfaceStencilTestMask
= pCreateInfo
->stencilReadMask
& 0xff,
2065 .BackfaceStencilWriteMask
= pCreateInfo
->stencilWriteMask
& 0xff,
2068 GEN8_3DSTATE_WM_DEPTH_STENCIL_pack(NULL
, state
->state_wm_depth_stencil
,
2071 struct GEN8_COLOR_CALC_STATE color_calc_state
= {
2072 .StencilReferenceValue
= pCreateInfo
->stencilFrontRef
,
2073 .BackFaceStencilReferenceValue
= pCreateInfo
->stencilBackRef
2076 GEN8_COLOR_CALC_STATE_pack(NULL
, state
->state_color_calc
, &color_calc_state
);
2078 *pState
= (VkDynamicDsState
) state
;
2083 // Command buffer functions
2086 anv_cmd_buffer_destroy(struct anv_device
*device
,
2087 struct anv_object
*object
,
2088 VkObjectType obj_type
)
2090 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) object
;
2092 assert(obj_type
== VK_OBJECT_TYPE_COMMAND_BUFFER
);
2094 /* Destroy all of the batch buffers */
2095 struct anv_batch_bo
*bbo
= cmd_buffer
->last_batch_bo
;
2097 struct anv_batch_bo
*prev
= bbo
->prev_batch_bo
;
2098 anv_batch_bo_destroy(bbo
, device
);
2101 anv_reloc_list_finish(&cmd_buffer
->batch
.relocs
, device
);
2103 /* Destroy all of the surface state buffers */
2104 bbo
= cmd_buffer
->surface_batch_bo
;
2106 struct anv_batch_bo
*prev
= bbo
->prev_batch_bo
;
2107 anv_batch_bo_destroy(bbo
, device
);
2110 anv_reloc_list_finish(&cmd_buffer
->surface_relocs
, device
);
2112 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
2113 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
2114 anv_device_free(device
, cmd_buffer
->exec2_objects
);
2115 anv_device_free(device
, cmd_buffer
->exec2_bos
);
2116 anv_device_free(device
, cmd_buffer
);
2120 anv_cmd_buffer_chain_batch(struct anv_batch
*batch
, void *_data
)
2122 struct anv_cmd_buffer
*cmd_buffer
= _data
;
2124 struct anv_batch_bo
*new_bbo
, *old_bbo
= cmd_buffer
->last_batch_bo
;
2126 VkResult result
= anv_batch_bo_create(cmd_buffer
->device
, &new_bbo
);
2127 if (result
!= VK_SUCCESS
)
2130 /* We set the end of the batch a little short so we would be sure we
2131 * have room for the chaining command. Since we're about to emit the
2132 * chaining command, let's set it back where it should go.
2134 batch
->end
+= GEN8_MI_BATCH_BUFFER_START_length
* 4;
2135 assert(batch
->end
== old_bbo
->bo
.map
+ old_bbo
->bo
.size
);
2137 anv_batch_emit(batch
, GEN8_MI_BATCH_BUFFER_START
,
2138 GEN8_MI_BATCH_BUFFER_START_header
,
2139 ._2ndLevelBatchBuffer
= _1stlevelbatch
,
2140 .AddressSpaceIndicator
= ASI_PPGTT
,
2141 .BatchBufferStartAddress
= { &new_bbo
->bo
, 0 },
2144 /* Pad out to a 2-dword aligned boundary with zeros */
2145 if ((uintptr_t)batch
->next
% 8 != 0) {
2146 *(uint32_t *)batch
->next
= 0;
2150 anv_batch_bo_finish(cmd_buffer
->last_batch_bo
, batch
);
2152 new_bbo
->prev_batch_bo
= old_bbo
;
2153 cmd_buffer
->last_batch_bo
= new_bbo
;
2155 anv_batch_bo_start(new_bbo
, batch
, GEN8_MI_BATCH_BUFFER_START_length
* 4);
2160 VkResult
anv_CreateCommandBuffer(
2162 const VkCmdBufferCreateInfo
* pCreateInfo
,
2163 VkCmdBuffer
* pCmdBuffer
)
2165 struct anv_device
*device
= (struct anv_device
*) _device
;
2166 struct anv_cmd_buffer
*cmd_buffer
;
2169 cmd_buffer
= anv_device_alloc(device
, sizeof(*cmd_buffer
), 8,
2170 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2171 if (cmd_buffer
== NULL
)
2172 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2174 cmd_buffer
->base
.destructor
= anv_cmd_buffer_destroy
;
2176 cmd_buffer
->device
= device
;
2177 cmd_buffer
->rs_state
= NULL
;
2178 cmd_buffer
->vp_state
= NULL
;
2179 cmd_buffer
->cb_state
= NULL
;
2180 cmd_buffer
->ds_state
= NULL
;
2181 memset(&cmd_buffer
->state_vf
, 0, sizeof(cmd_buffer
->state_vf
));
2182 memset(&cmd_buffer
->descriptors
, 0, sizeof(cmd_buffer
->descriptors
));
2184 result
= anv_batch_bo_create(device
, &cmd_buffer
->last_batch_bo
);
2185 if (result
!= VK_SUCCESS
)
2188 result
= anv_reloc_list_init(&cmd_buffer
->batch
.relocs
, device
);
2189 if (result
!= VK_SUCCESS
)
2192 cmd_buffer
->batch
.device
= device
;
2193 cmd_buffer
->batch
.extend_cb
= anv_cmd_buffer_chain_batch
;
2194 cmd_buffer
->batch
.user_data
= cmd_buffer
;
2196 anv_batch_bo_start(cmd_buffer
->last_batch_bo
, &cmd_buffer
->batch
,
2197 GEN8_MI_BATCH_BUFFER_START_length
* 4);
2199 result
= anv_batch_bo_create(device
, &cmd_buffer
->surface_batch_bo
);
2200 if (result
!= VK_SUCCESS
)
2201 goto fail_batch_relocs
;
2202 cmd_buffer
->surface_batch_bo
->first_reloc
= 0;
2204 result
= anv_reloc_list_init(&cmd_buffer
->surface_relocs
, device
);
2205 if (result
!= VK_SUCCESS
)
2206 goto fail_ss_batch_bo
;
2208 /* Start surface_next at 1 so surface offset 0 is invalid. */
2209 cmd_buffer
->surface_next
= 1;
2211 cmd_buffer
->exec2_objects
= NULL
;
2212 cmd_buffer
->exec2_bos
= NULL
;
2213 cmd_buffer
->exec2_array_length
= 0;
2215 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
2216 &device
->surface_state_block_pool
);
2217 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
2218 &device
->dynamic_state_block_pool
);
2220 cmd_buffer
->dirty
= 0;
2221 cmd_buffer
->vb_dirty
= 0;
2222 cmd_buffer
->descriptors_dirty
= 0;
2223 cmd_buffer
->pipeline
= NULL
;
2224 cmd_buffer
->vp_state
= NULL
;
2225 cmd_buffer
->rs_state
= NULL
;
2226 cmd_buffer
->ds_state
= NULL
;
2228 *pCmdBuffer
= (VkCmdBuffer
) cmd_buffer
;
2233 anv_batch_bo_destroy(cmd_buffer
->surface_batch_bo
, device
);
2235 anv_reloc_list_finish(&cmd_buffer
->batch
.relocs
, device
);
2237 anv_batch_bo_destroy(cmd_buffer
->last_batch_bo
, device
);
2239 anv_device_free(device
, cmd_buffer
);
2245 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
)
2247 struct anv_device
*device
= cmd_buffer
->device
;
2248 struct anv_bo
*scratch_bo
= NULL
;
2250 cmd_buffer
->scratch_size
= device
->scratch_block_pool
.size
;
2251 if (cmd_buffer
->scratch_size
> 0)
2252 scratch_bo
= &device
->scratch_block_pool
.bo
;
2254 anv_batch_emit(&cmd_buffer
->batch
, GEN8_STATE_BASE_ADDRESS
,
2255 .GeneralStateBaseAddress
= { scratch_bo
, 0 },
2256 .GeneralStateMemoryObjectControlState
= GEN8_MOCS
,
2257 .GeneralStateBaseAddressModifyEnable
= true,
2258 .GeneralStateBufferSize
= 0xfffff,
2259 .GeneralStateBufferSizeModifyEnable
= true,
2261 .SurfaceStateBaseAddress
= { &cmd_buffer
->surface_batch_bo
->bo
, 0 },
2262 .SurfaceStateMemoryObjectControlState
= GEN8_MOCS
,
2263 .SurfaceStateBaseAddressModifyEnable
= true,
2265 .DynamicStateBaseAddress
= { &device
->dynamic_state_block_pool
.bo
, 0 },
2266 .DynamicStateMemoryObjectControlState
= GEN8_MOCS
,
2267 .DynamicStateBaseAddressModifyEnable
= true,
2268 .DynamicStateBufferSize
= 0xfffff,
2269 .DynamicStateBufferSizeModifyEnable
= true,
2271 .IndirectObjectBaseAddress
= { NULL
, 0 },
2272 .IndirectObjectMemoryObjectControlState
= GEN8_MOCS
,
2273 .IndirectObjectBaseAddressModifyEnable
= true,
2274 .IndirectObjectBufferSize
= 0xfffff,
2275 .IndirectObjectBufferSizeModifyEnable
= true,
2277 .InstructionBaseAddress
= { &device
->instruction_block_pool
.bo
, 0 },
2278 .InstructionMemoryObjectControlState
= GEN8_MOCS
,
2279 .InstructionBaseAddressModifyEnable
= true,
2280 .InstructionBufferSize
= 0xfffff,
2281 .InstructionBuffersizeModifyEnable
= true);
2284 VkResult
anv_BeginCommandBuffer(
2285 VkCmdBuffer cmdBuffer
,
2286 const VkCmdBufferBeginInfo
* pBeginInfo
)
2288 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2290 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
2291 cmd_buffer
->current_pipeline
= UINT32_MAX
;
2297 anv_cmd_buffer_add_bo(struct anv_cmd_buffer
*cmd_buffer
,
2299 struct drm_i915_gem_relocation_entry
*relocs
,
2302 struct drm_i915_gem_exec_object2
*obj
;
2304 if (bo
->index
< cmd_buffer
->bo_count
&&
2305 cmd_buffer
->exec2_bos
[bo
->index
] == bo
)
2308 if (cmd_buffer
->bo_count
>= cmd_buffer
->exec2_array_length
) {
2309 uint32_t new_len
= cmd_buffer
->exec2_objects
?
2310 cmd_buffer
->exec2_array_length
* 2 : 64;
2312 struct drm_i915_gem_exec_object2
*new_objects
=
2313 anv_device_alloc(cmd_buffer
->device
, new_len
* sizeof(*new_objects
),
2314 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
2315 if (new_objects
== NULL
)
2316 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2318 struct anv_bo
**new_bos
=
2319 anv_device_alloc(cmd_buffer
->device
, new_len
* sizeof(*new_bos
),
2320 8, VK_SYSTEM_ALLOC_TYPE_INTERNAL
);
2321 if (new_objects
== NULL
) {
2322 anv_device_free(cmd_buffer
->device
, new_objects
);
2323 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2326 if (cmd_buffer
->exec2_objects
) {
2327 memcpy(new_objects
, cmd_buffer
->exec2_objects
,
2328 cmd_buffer
->bo_count
* sizeof(*new_objects
));
2329 memcpy(new_bos
, cmd_buffer
->exec2_bos
,
2330 cmd_buffer
->bo_count
* sizeof(*new_bos
));
2333 cmd_buffer
->exec2_objects
= new_objects
;
2334 cmd_buffer
->exec2_bos
= new_bos
;
2335 cmd_buffer
->exec2_array_length
= new_len
;
2338 assert(cmd_buffer
->bo_count
< cmd_buffer
->exec2_array_length
);
2340 bo
->index
= cmd_buffer
->bo_count
++;
2341 obj
= &cmd_buffer
->exec2_objects
[bo
->index
];
2342 cmd_buffer
->exec2_bos
[bo
->index
] = bo
;
2344 obj
->handle
= bo
->gem_handle
;
2345 obj
->relocation_count
= 0;
2346 obj
->relocs_ptr
= 0;
2348 obj
->offset
= bo
->offset
;
2354 obj
->relocation_count
= num_relocs
;
2355 obj
->relocs_ptr
= (uintptr_t) relocs
;
2362 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer
*cmd_buffer
,
2363 struct anv_reloc_list
*list
)
2365 for (size_t i
= 0; i
< list
->num_relocs
; i
++)
2366 anv_cmd_buffer_add_bo(cmd_buffer
, list
->reloc_bos
[i
], NULL
, 0);
2370 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer
*cmd_buffer
,
2371 struct anv_reloc_list
*list
)
2375 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2376 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2377 * all bos haven't moved it will skip relocation processing alltogether.
2378 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2379 * value of offset so we can set it either way. For that to work we need
2380 * to make sure all relocs use the same presumed offset.
2383 for (size_t i
= 0; i
< list
->num_relocs
; i
++) {
2384 bo
= list
->reloc_bos
[i
];
2385 if (bo
->offset
!= list
->relocs
[i
].presumed_offset
)
2386 cmd_buffer
->need_reloc
= true;
2388 list
->relocs
[i
].target_handle
= bo
->index
;
2392 VkResult
anv_EndCommandBuffer(
2393 VkCmdBuffer cmdBuffer
)
2395 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2396 struct anv_device
*device
= cmd_buffer
->device
;
2397 struct anv_batch
*batch
= &cmd_buffer
->batch
;
2399 anv_batch_emit(batch
, GEN8_MI_BATCH_BUFFER_END
);
2401 /* Round batch up to an even number of dwords. */
2402 if ((batch
->next
- batch
->start
) & 4)
2403 anv_batch_emit(batch
, GEN8_MI_NOOP
);
2405 anv_batch_bo_finish(cmd_buffer
->last_batch_bo
, &cmd_buffer
->batch
);
2406 cmd_buffer
->surface_batch_bo
->num_relocs
=
2407 cmd_buffer
->surface_relocs
.num_relocs
- cmd_buffer
->surface_batch_bo
->first_reloc
;
2408 cmd_buffer
->surface_batch_bo
->length
= cmd_buffer
->surface_next
;
2410 cmd_buffer
->bo_count
= 0;
2411 cmd_buffer
->need_reloc
= false;
2413 /* Lock for access to bo->index. */
2414 pthread_mutex_lock(&device
->mutex
);
2416 /* Add surface state bos first so we can add them with their relocs. */
2417 for (struct anv_batch_bo
*bbo
= cmd_buffer
->surface_batch_bo
;
2418 bbo
!= NULL
; bbo
= bbo
->prev_batch_bo
) {
2419 anv_cmd_buffer_add_bo(cmd_buffer
, &bbo
->bo
,
2420 &cmd_buffer
->surface_relocs
.relocs
[bbo
->first_reloc
],
2424 /* Add all of the BOs referenced by surface state */
2425 anv_cmd_buffer_add_validate_bos(cmd_buffer
, &cmd_buffer
->surface_relocs
);
2427 /* Add all but the first batch BO */
2428 struct anv_batch_bo
*batch_bo
= cmd_buffer
->last_batch_bo
;
2429 while (batch_bo
->prev_batch_bo
) {
2430 anv_cmd_buffer_add_bo(cmd_buffer
, &batch_bo
->bo
,
2431 &batch
->relocs
.relocs
[batch_bo
->first_reloc
],
2432 batch_bo
->num_relocs
);
2433 batch_bo
= batch_bo
->prev_batch_bo
;
2436 /* Add everything referenced by the batches */
2437 anv_cmd_buffer_add_validate_bos(cmd_buffer
, &batch
->relocs
);
2439 /* Add the first batch bo last */
2440 assert(batch_bo
->prev_batch_bo
== NULL
&& batch_bo
->first_reloc
== 0);
2441 anv_cmd_buffer_add_bo(cmd_buffer
, &batch_bo
->bo
,
2442 &batch
->relocs
.relocs
[batch_bo
->first_reloc
],
2443 batch_bo
->num_relocs
);
2444 assert(batch_bo
->bo
.index
== cmd_buffer
->bo_count
- 1);
2446 anv_cmd_buffer_process_relocs(cmd_buffer
, &cmd_buffer
->surface_relocs
);
2447 anv_cmd_buffer_process_relocs(cmd_buffer
, &batch
->relocs
);
2449 cmd_buffer
->execbuf
.buffers_ptr
= (uintptr_t) cmd_buffer
->exec2_objects
;
2450 cmd_buffer
->execbuf
.buffer_count
= cmd_buffer
->bo_count
;
2451 cmd_buffer
->execbuf
.batch_start_offset
= 0;
2452 cmd_buffer
->execbuf
.batch_len
= batch
->next
- batch
->start
;
2453 cmd_buffer
->execbuf
.cliprects_ptr
= 0;
2454 cmd_buffer
->execbuf
.num_cliprects
= 0;
2455 cmd_buffer
->execbuf
.DR1
= 0;
2456 cmd_buffer
->execbuf
.DR4
= 0;
2458 cmd_buffer
->execbuf
.flags
= I915_EXEC_HANDLE_LUT
;
2459 if (!cmd_buffer
->need_reloc
)
2460 cmd_buffer
->execbuf
.flags
|= I915_EXEC_NO_RELOC
;
2461 cmd_buffer
->execbuf
.flags
|= I915_EXEC_RENDER
;
2462 cmd_buffer
->execbuf
.rsvd1
= device
->context_id
;
2463 cmd_buffer
->execbuf
.rsvd2
= 0;
2465 pthread_mutex_unlock(&device
->mutex
);
2470 VkResult
anv_ResetCommandBuffer(
2471 VkCmdBuffer cmdBuffer
)
2473 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2475 /* Delete all but the first batch bo */
2476 while (cmd_buffer
->last_batch_bo
->prev_batch_bo
) {
2477 struct anv_batch_bo
*prev
= cmd_buffer
->last_batch_bo
->prev_batch_bo
;
2478 anv_batch_bo_destroy(cmd_buffer
->last_batch_bo
, cmd_buffer
->device
);
2479 cmd_buffer
->last_batch_bo
= prev
;
2481 assert(cmd_buffer
->last_batch_bo
->prev_batch_bo
== NULL
);
2483 cmd_buffer
->batch
.relocs
.num_relocs
= 0;
2484 anv_batch_bo_start(cmd_buffer
->last_batch_bo
, &cmd_buffer
->batch
,
2485 GEN8_MI_BATCH_BUFFER_START_length
* 4);
2487 /* Delete all but the first batch bo */
2488 while (cmd_buffer
->surface_batch_bo
->prev_batch_bo
) {
2489 struct anv_batch_bo
*prev
= cmd_buffer
->surface_batch_bo
->prev_batch_bo
;
2490 anv_batch_bo_destroy(cmd_buffer
->surface_batch_bo
, cmd_buffer
->device
);
2491 cmd_buffer
->surface_batch_bo
= prev
;
2493 assert(cmd_buffer
->surface_batch_bo
->prev_batch_bo
== NULL
);
2495 cmd_buffer
->surface_next
= 1;
2496 cmd_buffer
->surface_relocs
.num_relocs
= 0;
2498 cmd_buffer
->rs_state
= NULL
;
2499 cmd_buffer
->vp_state
= NULL
;
2500 cmd_buffer
->cb_state
= NULL
;
2501 cmd_buffer
->ds_state
= NULL
;
2506 // Command buffer building functions
2508 void anv_CmdBindPipeline(
2509 VkCmdBuffer cmdBuffer
,
2510 VkPipelineBindPoint pipelineBindPoint
,
2511 VkPipeline _pipeline
)
2513 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2514 struct anv_pipeline
*pipeline
= (struct anv_pipeline
*) _pipeline
;
2516 switch (pipelineBindPoint
) {
2517 case VK_PIPELINE_BIND_POINT_COMPUTE
:
2518 cmd_buffer
->compute_pipeline
= pipeline
;
2519 cmd_buffer
->compute_dirty
|= ANV_CMD_BUFFER_PIPELINE_DIRTY
;
2522 case VK_PIPELINE_BIND_POINT_GRAPHICS
:
2523 cmd_buffer
->pipeline
= pipeline
;
2524 cmd_buffer
->vb_dirty
|= pipeline
->vb_used
;
2525 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_PIPELINE_DIRTY
;
2529 assert(!"invalid bind point");
2534 void anv_CmdBindDynamicStateObject(
2535 VkCmdBuffer cmdBuffer
,
2536 VkStateBindPoint stateBindPoint
,
2537 VkDynamicStateObject dynamicState
)
2539 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2541 switch (stateBindPoint
) {
2542 case VK_STATE_BIND_POINT_VIEWPORT
:
2543 cmd_buffer
->vp_state
= (struct anv_dynamic_vp_state
*) dynamicState
;
2544 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_VP_DIRTY
;
2546 case VK_STATE_BIND_POINT_RASTER
:
2547 cmd_buffer
->rs_state
= (struct anv_dynamic_rs_state
*) dynamicState
;
2548 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_RS_DIRTY
;
2550 case VK_STATE_BIND_POINT_COLOR_BLEND
:
2551 cmd_buffer
->cb_state
= (struct anv_dynamic_cb_state
*) dynamicState
;
2552 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_CB_DIRTY
;
2554 case VK_STATE_BIND_POINT_DEPTH_STENCIL
:
2555 cmd_buffer
->ds_state
= (struct anv_dynamic_ds_state
*) dynamicState
;
2556 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_DS_DIRTY
;
2563 static struct anv_state
2564 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
,
2565 uint32_t size
, uint32_t alignment
)
2567 struct anv_state state
;
2569 state
.offset
= align_u32(cmd_buffer
->surface_next
, alignment
);
2570 if (state
.offset
+ size
> cmd_buffer
->surface_batch_bo
->bo
.size
)
2571 return (struct anv_state
) { 0 };
2573 state
.map
= cmd_buffer
->surface_batch_bo
->bo
.map
+ state
.offset
;
2574 state
.alloc_size
= size
;
2575 cmd_buffer
->surface_next
= state
.offset
+ size
;
2577 assert(state
.offset
+ size
<= cmd_buffer
->surface_batch_bo
->bo
.size
);
2583 anv_cmd_buffer_new_surface_state_bo(struct anv_cmd_buffer
*cmd_buffer
)
2585 struct anv_batch_bo
*new_bbo
, *old_bbo
= cmd_buffer
->surface_batch_bo
;
2587 /* Finish off the old buffer */
2588 old_bbo
->num_relocs
=
2589 cmd_buffer
->surface_relocs
.num_relocs
- old_bbo
->first_reloc
;
2590 old_bbo
->length
= cmd_buffer
->surface_next
;
2592 VkResult result
= anv_batch_bo_create(cmd_buffer
->device
, &new_bbo
);
2593 if (result
!= VK_SUCCESS
)
2596 new_bbo
->first_reloc
= cmd_buffer
->surface_relocs
.num_relocs
;
2597 cmd_buffer
->surface_next
= 1;
2599 new_bbo
->prev_batch_bo
= old_bbo
;
2600 cmd_buffer
->surface_batch_bo
= new_bbo
;
2602 /* Re-emit state base addresses so we get the new surface state base
2603 * address before we start emitting binding tables etc.
2605 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
2607 /* It seems like just changing the state base addresses isn't enough.
2608 * Invalidating the cache seems to be enough to cause things to
2609 * propagate. However, I'm not 100% sure what we're supposed to do.
2611 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
2612 .TextureCacheInvalidationEnable
= true);
2617 void anv_CmdBindDescriptorSets(
2618 VkCmdBuffer cmdBuffer
,
2619 VkPipelineBindPoint pipelineBindPoint
,
2620 VkPipelineLayout _layout
,
2623 const VkDescriptorSet
* pDescriptorSets
,
2624 uint32_t dynamicOffsetCount
,
2625 const uint32_t* pDynamicOffsets
)
2627 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2628 struct anv_pipeline_layout
*layout
= (struct anv_pipeline_layout
*) _layout
;
2629 struct anv_descriptor_set
*set
;
2630 struct anv_descriptor_set_layout
*set_layout
;
2632 assert(firstSet
+ setCount
< MAX_SETS
);
2634 uint32_t dynamic_slot
= 0;
2635 for (uint32_t i
= 0; i
< setCount
; i
++) {
2636 set
= (struct anv_descriptor_set
*) pDescriptorSets
[i
];
2637 set_layout
= layout
->set
[firstSet
+ i
].layout
;
2639 cmd_buffer
->descriptors
[firstSet
+ i
].set
= set
;
2641 assert(set_layout
->num_dynamic_buffers
<
2642 ARRAY_SIZE(cmd_buffer
->descriptors
[0].dynamic_offsets
));
2643 memcpy(cmd_buffer
->descriptors
[firstSet
+ i
].dynamic_offsets
,
2644 pDynamicOffsets
+ dynamic_slot
,
2645 set_layout
->num_dynamic_buffers
* sizeof(*pDynamicOffsets
));
2647 cmd_buffer
->descriptors_dirty
|= set_layout
->shader_stages
;
2649 dynamic_slot
+= set_layout
->num_dynamic_buffers
;
2653 void anv_CmdBindIndexBuffer(
2654 VkCmdBuffer cmdBuffer
,
2656 VkDeviceSize offset
,
2657 VkIndexType indexType
)
2659 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2660 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
2662 static const uint32_t vk_to_gen_index_type
[] = {
2663 [VK_INDEX_TYPE_UINT16
] = INDEX_WORD
,
2664 [VK_INDEX_TYPE_UINT32
] = INDEX_DWORD
,
2667 struct GEN8_3DSTATE_VF vf
= {
2668 GEN8_3DSTATE_VF_header
,
2669 .CutIndex
= (indexType
== VK_INDEX_TYPE_UINT16
) ? UINT16_MAX
: UINT32_MAX
,
2671 GEN8_3DSTATE_VF_pack(NULL
, cmd_buffer
->state_vf
, &vf
);
2673 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_INDEX_BUFFER_DIRTY
;
2675 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_INDEX_BUFFER
,
2676 .IndexFormat
= vk_to_gen_index_type
[indexType
],
2677 .MemoryObjectControlState
= GEN8_MOCS
,
2678 .BufferStartingAddress
= { buffer
->bo
, buffer
->offset
+ offset
},
2679 .BufferSize
= buffer
->size
- offset
);
2682 void anv_CmdBindVertexBuffers(
2683 VkCmdBuffer cmdBuffer
,
2684 uint32_t startBinding
,
2685 uint32_t bindingCount
,
2686 const VkBuffer
* pBuffers
,
2687 const VkDeviceSize
* pOffsets
)
2689 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2690 struct anv_vertex_binding
*vb
= cmd_buffer
->vertex_bindings
;
2692 /* We have to defer setting up vertex buffer since we need the buffer
2693 * stride from the pipeline. */
2695 assert(startBinding
+ bindingCount
< MAX_VBS
);
2696 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
2697 vb
[startBinding
+ i
].buffer
= (struct anv_buffer
*) pBuffers
[i
];
2698 vb
[startBinding
+ i
].offset
= pOffsets
[i
];
2699 cmd_buffer
->vb_dirty
|= 1 << (startBinding
+ i
);
2704 cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
2705 unsigned stage
, struct anv_state
*bt_state
)
2707 struct anv_pipeline_layout
*layout
;
2708 uint32_t color_attachments
, bias
, size
;
2710 if (stage
== VK_SHADER_STAGE_COMPUTE
)
2711 layout
= cmd_buffer
->compute_pipeline
->layout
;
2713 layout
= cmd_buffer
->pipeline
->layout
;
2715 if (stage
== VK_SHADER_STAGE_FRAGMENT
) {
2717 color_attachments
= cmd_buffer
->framebuffer
->color_attachment_count
;
2720 color_attachments
= 0;
2723 /* This is a little awkward: layout can be NULL but we still have to
2724 * allocate and set a binding table for the PS stage for render
2726 uint32_t surface_count
= layout
? layout
->stage
[stage
].surface_count
: 0;
2728 if (color_attachments
+ surface_count
== 0)
2731 size
= (bias
+ surface_count
) * sizeof(uint32_t);
2732 *bt_state
= anv_cmd_buffer_alloc_surface_state(cmd_buffer
, size
, 32);
2733 uint32_t *bt_map
= bt_state
->map
;
2735 if (bt_state
->map
== NULL
)
2736 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2738 for (uint32_t ca
= 0; ca
< color_attachments
; ca
++) {
2739 const struct anv_surface_view
*view
=
2740 cmd_buffer
->framebuffer
->color_attachments
[ca
];
2742 struct anv_state state
=
2743 anv_cmd_buffer_alloc_surface_state(cmd_buffer
, 64, 64);
2745 if (state
.map
== NULL
)
2746 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2748 memcpy(state
.map
, view
->surface_state
.map
, 64);
2750 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2751 *(uint64_t *)(state
.map
+ 8 * 4) =
2752 anv_reloc_list_add(&cmd_buffer
->surface_relocs
,
2754 state
.offset
+ 8 * 4,
2755 view
->bo
, view
->offset
);
2757 bt_map
[ca
] = state
.offset
;
2763 for (uint32_t set
= 0; set
< layout
->num_sets
; set
++) {
2764 struct anv_descriptor_set_binding
*d
= &cmd_buffer
->descriptors
[set
];
2765 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[set
].layout
;
2766 struct anv_descriptor_slot
*surface_slots
=
2767 set_layout
->stage
[stage
].surface_start
;
2769 uint32_t start
= bias
+ layout
->set
[set
].surface_start
[stage
];
2771 for (uint32_t b
= 0; b
< set_layout
->stage
[stage
].surface_count
; b
++) {
2772 struct anv_surface_view
*view
=
2773 d
->set
->descriptors
[surface_slots
[b
].index
].view
;
2778 struct anv_state state
=
2779 anv_cmd_buffer_alloc_surface_state(cmd_buffer
, 64, 64);
2781 if (state
.map
== NULL
)
2782 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2785 if (surface_slots
[b
].dynamic_slot
>= 0) {
2786 uint32_t dynamic_offset
=
2787 d
->dynamic_offsets
[surface_slots
[b
].dynamic_slot
];
2789 offset
= view
->offset
+ dynamic_offset
;
2790 fill_buffer_surface_state(state
.map
, view
->format
, offset
,
2791 view
->range
- dynamic_offset
);
2793 offset
= view
->offset
;
2794 memcpy(state
.map
, view
->surface_state
.map
, 64);
2797 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2798 *(uint64_t *)(state
.map
+ 8 * 4) =
2799 anv_reloc_list_add(&cmd_buffer
->surface_relocs
,
2801 state
.offset
+ 8 * 4,
2804 bt_map
[start
+ b
] = state
.offset
;
2812 cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
2813 unsigned stage
, struct anv_state
*state
)
2815 struct anv_pipeline_layout
*layout
;
2816 uint32_t sampler_count
;
2818 if (stage
== VK_SHADER_STAGE_COMPUTE
)
2819 layout
= cmd_buffer
->compute_pipeline
->layout
;
2821 layout
= cmd_buffer
->pipeline
->layout
;
2823 sampler_count
= layout
? layout
->stage
[stage
].sampler_count
: 0;
2824 if (sampler_count
== 0)
2827 uint32_t size
= sampler_count
* 16;
2828 *state
= anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
, size
, 32);
2830 if (state
->map
== NULL
)
2831 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
2833 for (uint32_t set
= 0; set
< layout
->num_sets
; set
++) {
2834 struct anv_descriptor_set_binding
*d
= &cmd_buffer
->descriptors
[set
];
2835 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[set
].layout
;
2836 struct anv_descriptor_slot
*sampler_slots
=
2837 set_layout
->stage
[stage
].sampler_start
;
2839 uint32_t start
= layout
->set
[set
].sampler_start
[stage
];
2841 for (uint32_t b
= 0; b
< set_layout
->stage
[stage
].sampler_count
; b
++) {
2842 struct anv_sampler
*sampler
=
2843 d
->set
->descriptors
[sampler_slots
[b
].index
].sampler
;
2848 memcpy(state
->map
+ (start
+ b
) * 16,
2849 sampler
->state
, sizeof(sampler
->state
));
2857 flush_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
, uint32_t stage
)
2859 struct anv_state surfaces
= { 0, }, samplers
= { 0, };
2862 result
= cmd_buffer_emit_samplers(cmd_buffer
, stage
, &samplers
);
2863 if (result
!= VK_SUCCESS
)
2865 result
= cmd_buffer_emit_binding_table(cmd_buffer
, stage
, &surfaces
);
2866 if (result
!= VK_SUCCESS
)
2869 static const uint32_t sampler_state_opcodes
[] = {
2870 [VK_SHADER_STAGE_VERTEX
] = 43,
2871 [VK_SHADER_STAGE_TESS_CONTROL
] = 44, /* HS */
2872 [VK_SHADER_STAGE_TESS_EVALUATION
] = 45, /* DS */
2873 [VK_SHADER_STAGE_GEOMETRY
] = 46,
2874 [VK_SHADER_STAGE_FRAGMENT
] = 47,
2875 [VK_SHADER_STAGE_COMPUTE
] = 0,
2878 static const uint32_t binding_table_opcodes
[] = {
2879 [VK_SHADER_STAGE_VERTEX
] = 38,
2880 [VK_SHADER_STAGE_TESS_CONTROL
] = 39,
2881 [VK_SHADER_STAGE_TESS_EVALUATION
] = 40,
2882 [VK_SHADER_STAGE_GEOMETRY
] = 41,
2883 [VK_SHADER_STAGE_FRAGMENT
] = 42,
2884 [VK_SHADER_STAGE_COMPUTE
] = 0,
2887 if (samplers
.alloc_size
> 0) {
2888 anv_batch_emit(&cmd_buffer
->batch
,
2889 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS
,
2890 ._3DCommandSubOpcode
= sampler_state_opcodes
[stage
],
2891 .PointertoVSSamplerState
= samplers
.offset
);
2894 if (surfaces
.alloc_size
> 0) {
2895 anv_batch_emit(&cmd_buffer
->batch
,
2896 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS
,
2897 ._3DCommandSubOpcode
= binding_table_opcodes
[stage
],
2898 .PointertoVSBindingTable
= surfaces
.offset
);
2905 flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
)
2907 uint32_t s
, dirty
= cmd_buffer
->descriptors_dirty
&
2908 cmd_buffer
->pipeline
->active_stages
;
2911 for_each_bit(s
, dirty
) {
2912 result
= flush_descriptor_set(cmd_buffer
, s
);
2913 if (result
!= VK_SUCCESS
)
2917 if (result
!= VK_SUCCESS
) {
2918 assert(result
== VK_ERROR_OUT_OF_DEVICE_MEMORY
);
2920 result
= anv_cmd_buffer_new_surface_state_bo(cmd_buffer
);
2921 assert(result
== VK_SUCCESS
);
2923 /* Re-emit all active binding tables */
2924 for_each_bit(s
, cmd_buffer
->pipeline
->active_stages
) {
2925 result
= flush_descriptor_set(cmd_buffer
, s
);
2927 /* It had better succeed this time */
2928 assert(result
== VK_SUCCESS
);
2932 cmd_buffer
->descriptors_dirty
&= ~cmd_buffer
->pipeline
->active_stages
;
2935 static struct anv_state
2936 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
2937 uint32_t *a
, uint32_t dwords
, uint32_t alignment
)
2939 struct anv_state state
;
2941 state
= anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
,
2942 dwords
* 4, alignment
);
2943 memcpy(state
.map
, a
, dwords
* 4);
2945 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state
.map
, dwords
* 4));
2950 static struct anv_state
2951 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
2952 uint32_t *a
, uint32_t *b
,
2953 uint32_t dwords
, uint32_t alignment
)
2955 struct anv_state state
;
2958 state
= anv_state_stream_alloc(&cmd_buffer
->dynamic_state_stream
,
2959 dwords
* 4, alignment
);
2961 for (uint32_t i
= 0; i
< dwords
; i
++)
2964 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p
, dwords
* 4));
2970 flush_compute_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
)
2972 struct anv_device
*device
= cmd_buffer
->device
;
2973 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
2974 struct anv_state surfaces
= { 0, }, samplers
= { 0, };
2977 result
= cmd_buffer_emit_samplers(cmd_buffer
,
2978 VK_SHADER_STAGE_COMPUTE
, &samplers
);
2979 if (result
!= VK_SUCCESS
)
2981 result
= cmd_buffer_emit_binding_table(cmd_buffer
,
2982 VK_SHADER_STAGE_COMPUTE
, &surfaces
);
2983 if (result
!= VK_SUCCESS
)
2986 struct GEN8_INTERFACE_DESCRIPTOR_DATA desc
= {
2987 .KernelStartPointer
= pipeline
->cs_simd
,
2988 .KernelStartPointerHigh
= 0,
2989 .BindingTablePointer
= surfaces
.offset
,
2990 .BindingTableEntryCount
= 0,
2991 .SamplerStatePointer
= samplers
.offset
,
2993 .NumberofThreadsinGPGPUThreadGroup
= 0 /* FIXME: Really? */
2996 uint32_t size
= GEN8_INTERFACE_DESCRIPTOR_DATA_length
* sizeof(uint32_t);
2997 struct anv_state state
=
2998 anv_state_pool_alloc(&device
->dynamic_state_pool
, size
, 64);
3000 GEN8_INTERFACE_DESCRIPTOR_DATA_pack(NULL
, state
.map
, &desc
);
3002 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MEDIA_INTERFACE_DESCRIPTOR_LOAD
,
3003 .InterfaceDescriptorTotalLength
= size
,
3004 .InterfaceDescriptorDataStartAddress
= state
.offset
);
3010 anv_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
)
3012 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3015 assert(pipeline
->active_stages
== VK_SHADER_STAGE_COMPUTE_BIT
);
3017 if (cmd_buffer
->current_pipeline
!= GPGPU
) {
3018 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPELINE_SELECT
,
3019 .PipelineSelection
= GPGPU
);
3020 cmd_buffer
->current_pipeline
= GPGPU
;
3023 if (cmd_buffer
->compute_dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
)
3024 anv_batch_emit_batch(&cmd_buffer
->batch
, &pipeline
->batch
);
3026 if ((cmd_buffer
->descriptors_dirty
& VK_SHADER_STAGE_COMPUTE_BIT
) ||
3027 (cmd_buffer
->compute_dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
)) {
3028 result
= flush_compute_descriptor_set(cmd_buffer
);
3029 if (result
!= VK_SUCCESS
) {
3030 result
= anv_cmd_buffer_new_surface_state_bo(cmd_buffer
);
3031 assert(result
== VK_SUCCESS
);
3032 result
= flush_compute_descriptor_set(cmd_buffer
);
3033 assert(result
== VK_SUCCESS
);
3035 cmd_buffer
->descriptors_dirty
&= ~VK_SHADER_STAGE_COMPUTE
;
3038 cmd_buffer
->compute_dirty
= 0;
3042 anv_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
)
3044 struct anv_pipeline
*pipeline
= cmd_buffer
->pipeline
;
3047 uint32_t vb_emit
= cmd_buffer
->vb_dirty
& pipeline
->vb_used
;
3049 assert((pipeline
->active_stages
& VK_SHADER_STAGE_COMPUTE_BIT
) == 0);
3051 if (cmd_buffer
->current_pipeline
!= _3D
) {
3052 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPELINE_SELECT
,
3053 .PipelineSelection
= _3D
);
3054 cmd_buffer
->current_pipeline
= _3D
;
3058 const uint32_t num_buffers
= __builtin_popcount(vb_emit
);
3059 const uint32_t num_dwords
= 1 + num_buffers
* 4;
3061 p
= anv_batch_emitn(&cmd_buffer
->batch
, num_dwords
,
3062 GEN8_3DSTATE_VERTEX_BUFFERS
);
3064 for_each_bit(vb
, vb_emit
) {
3065 struct anv_buffer
*buffer
= cmd_buffer
->vertex_bindings
[vb
].buffer
;
3066 uint32_t offset
= cmd_buffer
->vertex_bindings
[vb
].offset
;
3068 struct GEN8_VERTEX_BUFFER_STATE state
= {
3069 .VertexBufferIndex
= vb
,
3070 .MemoryObjectControlState
= GEN8_MOCS
,
3071 .AddressModifyEnable
= true,
3072 .BufferPitch
= pipeline
->binding_stride
[vb
],
3073 .BufferStartingAddress
= { buffer
->bo
, buffer
->offset
+ offset
},
3074 .BufferSize
= buffer
->size
- offset
3077 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer
->batch
, &p
[1 + i
* 4], &state
);
3082 if (cmd_buffer
->dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
) {
3083 /* If somebody compiled a pipeline after starting a command buffer the
3084 * scratch bo may have grown since we started this cmd buffer (and
3085 * emitted STATE_BASE_ADDRESS). If we're binding that pipeline now,
3086 * reemit STATE_BASE_ADDRESS so that we use the bigger scratch bo. */
3087 if (cmd_buffer
->scratch_size
< pipeline
->total_scratch
)
3088 anv_cmd_buffer_emit_state_base_address(cmd_buffer
);
3090 anv_batch_emit_batch(&cmd_buffer
->batch
, &pipeline
->batch
);
3093 if (cmd_buffer
->descriptors_dirty
)
3094 flush_descriptor_sets(cmd_buffer
);
3096 if (cmd_buffer
->dirty
& ANV_CMD_BUFFER_VP_DIRTY
) {
3097 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_SCISSOR_STATE_POINTERS
,
3098 .ScissorRectPointer
= cmd_buffer
->vp_state
->scissor
.offset
);
3099 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC
,
3100 .CCViewportPointer
= cmd_buffer
->vp_state
->cc_vp
.offset
);
3101 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
,
3102 .SFClipViewportPointer
= cmd_buffer
->vp_state
->sf_clip_vp
.offset
);
3105 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_RS_DIRTY
)) {
3106 anv_batch_emit_merge(&cmd_buffer
->batch
,
3107 cmd_buffer
->rs_state
->state_sf
, pipeline
->state_sf
);
3108 anv_batch_emit_merge(&cmd_buffer
->batch
,
3109 cmd_buffer
->rs_state
->state_raster
, pipeline
->state_raster
);
3112 if (cmd_buffer
->ds_state
&&
3113 (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_DS_DIRTY
)))
3114 anv_batch_emit_merge(&cmd_buffer
->batch
,
3115 cmd_buffer
->ds_state
->state_wm_depth_stencil
,
3116 pipeline
->state_wm_depth_stencil
);
3118 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_CB_DIRTY
| ANV_CMD_BUFFER_DS_DIRTY
)) {
3119 struct anv_state state
;
3120 if (cmd_buffer
->ds_state
== NULL
)
3121 state
= anv_cmd_buffer_emit_dynamic(cmd_buffer
,
3122 cmd_buffer
->cb_state
->state_color_calc
,
3123 GEN8_COLOR_CALC_STATE_length
, 64);
3124 else if (cmd_buffer
->cb_state
== NULL
)
3125 state
= anv_cmd_buffer_emit_dynamic(cmd_buffer
,
3126 cmd_buffer
->ds_state
->state_color_calc
,
3127 GEN8_COLOR_CALC_STATE_length
, 64);
3129 state
= anv_cmd_buffer_merge_dynamic(cmd_buffer
,
3130 cmd_buffer
->ds_state
->state_color_calc
,
3131 cmd_buffer
->cb_state
->state_color_calc
,
3132 GEN8_COLOR_CALC_STATE_length
, 64);
3134 anv_batch_emit(&cmd_buffer
->batch
,
3135 GEN8_3DSTATE_CC_STATE_POINTERS
,
3136 .ColorCalcStatePointer
= state
.offset
,
3137 .ColorCalcStatePointerValid
= true);
3140 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_INDEX_BUFFER_DIRTY
)) {
3141 anv_batch_emit_merge(&cmd_buffer
->batch
,
3142 cmd_buffer
->state_vf
, pipeline
->state_vf
);
3145 cmd_buffer
->vb_dirty
&= ~vb_emit
;
3146 cmd_buffer
->dirty
= 0;
3150 VkCmdBuffer cmdBuffer
,
3151 uint32_t firstVertex
,
3152 uint32_t vertexCount
,
3153 uint32_t firstInstance
,
3154 uint32_t instanceCount
)
3156 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3158 anv_cmd_buffer_flush_state(cmd_buffer
);
3160 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3161 .VertexAccessType
= SEQUENTIAL
,
3162 .VertexCountPerInstance
= vertexCount
,
3163 .StartVertexLocation
= firstVertex
,
3164 .InstanceCount
= instanceCount
,
3165 .StartInstanceLocation
= firstInstance
,
3166 .BaseVertexLocation
= 0);
3169 void anv_CmdDrawIndexed(
3170 VkCmdBuffer cmdBuffer
,
3171 uint32_t firstIndex
,
3172 uint32_t indexCount
,
3173 int32_t vertexOffset
,
3174 uint32_t firstInstance
,
3175 uint32_t instanceCount
)
3177 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3179 anv_cmd_buffer_flush_state(cmd_buffer
);
3181 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3182 .VertexAccessType
= RANDOM
,
3183 .VertexCountPerInstance
= indexCount
,
3184 .StartVertexLocation
= firstIndex
,
3185 .InstanceCount
= instanceCount
,
3186 .StartInstanceLocation
= firstInstance
,
3187 .BaseVertexLocation
= vertexOffset
);
3191 anv_batch_lrm(struct anv_batch
*batch
,
3192 uint32_t reg
, struct anv_bo
*bo
, uint32_t offset
)
3194 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_MEM
,
3195 .RegisterAddress
= reg
,
3196 .MemoryAddress
= { bo
, offset
});
3200 anv_batch_lri(struct anv_batch
*batch
, uint32_t reg
, uint32_t imm
)
3202 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_IMM
,
3203 .RegisterOffset
= reg
,
3207 /* Auto-Draw / Indirect Registers */
3208 #define GEN7_3DPRIM_END_OFFSET 0x2420
3209 #define GEN7_3DPRIM_START_VERTEX 0x2430
3210 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
3211 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
3212 #define GEN7_3DPRIM_START_INSTANCE 0x243C
3213 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
3215 void anv_CmdDrawIndirect(
3216 VkCmdBuffer cmdBuffer
,
3218 VkDeviceSize offset
,
3222 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3223 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
3224 struct anv_bo
*bo
= buffer
->bo
;
3225 uint32_t bo_offset
= buffer
->offset
+ offset
;
3227 anv_cmd_buffer_flush_state(cmd_buffer
);
3229 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_VERTEX_COUNT
, bo
, bo_offset
);
3230 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_INSTANCE_COUNT
, bo
, bo_offset
+ 4);
3231 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_VERTEX
, bo
, bo_offset
+ 8);
3232 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_INSTANCE
, bo
, bo_offset
+ 12);
3233 anv_batch_lri(&cmd_buffer
->batch
, GEN7_3DPRIM_BASE_VERTEX
, 0);
3235 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3236 .IndirectParameterEnable
= true,
3237 .VertexAccessType
= SEQUENTIAL
);
3240 void anv_CmdDrawIndexedIndirect(
3241 VkCmdBuffer cmdBuffer
,
3243 VkDeviceSize offset
,
3247 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3248 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
3249 struct anv_bo
*bo
= buffer
->bo
;
3250 uint32_t bo_offset
= buffer
->offset
+ offset
;
3252 anv_cmd_buffer_flush_state(cmd_buffer
);
3254 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_VERTEX_COUNT
, bo
, bo_offset
);
3255 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_INSTANCE_COUNT
, bo
, bo_offset
+ 4);
3256 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_VERTEX
, bo
, bo_offset
+ 8);
3257 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_BASE_VERTEX
, bo
, bo_offset
+ 12);
3258 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_INSTANCE
, bo
, bo_offset
+ 16);
3260 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
3261 .IndirectParameterEnable
= true,
3262 .VertexAccessType
= RANDOM
);
3265 void anv_CmdDispatch(
3266 VkCmdBuffer cmdBuffer
,
3271 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3272 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3273 struct brw_cs_prog_data
*prog_data
= &pipeline
->cs_prog_data
;
3275 anv_cmd_buffer_flush_compute_state(cmd_buffer
);
3277 anv_batch_emit(&cmd_buffer
->batch
, GEN8_GPGPU_WALKER
,
3278 .SIMDSize
= prog_data
->simd_size
/ 16,
3279 .ThreadDepthCounterMaximum
= 0,
3280 .ThreadHeightCounterMaximum
= 0,
3281 .ThreadWidthCounterMaximum
= pipeline
->cs_thread_width_max
,
3282 .ThreadGroupIDXDimension
= x
,
3283 .ThreadGroupIDYDimension
= y
,
3284 .ThreadGroupIDZDimension
= z
,
3285 .RightExecutionMask
= pipeline
->cs_right_mask
,
3286 .BottomExecutionMask
= 0xffffffff);
3288 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MEDIA_STATE_FLUSH
);
3291 #define GPGPU_DISPATCHDIMX 0x2500
3292 #define GPGPU_DISPATCHDIMY 0x2504
3293 #define GPGPU_DISPATCHDIMZ 0x2508
3295 void anv_CmdDispatchIndirect(
3296 VkCmdBuffer cmdBuffer
,
3298 VkDeviceSize offset
)
3300 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3301 struct anv_pipeline
*pipeline
= cmd_buffer
->compute_pipeline
;
3302 struct brw_cs_prog_data
*prog_data
= &pipeline
->cs_prog_data
;
3303 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
3304 struct anv_bo
*bo
= buffer
->bo
;
3305 uint32_t bo_offset
= buffer
->offset
+ offset
;
3307 anv_cmd_buffer_flush_compute_state(cmd_buffer
);
3309 anv_batch_lrm(&cmd_buffer
->batch
, GPGPU_DISPATCHDIMX
, bo
, bo_offset
);
3310 anv_batch_lrm(&cmd_buffer
->batch
, GPGPU_DISPATCHDIMY
, bo
, bo_offset
+ 4);
3311 anv_batch_lrm(&cmd_buffer
->batch
, GPGPU_DISPATCHDIMZ
, bo
, bo_offset
+ 8);
3313 anv_batch_emit(&cmd_buffer
->batch
, GEN8_GPGPU_WALKER
,
3314 .IndirectParameterEnable
= true,
3315 .SIMDSize
= prog_data
->simd_size
/ 16,
3316 .ThreadDepthCounterMaximum
= 0,
3317 .ThreadHeightCounterMaximum
= 0,
3318 .ThreadWidthCounterMaximum
= pipeline
->cs_thread_width_max
,
3319 .RightExecutionMask
= pipeline
->cs_right_mask
,
3320 .BottomExecutionMask
= 0xffffffff);
3322 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MEDIA_STATE_FLUSH
);
3325 void anv_CmdSetEvent(
3326 VkCmdBuffer cmdBuffer
,
3328 VkPipeEvent pipeEvent
)
3333 void anv_CmdResetEvent(
3334 VkCmdBuffer cmdBuffer
,
3336 VkPipeEvent pipeEvent
)
3341 void anv_CmdWaitEvents(
3342 VkCmdBuffer cmdBuffer
,
3343 VkWaitEvent waitEvent
,
3344 uint32_t eventCount
,
3345 const VkEvent
* pEvents
,
3346 VkPipeEventFlags pipeEventMask
,
3347 uint32_t memBarrierCount
,
3348 const void* const* ppMemBarriers
)
3353 void anv_CmdPipelineBarrier(
3354 VkCmdBuffer cmdBuffer
,
3355 VkWaitEvent waitEvent
,
3356 VkPipeEventFlags pipeEventMask
,
3357 uint32_t memBarrierCount
,
3358 const void* const* ppMemBarriers
)
3360 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*)cmdBuffer
;
3363 struct GEN8_PIPE_CONTROL cmd
= {
3364 GEN8_PIPE_CONTROL_header
,
3365 .PostSyncOperation
= NoWrite
,
3368 /* XXX: I think waitEvent is a no-op on our HW. We should verify that. */
3370 if (anv_clear_mask(&pipeEventMask
, VK_PIPE_EVENT_TOP_OF_PIPE_BIT
)) {
3371 /* This is just what PIPE_CONTROL does */
3374 if (anv_clear_mask(&pipeEventMask
,
3375 VK_PIPE_EVENT_VERTEX_PROCESSING_COMPLETE_BIT
|
3376 VK_PIPE_EVENT_LOCAL_FRAGMENT_PROCESSING_COMPLETE_BIT
|
3377 VK_PIPE_EVENT_FRAGMENT_PROCESSING_COMPLETE_BIT
)) {
3378 cmd
.StallAtPixelScoreboard
= true;
3382 if (anv_clear_mask(&pipeEventMask
,
3383 VK_PIPE_EVENT_GRAPHICS_PIPELINE_COMPLETE_BIT
|
3384 VK_PIPE_EVENT_COMPUTE_PIPELINE_COMPLETE_BIT
|
3385 VK_PIPE_EVENT_TRANSFER_COMPLETE_BIT
|
3386 VK_PIPE_EVENT_COMMANDS_COMPLETE_BIT
)) {
3387 cmd
.CommandStreamerStallEnable
= true;
3390 if (anv_clear_mask(&pipeEventMask
, VK_PIPE_EVENT_CPU_SIGNAL_BIT
)) {
3391 anv_finishme("VK_PIPE_EVENT_CPU_SIGNAL_BIT");
3394 /* We checked all known VkPipeEventFlags. */
3395 anv_assert(pipeEventMask
== 0);
3397 /* XXX: Right now, we're really dumb and just flush whatever categories
3398 * the app asks for. One of these days we may make this a bit better
3399 * but right now that's all the hardware allows for in most areas.
3401 VkMemoryOutputFlags out_flags
= 0;
3402 VkMemoryInputFlags in_flags
= 0;
3404 for (uint32_t i
= 0; i
< memBarrierCount
; i
++) {
3405 const struct anv_common
*common
= ppMemBarriers
[i
];
3406 switch (common
->sType
) {
3407 case VK_STRUCTURE_TYPE_MEMORY_BARRIER
: {
3408 const VkMemoryBarrier
*barrier
= (VkMemoryBarrier
*)common
;
3409 out_flags
|= barrier
->outputMask
;
3410 in_flags
|= barrier
->inputMask
;
3413 case VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER
: {
3414 const VkBufferMemoryBarrier
*barrier
= (VkBufferMemoryBarrier
*)common
;
3415 out_flags
|= barrier
->outputMask
;
3416 in_flags
|= barrier
->inputMask
;
3419 case VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER
: {
3420 const VkImageMemoryBarrier
*barrier
= (VkImageMemoryBarrier
*)common
;
3421 out_flags
|= barrier
->outputMask
;
3422 in_flags
|= barrier
->inputMask
;
3426 unreachable("Invalid memory barrier type");
3430 for_each_bit(b
, out_flags
) {
3431 switch ((VkMemoryOutputFlags
)(1 << b
)) {
3432 case VK_MEMORY_OUTPUT_HOST_WRITE_BIT
:
3433 break; /* FIXME: Little-core systems */
3434 case VK_MEMORY_OUTPUT_SHADER_WRITE_BIT
:
3435 cmd
.DCFlushEnable
= true;
3437 case VK_MEMORY_OUTPUT_COLOR_ATTACHMENT_BIT
:
3438 cmd
.RenderTargetCacheFlushEnable
= true;
3440 case VK_MEMORY_OUTPUT_DEPTH_STENCIL_ATTACHMENT_BIT
:
3441 cmd
.DepthCacheFlushEnable
= true;
3443 case VK_MEMORY_OUTPUT_TRANSFER_BIT
:
3444 cmd
.RenderTargetCacheFlushEnable
= true;
3445 cmd
.DepthCacheFlushEnable
= true;
3448 unreachable("Invalid memory output flag");
3452 for_each_bit(b
, out_flags
) {
3453 switch ((VkMemoryInputFlags
)(1 << b
)) {
3454 case VK_MEMORY_INPUT_HOST_READ_BIT
:
3455 break; /* FIXME: Little-core systems */
3456 case VK_MEMORY_INPUT_INDIRECT_COMMAND_BIT
:
3457 case VK_MEMORY_INPUT_INDEX_FETCH_BIT
:
3458 case VK_MEMORY_INPUT_VERTEX_ATTRIBUTE_FETCH_BIT
:
3459 cmd
.VFCacheInvalidationEnable
= true;
3461 case VK_MEMORY_INPUT_UNIFORM_READ_BIT
:
3462 cmd
.ConstantCacheInvalidationEnable
= true;
3464 case VK_MEMORY_INPUT_SHADER_READ_BIT
:
3465 cmd
.DCFlushEnable
= true;
3466 cmd
.TextureCacheInvalidationEnable
= true;
3468 case VK_MEMORY_INPUT_COLOR_ATTACHMENT_BIT
:
3469 case VK_MEMORY_INPUT_DEPTH_STENCIL_ATTACHMENT_BIT
:
3470 break; /* XXX: Hunh? */
3471 case VK_MEMORY_INPUT_TRANSFER_BIT
:
3472 cmd
.TextureCacheInvalidationEnable
= true;
3477 dw
= anv_batch_emit_dwords(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL_length
);
3478 GEN8_PIPE_CONTROL_pack(&cmd_buffer
->batch
, dw
, &cmd
);
3482 anv_framebuffer_destroy(struct anv_device
*device
,
3483 struct anv_object
*object
,
3484 VkObjectType obj_type
)
3486 struct anv_framebuffer
*fb
= (struct anv_framebuffer
*)object
;
3488 assert(obj_type
== VK_OBJECT_TYPE_FRAMEBUFFER
);
3490 anv_DestroyObject((VkDevice
) device
,
3491 VK_OBJECT_TYPE_DYNAMIC_VP_STATE
,
3494 anv_device_free(device
, fb
);
3497 VkResult
anv_CreateFramebuffer(
3499 const VkFramebufferCreateInfo
* pCreateInfo
,
3500 VkFramebuffer
* pFramebuffer
)
3502 struct anv_device
*device
= (struct anv_device
*) _device
;
3503 struct anv_framebuffer
*framebuffer
;
3505 static const struct anv_depth_stencil_view null_view
=
3506 { .depth_format
= D16_UNORM
, .depth_stride
= 0, .stencil_stride
= 0 };
3508 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO
);
3510 framebuffer
= anv_device_alloc(device
, sizeof(*framebuffer
), 8,
3511 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
3512 if (framebuffer
== NULL
)
3513 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
3515 framebuffer
->base
.destructor
= anv_framebuffer_destroy
;
3517 framebuffer
->color_attachment_count
= pCreateInfo
->colorAttachmentCount
;
3518 for (uint32_t i
= 0; i
< pCreateInfo
->colorAttachmentCount
; i
++) {
3519 framebuffer
->color_attachments
[i
] =
3520 (struct anv_surface_view
*) pCreateInfo
->pColorAttachments
[i
].view
;
3523 if (pCreateInfo
->pDepthStencilAttachment
) {
3524 framebuffer
->depth_stencil
=
3525 (struct anv_depth_stencil_view
*) pCreateInfo
->pDepthStencilAttachment
->view
;
3527 framebuffer
->depth_stencil
= &null_view
;
3530 framebuffer
->sample_count
= pCreateInfo
->sampleCount
;
3531 framebuffer
->width
= pCreateInfo
->width
;
3532 framebuffer
->height
= pCreateInfo
->height
;
3533 framebuffer
->layers
= pCreateInfo
->layers
;
3535 anv_CreateDynamicViewportState((VkDevice
) device
,
3536 &(VkDynamicVpStateCreateInfo
) {
3537 .sType
= VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO
,
3538 .viewportAndScissorCount
= 1,
3539 .pViewports
= (VkViewport
[]) {
3543 .width
= pCreateInfo
->width
,
3544 .height
= pCreateInfo
->height
,
3549 .pScissors
= (VkRect2D
[]) {
3551 { pCreateInfo
->width
, pCreateInfo
->height
} },
3554 &framebuffer
->vp_state
);
3556 *pFramebuffer
= (VkFramebuffer
) framebuffer
;
3561 VkResult
anv_CreateRenderPass(
3563 const VkRenderPassCreateInfo
* pCreateInfo
,
3564 VkRenderPass
* pRenderPass
)
3566 struct anv_device
*device
= (struct anv_device
*) _device
;
3567 struct anv_render_pass
*pass
;
3570 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO
);
3572 size
= sizeof(*pass
) +
3573 pCreateInfo
->layers
* sizeof(struct anv_render_pass_layer
);
3574 pass
= anv_device_alloc(device
, size
, 8,
3575 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
3577 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
3579 pass
->render_area
= pCreateInfo
->renderArea
;
3581 pass
->num_layers
= pCreateInfo
->layers
;
3583 pass
->num_clear_layers
= 0;
3584 for (uint32_t i
= 0; i
< pCreateInfo
->layers
; i
++) {
3585 pass
->layers
[i
].color_load_op
= pCreateInfo
->pColorLoadOps
[i
];
3586 pass
->layers
[i
].clear_color
= pCreateInfo
->pColorLoadClearValues
[i
];
3587 if (pass
->layers
[i
].color_load_op
== VK_ATTACHMENT_LOAD_OP_CLEAR
)
3588 pass
->num_clear_layers
++;
3591 *pRenderPass
= (VkRenderPass
) pass
;
3596 VkResult
anv_GetRenderAreaGranularity(
3598 VkRenderPass renderPass
,
3599 VkExtent2D
* pGranularity
)
3601 *pGranularity
= (VkExtent2D
) { 1, 1 };
3607 anv_cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer
*cmd_buffer
,
3608 struct anv_render_pass
*pass
)
3610 const struct anv_depth_stencil_view
*view
=
3611 cmd_buffer
->framebuffer
->depth_stencil
;
3613 /* FIXME: Implement the PMA stall W/A */
3614 /* FIXME: Width and Height are wrong */
3616 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DEPTH_BUFFER
,
3617 .SurfaceType
= SURFTYPE_2D
,
3618 .DepthWriteEnable
= view
->depth_stride
> 0,
3619 .StencilWriteEnable
= view
->stencil_stride
> 0,
3620 .HierarchicalDepthBufferEnable
= false,
3621 .SurfaceFormat
= view
->depth_format
,
3622 .SurfacePitch
= view
->depth_stride
> 0 ? view
->depth_stride
- 1 : 0,
3623 .SurfaceBaseAddress
= { view
->bo
, view
->depth_offset
},
3624 .Height
= pass
->render_area
.extent
.height
- 1,
3625 .Width
= pass
->render_area
.extent
.width
- 1,
3628 .MinimumArrayElement
= 0,
3629 .DepthBufferObjectControlState
= GEN8_MOCS
,
3630 .RenderTargetViewExtent
= 1 - 1,
3631 .SurfaceQPitch
= view
->depth_qpitch
>> 2);
3633 /* Disable hierarchial depth buffers. */
3634 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_HIER_DEPTH_BUFFER
);
3636 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_STENCIL_BUFFER
,
3637 .StencilBufferEnable
= view
->stencil_stride
> 0,
3638 .StencilBufferObjectControlState
= GEN8_MOCS
,
3639 .SurfacePitch
= view
->stencil_stride
> 0 ? view
->stencil_stride
- 1 : 0,
3640 .SurfaceBaseAddress
= { view
->bo
, view
->stencil_offset
},
3641 .SurfaceQPitch
= view
->stencil_qpitch
>> 2);
3643 /* Clear the clear params. */
3644 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_CLEAR_PARAMS
);
3647 void anv_CmdPushConstants(
3648 VkCmdBuffer cmdBuffer
,
3649 VkPipelineLayout layout
,
3650 VkShaderStageFlags stageFlags
,
3658 void anv_CmdBeginRenderPass(
3659 VkCmdBuffer cmdBuffer
,
3660 const VkRenderPassBegin
* pRenderPassBegin
)
3662 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3663 struct anv_render_pass
*pass
= (struct anv_render_pass
*) pRenderPassBegin
->renderPass
;
3664 struct anv_framebuffer
*framebuffer
=
3665 (struct anv_framebuffer
*) pRenderPassBegin
->framebuffer
;
3667 cmd_buffer
->framebuffer
= framebuffer
;
3669 cmd_buffer
->descriptors_dirty
|= VK_SHADER_STAGE_FRAGMENT_BIT
;
3671 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DRAWING_RECTANGLE
,
3672 .ClippedDrawingRectangleYMin
= pass
->render_area
.offset
.y
,
3673 .ClippedDrawingRectangleXMin
= pass
->render_area
.offset
.x
,
3674 .ClippedDrawingRectangleYMax
=
3675 pass
->render_area
.offset
.y
+ pass
->render_area
.extent
.height
- 1,
3676 .ClippedDrawingRectangleXMax
=
3677 pass
->render_area
.offset
.x
+ pass
->render_area
.extent
.width
- 1,
3678 .DrawingRectangleOriginY
= 0,
3679 .DrawingRectangleOriginX
= 0);
3681 anv_cmd_buffer_emit_depth_stencil(cmd_buffer
, pass
);
3683 anv_cmd_buffer_clear(cmd_buffer
, pass
);
3686 void anv_CmdEndRenderPass(
3687 VkCmdBuffer cmdBuffer
)
3689 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3690 * hack but it ensures that render targets always actually get written.
3691 * Eventually, we should do flushing based on image format transitions
3692 * or something of that nature.
3694 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*)cmdBuffer
;
3695 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
3696 .PostSyncOperation
= NoWrite
,
3697 .RenderTargetCacheFlushEnable
= true,
3698 .InstructionCacheInvalidateEnable
= true,
3699 .DepthCacheFlushEnable
= true,
3700 .VFCacheInvalidationEnable
= true,
3701 .TextureCacheInvalidationEnable
= true,
3702 .CommandStreamerStallEnable
= true);
3705 void anv_CmdExecuteCommands(
3706 VkCmdBuffer cmdBuffer
,
3707 uint32_t cmdBuffersCount
,
3708 const VkCmdBuffer
* pCmdBuffers
)
3713 void vkCmdDbgMarkerBegin(
3714 VkCmdBuffer cmdBuffer
,
3715 const char* pMarker
)
3716 __attribute__ ((visibility ("default")));
3718 void vkCmdDbgMarkerEnd(
3719 VkCmdBuffer cmdBuffer
)
3720 __attribute__ ((visibility ("default")));
3722 VkResult
vkDbgSetObjectTag(
3727 __attribute__ ((visibility ("default")));
3730 void vkCmdDbgMarkerBegin(
3731 VkCmdBuffer cmdBuffer
,
3732 const char* pMarker
)
3736 void vkCmdDbgMarkerEnd(
3737 VkCmdBuffer cmdBuffer
)
3741 VkResult
vkDbgSetObjectTag(