projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
vk: Add basic MOCS settings
[mesa.git] / src / vulkan / device.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "private.h"
31
32 static int
33 anv_env_get_int(const char *name)
34 {
35 const char *val = getenv(name);
36
37 if (!val)
38 return 0;
39
40 return strtol(val, NULL, 0);
41 }
42
43 static VkResult
44 fill_physical_device(struct anv_physical_device *device,
45 struct anv_instance *instance,
46 const char *path)
47 {
48 int fd;
49
50 fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
51 if (fd < 0)
52 return vk_error(VK_ERROR_UNAVAILABLE);
53
54 device->instance = instance;
55 device->path = path;
56
57 device->chipset_id = anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device->no_hw = false;
59 if (device->chipset_id) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
61 device->no_hw = true;
62 } else {
63 device->chipset_id = anv_gem_get_param(fd, I915_PARAM_CHIPSET_ID);
64 }
65 if (!device->chipset_id)
66 goto fail;
67
68 device->name = brw_get_device_name(device->chipset_id);
69 device->info = brw_get_device_info(device->chipset_id, -1);
70 if (!device->info)
71 goto fail;
72
73 if (!anv_gem_get_param(fd, I915_PARAM_HAS_WAIT_TIMEOUT))
74 goto fail;
75
76 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXECBUF2))
77 goto fail;
78
79 if (!anv_gem_get_param(fd, I915_PARAM_HAS_LLC))
80 goto fail;
81
82 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_CONSTANTS))
83 goto fail;
84
85 close(fd);
86
87 return VK_SUCCESS;
88
89 fail:
90 close(fd);
91
92 return vk_error(VK_ERROR_UNAVAILABLE);
93 }
94
95 static void *default_alloc(
96 void* pUserData,
97 size_t size,
98 size_t alignment,
99 VkSystemAllocType allocType)
100 {
101 return malloc(size);
102 }
103
104 static void default_free(
105 void* pUserData,
106 void* pMem)
107 {
108 free(pMem);
109 }
110
111 static const VkAllocCallbacks default_alloc_callbacks = {
112 .pUserData = NULL,
113 .pfnAlloc = default_alloc,
114 .pfnFree = default_free
115 };
116
117 VkResult anv_CreateInstance(
118 const VkInstanceCreateInfo* pCreateInfo,
119 VkInstance* pInstance)
120 {
121 struct anv_instance *instance;
122 const VkAllocCallbacks *alloc_callbacks = &default_alloc_callbacks;
123 void *user_data = NULL;
124 VkResult result;
125
126 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
127
128 if (pCreateInfo->pAllocCb) {
129 alloc_callbacks = pCreateInfo->pAllocCb;
130 user_data = pCreateInfo->pAllocCb->pUserData;
131 }
132 instance = alloc_callbacks->pfnAlloc(user_data, sizeof(*instance), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
134 if (!instance)
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
136
137 instance->pAllocUserData = alloc_callbacks->pUserData;
138 instance->pfnAlloc = alloc_callbacks->pfnAlloc;
139 instance->pfnFree = alloc_callbacks->pfnFree;
140 instance->apiVersion = pCreateInfo->pAppInfo->apiVersion;
141
142 instance->physicalDeviceCount = 0;
143 result = fill_physical_device(&instance->physicalDevice,
144 instance, "/dev/dri/renderD128");
145
146 if (result != VK_SUCCESS)
147 return result;
148
149 instance->physicalDeviceCount++;
150 *pInstance = (VkInstance) instance;
151
152 return VK_SUCCESS;
153 }
154
155 VkResult anv_DestroyInstance(
156 VkInstance _instance)
157 {
158 struct anv_instance *instance = (struct anv_instance *) _instance;
159
160 instance->pfnFree(instance->pAllocUserData, instance);
161
162 return VK_SUCCESS;
163 }
164
165 VkResult anv_EnumeratePhysicalDevices(
166 VkInstance _instance,
167 uint32_t* pPhysicalDeviceCount,
168 VkPhysicalDevice* pPhysicalDevices)
169 {
170 struct anv_instance *instance = (struct anv_instance *) _instance;
171
172 if (*pPhysicalDeviceCount >= 1)
173 pPhysicalDevices[0] = (VkPhysicalDevice) &instance->physicalDevice;
174 *pPhysicalDeviceCount = instance->physicalDeviceCount;
175
176 return VK_SUCCESS;
177 }
178
179 VkResult anv_GetPhysicalDeviceInfo(
180 VkPhysicalDevice physicalDevice,
181 VkPhysicalDeviceInfoType infoType,
182 size_t* pDataSize,
183 void* pData)
184 {
185 struct anv_physical_device *device = (struct anv_physical_device *) physicalDevice;
186 VkPhysicalDeviceProperties *properties;
187 VkPhysicalDevicePerformance *performance;
188 VkPhysicalDeviceQueueProperties *queue_properties;
189 VkPhysicalDeviceMemoryProperties *memory_properties;
190 VkDisplayPropertiesWSI *display_properties;
191 uint64_t ns_per_tick = 80;
192
193 switch ((uint32_t) infoType) {
194 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES:
195 properties = pData;
196
197 *pDataSize = sizeof(*properties);
198 if (pData == NULL)
199 return VK_SUCCESS;
200
201 properties->apiVersion = 1;
202 properties->driverVersion = 1;
203 properties->vendorId = 0x8086;
204 properties->deviceId = device->chipset_id;
205 properties->deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
206 strcpy(properties->deviceName, device->name);
207 properties->maxInlineMemoryUpdateSize = 0;
208 properties->maxBoundDescriptorSets = MAX_SETS;
209 properties->maxThreadGroupSize = 512;
210 properties->timestampFrequency = 1000 * 1000 * 1000 / ns_per_tick;
211 properties->multiColorAttachmentClears = true;
212 properties->maxDescriptorSets = 8;
213 properties->maxViewports = 16;
214 properties->maxColorAttachments = 8;
215 return VK_SUCCESS;
216
217 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE:
218 performance = pData;
219
220 *pDataSize = sizeof(*performance);
221 if (pData == NULL)
222 return VK_SUCCESS;
223
224 performance->maxDeviceClock = 1.0;
225 performance->aluPerClock = 1.0;
226 performance->texPerClock = 1.0;
227 performance->primsPerClock = 1.0;
228 performance->pixelsPerClock = 1.0;
229 return VK_SUCCESS;
230
231 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES:
232 queue_properties = pData;
233
234 *pDataSize = sizeof(*queue_properties);
235 if (pData == NULL)
236 return VK_SUCCESS;
237
238 queue_properties->queueFlags = 0;
239 queue_properties->queueCount = 1;
240 queue_properties->maxAtomicCounters = 0;
241 queue_properties->supportsTimestamps = true;
242 queue_properties->maxMemReferences = 256;
243 return VK_SUCCESS;
244
245 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES:
246 memory_properties = pData;
247
248 *pDataSize = sizeof(*memory_properties);
249 if (pData == NULL)
250 return VK_SUCCESS;
251
252 memory_properties->supportsMigration = false;
253 memory_properties->supportsPinning = false;
254 return VK_SUCCESS;
255
256 case VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI:
257 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI");
258
259 *pDataSize = sizeof(*display_properties);
260 if (pData == NULL)
261 return VK_SUCCESS;
262
263 display_properties = pData;
264 display_properties->display = 0;
265 display_properties->physicalResolution = (VkExtent2D) { 0, 0 };
266 return VK_SUCCESS;
267
268 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI:
269 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI");
270 return VK_SUCCESS;
271
272
273 default:
274 return VK_UNSUPPORTED;
275 }
276
277 }
278
279 void * vkGetProcAddr(
280 VkPhysicalDevice physicalDevice,
281 const char* pName)
282 {
283 return anv_lookup_entrypoint(pName);
284 }
285
286 static void
287 parse_debug_flags(struct anv_device *device)
288 {
289 const char *debug, *p, *end;
290
291 debug = getenv("INTEL_DEBUG");
292 device->dump_aub = false;
293 if (debug) {
294 for (p = debug; *p; p = end + 1) {
295 end = strchrnul(p, ',');
296 if (end - p == 3 && memcmp(p, "aub", 3) == 0)
297 device->dump_aub = true;
298 if (end - p == 5 && memcmp(p, "no_hw", 5) == 0)
299 device->no_hw = true;
300 if (*end == '\0')
301 break;
302 }
303 }
304 }
305
306 VkResult anv_CreateDevice(
307 VkPhysicalDevice _physicalDevice,
308 const VkDeviceCreateInfo* pCreateInfo,
309 VkDevice* pDevice)
310 {
311 struct anv_physical_device *physicalDevice =
312 (struct anv_physical_device *) _physicalDevice;
313 struct anv_instance *instance = physicalDevice->instance;
314 struct anv_device *device;
315
316 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
317
318 device = instance->pfnAlloc(instance->pAllocUserData,
319 sizeof(*device), 8,
320 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
321 if (!device)
322 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
323
324 device->no_hw = physicalDevice->no_hw;
325 parse_debug_flags(device);
326
327 device->instance = physicalDevice->instance;
328 device->fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
329 if (device->fd == -1)
330 goto fail_device;
331
332 device->context_id = anv_gem_create_context(device);
333 if (device->context_id == -1)
334 goto fail_fd;
335
336 anv_block_pool_init(&device->dynamic_state_block_pool, device, 2048);
337
338 anv_state_pool_init(&device->dynamic_state_pool,
339 &device->dynamic_state_block_pool);
340
341 anv_block_pool_init(&device->instruction_block_pool, device, 2048);
342 anv_block_pool_init(&device->surface_state_block_pool, device, 2048);
343
344
345 /* Binding table pointers are only 16 bits so we have to make sure that
346 * they get allocated at the beginning of the surface state BO. To
347 * handle this, we create a separate block pool that works out of the
348 * first 64 KB of the surface state BO.
349 */
350 anv_block_pool_init_slave(&device->binding_table_block_pool,
351 &device->surface_state_block_pool, 32);
352
353 anv_state_pool_init(&device->surface_state_pool,
354 &device->surface_state_block_pool);
355
356 device->compiler = anv_compiler_create(device->fd);
357 device->aub_writer = NULL;
358
359 device->info = *physicalDevice->info;
360
361 pthread_mutex_init(&device->mutex, NULL);
362
363 anv_device_init_meta(device);
364
365 *pDevice = (VkDevice) device;
366
367 return VK_SUCCESS;
368
369 fail_fd:
370 close(device->fd);
371 fail_device:
372 anv_device_free(device, device);
373
374 return vk_error(VK_ERROR_UNAVAILABLE);
375 }
376
377 VkResult anv_DestroyDevice(
378 VkDevice _device)
379 {
380 struct anv_device *device = (struct anv_device *) _device;
381
382 anv_compiler_destroy(device->compiler);
383
384 anv_block_pool_finish(&device->dynamic_state_block_pool);
385 anv_block_pool_finish(&device->instruction_block_pool);
386 anv_block_pool_finish(&device->surface_state_block_pool);
387
388 close(device->fd);
389
390 if (device->aub_writer)
391 anv_aub_writer_destroy(device->aub_writer);
392
393 anv_device_free(device, device);
394
395 return VK_SUCCESS;
396 }
397
398 VkResult anv_GetGlobalExtensionInfo(
399 VkExtensionInfoType infoType,
400 uint32_t extensionIndex,
401 size_t* pDataSize,
402 void* pData)
403 {
404 static const VkExtensionProperties extensions[] = {
405 {
406 .extName = "VK_WSI_LunarG",
407 .version = 3
408 }
409 };
410 uint32_t count = ARRAY_SIZE(extensions);
411
412 switch (infoType) {
413 case VK_EXTENSION_INFO_TYPE_COUNT:
414 memcpy(pData, &count, sizeof(count));
415 *pDataSize = sizeof(count);
416 return VK_SUCCESS;
417
418 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
419 if (extensionIndex >= count)
420 return vk_error(VK_ERROR_INVALID_EXTENSION);
421
422 memcpy(pData, &extensions[extensionIndex], sizeof(extensions[0]));
423 *pDataSize = sizeof(extensions[0]);
424 return VK_SUCCESS;
425
426 default:
427 return VK_UNSUPPORTED;
428 }
429 }
430
431 VkResult anv_GetPhysicalDeviceExtensionInfo(
432 VkPhysicalDevice physicalDevice,
433 VkExtensionInfoType infoType,
434 uint32_t extensionIndex,
435 size_t* pDataSize,
436 void* pData)
437 {
438 uint32_t *count;
439
440 switch (infoType) {
441 case VK_EXTENSION_INFO_TYPE_COUNT:
442 *pDataSize = 4;
443 if (pData == NULL)
444 return VK_SUCCESS;
445
446 count = pData;
447 *count = 0;
448 return VK_SUCCESS;
449
450 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
451 return vk_error(VK_ERROR_INVALID_EXTENSION);
452
453 default:
454 return VK_UNSUPPORTED;
455 }
456 }
457
458 VkResult anv_EnumerateLayers(
459 VkPhysicalDevice physicalDevice,
460 size_t maxStringSize,
461 size_t* pLayerCount,
462 char* const* pOutLayers,
463 void* pReserved)
464 {
465 *pLayerCount = 0;
466
467 return VK_SUCCESS;
468 }
469
470 VkResult anv_GetDeviceQueue(
471 VkDevice _device,
472 uint32_t queueNodeIndex,
473 uint32_t queueIndex,
474 VkQueue* pQueue)
475 {
476 struct anv_device *device = (struct anv_device *) _device;
477 struct anv_queue *queue;
478
479 /* FIXME: Should allocate these at device create time. */
480
481 queue = anv_device_alloc(device, sizeof(*queue), 8,
482 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
483 if (queue == NULL)
484 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
485
486 queue->device = device;
487 queue->pool = &device->surface_state_pool;
488
489 queue->completed_serial = anv_state_pool_alloc(queue->pool, 4, 4);
490 *(uint32_t *)queue->completed_serial.map = 0;
491 queue->next_serial = 1;
492
493 *pQueue = (VkQueue) queue;
494
495 return VK_SUCCESS;
496 }
497
498 static const uint32_t BATCH_SIZE = 8192;
499
500 VkResult
501 anv_batch_init(struct anv_batch *batch, struct anv_device *device)
502 {
503 VkResult result;
504
505 result = anv_bo_init_new(&batch->bo, device, BATCH_SIZE);
506 if (result != VK_SUCCESS)
507 return result;
508
509 batch->bo.map =
510 anv_gem_mmap(device, batch->bo.gem_handle, 0, BATCH_SIZE);
511 if (batch->bo.map == NULL) {
512 result = vk_error(VK_ERROR_MEMORY_MAP_FAILED);
513 goto fail_bo;
514 }
515
516 batch->cmd_relocs.num_relocs = 0;
517 batch->next = batch->bo.map;
518
519 return VK_SUCCESS;
520
521 fail_bo:
522 anv_gem_close(device, batch->bo.gem_handle);
523
524 return result;
525
526 }
527
528 void
529 anv_batch_finish(struct anv_batch *batch, struct anv_device *device)
530 {
531 anv_gem_munmap(batch->bo.map, BATCH_SIZE);
532 anv_gem_close(device, batch->bo.gem_handle);
533 }
534
535 void
536 anv_batch_reset(struct anv_batch *batch)
537 {
538 batch->next = batch->bo.map;
539 batch->cmd_relocs.num_relocs = 0;
540 }
541
542 void *
543 anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords)
544 {
545 void *p = batch->next;
546
547 batch->next += num_dwords * 4;
548
549 return p;
550 }
551
552 static void
553 anv_reloc_list_append(struct anv_reloc_list *list,
554 struct anv_reloc_list *other, uint32_t offset)
555 {
556 uint32_t i, count;
557
558 count = list->num_relocs;
559 memcpy(&list->relocs[count], &other->relocs[0],
560 other->num_relocs * sizeof(other->relocs[0]));
561 memcpy(&list->reloc_bos[count], &other->reloc_bos[0],
562 other->num_relocs * sizeof(other->reloc_bos[0]));
563 for (i = 0; i < other->num_relocs; i++)
564 list->relocs[i + count].offset += offset;
565
566 count += other->num_relocs;
567 }
568
569 static uint64_t
570 anv_reloc_list_add(struct anv_reloc_list *list,
571 uint32_t offset,
572 struct anv_bo *target_bo, uint32_t delta)
573 {
574 struct drm_i915_gem_relocation_entry *entry;
575 int index;
576
577 assert(list->num_relocs < ANV_BATCH_MAX_RELOCS);
578
579 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
580 index = list->num_relocs++;
581 list->reloc_bos[index] = target_bo;
582 entry = &list->relocs[index];
583 entry->target_handle = target_bo->gem_handle;
584 entry->delta = delta;
585 entry->offset = offset;
586 entry->presumed_offset = target_bo->offset;
587 entry->read_domains = 0;
588 entry->write_domain = 0;
589
590 return target_bo->offset + delta;
591 }
592
593 void
594 anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other)
595 {
596 uint32_t size, offset;
597
598 size = other->next - other->bo.map;
599 memcpy(batch->next, other->bo.map, size);
600
601 offset = batch->next - batch->bo.map;
602 anv_reloc_list_append(&batch->cmd_relocs, &other->cmd_relocs, offset);
603
604 batch->next += size;
605 }
606
607 uint64_t
608 anv_batch_emit_reloc(struct anv_batch *batch,
609 void *location, struct anv_bo *bo, uint32_t delta)
610 {
611 return anv_reloc_list_add(&batch->cmd_relocs,
612 location - batch->bo.map, bo, delta);
613 }
614
615 VkResult anv_QueueSubmit(
616 VkQueue _queue,
617 uint32_t cmdBufferCount,
618 const VkCmdBuffer* pCmdBuffers,
619 VkFence _fence)
620 {
621 struct anv_queue *queue = (struct anv_queue *) _queue;
622 struct anv_device *device = queue->device;
623 struct anv_fence *fence = (struct anv_fence *) _fence;
624 int ret;
625
626 for (uint32_t i = 0; i < cmdBufferCount; i++) {
627 struct anv_cmd_buffer *cmd_buffer =
628 (struct anv_cmd_buffer *) pCmdBuffers[i];
629
630 if (device->dump_aub)
631 anv_cmd_buffer_dump(cmd_buffer);
632
633 if (!device->no_hw) {
634 ret = anv_gem_execbuffer(device, &cmd_buffer->execbuf);
635 if (ret != 0)
636 return vk_error(VK_ERROR_UNKNOWN);
637
638 if (fence) {
639 ret = anv_gem_execbuffer(device, &fence->execbuf);
640 if (ret != 0)
641 return vk_error(VK_ERROR_UNKNOWN);
642 }
643
644 for (uint32_t i = 0; i < cmd_buffer->bo_count; i++)
645 cmd_buffer->exec2_bos[i]->offset = cmd_buffer->exec2_objects[i].offset;
646 } else {
647 *(uint32_t *)queue->completed_serial.map = cmd_buffer->serial;
648 }
649 }
650
651 return VK_SUCCESS;
652 }
653
654 VkResult anv_QueueAddMemReferences(
655 VkQueue queue,
656 uint32_t count,
657 const VkDeviceMemory* pMems)
658 {
659 return VK_SUCCESS;
660 }
661
662 VkResult anv_QueueRemoveMemReferences(
663 VkQueue queue,
664 uint32_t count,
665 const VkDeviceMemory* pMems)
666 {
667 return VK_SUCCESS;
668 }
669
670 VkResult anv_QueueWaitIdle(
671 VkQueue _queue)
672 {
673 struct anv_queue *queue = (struct anv_queue *) _queue;
674
675 return vkDeviceWaitIdle((VkDevice) queue->device);
676 }
677
678 VkResult anv_DeviceWaitIdle(
679 VkDevice _device)
680 {
681 struct anv_device *device = (struct anv_device *) _device;
682 struct anv_state state;
683 struct anv_batch batch;
684 struct drm_i915_gem_execbuffer2 execbuf;
685 struct drm_i915_gem_exec_object2 exec2_objects[1];
686 struct anv_bo *bo = NULL;
687 VkResult result;
688 int64_t timeout;
689 int ret;
690
691 state = anv_state_pool_alloc(&device->dynamic_state_pool, 32, 32);
692 bo = &device->dynamic_state_pool.block_pool->bo;
693 batch.next = state.map;
694 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
695 anv_batch_emit(&batch, GEN8_MI_NOOP);
696
697 exec2_objects[0].handle = bo->gem_handle;
698 exec2_objects[0].relocation_count = 0;
699 exec2_objects[0].relocs_ptr = 0;
700 exec2_objects[0].alignment = 0;
701 exec2_objects[0].offset = bo->offset;
702 exec2_objects[0].flags = 0;
703 exec2_objects[0].rsvd1 = 0;
704 exec2_objects[0].rsvd2 = 0;
705
706 execbuf.buffers_ptr = (uintptr_t) exec2_objects;
707 execbuf.buffer_count = 1;
708 execbuf.batch_start_offset = state.offset;
709 execbuf.batch_len = batch.next - state.map;
710 execbuf.cliprects_ptr = 0;
711 execbuf.num_cliprects = 0;
712 execbuf.DR1 = 0;
713 execbuf.DR4 = 0;
714
715 execbuf.flags =
716 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
717 execbuf.rsvd1 = device->context_id;
718 execbuf.rsvd2 = 0;
719
720 if (!device->no_hw) {
721 ret = anv_gem_execbuffer(device, &execbuf);
722 if (ret != 0) {
723 result = vk_error(VK_ERROR_UNKNOWN);
724 goto fail;
725 }
726
727 timeout = INT64_MAX;
728 ret = anv_gem_wait(device, bo->gem_handle, &timeout);
729 if (ret != 0) {
730 result = vk_error(VK_ERROR_UNKNOWN);
731 goto fail;
732 }
733 }
734
735 anv_state_pool_free(&device->dynamic_state_pool, state);
736
737 return VK_SUCCESS;
738
739 fail:
740 anv_state_pool_free(&device->dynamic_state_pool, state);
741
742 return result;
743 }
744
745 void *
746 anv_device_alloc(struct anv_device * device,
747 size_t size,
748 size_t alignment,
749 VkSystemAllocType allocType)
750 {
751 return device->instance->pfnAlloc(device->instance->pAllocUserData,
752 size,
753 alignment,
754 allocType);
755 }
756
757 void
758 anv_device_free(struct anv_device * device,
759 void * mem)
760 {
761 return device->instance->pfnFree(device->instance->pAllocUserData,
762 mem);
763 }
764
765 VkResult
766 anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size)
767 {
768 bo->gem_handle = anv_gem_create(device, size);
769 if (!bo->gem_handle)
770 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY);
771
772 bo->map = NULL;
773 bo->index = 0;
774 bo->offset = 0;
775 bo->size = size;
776
777 return VK_SUCCESS;
778 }
779
780 VkResult anv_AllocMemory(
781 VkDevice _device,
782 const VkMemoryAllocInfo* pAllocInfo,
783 VkDeviceMemory* pMem)
784 {
785 struct anv_device *device = (struct anv_device *) _device;
786 struct anv_device_memory *mem;
787 VkResult result;
788
789 assert(pAllocInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
790
791 mem = anv_device_alloc(device, sizeof(*mem), 8,
792 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
793 if (mem == NULL)
794 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
795
796 result = anv_bo_init_new(&mem->bo, device, pAllocInfo->allocationSize);
797 if (result != VK_SUCCESS)
798 goto fail;
799
800 *pMem = (VkDeviceMemory) mem;
801
802 return VK_SUCCESS;
803
804 fail:
805 anv_device_free(device, mem);
806
807 return result;
808 }
809
810 VkResult anv_FreeMemory(
811 VkDevice _device,
812 VkDeviceMemory _mem)
813 {
814 struct anv_device *device = (struct anv_device *) _device;
815 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
816
817 if (mem->bo.map)
818 anv_gem_munmap(mem->bo.map, mem->bo.size);
819
820 if (mem->bo.gem_handle != 0)
821 anv_gem_close(device, mem->bo.gem_handle);
822
823 anv_device_free(device, mem);
824
825 return VK_SUCCESS;
826 }
827
828 VkResult anv_SetMemoryPriority(
829 VkDevice device,
830 VkDeviceMemory mem,
831 VkMemoryPriority priority)
832 {
833 return VK_SUCCESS;
834 }
835
836 VkResult anv_MapMemory(
837 VkDevice _device,
838 VkDeviceMemory _mem,
839 VkDeviceSize offset,
840 VkDeviceSize size,
841 VkMemoryMapFlags flags,
842 void** ppData)
843 {
844 struct anv_device *device = (struct anv_device *) _device;
845 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
846
847 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
848 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
849 * at a time is valid. We could just mmap up front and return an offset
850 * pointer here, but that may exhaust virtual memory on 32 bit
851 * userspace. */
852
853 mem->map = anv_gem_mmap(device, mem->bo.gem_handle, offset, size);
854 mem->map_size = size;
855
856 *ppData = mem->map;
857
858 return VK_SUCCESS;
859 }
860
861 VkResult anv_UnmapMemory(
862 VkDevice _device,
863 VkDeviceMemory _mem)
864 {
865 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
866
867 anv_gem_munmap(mem->map, mem->map_size);
868
869 return VK_SUCCESS;
870 }
871
872 VkResult anv_FlushMappedMemory(
873 VkDevice device,
874 VkDeviceMemory mem,
875 VkDeviceSize offset,
876 VkDeviceSize size)
877 {
878 /* clflush here for !llc platforms */
879
880 return VK_SUCCESS;
881 }
882
883 VkResult anv_PinSystemMemory(
884 VkDevice device,
885 const void* pSysMem,
886 size_t memSize,
887 VkDeviceMemory* pMem)
888 {
889 return VK_SUCCESS;
890 }
891
892 VkResult anv_GetMultiDeviceCompatibility(
893 VkPhysicalDevice physicalDevice0,
894 VkPhysicalDevice physicalDevice1,
895 VkPhysicalDeviceCompatibilityInfo* pInfo)
896 {
897 return VK_UNSUPPORTED;
898 }
899
900 VkResult anv_OpenSharedMemory(
901 VkDevice device,
902 const VkMemoryOpenInfo* pOpenInfo,
903 VkDeviceMemory* pMem)
904 {
905 return VK_UNSUPPORTED;
906 }
907
908 VkResult anv_OpenSharedSemaphore(
909 VkDevice device,
910 const VkSemaphoreOpenInfo* pOpenInfo,
911 VkSemaphore* pSemaphore)
912 {
913 return VK_UNSUPPORTED;
914 }
915
916 VkResult anv_OpenPeerMemory(
917 VkDevice device,
918 const VkPeerMemoryOpenInfo* pOpenInfo,
919 VkDeviceMemory* pMem)
920 {
921 return VK_UNSUPPORTED;
922 }
923
924 VkResult anv_OpenPeerImage(
925 VkDevice device,
926 const VkPeerImageOpenInfo* pOpenInfo,
927 VkImage* pImage,
928 VkDeviceMemory* pMem)
929 {
930 return VK_UNSUPPORTED;
931 }
932
933 VkResult anv_DestroyObject(
934 VkDevice _device,
935 VkObjectType objType,
936 VkObject _object)
937 {
938 struct anv_device *device = (struct anv_device *) _device;
939 struct anv_object *object = (struct anv_object *) _object;
940
941 switch (objType) {
942 case VK_OBJECT_TYPE_INSTANCE:
943 return anv_DestroyInstance((VkInstance) _object);
944
945 case VK_OBJECT_TYPE_PHYSICAL_DEVICE:
946 /* We don't want to actually destroy physical devices */
947 return VK_SUCCESS;
948
949 case VK_OBJECT_TYPE_DEVICE:
950 assert(_device == (VkDevice) _object);
951 return anv_DestroyDevice((VkDevice) _object);
952
953 case VK_OBJECT_TYPE_QUEUE:
954 /* TODO */
955 return VK_SUCCESS;
956
957 case VK_OBJECT_TYPE_DEVICE_MEMORY:
958 return anv_FreeMemory(_device, (VkDeviceMemory) _object);
959
960 case VK_OBJECT_TYPE_DESCRIPTOR_POOL:
961 /* These are just dummys anyway, so we don't need to destroy them */
962 return VK_SUCCESS;
963
964 case VK_OBJECT_TYPE_BUFFER:
965 case VK_OBJECT_TYPE_BUFFER_VIEW:
966 case VK_OBJECT_TYPE_IMAGE:
967 case VK_OBJECT_TYPE_IMAGE_VIEW:
968 case VK_OBJECT_TYPE_COLOR_ATTACHMENT_VIEW:
969 case VK_OBJECT_TYPE_DEPTH_STENCIL_VIEW:
970 case VK_OBJECT_TYPE_SHADER:
971 case VK_OBJECT_TYPE_PIPELINE_LAYOUT:
972 case VK_OBJECT_TYPE_SAMPLER:
973 case VK_OBJECT_TYPE_DESCRIPTOR_SET:
974 case VK_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT:
975 case VK_OBJECT_TYPE_DYNAMIC_RS_STATE:
976 case VK_OBJECT_TYPE_DYNAMIC_CB_STATE:
977 case VK_OBJECT_TYPE_DYNAMIC_DS_STATE:
978 case VK_OBJECT_TYPE_RENDER_PASS:
979 /* These are trivially destroyable */
980 anv_device_free(device, (void *) _object);
981 return VK_SUCCESS;
982
983 case VK_OBJECT_TYPE_COMMAND_BUFFER:
984 case VK_OBJECT_TYPE_PIPELINE:
985 case VK_OBJECT_TYPE_DYNAMIC_VP_STATE:
986 case VK_OBJECT_TYPE_FENCE:
987 case VK_OBJECT_TYPE_QUERY_POOL:
988 case VK_OBJECT_TYPE_FRAMEBUFFER:
989 (object->destructor)(device, object, objType);
990 return VK_SUCCESS;
991
992 case VK_OBJECT_TYPE_SEMAPHORE:
993 case VK_OBJECT_TYPE_EVENT:
994 stub_return(VK_UNSUPPORTED);
995
996 default:
997 unreachable("Invalid object type");
998 }
999 }
1000
1001 static void
1002 fill_memory_requirements(
1003 VkObjectType objType,
1004 VkObject object,
1005 VkMemoryRequirements * memory_requirements)
1006 {
1007 struct anv_buffer *buffer;
1008 struct anv_image *image;
1009
1010 memory_requirements->memPropsAllowed =
1011 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
1012 VK_MEMORY_PROPERTY_HOST_DEVICE_COHERENT_BIT |
1013 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1014 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT |
1015 VK_MEMORY_PROPERTY_PREFER_HOST_LOCAL |
1016 VK_MEMORY_PROPERTY_SHAREABLE_BIT;
1017
1018 memory_requirements->memPropsRequired = 0;
1019
1020 switch (objType) {
1021 case VK_OBJECT_TYPE_BUFFER:
1022 buffer = (struct anv_buffer *) object;
1023 memory_requirements->size = buffer->size;
1024 memory_requirements->alignment = 16;
1025 break;
1026 case VK_OBJECT_TYPE_IMAGE:
1027 image = (struct anv_image *) object;
1028 memory_requirements->size = image->size;
1029 memory_requirements->alignment = image->alignment;
1030 break;
1031 default:
1032 memory_requirements->size = 0;
1033 break;
1034 }
1035 }
1036
1037 static uint32_t
1038 get_allocation_count(VkObjectType objType)
1039 {
1040 switch (objType) {
1041 case VK_OBJECT_TYPE_BUFFER:
1042 case VK_OBJECT_TYPE_IMAGE:
1043 return 1;
1044 default:
1045 return 0;
1046 }
1047 }
1048
1049 VkResult anv_GetObjectInfo(
1050 VkDevice _device,
1051 VkObjectType objType,
1052 VkObject object,
1053 VkObjectInfoType infoType,
1054 size_t* pDataSize,
1055 void* pData)
1056 {
1057 VkMemoryRequirements memory_requirements;
1058 uint32_t *count;
1059
1060 switch (infoType) {
1061 case VK_OBJECT_INFO_TYPE_MEMORY_REQUIREMENTS:
1062 *pDataSize = sizeof(memory_requirements);
1063 if (pData == NULL)
1064 return VK_SUCCESS;
1065
1066 fill_memory_requirements(objType, object, pData);
1067 return VK_SUCCESS;
1068
1069 case VK_OBJECT_INFO_TYPE_MEMORY_ALLOCATION_COUNT:
1070 *pDataSize = sizeof(count);
1071 if (pData == NULL)
1072 return VK_SUCCESS;
1073
1074 count = pData;
1075 *count = get_allocation_count(objType);
1076 return VK_SUCCESS;
1077
1078 default:
1079 return VK_UNSUPPORTED;
1080 }
1081
1082 }
1083
1084 VkResult anv_QueueBindObjectMemory(
1085 VkQueue queue,
1086 VkObjectType objType,
1087 VkObject object,
1088 uint32_t allocationIdx,
1089 VkDeviceMemory _mem,
1090 VkDeviceSize memOffset)
1091 {
1092 struct anv_buffer *buffer;
1093 struct anv_image *image;
1094 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
1095
1096 switch (objType) {
1097 case VK_OBJECT_TYPE_BUFFER:
1098 buffer = (struct anv_buffer *) object;
1099 buffer->bo = &mem->bo;
1100 buffer->offset = memOffset;
1101 break;
1102 case VK_OBJECT_TYPE_IMAGE:
1103 image = (struct anv_image *) object;
1104 image->bo = &mem->bo;
1105 image->offset = memOffset;
1106 break;
1107 default:
1108 break;
1109 }
1110
1111 return VK_SUCCESS;
1112 }
1113
1114 VkResult anv_QueueBindObjectMemoryRange(
1115 VkQueue queue,
1116 VkObjectType objType,
1117 VkObject object,
1118 uint32_t allocationIdx,
1119 VkDeviceSize rangeOffset,
1120 VkDeviceSize rangeSize,
1121 VkDeviceMemory mem,
1122 VkDeviceSize memOffset)
1123 {
1124 stub_return(VK_UNSUPPORTED);
1125 }
1126
1127 VkResult anv_QueueBindImageMemoryRange(
1128 VkQueue queue,
1129 VkImage image,
1130 uint32_t allocationIdx,
1131 const VkImageMemoryBindInfo* pBindInfo,
1132 VkDeviceMemory mem,
1133 VkDeviceSize memOffset)
1134 {
1135 stub_return(VK_UNSUPPORTED);
1136 }
1137
1138 static void
1139 anv_fence_destroy(struct anv_device *device,
1140 struct anv_object *object,
1141 VkObjectType obj_type)
1142 {
1143 struct anv_fence *fence = (struct anv_fence *) object;
1144
1145 assert(obj_type == VK_OBJECT_TYPE_FENCE);
1146
1147 anv_gem_munmap(fence->bo.map, fence->bo.size);
1148 anv_gem_close(device, fence->bo.gem_handle);
1149 anv_device_free(device, fence);
1150 }
1151
1152 VkResult anv_CreateFence(
1153 VkDevice _device,
1154 const VkFenceCreateInfo* pCreateInfo,
1155 VkFence* pFence)
1156 {
1157 struct anv_device *device = (struct anv_device *) _device;
1158 struct anv_fence *fence;
1159 struct anv_batch batch;
1160 VkResult result;
1161
1162 const uint32_t fence_size = 128;
1163
1164 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FENCE_CREATE_INFO);
1165
1166 fence = anv_device_alloc(device, sizeof(*fence), 8,
1167 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1168 if (fence == NULL)
1169 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1170
1171 result = anv_bo_init_new(&fence->bo, device, fence_size);
1172 if (result != VK_SUCCESS)
1173 goto fail;
1174
1175 fence->base.destructor = anv_fence_destroy;
1176
1177 fence->bo.map =
1178 anv_gem_mmap(device, fence->bo.gem_handle, 0, fence->bo.size);
1179 batch.next = fence->bo.map;
1180 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
1181 anv_batch_emit(&batch, GEN8_MI_NOOP);
1182
1183 fence->exec2_objects[0].handle = fence->bo.gem_handle;
1184 fence->exec2_objects[0].relocation_count = 0;
1185 fence->exec2_objects[0].relocs_ptr = 0;
1186 fence->exec2_objects[0].alignment = 0;
1187 fence->exec2_objects[0].offset = fence->bo.offset;
1188 fence->exec2_objects[0].flags = 0;
1189 fence->exec2_objects[0].rsvd1 = 0;
1190 fence->exec2_objects[0].rsvd2 = 0;
1191
1192 fence->execbuf.buffers_ptr = (uintptr_t) fence->exec2_objects;
1193 fence->execbuf.buffer_count = 1;
1194 fence->execbuf.batch_start_offset = 0;
1195 fence->execbuf.batch_len = batch.next - fence->bo.map;
1196 fence->execbuf.cliprects_ptr = 0;
1197 fence->execbuf.num_cliprects = 0;
1198 fence->execbuf.DR1 = 0;
1199 fence->execbuf.DR4 = 0;
1200
1201 fence->execbuf.flags =
1202 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
1203 fence->execbuf.rsvd1 = device->context_id;
1204 fence->execbuf.rsvd2 = 0;
1205
1206 *pFence = (VkQueryPool) fence;
1207
1208 return VK_SUCCESS;
1209
1210 fail:
1211 anv_device_free(device, fence);
1212
1213 return result;
1214 }
1215
1216 VkResult anv_ResetFences(
1217 VkDevice _device,
1218 uint32_t fenceCount,
1219 VkFence* pFences)
1220 {
1221 struct anv_fence **fences = (struct anv_fence **) pFences;
1222
1223 for (uint32_t i; i < fenceCount; i++)
1224 fences[i]->ready = false;
1225
1226 return VK_SUCCESS;
1227 }
1228
1229 VkResult anv_GetFenceStatus(
1230 VkDevice _device,
1231 VkFence _fence)
1232 {
1233 struct anv_device *device = (struct anv_device *) _device;
1234 struct anv_fence *fence = (struct anv_fence *) _fence;
1235 int64_t t = 0;
1236 int ret;
1237
1238 if (fence->ready)
1239 return VK_SUCCESS;
1240
1241 ret = anv_gem_wait(device, fence->bo.gem_handle, &t);
1242 if (ret == 0) {
1243 fence->ready = true;
1244 return VK_SUCCESS;
1245 }
1246
1247 return VK_NOT_READY;
1248 }
1249
1250 VkResult anv_WaitForFences(
1251 VkDevice _device,
1252 uint32_t fenceCount,
1253 const VkFence* pFences,
1254 bool32_t waitAll,
1255 uint64_t timeout)
1256 {
1257 struct anv_device *device = (struct anv_device *) _device;
1258 struct anv_fence **fences = (struct anv_fence **) pFences;
1259 int64_t t = timeout;
1260 int ret;
1261
1262 /* FIXME: handle !waitAll */
1263
1264 for (uint32_t i = 0; i < fenceCount; i++) {
1265 ret = anv_gem_wait(device, fences[i]->bo.gem_handle, &t);
1266 if (ret == -1 && errno == ETIME)
1267 return VK_TIMEOUT;
1268 else if (ret == -1)
1269 return vk_error(VK_ERROR_UNKNOWN);
1270 }
1271
1272 return VK_SUCCESS;
1273 }
1274
1275 // Queue semaphore functions
1276
1277 VkResult anv_CreateSemaphore(
1278 VkDevice device,
1279 const VkSemaphoreCreateInfo* pCreateInfo,
1280 VkSemaphore* pSemaphore)
1281 {
1282 stub_return(VK_UNSUPPORTED);
1283 }
1284
1285 VkResult anv_QueueSignalSemaphore(
1286 VkQueue queue,
1287 VkSemaphore semaphore)
1288 {
1289 stub_return(VK_UNSUPPORTED);
1290 }
1291
1292 VkResult anv_QueueWaitSemaphore(
1293 VkQueue queue,
1294 VkSemaphore semaphore)
1295 {
1296 stub_return(VK_UNSUPPORTED);
1297 }
1298
1299 // Event functions
1300
1301 VkResult anv_CreateEvent(
1302 VkDevice device,
1303 const VkEventCreateInfo* pCreateInfo,
1304 VkEvent* pEvent)
1305 {
1306 stub_return(VK_UNSUPPORTED);
1307 }
1308
1309 VkResult anv_GetEventStatus(
1310 VkDevice device,
1311 VkEvent event)
1312 {
1313 stub_return(VK_UNSUPPORTED);
1314 }
1315
1316 VkResult anv_SetEvent(
1317 VkDevice device,
1318 VkEvent event)
1319 {
1320 stub_return(VK_UNSUPPORTED);
1321 }
1322
1323 VkResult anv_ResetEvent(
1324 VkDevice device,
1325 VkEvent event)
1326 {
1327 stub_return(VK_UNSUPPORTED);
1328 }
1329
1330 // Query functions
1331
1332 static void
1333 anv_query_pool_destroy(struct anv_device *device,
1334 struct anv_object *object,
1335 VkObjectType obj_type)
1336 {
1337 struct anv_query_pool *pool = (struct anv_query_pool *) object;
1338
1339 assert(obj_type == VK_OBJECT_TYPE_QUERY_POOL);
1340
1341 anv_gem_munmap(pool->bo.map, pool->bo.size);
1342 anv_gem_close(device, pool->bo.gem_handle);
1343 anv_device_free(device, pool);
1344 }
1345
1346 VkResult anv_CreateQueryPool(
1347 VkDevice _device,
1348 const VkQueryPoolCreateInfo* pCreateInfo,
1349 VkQueryPool* pQueryPool)
1350 {
1351 struct anv_device *device = (struct anv_device *) _device;
1352 struct anv_query_pool *pool;
1353 VkResult result;
1354 size_t size;
1355
1356 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
1357
1358 switch (pCreateInfo->queryType) {
1359 case VK_QUERY_TYPE_OCCLUSION:
1360 break;
1361 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
1362 return VK_UNSUPPORTED;
1363 default:
1364 unreachable("");
1365 }
1366
1367 pool = anv_device_alloc(device, sizeof(*pool), 8,
1368 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1369 if (pool == NULL)
1370 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1371
1372 pool->base.destructor = anv_query_pool_destroy;
1373
1374 pool->type = pCreateInfo->queryType;
1375 size = pCreateInfo->slots * sizeof(struct anv_query_pool_slot);
1376 result = anv_bo_init_new(&pool->bo, device, size);
1377 if (result != VK_SUCCESS)
1378 goto fail;
1379
1380 pool->bo.map = anv_gem_mmap(device, pool->bo.gem_handle, 0, size);
1381
1382 *pQueryPool = (VkQueryPool) pool;
1383
1384 return VK_SUCCESS;
1385
1386 fail:
1387 anv_device_free(device, pool);
1388
1389 return result;
1390 }
1391
1392 VkResult anv_GetQueryPoolResults(
1393 VkDevice _device,
1394 VkQueryPool queryPool,
1395 uint32_t startQuery,
1396 uint32_t queryCount,
1397 size_t* pDataSize,
1398 void* pData,
1399 VkQueryResultFlags flags)
1400 {
1401 struct anv_device *device = (struct anv_device *) _device;
1402 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
1403 struct anv_query_pool_slot *slot = pool->bo.map;
1404 int64_t timeout = INT64_MAX;
1405 uint32_t *dst32 = pData;
1406 uint64_t *dst64 = pData;
1407 uint64_t result;
1408 int ret;
1409
1410 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
1411 /* Where is the availabilty info supposed to go? */
1412 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
1413 return VK_UNSUPPORTED;
1414 }
1415
1416 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
1417
1418 if (flags & VK_QUERY_RESULT_64_BIT)
1419 *pDataSize = queryCount * sizeof(uint64_t);
1420 else
1421 *pDataSize = queryCount * sizeof(uint32_t);
1422
1423 if (pData == NULL)
1424 return VK_SUCCESS;
1425
1426 if (flags & VK_QUERY_RESULT_WAIT_BIT) {
1427 ret = anv_gem_wait(device, pool->bo.gem_handle, &timeout);
1428 if (ret == -1)
1429 return vk_error(VK_ERROR_UNKNOWN);
1430 }
1431
1432 for (uint32_t i = 0; i < queryCount; i++) {
1433 result = slot[startQuery + i].end - slot[startQuery + i].begin;
1434 if (flags & VK_QUERY_RESULT_64_BIT) {
1435 *dst64++ = result;
1436 } else {
1437 if (result > UINT32_MAX)
1438 result = UINT32_MAX;
1439 *dst32++ = result;
1440 }
1441 }
1442
1443 return VK_SUCCESS;
1444 }
1445
1446 // Buffer functions
1447
1448 VkResult anv_CreateBuffer(
1449 VkDevice _device,
1450 const VkBufferCreateInfo* pCreateInfo,
1451 VkBuffer* pBuffer)
1452 {
1453 struct anv_device *device = (struct anv_device *) _device;
1454 struct anv_buffer *buffer;
1455
1456 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1457
1458 buffer = anv_device_alloc(device, sizeof(*buffer), 8,
1459 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1460 if (buffer == NULL)
1461 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1462
1463 buffer->size = pCreateInfo->size;
1464 buffer->bo = NULL;
1465 buffer->offset = 0;
1466
1467 *pBuffer = (VkBuffer) buffer;
1468
1469 return VK_SUCCESS;
1470 }
1471
1472 // Buffer view functions
1473
1474 VkResult anv_CreateBufferView(
1475 VkDevice _device,
1476 const VkBufferViewCreateInfo* pCreateInfo,
1477 VkBufferView* pView)
1478 {
1479 struct anv_device *device = (struct anv_device *) _device;
1480 struct anv_buffer *buffer = (struct anv_buffer *) pCreateInfo->buffer;
1481 struct anv_surface_view *view;
1482 const struct anv_format *format;
1483
1484 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO);
1485
1486 view = anv_device_alloc(device, sizeof(*view), 8,
1487 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1488 if (view == NULL)
1489 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1490
1491 view->bo = buffer->bo;
1492 view->offset = buffer->offset + pCreateInfo->offset;
1493 view->surface_state =
1494 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1495 view->format = pCreateInfo->format;
1496
1497 format = anv_format_for_vk_format(pCreateInfo->format);
1498 /* This assumes RGBA float format. */
1499 uint32_t stride = 4;
1500 uint32_t num_elements = pCreateInfo->range / stride;
1501 struct GEN8_RENDER_SURFACE_STATE surface_state = {
1502 .SurfaceType = SURFTYPE_BUFFER,
1503 .SurfaceArray = false,
1504 .SurfaceFormat = format->format,
1505 .SurfaceVerticalAlignment = VALIGN4,
1506 .SurfaceHorizontalAlignment = HALIGN4,
1507 .TileMode = LINEAR,
1508 .VerticalLineStride = 0,
1509 .VerticalLineStrideOffset = 0,
1510 .SamplerL2BypassModeDisable = true,
1511 .RenderCacheReadWriteMode = WriteOnlyCache,
1512 .MemoryObjectControlState = GEN8_MOCS,
1513 .BaseMipLevel = 0,
1514 .SurfaceQPitch = 0,
1515 .Height = (num_elements >> 7) & 0x3fff,
1516 .Width = num_elements & 0x7f,
1517 .Depth = (num_elements >> 21) & 0x3f,
1518 .SurfacePitch = stride - 1,
1519 .MinimumArrayElement = 0,
1520 .NumberofMultisamples = MULTISAMPLECOUNT_1,
1521 .XOffset = 0,
1522 .YOffset = 0,
1523 .SurfaceMinLOD = 0,
1524 .MIPCountLOD = 0,
1525 .AuxiliarySurfaceMode = AUX_NONE,
1526 .RedClearColor = 0,
1527 .GreenClearColor = 0,
1528 .BlueClearColor = 0,
1529 .AlphaClearColor = 0,
1530 .ShaderChannelSelectRed = SCS_RED,
1531 .ShaderChannelSelectGreen = SCS_GREEN,
1532 .ShaderChannelSelectBlue = SCS_BLUE,
1533 .ShaderChannelSelectAlpha = SCS_ALPHA,
1534 .ResourceMinLOD = 0,
1535 /* FIXME: We assume that the image must be bound at this time. */
1536 .SurfaceBaseAddress = { NULL, view->offset },
1537 };
1538
1539 GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
1540
1541 *pView = (VkImageView) view;
1542
1543 return VK_SUCCESS;
1544 }
1545
1546 // Sampler functions
1547
1548 VkResult anv_CreateSampler(
1549 VkDevice _device,
1550 const VkSamplerCreateInfo* pCreateInfo,
1551 VkSampler* pSampler)
1552 {
1553 struct anv_device *device = (struct anv_device *) _device;
1554 struct anv_sampler *sampler;
1555
1556 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
1557
1558 sampler = anv_device_alloc(device, sizeof(*sampler), 8,
1559 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1560 if (!sampler)
1561 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1562
1563 static const uint32_t vk_to_gen_tex_filter[] = {
1564 [VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
1565 [VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
1566 };
1567
1568 static const uint32_t vk_to_gen_mipmap_mode[] = {
1569 [VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
1570 [VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
1571 [VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
1572 };
1573
1574 static const uint32_t vk_to_gen_tex_address[] = {
1575 [VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
1576 [VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
1577 [VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
1578 [VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
1579 [VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
1580 };
1581
1582 static const uint32_t vk_to_gen_compare_op[] = {
1583 [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
1584 [VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
1585 [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
1586 [VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
1587 [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
1588 [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
1589 [VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
1590 [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
1591 };
1592
1593 if (pCreateInfo->maxAnisotropy > 0)
1594 anv_finishme("missing support for anisotropic filtering");
1595
1596 struct GEN8_SAMPLER_STATE sampler_state = {
1597 .SamplerDisable = false,
1598 .TextureBorderColorMode = DX10OGL,
1599 .LODPreClampMode = 0,
1600 .BaseMipLevel = 0,
1601 .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
1602 .MagModeFilter = vk_to_gen_tex_filter[pCreateInfo->magFilter],
1603 .MinModeFilter = vk_to_gen_tex_filter[pCreateInfo->minFilter],
1604 .TextureLODBias = pCreateInfo->mipLodBias * 256,
1605 .AnisotropicAlgorithm = EWAApproximation,
1606 .MinLOD = pCreateInfo->minLod * 256,
1607 .MaxLOD = pCreateInfo->maxLod * 256,
1608 .ChromaKeyEnable = 0,
1609 .ChromaKeyIndex = 0,
1610 .ChromaKeyMode = 0,
1611 .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
1612 .CubeSurfaceControlMode = 0,
1613 .IndirectStatePointer = 0,
1614 .LODClampMagnificationMode = MIPNONE,
1615 .MaximumAnisotropy = 0,
1616 .RAddressMinFilterRoundingEnable = 0,
1617 .RAddressMagFilterRoundingEnable = 0,
1618 .VAddressMinFilterRoundingEnable = 0,
1619 .VAddressMagFilterRoundingEnable = 0,
1620 .UAddressMinFilterRoundingEnable = 0,
1621 .UAddressMagFilterRoundingEnable = 0,
1622 .TrilinearFilterQuality = 0,
1623 .NonnormalizedCoordinateEnable = 0,
1624 .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
1625 .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
1626 .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
1627 };
1628
1629 GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
1630
1631 *pSampler = (VkSampler) sampler;
1632
1633 return VK_SUCCESS;
1634 }
1635
1636 // Descriptor set functions
1637
1638 VkResult anv_CreateDescriptorSetLayout(
1639 VkDevice _device,
1640 const VkDescriptorSetLayoutCreateInfo* pCreateInfo,
1641 VkDescriptorSetLayout* pSetLayout)
1642 {
1643 struct anv_device *device = (struct anv_device *) _device;
1644 struct anv_descriptor_set_layout *set_layout;
1645
1646 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO);
1647
1648 uint32_t sampler_count[VK_NUM_SHADER_STAGE] = { 0, };
1649 uint32_t surface_count[VK_NUM_SHADER_STAGE] = { 0, };
1650 uint32_t num_dynamic_buffers = 0;
1651 uint32_t count = 0;
1652 uint32_t s;
1653
1654 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1655 switch (pCreateInfo->pBinding[i].descriptorType) {
1656 case VK_DESCRIPTOR_TYPE_SAMPLER:
1657 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1658 sampler_count[s] += pCreateInfo->pBinding[i].count;
1659 break;
1660
1661 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1662 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1663 sampler_count[s] += pCreateInfo->pBinding[i].count;
1664
1665 /* fall through */
1666
1667 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1668 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1669 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1670 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1671 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1672 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1673 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1674 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1675 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1676 surface_count[s] += pCreateInfo->pBinding[i].count;
1677 break;
1678 default:
1679 break;
1680 }
1681
1682 count += pCreateInfo->pBinding[i].count;
1683 }
1684
1685 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1686 switch (pCreateInfo->pBinding[i].descriptorType) {
1687 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1688 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1689 num_dynamic_buffers++;
1690 break;
1691 default:
1692 break;
1693 }
1694 }
1695
1696 uint32_t sampler_total = 0;
1697 uint32_t surface_total = 0;
1698 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1699 sampler_total += sampler_count[s];
1700 surface_total += surface_count[s];
1701 }
1702
1703 size_t size = sizeof(*set_layout) +
1704 (sampler_total + surface_total) * sizeof(uint32_t);
1705 set_layout = anv_device_alloc(device, size, 8,
1706 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1707 if (!set_layout)
1708 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1709
1710 set_layout->num_dynamic_buffers = num_dynamic_buffers;
1711 set_layout->count = count;
1712
1713 uint32_t *p = set_layout->entries;
1714 uint32_t *sampler[VK_NUM_SHADER_STAGE];
1715 uint32_t *surface[VK_NUM_SHADER_STAGE];
1716 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1717 set_layout->stage[s].surface_count = surface_count[s];
1718 set_layout->stage[s].surface_start = surface[s] = p;
1719 p += surface_count[s];
1720 set_layout->stage[s].sampler_count = sampler_count[s];
1721 set_layout->stage[s].sampler_start = sampler[s] = p;
1722 p += sampler_count[s];
1723 }
1724
1725 uint32_t descriptor = 0;
1726 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1727 switch (pCreateInfo->pBinding[i].descriptorType) {
1728 case VK_DESCRIPTOR_TYPE_SAMPLER:
1729 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1730 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++)
1731 *(sampler[s])++ = descriptor + j;
1732 break;
1733
1734 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1735 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1736 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++)
1737 *(sampler[s])++ = descriptor + j;
1738
1739 /* fallthrough */
1740
1741 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1742 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1743 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1744 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1745 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1746 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1747 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1748 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1749 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1750 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++) {
1751 *(surface[s])++ = descriptor + j;
1752 }
1753 break;
1754 default:
1755 unreachable("");
1756 }
1757 descriptor += pCreateInfo->pBinding[i].count;
1758 }
1759
1760 *pSetLayout = (VkDescriptorSetLayout) set_layout;
1761
1762 return VK_SUCCESS;
1763 }
1764
1765 VkResult anv_BeginDescriptorPoolUpdate(
1766 VkDevice device,
1767 VkDescriptorUpdateMode updateMode)
1768 {
1769 return VK_SUCCESS;
1770 }
1771
1772 VkResult anv_EndDescriptorPoolUpdate(
1773 VkDevice device,
1774 VkCmdBuffer cmd)
1775 {
1776 return VK_SUCCESS;
1777 }
1778
1779 VkResult anv_CreateDescriptorPool(
1780 VkDevice device,
1781 VkDescriptorPoolUsage poolUsage,
1782 uint32_t maxSets,
1783 const VkDescriptorPoolCreateInfo* pCreateInfo,
1784 VkDescriptorPool* pDescriptorPool)
1785 {
1786 *pDescriptorPool = 1;
1787
1788 return VK_SUCCESS;
1789 }
1790
1791 VkResult anv_ResetDescriptorPool(
1792 VkDevice device,
1793 VkDescriptorPool descriptorPool)
1794 {
1795 return VK_SUCCESS;
1796 }
1797
1798 VkResult anv_AllocDescriptorSets(
1799 VkDevice _device,
1800 VkDescriptorPool descriptorPool,
1801 VkDescriptorSetUsage setUsage,
1802 uint32_t count,
1803 const VkDescriptorSetLayout* pSetLayouts,
1804 VkDescriptorSet* pDescriptorSets,
1805 uint32_t* pCount)
1806 {
1807 struct anv_device *device = (struct anv_device *) _device;
1808 const struct anv_descriptor_set_layout *layout;
1809 struct anv_descriptor_set *set;
1810 size_t size;
1811
1812 for (uint32_t i = 0; i < count; i++) {
1813 layout = (struct anv_descriptor_set_layout *) pSetLayouts[i];
1814 size = sizeof(*set) + layout->count * sizeof(set->descriptors[0]);
1815 set = anv_device_alloc(device, size, 8,
1816 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1817 if (!set) {
1818 *pCount = i;
1819 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1820 }
1821
1822 /* Descriptor sets may not be 100% filled out so we need to memset to
1823 * ensure that we can properly detect and handle holes.
1824 */
1825 memset(set, 0, size);
1826
1827 pDescriptorSets[i] = (VkDescriptorSet) set;
1828 }
1829
1830 *pCount = count;
1831
1832 return VK_SUCCESS;
1833 }
1834
1835 void anv_ClearDescriptorSets(
1836 VkDevice device,
1837 VkDescriptorPool descriptorPool,
1838 uint32_t count,
1839 const VkDescriptorSet* pDescriptorSets)
1840 {
1841 }
1842
1843 void anv_UpdateDescriptors(
1844 VkDevice _device,
1845 VkDescriptorSet descriptorSet,
1846 uint32_t updateCount,
1847 const void** ppUpdateArray)
1848 {
1849 struct anv_descriptor_set *set = (struct anv_descriptor_set *) descriptorSet;
1850 VkUpdateSamplers *update_samplers;
1851 VkUpdateSamplerTextures *update_sampler_textures;
1852 VkUpdateImages *update_images;
1853 VkUpdateBuffers *update_buffers;
1854 VkUpdateAsCopy *update_as_copy;
1855
1856 for (uint32_t i = 0; i < updateCount; i++) {
1857 const struct anv_common *common = ppUpdateArray[i];
1858
1859 switch (common->sType) {
1860 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS:
1861 update_samplers = (VkUpdateSamplers *) common;
1862
1863 for (uint32_t j = 0; j < update_samplers->count; j++) {
1864 set->descriptors[update_samplers->binding + j].sampler =
1865 (struct anv_sampler *) update_samplers->pSamplers[j];
1866 }
1867 break;
1868
1869 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES:
1870 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1871 update_sampler_textures = (VkUpdateSamplerTextures *) common;
1872
1873 for (uint32_t j = 0; j < update_sampler_textures->count; j++) {
1874 set->descriptors[update_sampler_textures->binding + j].view =
1875 (struct anv_surface_view *)
1876 update_sampler_textures->pSamplerImageViews[j].pImageView->view;
1877 set->descriptors[update_sampler_textures->binding + j].sampler =
1878 (struct anv_sampler *)
1879 update_sampler_textures->pSamplerImageViews[j].sampler;
1880 }
1881 break;
1882
1883 case VK_STRUCTURE_TYPE_UPDATE_IMAGES:
1884 update_images = (VkUpdateImages *) common;
1885
1886 for (uint32_t j = 0; j < update_images->count; j++) {
1887 set->descriptors[update_images->binding + j].view =
1888 (struct anv_surface_view *) update_images->pImageViews[j].view;
1889 }
1890 break;
1891
1892 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS:
1893 update_buffers = (VkUpdateBuffers *) common;
1894
1895 for (uint32_t j = 0; j < update_buffers->count; j++) {
1896 set->descriptors[update_buffers->binding + j].view =
1897 (struct anv_surface_view *) update_buffers->pBufferViews[j].view;
1898 }
1899 /* FIXME: descriptor arrays? */
1900 break;
1901
1902 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY:
1903 update_as_copy = (VkUpdateAsCopy *) common;
1904 (void) update_as_copy;
1905 break;
1906
1907 default:
1908 break;
1909 }
1910 }
1911 }
1912
1913 // State object functions
1914
1915 static inline int64_t
1916 clamp_int64(int64_t x, int64_t min, int64_t max)
1917 {
1918 if (x < min)
1919 return min;
1920 else if (x < max)
1921 return x;
1922 else
1923 return max;
1924 }
1925
1926 static void
1927 anv_dynamic_vp_state_destroy(struct anv_device *device,
1928 struct anv_object *object,
1929 VkObjectType obj_type)
1930 {
1931 struct anv_dynamic_vp_state *state = (void *)object;
1932
1933 assert(obj_type == VK_OBJECT_TYPE_DYNAMIC_VP_STATE);
1934
1935 anv_state_pool_free(&device->dynamic_state_pool, state->sf_clip_vp);
1936 anv_state_pool_free(&device->dynamic_state_pool, state->cc_vp);
1937 anv_state_pool_free(&device->dynamic_state_pool, state->scissor);
1938
1939 anv_device_free(device, state);
1940 }
1941
1942 VkResult anv_CreateDynamicViewportState(
1943 VkDevice _device,
1944 const VkDynamicVpStateCreateInfo* pCreateInfo,
1945 VkDynamicVpState* pState)
1946 {
1947 struct anv_device *device = (struct anv_device *) _device;
1948 struct anv_dynamic_vp_state *state;
1949
1950 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO);
1951
1952 state = anv_device_alloc(device, sizeof(*state), 8,
1953 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1954 if (state == NULL)
1955 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1956
1957 state->base.destructor = anv_dynamic_vp_state_destroy;
1958
1959 unsigned count = pCreateInfo->viewportAndScissorCount;
1960 state->sf_clip_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
1961 count * 64, 64);
1962 state->cc_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
1963 count * 8, 32);
1964 state->scissor = anv_state_pool_alloc(&device->dynamic_state_pool,
1965 count * 32, 32);
1966
1967 for (uint32_t i = 0; i < pCreateInfo->viewportAndScissorCount; i++) {
1968 const VkViewport *vp = &pCreateInfo->pViewports[i];
1969 const VkRect *s = &pCreateInfo->pScissors[i];
1970
1971 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport = {
1972 .ViewportMatrixElementm00 = vp->width / 2,
1973 .ViewportMatrixElementm11 = vp->height / 2,
1974 .ViewportMatrixElementm22 = (vp->maxDepth - vp->minDepth) / 2,
1975 .ViewportMatrixElementm30 = vp->originX + vp->width / 2,
1976 .ViewportMatrixElementm31 = vp->originY + vp->height / 2,
1977 .ViewportMatrixElementm32 = (vp->maxDepth + vp->minDepth) / 2,
1978 .XMinClipGuardband = -1.0f,
1979 .XMaxClipGuardband = 1.0f,
1980 .YMinClipGuardband = -1.0f,
1981 .YMaxClipGuardband = 1.0f,
1982 .XMinViewPort = vp->originX,
1983 .XMaxViewPort = vp->originX + vp->width - 1,
1984 .YMinViewPort = vp->originY,
1985 .YMaxViewPort = vp->originY + vp->height - 1,
1986 };
1987
1988 struct GEN8_CC_VIEWPORT cc_viewport = {
1989 .MinimumDepth = vp->minDepth,
1990 .MaximumDepth = vp->maxDepth
1991 };
1992
1993 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
1994 * ymax < ymin for empty clips. In case clip x, y, width height are all
1995 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
1996 * what we want. Just special case empty clips and produce a canonical
1997 * empty clip. */
1998 static const struct GEN8_SCISSOR_RECT empty_scissor = {
1999 .ScissorRectangleYMin = 1,
2000 .ScissorRectangleXMin = 1,
2001 .ScissorRectangleYMax = 0,
2002 .ScissorRectangleXMax = 0
2003 };
2004
2005 const int max = 0xffff;
2006 struct GEN8_SCISSOR_RECT scissor = {
2007 /* Do this math using int64_t so overflow gets clamped correctly. */
2008 .ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
2009 .ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
2010 .ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
2011 .ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
2012 };
2013
2014 GEN8_SF_CLIP_VIEWPORT_pack(NULL, state->sf_clip_vp.map + i * 64, &sf_clip_viewport);
2015 GEN8_CC_VIEWPORT_pack(NULL, state->cc_vp.map + i * 32, &cc_viewport);
2016
2017 if (s->extent.width <= 0 || s->extent.height <= 0) {
2018 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &empty_scissor);
2019 } else {
2020 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &scissor);
2021 }
2022 }
2023
2024 *pState = (VkDynamicVpState) state;
2025
2026 return VK_SUCCESS;
2027 }
2028
2029 VkResult anv_CreateDynamicRasterState(
2030 VkDevice _device,
2031 const VkDynamicRsStateCreateInfo* pCreateInfo,
2032 VkDynamicRsState* pState)
2033 {
2034 struct anv_device *device = (struct anv_device *) _device;
2035 struct anv_dynamic_rs_state *state;
2036
2037 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO);
2038
2039 state = anv_device_alloc(device, sizeof(*state), 8,
2040 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2041 if (state == NULL)
2042 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2043
2044 /* Missing these:
2045 * float depthBias;
2046 * float depthBiasClamp;
2047 * float slopeScaledDepthBias;
2048 * float pointFadeThreshold;
2049 * // optional (GL45) - Size of point fade threshold
2050 */
2051
2052 struct GEN8_3DSTATE_SF sf = {
2053 GEN8_3DSTATE_SF_header,
2054 .LineWidth = pCreateInfo->lineWidth,
2055 .PointWidth = pCreateInfo->pointSize,
2056 };
2057
2058 GEN8_3DSTATE_SF_pack(NULL, state->state_sf, &sf);
2059
2060 *pState = (VkDynamicRsState) state;
2061
2062 return VK_SUCCESS;
2063 }
2064
2065 VkResult anv_CreateDynamicColorBlendState(
2066 VkDevice _device,
2067 const VkDynamicCbStateCreateInfo* pCreateInfo,
2068 VkDynamicCbState* pState)
2069 {
2070 struct anv_device *device = (struct anv_device *) _device;
2071 struct anv_dynamic_cb_state *state;
2072
2073 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO);
2074
2075 state = anv_device_alloc(device, sizeof(*state), 8,
2076 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2077 if (state == NULL)
2078 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2079
2080 *pState = (VkDynamicCbState) state;
2081
2082 return VK_SUCCESS;
2083 }
2084
2085 VkResult anv_CreateDynamicDepthStencilState(
2086 VkDevice device,
2087 const VkDynamicDsStateCreateInfo* pCreateInfo,
2088 VkDynamicDsState* pState)
2089 {
2090 stub_return(VK_UNSUPPORTED);
2091 }
2092
2093 // Command buffer functions
2094
2095 static void
2096 anv_cmd_buffer_destroy(struct anv_device *device,
2097 struct anv_object *object,
2098 VkObjectType obj_type)
2099 {
2100 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) object;
2101
2102 assert(obj_type == VK_OBJECT_TYPE_COMMAND_BUFFER);
2103
2104 anv_gem_munmap(cmd_buffer->surface_bo.map, BATCH_SIZE);
2105 anv_gem_close(device, cmd_buffer->surface_bo.gem_handle);
2106 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
2107 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
2108 anv_state_stream_finish(&cmd_buffer->binding_table_state_stream);
2109 anv_batch_finish(&cmd_buffer->batch, device);
2110 anv_device_free(device, cmd_buffer->exec2_objects);
2111 anv_device_free(device, cmd_buffer->exec2_bos);
2112 anv_device_free(device, cmd_buffer);
2113 }
2114
2115 VkResult anv_CreateCommandBuffer(
2116 VkDevice _device,
2117 const VkCmdBufferCreateInfo* pCreateInfo,
2118 VkCmdBuffer* pCmdBuffer)
2119 {
2120 struct anv_device *device = (struct anv_device *) _device;
2121 struct anv_cmd_buffer *cmd_buffer;
2122 VkResult result;
2123
2124 cmd_buffer = anv_device_alloc(device, sizeof(*cmd_buffer), 8,
2125 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2126 if (cmd_buffer == NULL)
2127 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2128
2129 cmd_buffer->base.destructor = anv_cmd_buffer_destroy;
2130
2131 cmd_buffer->device = device;
2132 cmd_buffer->rs_state = NULL;
2133 cmd_buffer->vp_state = NULL;
2134 memset(&cmd_buffer->default_bindings, 0, sizeof(cmd_buffer->default_bindings));
2135 cmd_buffer->bindings = &cmd_buffer->default_bindings;
2136
2137 result = anv_batch_init(&cmd_buffer->batch, device);
2138 if (result != VK_SUCCESS)
2139 goto fail;
2140
2141 result = anv_bo_init_new(&cmd_buffer->surface_bo, device, BATCH_SIZE);
2142 if (result != VK_SUCCESS)
2143 goto fail_batch;
2144
2145 cmd_buffer->surface_bo.map =
2146 anv_gem_mmap(device, cmd_buffer->surface_bo.gem_handle, 0, BATCH_SIZE);
2147 if (cmd_buffer->surface_bo.map == NULL) {
2148 result = vk_error(VK_ERROR_MEMORY_MAP_FAILED);
2149 goto fail_surface_bo;
2150 }
2151
2152 /* Start surface_next at 1 so surface offset 0 is invalid. */
2153 cmd_buffer->surface_next = 1;
2154 cmd_buffer->surface_relocs.num_relocs = 0;
2155
2156 cmd_buffer->exec2_objects =
2157 anv_device_alloc(device, 8192 * sizeof(cmd_buffer->exec2_objects[0]), 8,
2158 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2159 if (cmd_buffer->exec2_objects == NULL) {
2160 result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2161 goto fail_surface_map;
2162 }
2163
2164 cmd_buffer->exec2_bos =
2165 anv_device_alloc(device, 8192 * sizeof(cmd_buffer->exec2_bos[0]), 8,
2166 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2167 if (cmd_buffer->exec2_bos == NULL) {
2168 result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2169 goto fail_exec2_objects;
2170 }
2171
2172 anv_state_stream_init(&cmd_buffer->binding_table_state_stream,
2173 &device->binding_table_block_pool);
2174 anv_state_stream_init(&cmd_buffer->surface_state_stream,
2175 &device->surface_state_block_pool);
2176 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
2177 &device->dynamic_state_block_pool);
2178
2179 cmd_buffer->dirty = 0;
2180 cmd_buffer->vb_dirty = 0;
2181 cmd_buffer->pipeline = NULL;
2182
2183 *pCmdBuffer = (VkCmdBuffer) cmd_buffer;
2184
2185 return VK_SUCCESS;
2186
2187 fail_exec2_objects:
2188 anv_device_free(device, cmd_buffer->exec2_objects);
2189 fail_surface_map:
2190 anv_gem_munmap(cmd_buffer->surface_bo.map, BATCH_SIZE);
2191 fail_surface_bo:
2192 anv_gem_close(device, cmd_buffer->surface_bo.gem_handle);
2193 fail_batch:
2194 anv_batch_finish(&cmd_buffer->batch, device);
2195 fail:
2196 anv_device_free(device, cmd_buffer);
2197
2198 return result;
2199 }
2200
2201 VkResult anv_BeginCommandBuffer(
2202 VkCmdBuffer cmdBuffer,
2203 const VkCmdBufferBeginInfo* pBeginInfo)
2204 {
2205 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2206 struct anv_device *device = cmd_buffer->device;
2207
2208 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPELINE_SELECT,
2209 .PipelineSelection = _3D);
2210 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_SIP);
2211
2212 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_BASE_ADDRESS,
2213 .GeneralStateBaseAddress = { NULL, 0 },
2214 .GeneralStateMemoryObjectControlState = GEN8_MOCS,
2215 .GeneralStateBaseAddressModifyEnable = true,
2216 .GeneralStateBufferSize = 0xfffff,
2217 .GeneralStateBufferSizeModifyEnable = true,
2218
2219 .SurfaceStateBaseAddress = { &cmd_buffer->surface_bo, 0 },
2220 .SurfaceStateMemoryObjectControlState = GEN8_MOCS,
2221 .SurfaceStateBaseAddressModifyEnable = true,
2222
2223 .DynamicStateBaseAddress = { &device->dynamic_state_block_pool.bo, 0 },
2224 .DynamicStateMemoryObjectControlState = GEN8_MOCS,
2225 .DynamicStateBaseAddressModifyEnable = true,
2226 .DynamicStateBufferSize = 0xfffff,
2227 .DynamicStateBufferSizeModifyEnable = true,
2228
2229 .IndirectObjectBaseAddress = { NULL, 0 },
2230 .IndirectObjectMemoryObjectControlState = GEN8_MOCS,
2231 .IndirectObjectBaseAddressModifyEnable = true,
2232 .IndirectObjectBufferSize = 0xfffff,
2233 .IndirectObjectBufferSizeModifyEnable = true,
2234
2235 .InstructionBaseAddress = { &device->instruction_block_pool.bo, 0 },
2236 .InstructionMemoryObjectControlState = GEN8_MOCS,
2237 .InstructionBaseAddressModifyEnable = true,
2238 .InstructionBufferSize = 0xfffff,
2239 .InstructionBuffersizeModifyEnable = true);
2240
2241 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VF_STATISTICS,
2242 .StatisticsEnable = true);
2243 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_HS, .Enable = false);
2244 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_TE, .TEEnable = false);
2245 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
2246 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
2247
2248 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
2249 .ConstantBufferOffset = 0,
2250 .ConstantBufferSize = 4);
2251 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
2252 .ConstantBufferOffset = 4,
2253 .ConstantBufferSize = 4);
2254 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
2255 .ConstantBufferOffset = 8,
2256 .ConstantBufferSize = 4);
2257
2258 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_CHROMAKEY,
2259 .ChromaKeyKillEnable = false);
2260 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SBE_SWIZ);
2261 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
2262
2263 /* Hardcoded state: */
2264 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DEPTH_BUFFER,
2265 .SurfaceType = SURFTYPE_2D,
2266 .Width = 1,
2267 .Height = 1,
2268 .SurfaceFormat = D16_UNORM,
2269 .SurfaceBaseAddress = { NULL, 0 },
2270 .HierarchicalDepthBufferEnable = 0);
2271
2272 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_DEPTH_STENCIL,
2273 .DepthTestEnable = false,
2274 .DepthBufferWriteEnable = false);
2275
2276 return VK_SUCCESS;
2277 }
2278
2279 static void
2280 anv_cmd_buffer_add_bo(struct anv_cmd_buffer *cmd_buffer,
2281 struct anv_bo *bo, struct anv_reloc_list *list)
2282 {
2283 struct drm_i915_gem_exec_object2 *obj;
2284
2285 bo->index = cmd_buffer->bo_count;
2286 obj = &cmd_buffer->exec2_objects[bo->index];
2287 cmd_buffer->exec2_bos[bo->index] = bo;
2288 cmd_buffer->bo_count++;
2289
2290 obj->handle = bo->gem_handle;
2291 obj->relocation_count = 0;
2292 obj->relocs_ptr = 0;
2293 obj->alignment = 0;
2294 obj->offset = bo->offset;
2295 obj->flags = 0;
2296 obj->rsvd1 = 0;
2297 obj->rsvd2 = 0;
2298
2299 if (list) {
2300 obj->relocation_count = list->num_relocs;
2301 obj->relocs_ptr = (uintptr_t) list->relocs;
2302 }
2303 }
2304
2305 static void
2306 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer *cmd_buffer,
2307 struct anv_reloc_list *list)
2308 {
2309 struct anv_bo *bo, *batch_bo;
2310
2311 batch_bo = &cmd_buffer->batch.bo;
2312 for (size_t i = 0; i < list->num_relocs; i++) {
2313 bo = list->reloc_bos[i];
2314 /* Skip any relocations targeting the batch bo. We need to make sure
2315 * it's the last in the list so we'll add it manually later.
2316 */
2317 if (bo == batch_bo)
2318 continue;
2319 if (bo->index < cmd_buffer->bo_count && cmd_buffer->exec2_bos[bo->index] == bo)
2320 continue;
2321
2322 anv_cmd_buffer_add_bo(cmd_buffer, bo, NULL);
2323 }
2324 }
2325
2326 static void
2327 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer,
2328 struct anv_reloc_list *list)
2329 {
2330 struct anv_bo *bo;
2331
2332 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2333 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2334 * all bos haven't moved it will skip relocation processing alltogether.
2335 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2336 * value of offset so we can set it either way. For that to work we need
2337 * to make sure all relocs use the same presumed offset.
2338 */
2339
2340 for (size_t i = 0; i < list->num_relocs; i++) {
2341 bo = list->reloc_bos[i];
2342 if (bo->offset != list->relocs[i].presumed_offset)
2343 cmd_buffer->need_reloc = true;
2344
2345 list->relocs[i].target_handle = bo->index;
2346 }
2347 }
2348
2349 VkResult anv_EndCommandBuffer(
2350 VkCmdBuffer cmdBuffer)
2351 {
2352 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2353 struct anv_device *device = cmd_buffer->device;
2354 struct anv_batch *batch = &cmd_buffer->batch;
2355
2356 anv_batch_emit(batch, GEN8_MI_BATCH_BUFFER_END);
2357
2358 /* Round batch up to an even number of dwords. */
2359 if ((batch->next - batch->bo.map) & 4)
2360 anv_batch_emit(batch, GEN8_MI_NOOP);
2361
2362 cmd_buffer->bo_count = 0;
2363 cmd_buffer->need_reloc = false;
2364
2365 /* Lock for access to bo->index. */
2366 pthread_mutex_lock(&device->mutex);
2367
2368 /* Add block pool bos first so we can add them with their relocs. */
2369 anv_cmd_buffer_add_bo(cmd_buffer, &cmd_buffer->surface_bo,
2370 &cmd_buffer->surface_relocs);
2371
2372 anv_cmd_buffer_add_validate_bos(cmd_buffer, &cmd_buffer->surface_relocs);
2373 anv_cmd_buffer_add_validate_bos(cmd_buffer, &batch->cmd_relocs);
2374 anv_cmd_buffer_add_bo(cmd_buffer, &batch->bo, &batch->cmd_relocs);
2375 anv_cmd_buffer_process_relocs(cmd_buffer, &cmd_buffer->surface_relocs);
2376 anv_cmd_buffer_process_relocs(cmd_buffer, &batch->cmd_relocs);
2377
2378 cmd_buffer->execbuf.buffers_ptr = (uintptr_t) cmd_buffer->exec2_objects;
2379 cmd_buffer->execbuf.buffer_count = cmd_buffer->bo_count;
2380 cmd_buffer->execbuf.batch_start_offset = 0;
2381 cmd_buffer->execbuf.batch_len = batch->next - batch->bo.map;
2382 cmd_buffer->execbuf.cliprects_ptr = 0;
2383 cmd_buffer->execbuf.num_cliprects = 0;
2384 cmd_buffer->execbuf.DR1 = 0;
2385 cmd_buffer->execbuf.DR4 = 0;
2386
2387 cmd_buffer->execbuf.flags = I915_EXEC_HANDLE_LUT;
2388 if (!cmd_buffer->need_reloc)
2389 cmd_buffer->execbuf.flags |= I915_EXEC_NO_RELOC;
2390 cmd_buffer->execbuf.flags |= I915_EXEC_RENDER;
2391 cmd_buffer->execbuf.rsvd1 = device->context_id;
2392 cmd_buffer->execbuf.rsvd2 = 0;
2393
2394 pthread_mutex_unlock(&device->mutex);
2395
2396 return VK_SUCCESS;
2397 }
2398
2399 VkResult anv_ResetCommandBuffer(
2400 VkCmdBuffer cmdBuffer)
2401 {
2402 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2403
2404 anv_batch_reset(&cmd_buffer->batch);
2405 cmd_buffer->surface_next = 0;
2406 cmd_buffer->surface_relocs.num_relocs = 0;
2407
2408 return VK_SUCCESS;
2409 }
2410
2411 // Command buffer building functions
2412
2413 void anv_CmdBindPipeline(
2414 VkCmdBuffer cmdBuffer,
2415 VkPipelineBindPoint pipelineBindPoint,
2416 VkPipeline _pipeline)
2417 {
2418 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2419 struct anv_pipeline *pipeline = (struct anv_pipeline *) _pipeline;
2420
2421 cmd_buffer->pipeline = pipeline;
2422 cmd_buffer->vb_dirty |= pipeline->vb_used;
2423 cmd_buffer->dirty |= ANV_CMD_BUFFER_PIPELINE_DIRTY;
2424 }
2425
2426 void anv_CmdBindDynamicStateObject(
2427 VkCmdBuffer cmdBuffer,
2428 VkStateBindPoint stateBindPoint,
2429 VkDynamicStateObject dynamicState)
2430 {
2431 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2432 struct anv_dynamic_vp_state *vp_state;
2433
2434 switch (stateBindPoint) {
2435 case VK_STATE_BIND_POINT_VIEWPORT:
2436 vp_state = (struct anv_dynamic_vp_state *) dynamicState;
2437 /* We emit state immediately, but set cmd_buffer->vp_state to indicate
2438 * that vp state has been set in this command buffer. */
2439 cmd_buffer->vp_state = vp_state;
2440 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SCISSOR_STATE_POINTERS,
2441 .ScissorRectPointer = vp_state->scissor.offset);
2442 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
2443 .CCViewportPointer = vp_state->cc_vp.offset);
2444 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
2445 .SFClipViewportPointer = vp_state->sf_clip_vp.offset);
2446 break;
2447 case VK_STATE_BIND_POINT_RASTER:
2448 cmd_buffer->rs_state = (struct anv_dynamic_rs_state *) dynamicState;
2449 cmd_buffer->dirty |= ANV_CMD_BUFFER_RS_DIRTY;
2450 break;
2451 case VK_STATE_BIND_POINT_COLOR_BLEND:
2452 case VK_STATE_BIND_POINT_DEPTH_STENCIL:
2453 break;
2454 default:
2455 break;
2456 };
2457 }
2458
2459 static struct anv_state
2460 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer,
2461 uint32_t size, uint32_t alignment)
2462 {
2463 struct anv_state state;
2464
2465 state.offset = ALIGN_U32(cmd_buffer->surface_next, alignment);
2466 state.map = cmd_buffer->surface_bo.map + state.offset;
2467 state.alloc_size = size;
2468 cmd_buffer->surface_next = state.offset + size;
2469
2470 assert(state.offset + size < cmd_buffer->surface_bo.size);
2471
2472 return state;
2473 }
2474
2475 void anv_CmdBindDescriptorSets(
2476 VkCmdBuffer cmdBuffer,
2477 VkPipelineBindPoint pipelineBindPoint,
2478 uint32_t firstSet,
2479 uint32_t setCount,
2480 const VkDescriptorSet* pDescriptorSets,
2481 uint32_t dynamicOffsetCount,
2482 const uint32_t* pDynamicOffsets)
2483 {
2484 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2485 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2486 struct anv_bindings *bindings = cmd_buffer->bindings;
2487
2488 uint32_t offset = 0;
2489 for (uint32_t i = 0; i < setCount; i++) {
2490 struct anv_descriptor_set *set =
2491 (struct anv_descriptor_set *) pDescriptorSets[i];
2492 struct anv_descriptor_set_layout *set_layout = layout->set[firstSet + i].layout;
2493
2494 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2495 uint32_t *surface_to_desc = set_layout->stage[s].surface_start;
2496 uint32_t *sampler_to_desc = set_layout->stage[s].sampler_start;
2497 uint32_t bias = s == VK_SHADER_STAGE_FRAGMENT ? MAX_RTS : 0;
2498 uint32_t start;
2499
2500 start = bias + layout->set[firstSet + i].surface_start[s];
2501 for (uint32_t b = 0; b < set_layout->stage[s].surface_count; b++) {
2502 struct anv_surface_view *view = set->descriptors[surface_to_desc[b]].view;
2503 if (!view)
2504 continue;
2505
2506 struct anv_state state =
2507 anv_cmd_buffer_alloc_surface_state(cmd_buffer, 64, 64);
2508 memcpy(state.map, view->surface_state.map, 64);
2509
2510 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2511 *(uint64_t *)(state.map + 8 * 4) =
2512 anv_reloc_list_add(&cmd_buffer->surface_relocs,
2513 state.offset + 8 * 4,
2514 view->bo, view->offset);
2515
2516 bindings->descriptors[s].surfaces[start + b] = state.offset;
2517 }
2518
2519 start = layout->set[firstSet + i].sampler_start[s];
2520 for (uint32_t b = 0; b < set_layout->stage[s].sampler_count; b++) {
2521 struct anv_sampler *sampler = set->descriptors[sampler_to_desc[b]].sampler;
2522 if (!sampler)
2523 continue;
2524
2525 memcpy(&bindings->descriptors[s].samplers[start + b],
2526 sampler->state, sizeof(sampler->state));
2527 }
2528 }
2529
2530 offset += layout->set[firstSet + i].layout->num_dynamic_buffers;
2531 }
2532
2533 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
2534 }
2535
2536 void anv_CmdBindIndexBuffer(
2537 VkCmdBuffer cmdBuffer,
2538 VkBuffer _buffer,
2539 VkDeviceSize offset,
2540 VkIndexType indexType)
2541 {
2542 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2543 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2544
2545 static const uint32_t vk_to_gen_index_type[] = {
2546 [VK_INDEX_TYPE_UINT8] = INDEX_BYTE,
2547 [VK_INDEX_TYPE_UINT16] = INDEX_WORD,
2548 [VK_INDEX_TYPE_UINT32] = INDEX_DWORD,
2549 };
2550
2551 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_INDEX_BUFFER,
2552 .IndexFormat = vk_to_gen_index_type[indexType],
2553 .MemoryObjectControlState = GEN8_MOCS,
2554 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2555 .BufferSize = buffer->size - offset);
2556 }
2557
2558 void anv_CmdBindVertexBuffers(
2559 VkCmdBuffer cmdBuffer,
2560 uint32_t startBinding,
2561 uint32_t bindingCount,
2562 const VkBuffer* pBuffers,
2563 const VkDeviceSize* pOffsets)
2564 {
2565 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2566 struct anv_bindings *bindings = cmd_buffer->bindings;
2567
2568 /* We have to defer setting up vertex buffer since we need the buffer
2569 * stride from the pipeline. */
2570
2571 for (uint32_t i = 0; i < bindingCount; i++) {
2572 bindings->vb[startBinding + i].buffer = (struct anv_buffer *) pBuffers[i];
2573 bindings->vb[startBinding + i].offset = pOffsets[i];
2574 cmd_buffer->vb_dirty |= 1 << (startBinding + i);
2575 }
2576 }
2577
2578 static void
2579 flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
2580 {
2581 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2582 struct anv_bindings *bindings = cmd_buffer->bindings;
2583 uint32_t layers = cmd_buffer->framebuffer->layers;
2584
2585 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2586 uint32_t bias;
2587
2588 if (s == VK_SHADER_STAGE_FRAGMENT) {
2589 bias = MAX_RTS;
2590 layers = cmd_buffer->framebuffer->layers;
2591 } else {
2592 bias = 0;
2593 layers = 0;
2594 }
2595
2596 /* This is a little awkward: layout can be NULL but we still have to
2597 * allocate and set a binding table for the PS stage for render
2598 * targets. */
2599 uint32_t surface_count = layout ? layout->stage[s].surface_count : 0;
2600
2601 if (layers + surface_count > 0) {
2602 struct anv_state state;
2603 uint32_t size;
2604
2605 size = (bias + surface_count) * sizeof(uint32_t);
2606 state = anv_cmd_buffer_alloc_surface_state(cmd_buffer, size, 32);
2607 memcpy(state.map, bindings->descriptors[s].surfaces, size);
2608
2609 static const uint32_t binding_table_opcodes[] = {
2610 [VK_SHADER_STAGE_VERTEX] = 38,
2611 [VK_SHADER_STAGE_TESS_CONTROL] = 39,
2612 [VK_SHADER_STAGE_TESS_EVALUATION] = 40,
2613 [VK_SHADER_STAGE_GEOMETRY] = 41,
2614 [VK_SHADER_STAGE_FRAGMENT] = 42,
2615 [VK_SHADER_STAGE_COMPUTE] = 0,
2616 };
2617
2618 anv_batch_emit(&cmd_buffer->batch,
2619 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS,
2620 ._3DCommandSubOpcode = binding_table_opcodes[s],
2621 .PointertoVSBindingTable = state.offset);
2622 }
2623
2624 if (layout && layout->stage[s].sampler_count > 0) {
2625 struct anv_state state;
2626 size_t size;
2627
2628 size = layout->stage[s].sampler_count * 16;
2629 state = anv_cmd_buffer_alloc_surface_state(cmd_buffer, size, 32);
2630 memcpy(state.map, bindings->descriptors[s].samplers, size);
2631
2632 static const uint32_t sampler_state_opcodes[] = {
2633 [VK_SHADER_STAGE_VERTEX] = 43,
2634 [VK_SHADER_STAGE_TESS_CONTROL] = 44, /* HS */
2635 [VK_SHADER_STAGE_TESS_EVALUATION] = 45, /* DS */
2636 [VK_SHADER_STAGE_GEOMETRY] = 46,
2637 [VK_SHADER_STAGE_FRAGMENT] = 47,
2638 [VK_SHADER_STAGE_COMPUTE] = 0,
2639 };
2640
2641 anv_batch_emit(&cmd_buffer->batch,
2642 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS,
2643 ._3DCommandSubOpcode = sampler_state_opcodes[s],
2644 .PointertoVSSamplerState = state.offset);
2645 }
2646 }
2647 }
2648
2649 static void
2650 anv_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer)
2651 {
2652 struct anv_pipeline *pipeline = cmd_buffer->pipeline;
2653 struct anv_bindings *bindings = cmd_buffer->bindings;
2654 uint32_t *p;
2655
2656 uint32_t vb_emit = cmd_buffer->vb_dirty & pipeline->vb_used;
2657 const uint32_t num_buffers = __builtin_popcount(vb_emit);
2658 const uint32_t num_dwords = 1 + num_buffers * 4;
2659
2660 if (vb_emit) {
2661 p = anv_batch_emitn(&cmd_buffer->batch, num_dwords,
2662 GEN8_3DSTATE_VERTEX_BUFFERS);
2663 uint32_t vb, i = 0;
2664 for_each_bit(vb, vb_emit) {
2665 struct anv_buffer *buffer = bindings->vb[vb].buffer;
2666 uint32_t offset = bindings->vb[vb].offset;
2667
2668 struct GEN8_VERTEX_BUFFER_STATE state = {
2669 .VertexBufferIndex = vb,
2670 .MemoryObjectControlState = GEN8_MOCS,
2671 .AddressModifyEnable = true,
2672 .BufferPitch = pipeline->binding_stride[vb],
2673 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2674 .BufferSize = buffer->size - offset
2675 };
2676
2677 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer->batch, &p[1 + i * 4], &state);
2678 i++;
2679 }
2680 }
2681
2682 if (cmd_buffer->dirty & ANV_CMD_BUFFER_PIPELINE_DIRTY)
2683 anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
2684
2685 if (cmd_buffer->dirty & ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY)
2686 flush_descriptor_sets(cmd_buffer);
2687
2688 if (cmd_buffer->dirty & (ANV_CMD_BUFFER_PIPELINE_DIRTY | ANV_CMD_BUFFER_RS_DIRTY))
2689 anv_batch_emit_merge(&cmd_buffer->batch,
2690 cmd_buffer->rs_state->state_sf, pipeline->state_sf);
2691
2692 cmd_buffer->vb_dirty &= ~vb_emit;
2693 cmd_buffer->dirty = 0;
2694 }
2695
2696 void anv_CmdDraw(
2697 VkCmdBuffer cmdBuffer,
2698 uint32_t firstVertex,
2699 uint32_t vertexCount,
2700 uint32_t firstInstance,
2701 uint32_t instanceCount)
2702 {
2703 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2704
2705 anv_cmd_buffer_flush_state(cmd_buffer);
2706
2707 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2708 .VertexAccessType = SEQUENTIAL,
2709 .VertexCountPerInstance = vertexCount,
2710 .StartVertexLocation = firstVertex,
2711 .InstanceCount = instanceCount,
2712 .StartInstanceLocation = firstInstance,
2713 .BaseVertexLocation = 0);
2714 }
2715
2716 void anv_CmdDrawIndexed(
2717 VkCmdBuffer cmdBuffer,
2718 uint32_t firstIndex,
2719 uint32_t indexCount,
2720 int32_t vertexOffset,
2721 uint32_t firstInstance,
2722 uint32_t instanceCount)
2723 {
2724 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2725
2726 anv_cmd_buffer_flush_state(cmd_buffer);
2727
2728 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2729 .VertexAccessType = RANDOM,
2730 .VertexCountPerInstance = indexCount,
2731 .StartVertexLocation = firstIndex,
2732 .InstanceCount = instanceCount,
2733 .StartInstanceLocation = firstInstance,
2734 .BaseVertexLocation = 0);
2735 }
2736
2737 static void
2738 anv_batch_lrm(struct anv_batch *batch,
2739 uint32_t reg, struct anv_bo *bo, uint32_t offset)
2740 {
2741 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2742 .RegisterAddress = reg,
2743 .MemoryAddress = { bo, offset });
2744 }
2745
2746 static void
2747 anv_batch_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm)
2748 {
2749 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_IMM,
2750 .RegisterOffset = reg,
2751 .DataDWord = imm);
2752 }
2753
2754 /* Auto-Draw / Indirect Registers */
2755 #define GEN7_3DPRIM_END_OFFSET 0x2420
2756 #define GEN7_3DPRIM_START_VERTEX 0x2430
2757 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
2758 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
2759 #define GEN7_3DPRIM_START_INSTANCE 0x243C
2760 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
2761
2762 void anv_CmdDrawIndirect(
2763 VkCmdBuffer cmdBuffer,
2764 VkBuffer _buffer,
2765 VkDeviceSize offset,
2766 uint32_t count,
2767 uint32_t stride)
2768 {
2769 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2770 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2771 struct anv_bo *bo = buffer->bo;
2772 uint32_t bo_offset = buffer->offset + offset;
2773
2774 anv_cmd_buffer_flush_state(cmd_buffer);
2775
2776 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
2777 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
2778 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
2779 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 12);
2780 anv_batch_lri(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, 0);
2781
2782 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2783 .IndirectParameterEnable = true,
2784 .VertexAccessType = SEQUENTIAL);
2785 }
2786
2787 void anv_CmdDrawIndexedIndirect(
2788 VkCmdBuffer cmdBuffer,
2789 VkBuffer _buffer,
2790 VkDeviceSize offset,
2791 uint32_t count,
2792 uint32_t stride)
2793 {
2794 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2795 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2796 struct anv_bo *bo = buffer->bo;
2797 uint32_t bo_offset = buffer->offset + offset;
2798
2799 anv_cmd_buffer_flush_state(cmd_buffer);
2800
2801 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
2802 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
2803 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
2804 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, bo, bo_offset + 12);
2805 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 16);
2806
2807 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2808 .IndirectParameterEnable = true,
2809 .VertexAccessType = RANDOM);
2810 }
2811
2812 void anv_CmdDispatch(
2813 VkCmdBuffer cmdBuffer,
2814 uint32_t x,
2815 uint32_t y,
2816 uint32_t z)
2817 {
2818 stub();
2819 }
2820
2821 void anv_CmdDispatchIndirect(
2822 VkCmdBuffer cmdBuffer,
2823 VkBuffer buffer,
2824 VkDeviceSize offset)
2825 {
2826 stub();
2827 }
2828
2829 void anv_CmdSetEvent(
2830 VkCmdBuffer cmdBuffer,
2831 VkEvent event,
2832 VkPipeEvent pipeEvent)
2833 {
2834 stub();
2835 }
2836
2837 void anv_CmdResetEvent(
2838 VkCmdBuffer cmdBuffer,
2839 VkEvent event,
2840 VkPipeEvent pipeEvent)
2841 {
2842 stub();
2843 }
2844
2845 void anv_CmdWaitEvents(
2846 VkCmdBuffer cmdBuffer,
2847 VkWaitEvent waitEvent,
2848 uint32_t eventCount,
2849 const VkEvent* pEvents,
2850 uint32_t memBarrierCount,
2851 const void** ppMemBarriers)
2852 {
2853 stub();
2854 }
2855
2856 void anv_CmdPipelineBarrier(
2857 VkCmdBuffer cmdBuffer,
2858 VkWaitEvent waitEvent,
2859 uint32_t pipeEventCount,
2860 const VkPipeEvent* pPipeEvents,
2861 uint32_t memBarrierCount,
2862 const void** ppMemBarriers)
2863 {
2864 stub();
2865 }
2866
2867 static void
2868 anv_batch_emit_ps_depth_count(struct anv_batch *batch,
2869 struct anv_bo *bo, uint32_t offset)
2870 {
2871 anv_batch_emit(batch, GEN8_PIPE_CONTROL,
2872 .DestinationAddressType = DAT_PPGTT,
2873 .PostSyncOperation = WritePSDepthCount,
2874 .Address = { bo, offset }); /* FIXME: This is only lower 32 bits */
2875 }
2876
2877 void anv_CmdBeginQuery(
2878 VkCmdBuffer cmdBuffer,
2879 VkQueryPool queryPool,
2880 uint32_t slot,
2881 VkQueryControlFlags flags)
2882 {
2883 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2884 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2885
2886 switch (pool->type) {
2887 case VK_QUERY_TYPE_OCCLUSION:
2888 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
2889 slot * sizeof(struct anv_query_pool_slot));
2890 break;
2891
2892 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
2893 default:
2894 unreachable("");
2895 }
2896 }
2897
2898 void anv_CmdEndQuery(
2899 VkCmdBuffer cmdBuffer,
2900 VkQueryPool queryPool,
2901 uint32_t slot)
2902 {
2903 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2904 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2905
2906 switch (pool->type) {
2907 case VK_QUERY_TYPE_OCCLUSION:
2908 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
2909 slot * sizeof(struct anv_query_pool_slot) + 8);
2910 break;
2911
2912 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
2913 default:
2914 unreachable("");
2915 }
2916 }
2917
2918 void anv_CmdResetQueryPool(
2919 VkCmdBuffer cmdBuffer,
2920 VkQueryPool queryPool,
2921 uint32_t startQuery,
2922 uint32_t queryCount)
2923 {
2924 stub();
2925 }
2926
2927 #define TIMESTAMP 0x2358
2928
2929 void anv_CmdWriteTimestamp(
2930 VkCmdBuffer cmdBuffer,
2931 VkTimestampType timestampType,
2932 VkBuffer destBuffer,
2933 VkDeviceSize destOffset)
2934 {
2935 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2936 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
2937 struct anv_bo *bo = buffer->bo;
2938
2939 switch (timestampType) {
2940 case VK_TIMESTAMP_TYPE_TOP:
2941 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2942 .RegisterAddress = TIMESTAMP,
2943 .MemoryAddress = { bo, buffer->offset + destOffset });
2944 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2945 .RegisterAddress = TIMESTAMP + 4,
2946 .MemoryAddress = { bo, buffer->offset + destOffset + 4 });
2947 break;
2948
2949 case VK_TIMESTAMP_TYPE_BOTTOM:
2950 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
2951 .DestinationAddressType = DAT_PPGTT,
2952 .PostSyncOperation = WriteTimestamp,
2953 .Address = /* FIXME: This is only lower 32 bits */
2954 { bo, buffer->offset + destOffset });
2955 break;
2956
2957 default:
2958 break;
2959 }
2960 }
2961
2962 #define alu_opcode(v) __gen_field((v), 20, 31)
2963 #define alu_operand1(v) __gen_field((v), 10, 19)
2964 #define alu_operand2(v) __gen_field((v), 0, 9)
2965 #define alu(opcode, operand1, operand2) \
2966 alu_opcode(opcode) | alu_operand1(operand1) | alu_operand2(operand2)
2967
2968 #define OPCODE_NOOP 0x000
2969 #define OPCODE_LOAD 0x080
2970 #define OPCODE_LOADINV 0x480
2971 #define OPCODE_LOAD0 0x081
2972 #define OPCODE_LOAD1 0x481
2973 #define OPCODE_ADD 0x100
2974 #define OPCODE_SUB 0x101
2975 #define OPCODE_AND 0x102
2976 #define OPCODE_OR 0x103
2977 #define OPCODE_XOR 0x104
2978 #define OPCODE_STORE 0x180
2979 #define OPCODE_STOREINV 0x580
2980
2981 #define OPERAND_R0 0x00
2982 #define OPERAND_R1 0x01
2983 #define OPERAND_R2 0x02
2984 #define OPERAND_R3 0x03
2985 #define OPERAND_R4 0x04
2986 #define OPERAND_SRCA 0x20
2987 #define OPERAND_SRCB 0x21
2988 #define OPERAND_ACCU 0x31
2989 #define OPERAND_ZF 0x32
2990 #define OPERAND_CF 0x33
2991
2992 #define CS_GPR(n) (0x2600 + (n) * 8)
2993
2994 static void
2995 emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg,
2996 struct anv_bo *bo, uint32_t offset)
2997 {
2998 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2999 .RegisterAddress = reg,
3000 .MemoryAddress = { bo, offset });
3001 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
3002 .RegisterAddress = reg + 4,
3003 .MemoryAddress = { bo, offset + 4 });
3004 }
3005
3006 void anv_CmdCopyQueryPoolResults(
3007 VkCmdBuffer cmdBuffer,
3008 VkQueryPool queryPool,
3009 uint32_t startQuery,
3010 uint32_t queryCount,
3011 VkBuffer destBuffer,
3012 VkDeviceSize destOffset,
3013 VkDeviceSize destStride,
3014 VkQueryResultFlags flags)
3015 {
3016 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3017 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
3018 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
3019 uint32_t slot_offset, dst_offset;
3020
3021 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
3022 /* Where is the availabilty info supposed to go? */
3023 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
3024 return;
3025 }
3026
3027 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
3028
3029 /* FIXME: If we're not waiting, should we just do this on the CPU? */
3030 if (flags & VK_QUERY_RESULT_WAIT_BIT)
3031 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3032 .CommandStreamerStallEnable = true);
3033
3034 dst_offset = buffer->offset + destOffset;
3035 for (uint32_t i = 0; i < queryCount; i++) {
3036
3037 slot_offset = (startQuery + i) * sizeof(struct anv_query_pool_slot);
3038
3039 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(0), &pool->bo, slot_offset);
3040 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(1), &pool->bo, slot_offset + 8);
3041
3042 /* FIXME: We need to clamp the result for 32 bit. */
3043
3044 uint32_t *dw = anv_batch_emitn(&cmd_buffer->batch, 5, GEN8_MI_MATH);
3045 dw[1] = alu(OPCODE_LOAD, OPERAND_SRCA, OPERAND_R1);
3046 dw[2] = alu(OPCODE_LOAD, OPERAND_SRCB, OPERAND_R0);
3047 dw[3] = alu(OPCODE_SUB, 0, 0);
3048 dw[4] = alu(OPCODE_STORE, OPERAND_R2, OPERAND_ACCU);
3049
3050 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3051 .RegisterAddress = CS_GPR(2),
3052 /* FIXME: This is only lower 32 bits */
3053 .MemoryAddress = { buffer->bo, dst_offset });
3054
3055 if (flags & VK_QUERY_RESULT_64_BIT)
3056 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3057 .RegisterAddress = CS_GPR(2) + 4,
3058 /* FIXME: This is only lower 32 bits */
3059 .MemoryAddress = { buffer->bo, dst_offset + 4 });
3060
3061 dst_offset += destStride;
3062 }
3063 }
3064
3065 void anv_CmdInitAtomicCounters(
3066 VkCmdBuffer cmdBuffer,
3067 VkPipelineBindPoint pipelineBindPoint,
3068 uint32_t startCounter,
3069 uint32_t counterCount,
3070 const uint32_t* pData)
3071 {
3072 stub();
3073 }
3074
3075 void anv_CmdLoadAtomicCounters(
3076 VkCmdBuffer cmdBuffer,
3077 VkPipelineBindPoint pipelineBindPoint,
3078 uint32_t startCounter,
3079 uint32_t counterCount,
3080 VkBuffer srcBuffer,
3081 VkDeviceSize srcOffset)
3082 {
3083 stub();
3084 }
3085
3086 void anv_CmdSaveAtomicCounters(
3087 VkCmdBuffer cmdBuffer,
3088 VkPipelineBindPoint pipelineBindPoint,
3089 uint32_t startCounter,
3090 uint32_t counterCount,
3091 VkBuffer destBuffer,
3092 VkDeviceSize destOffset)
3093 {
3094 stub();
3095 }
3096
3097 static void
3098 anv_framebuffer_destroy(struct anv_device *device,
3099 struct anv_object *object,
3100 VkObjectType obj_type)
3101 {
3102 struct anv_framebuffer *fb = (struct anv_framebuffer *)object;
3103
3104 assert(obj_type == VK_OBJECT_TYPE_FRAMEBUFFER);
3105
3106 anv_DestroyObject((VkDevice) device,
3107 VK_OBJECT_TYPE_DYNAMIC_VP_STATE,
3108 fb->vp_state);
3109
3110 anv_device_free(device, fb);
3111 }
3112
3113 VkResult anv_CreateFramebuffer(
3114 VkDevice _device,
3115 const VkFramebufferCreateInfo* pCreateInfo,
3116 VkFramebuffer* pFramebuffer)
3117 {
3118 struct anv_device *device = (struct anv_device *) _device;
3119 struct anv_framebuffer *framebuffer;
3120
3121 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
3122
3123 framebuffer = anv_device_alloc(device, sizeof(*framebuffer), 8,
3124 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3125 if (framebuffer == NULL)
3126 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3127
3128 framebuffer->base.destructor = anv_framebuffer_destroy;
3129
3130 framebuffer->color_attachment_count = pCreateInfo->colorAttachmentCount;
3131 for (uint32_t i = 0; i < pCreateInfo->colorAttachmentCount; i++) {
3132 framebuffer->color_attachments[i] =
3133 (struct anv_surface_view *) pCreateInfo->pColorAttachments[i].view;
3134 }
3135
3136 if (pCreateInfo->pDepthStencilAttachment) {
3137 framebuffer->depth_stencil =
3138 (struct anv_depth_stencil_view *) pCreateInfo->pDepthStencilAttachment->view;
3139 }
3140
3141 framebuffer->sample_count = pCreateInfo->sampleCount;
3142 framebuffer->width = pCreateInfo->width;
3143 framebuffer->height = pCreateInfo->height;
3144 framebuffer->layers = pCreateInfo->layers;
3145
3146 vkCreateDynamicViewportState((VkDevice) device,
3147 &(VkDynamicVpStateCreateInfo) {
3148 .sType = VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO,
3149 .viewportAndScissorCount = 1,
3150 .pViewports = (VkViewport[]) {
3151 {
3152 .originX = 0,
3153 .originY = 0,
3154 .width = pCreateInfo->width,
3155 .height = pCreateInfo->height,
3156 .minDepth = 0,
3157 .maxDepth = 1
3158 },
3159 },
3160 .pScissors = (VkRect[]) {
3161 { { 0, 0 },
3162 { pCreateInfo->width, pCreateInfo->height } },
3163 }
3164 },
3165 &framebuffer->vp_state);
3166
3167 *pFramebuffer = (VkFramebuffer) framebuffer;
3168
3169 return VK_SUCCESS;
3170 }
3171
3172 VkResult anv_CreateRenderPass(
3173 VkDevice _device,
3174 const VkRenderPassCreateInfo* pCreateInfo,
3175 VkRenderPass* pRenderPass)
3176 {
3177 struct anv_device *device = (struct anv_device *) _device;
3178 struct anv_render_pass *pass;
3179 size_t size;
3180
3181 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO);
3182
3183 size = sizeof(*pass) +
3184 pCreateInfo->layers * sizeof(struct anv_render_pass_layer);
3185 pass = anv_device_alloc(device, size, 8,
3186 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3187 if (pass == NULL)
3188 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3189
3190 pass->render_area = pCreateInfo->renderArea;
3191
3192 pass->num_layers = pCreateInfo->layers;
3193
3194 pass->num_clear_layers = 0;
3195 for (uint32_t i = 0; i < pCreateInfo->layers; i++) {
3196 pass->layers[i].color_load_op = pCreateInfo->pColorLoadOps[i];
3197 pass->layers[i].clear_color = pCreateInfo->pColorLoadClearValues[i];
3198 if (pass->layers[i].color_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR)
3199 pass->num_clear_layers++;
3200 }
3201
3202 *pRenderPass = (VkRenderPass) pass;
3203
3204 return VK_SUCCESS;
3205 }
3206
3207 void
3208 anv_cmd_buffer_fill_render_targets(struct anv_cmd_buffer *cmd_buffer)
3209 {
3210 struct anv_framebuffer *framebuffer = cmd_buffer->framebuffer;
3211 struct anv_bindings *bindings = cmd_buffer->bindings;
3212
3213 for (uint32_t i = 0; i < framebuffer->color_attachment_count; i++) {
3214 struct anv_surface_view *view = framebuffer->color_attachments[i];
3215
3216 struct anv_state state =
3217 anv_cmd_buffer_alloc_surface_state(cmd_buffer, 64, 64);
3218 memcpy(state.map, view->surface_state.map, 64);
3219
3220 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
3221 *(uint64_t *)(state.map + 8 * 4) =
3222 anv_reloc_list_add(&cmd_buffer->surface_relocs,
3223 state.offset + 8 * 4,
3224 view->bo, view->offset);
3225
3226 bindings->descriptors[VK_SHADER_STAGE_FRAGMENT].surfaces[i] = state.offset;
3227 }
3228 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
3229 }
3230
3231 void anv_CmdBeginRenderPass(
3232 VkCmdBuffer cmdBuffer,
3233 const VkRenderPassBegin* pRenderPassBegin)
3234 {
3235 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3236 struct anv_render_pass *pass = (struct anv_render_pass *) pRenderPassBegin->renderPass;
3237 struct anv_framebuffer *framebuffer =
3238 (struct anv_framebuffer *) pRenderPassBegin->framebuffer;
3239
3240 cmd_buffer->framebuffer = framebuffer;
3241
3242 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DRAWING_RECTANGLE,
3243 .ClippedDrawingRectangleYMin = pass->render_area.offset.y,
3244 .ClippedDrawingRectangleXMin = pass->render_area.offset.x,
3245 .ClippedDrawingRectangleYMax =
3246 pass->render_area.offset.y + pass->render_area.extent.height - 1,
3247 .ClippedDrawingRectangleXMax =
3248 pass->render_area.offset.x + pass->render_area.extent.width - 1,
3249 .DrawingRectangleOriginY = 0,
3250 .DrawingRectangleOriginX = 0);
3251
3252 anv_cmd_buffer_fill_render_targets(cmd_buffer);
3253
3254 anv_cmd_buffer_clear(cmd_buffer, pass);
3255 }
3256
3257 void anv_CmdEndRenderPass(
3258 VkCmdBuffer cmdBuffer,
3259 VkRenderPass renderPass)
3260 {
3261 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3262 * hack but it ensures that render targets always actually get written.
3263 * Eventually, we should do flushing based on image format transitions
3264 * or something of that nature.
3265 */
3266 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *)cmdBuffer;
3267 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3268 .PostSyncOperation = NoWrite,
3269 .RenderTargetCacheFlushEnable = true,
3270 .InstructionCacheInvalidateEnable = true,
3271 .DepthCacheFlushEnable = true,
3272 .VFCacheInvalidationEnable = true,
3273 .TextureCacheInvalidationEnable = true,
3274 .CommandStreamerStallEnable = true);
3275 }
3276
3277 void vkCmdDbgMarkerBegin(
3278 VkCmdBuffer cmdBuffer,
3279 const char* pMarker)
3280 __attribute__ ((visibility ("default")));
3281
3282 void vkCmdDbgMarkerEnd(
3283 VkCmdBuffer cmdBuffer)
3284 __attribute__ ((visibility ("default")));
3285
3286 VkResult vkDbgSetObjectTag(
3287 VkDevice device,
3288 VkObject object,
3289 size_t tagSize,
3290 const void* pTag)
3291 __attribute__ ((visibility ("default")));
3292
3293
3294 void vkCmdDbgMarkerBegin(
3295 VkCmdBuffer cmdBuffer,
3296 const char* pMarker)
3297 {
3298 }
3299
3300 void vkCmdDbgMarkerEnd(
3301 VkCmdBuffer cmdBuffer)
3302 {
3303 }
3304
3305 VkResult vkDbgSetObjectTag(
3306 VkDevice device,
3307 VkObject object,
3308 size_t tagSize,
3309 const void* pTag)
3310 {
3311 return VK_SUCCESS;
3312 }