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vk/pipeline: Track VB's that are actually used by the pipeline
[mesa.git] / src / vulkan / device.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "private.h"
31
32 static int
33 anv_env_get_int(const char *name)
34 {
35 const char *val = getenv(name);
36
37 if (!val)
38 return 0;
39
40 return strtol(val, NULL, 0);
41 }
42
43 static VkResult
44 fill_physical_device(struct anv_physical_device *device,
45 struct anv_instance *instance,
46 const char *path)
47 {
48 int fd;
49
50 fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
51 if (fd < 0)
52 return vk_error(VK_ERROR_UNAVAILABLE);
53
54 device->instance = instance;
55 device->path = path;
56
57 device->chipset_id = anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device->no_hw = false;
59 if (device->chipset_id) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
61 device->no_hw = true;
62 } else {
63 device->chipset_id = anv_gem_get_param(fd, I915_PARAM_CHIPSET_ID);
64 }
65 if (!device->chipset_id)
66 goto fail;
67
68 device->name = brw_get_device_name(device->chipset_id);
69 device->info = brw_get_device_info(device->chipset_id, -1);
70 if (!device->info)
71 goto fail;
72
73 if (!anv_gem_get_param(fd, I915_PARAM_HAS_WAIT_TIMEOUT))
74 goto fail;
75
76 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXECBUF2))
77 goto fail;
78
79 if (!anv_gem_get_param(fd, I915_PARAM_HAS_LLC))
80 goto fail;
81
82 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_CONSTANTS))
83 goto fail;
84
85 close(fd);
86
87 return VK_SUCCESS;
88
89 fail:
90 close(fd);
91
92 return vk_error(VK_ERROR_UNAVAILABLE);
93 }
94
95 static void *default_alloc(
96 void* pUserData,
97 size_t size,
98 size_t alignment,
99 VkSystemAllocType allocType)
100 {
101 return malloc(size);
102 }
103
104 static void default_free(
105 void* pUserData,
106 void* pMem)
107 {
108 free(pMem);
109 }
110
111 static const VkAllocCallbacks default_alloc_callbacks = {
112 .pUserData = NULL,
113 .pfnAlloc = default_alloc,
114 .pfnFree = default_free
115 };
116
117 VkResult anv_CreateInstance(
118 const VkInstanceCreateInfo* pCreateInfo,
119 VkInstance* pInstance)
120 {
121 struct anv_instance *instance;
122 const VkAllocCallbacks *alloc_callbacks = &default_alloc_callbacks;
123 void *user_data = NULL;
124 VkResult result;
125
126 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
127
128 if (pCreateInfo->pAllocCb) {
129 alloc_callbacks = pCreateInfo->pAllocCb;
130 user_data = pCreateInfo->pAllocCb->pUserData;
131 }
132 instance = alloc_callbacks->pfnAlloc(user_data, sizeof(*instance), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
134 if (!instance)
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
136
137 instance->pAllocUserData = alloc_callbacks->pUserData;
138 instance->pfnAlloc = alloc_callbacks->pfnAlloc;
139 instance->pfnFree = alloc_callbacks->pfnFree;
140 instance->apiVersion = pCreateInfo->pAppInfo->apiVersion;
141
142 instance->physicalDeviceCount = 0;
143 result = fill_physical_device(&instance->physicalDevice,
144 instance, "/dev/dri/renderD128");
145
146 if (result != VK_SUCCESS)
147 return result;
148
149 instance->physicalDeviceCount++;
150 *pInstance = (VkInstance) instance;
151
152 return VK_SUCCESS;
153 }
154
155 VkResult anv_DestroyInstance(
156 VkInstance _instance)
157 {
158 struct anv_instance *instance = (struct anv_instance *) _instance;
159
160 instance->pfnFree(instance->pAllocUserData, instance);
161
162 return VK_SUCCESS;
163 }
164
165 VkResult anv_EnumeratePhysicalDevices(
166 VkInstance _instance,
167 uint32_t* pPhysicalDeviceCount,
168 VkPhysicalDevice* pPhysicalDevices)
169 {
170 struct anv_instance *instance = (struct anv_instance *) _instance;
171
172 if (*pPhysicalDeviceCount >= 1)
173 pPhysicalDevices[0] = (VkPhysicalDevice) &instance->physicalDevice;
174 *pPhysicalDeviceCount = instance->physicalDeviceCount;
175
176 return VK_SUCCESS;
177 }
178
179 VkResult anv_GetPhysicalDeviceInfo(
180 VkPhysicalDevice physicalDevice,
181 VkPhysicalDeviceInfoType infoType,
182 size_t* pDataSize,
183 void* pData)
184 {
185 struct anv_physical_device *device = (struct anv_physical_device *) physicalDevice;
186 VkPhysicalDeviceProperties *properties;
187 VkPhysicalDevicePerformance *performance;
188 VkPhysicalDeviceQueueProperties *queue_properties;
189 VkPhysicalDeviceMemoryProperties *memory_properties;
190 VkDisplayPropertiesWSI *display_properties;
191 uint64_t ns_per_tick = 80;
192
193 switch ((uint32_t) infoType) {
194 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES:
195 properties = pData;
196
197 *pDataSize = sizeof(*properties);
198 if (pData == NULL)
199 return VK_SUCCESS;
200
201 properties->apiVersion = 1;
202 properties->driverVersion = 1;
203 properties->vendorId = 0x8086;
204 properties->deviceId = device->chipset_id;
205 properties->deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
206 strcpy(properties->deviceName, device->name);
207 properties->maxInlineMemoryUpdateSize = 0;
208 properties->maxBoundDescriptorSets = MAX_SETS;
209 properties->maxThreadGroupSize = 512;
210 properties->timestampFrequency = 1000 * 1000 * 1000 / ns_per_tick;
211 properties->multiColorAttachmentClears = true;
212 properties->maxDescriptorSets = 8;
213 properties->maxViewports = 16;
214 properties->maxColorAttachments = 8;
215 return VK_SUCCESS;
216
217 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE:
218 performance = pData;
219
220 *pDataSize = sizeof(*performance);
221 if (pData == NULL)
222 return VK_SUCCESS;
223
224 performance->maxDeviceClock = 1.0;
225 performance->aluPerClock = 1.0;
226 performance->texPerClock = 1.0;
227 performance->primsPerClock = 1.0;
228 performance->pixelsPerClock = 1.0;
229 return VK_SUCCESS;
230
231 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES:
232 queue_properties = pData;
233
234 *pDataSize = sizeof(*queue_properties);
235 if (pData == NULL)
236 return VK_SUCCESS;
237
238 queue_properties->queueFlags = 0;
239 queue_properties->queueCount = 1;
240 queue_properties->maxAtomicCounters = 0;
241 queue_properties->supportsTimestamps = true;
242 queue_properties->maxMemReferences = 256;
243 return VK_SUCCESS;
244
245 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES:
246 memory_properties = pData;
247
248 *pDataSize = sizeof(*memory_properties);
249 if (pData == NULL)
250 return VK_SUCCESS;
251
252 memory_properties->supportsMigration = false;
253 memory_properties->supportsPinning = false;
254 return VK_SUCCESS;
255
256 case VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI:
257 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI");
258
259 *pDataSize = sizeof(*display_properties);
260 if (pData == NULL)
261 return VK_SUCCESS;
262
263 display_properties = pData;
264 display_properties->display = 0;
265 display_properties->physicalResolution = (VkExtent2D) { 0, 0 };
266 return VK_SUCCESS;
267
268 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI:
269 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI");
270 return VK_SUCCESS;
271
272
273 default:
274 return VK_UNSUPPORTED;
275 }
276
277 }
278
279 void * vkGetProcAddr(
280 VkPhysicalDevice physicalDevice,
281 const char* pName)
282 {
283 return anv_lookup_entrypoint(pName);
284 }
285
286 static void
287 parse_debug_flags(struct anv_device *device)
288 {
289 const char *debug, *p, *end;
290
291 debug = getenv("INTEL_DEBUG");
292 device->dump_aub = false;
293 if (debug) {
294 for (p = debug; *p; p = end + 1) {
295 end = strchrnul(p, ',');
296 if (end - p == 3 && memcmp(p, "aub", 3) == 0)
297 device->dump_aub = true;
298 if (end - p == 5 && memcmp(p, "no_hw", 5) == 0)
299 device->no_hw = true;
300 if (*end == '\0')
301 break;
302 }
303 }
304 }
305
306 VkResult anv_CreateDevice(
307 VkPhysicalDevice _physicalDevice,
308 const VkDeviceCreateInfo* pCreateInfo,
309 VkDevice* pDevice)
310 {
311 struct anv_physical_device *physicalDevice =
312 (struct anv_physical_device *) _physicalDevice;
313 struct anv_instance *instance = physicalDevice->instance;
314 struct anv_device *device;
315
316 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
317
318 device = instance->pfnAlloc(instance->pAllocUserData,
319 sizeof(*device), 8,
320 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
321 if (!device)
322 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
323
324 device->no_hw = physicalDevice->no_hw;
325 parse_debug_flags(device);
326
327 device->instance = physicalDevice->instance;
328 device->fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
329 if (device->fd == -1)
330 goto fail_device;
331
332 device->context_id = anv_gem_create_context(device);
333 if (device->context_id == -1)
334 goto fail_fd;
335
336 anv_block_pool_init(&device->dynamic_state_block_pool, device, 2048);
337
338 anv_state_pool_init(&device->dynamic_state_pool,
339 &device->dynamic_state_block_pool);
340
341 anv_block_pool_init(&device->instruction_block_pool, device, 2048);
342 anv_block_pool_init(&device->surface_state_block_pool, device, 2048);
343
344
345 /* Binding table pointers are only 16 bits so we have to make sure that
346 * they get allocated at the beginning of the surface state BO. To
347 * handle this, we create a separate block pool that works out of the
348 * first 64 KB of the surface state BO.
349 */
350 anv_block_pool_init_slave(&device->binding_table_block_pool,
351 &device->surface_state_block_pool, 32);
352
353 anv_state_pool_init(&device->surface_state_pool,
354 &device->surface_state_block_pool);
355
356 device->compiler = anv_compiler_create(device->fd);
357 device->aub_writer = NULL;
358
359 device->info = *physicalDevice->info;
360
361 pthread_mutex_init(&device->mutex, NULL);
362
363 anv_device_init_meta(device);
364
365 *pDevice = (VkDevice) device;
366
367 return VK_SUCCESS;
368
369 fail_fd:
370 close(device->fd);
371 fail_device:
372 anv_device_free(device, device);
373
374 return vk_error(VK_ERROR_UNAVAILABLE);
375 }
376
377 VkResult anv_DestroyDevice(
378 VkDevice _device)
379 {
380 struct anv_device *device = (struct anv_device *) _device;
381
382 anv_compiler_destroy(device->compiler);
383
384 anv_block_pool_finish(&device->dynamic_state_block_pool);
385 anv_block_pool_finish(&device->instruction_block_pool);
386 anv_block_pool_finish(&device->surface_state_block_pool);
387
388 close(device->fd);
389
390 if (device->aub_writer)
391 anv_aub_writer_destroy(device->aub_writer);
392
393 anv_device_free(device, device);
394
395 return VK_SUCCESS;
396 }
397
398 VkResult anv_GetGlobalExtensionInfo(
399 VkExtensionInfoType infoType,
400 uint32_t extensionIndex,
401 size_t* pDataSize,
402 void* pData)
403 {
404 static const VkExtensionProperties extensions[] = {
405 {
406 .extName = "VK_WSI_LunarG",
407 .version = 3
408 }
409 };
410 uint32_t count = ARRAY_SIZE(extensions);
411
412 switch (infoType) {
413 case VK_EXTENSION_INFO_TYPE_COUNT:
414 memcpy(pData, &count, sizeof(count));
415 *pDataSize = sizeof(count);
416 return VK_SUCCESS;
417
418 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
419 if (extensionIndex >= count)
420 return vk_error(VK_ERROR_INVALID_EXTENSION);
421
422 memcpy(pData, &extensions[extensionIndex], sizeof(extensions[0]));
423 *pDataSize = sizeof(extensions[0]);
424 return VK_SUCCESS;
425
426 default:
427 return VK_UNSUPPORTED;
428 }
429 }
430
431 VkResult anv_GetPhysicalDeviceExtensionInfo(
432 VkPhysicalDevice physicalDevice,
433 VkExtensionInfoType infoType,
434 uint32_t extensionIndex,
435 size_t* pDataSize,
436 void* pData)
437 {
438 uint32_t *count;
439
440 switch (infoType) {
441 case VK_EXTENSION_INFO_TYPE_COUNT:
442 *pDataSize = 4;
443 if (pData == NULL)
444 return VK_SUCCESS;
445
446 count = pData;
447 *count = 0;
448 return VK_SUCCESS;
449
450 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
451 return vk_error(VK_ERROR_INVALID_EXTENSION);
452
453 default:
454 return VK_UNSUPPORTED;
455 }
456 }
457
458 VkResult anv_EnumerateLayers(
459 VkPhysicalDevice physicalDevice,
460 size_t maxStringSize,
461 size_t* pLayerCount,
462 char* const* pOutLayers,
463 void* pReserved)
464 {
465 *pLayerCount = 0;
466
467 return VK_SUCCESS;
468 }
469
470 VkResult anv_GetDeviceQueue(
471 VkDevice _device,
472 uint32_t queueNodeIndex,
473 uint32_t queueIndex,
474 VkQueue* pQueue)
475 {
476 struct anv_device *device = (struct anv_device *) _device;
477 struct anv_queue *queue;
478
479 /* FIXME: Should allocate these at device create time. */
480
481 queue = anv_device_alloc(device, sizeof(*queue), 8,
482 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
483 if (queue == NULL)
484 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
485
486 queue->device = device;
487 queue->pool = &device->surface_state_pool;
488
489 queue->completed_serial = anv_state_pool_alloc(queue->pool, 4, 4);
490 *(uint32_t *)queue->completed_serial.map = 0;
491 queue->next_serial = 1;
492
493 *pQueue = (VkQueue) queue;
494
495 return VK_SUCCESS;
496 }
497
498 static const uint32_t BATCH_SIZE = 8192;
499
500 VkResult
501 anv_batch_init(struct anv_batch *batch, struct anv_device *device)
502 {
503 VkResult result;
504
505 result = anv_bo_init_new(&batch->bo, device, BATCH_SIZE);
506 if (result != VK_SUCCESS)
507 return result;
508
509 batch->bo.map =
510 anv_gem_mmap(device, batch->bo.gem_handle, 0, BATCH_SIZE);
511 if (batch->bo.map == NULL) {
512 result = vk_error(VK_ERROR_MEMORY_MAP_FAILED);
513 goto fail_bo;
514 }
515
516 batch->cmd_relocs.num_relocs = 0;
517 batch->next = batch->bo.map;
518
519 return VK_SUCCESS;
520
521 fail_bo:
522 anv_gem_close(device, batch->bo.gem_handle);
523
524 return result;
525
526 }
527
528 void
529 anv_batch_finish(struct anv_batch *batch, struct anv_device *device)
530 {
531 anv_gem_munmap(batch->bo.map, BATCH_SIZE);
532 anv_gem_close(device, batch->bo.gem_handle);
533 }
534
535 void
536 anv_batch_reset(struct anv_batch *batch)
537 {
538 batch->next = batch->bo.map;
539 batch->cmd_relocs.num_relocs = 0;
540 }
541
542 void *
543 anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords)
544 {
545 void *p = batch->next;
546
547 batch->next += num_dwords * 4;
548
549 return p;
550 }
551
552 static void
553 anv_reloc_list_append(struct anv_reloc_list *list,
554 struct anv_reloc_list *other, uint32_t offset)
555 {
556 uint32_t i, count;
557
558 count = list->num_relocs;
559 memcpy(&list->relocs[count], &other->relocs[0],
560 other->num_relocs * sizeof(other->relocs[0]));
561 memcpy(&list->reloc_bos[count], &other->reloc_bos[0],
562 other->num_relocs * sizeof(other->reloc_bos[0]));
563 for (i = 0; i < other->num_relocs; i++)
564 list->relocs[i + count].offset += offset;
565
566 count += other->num_relocs;
567 }
568
569 static uint64_t
570 anv_reloc_list_add(struct anv_reloc_list *list,
571 uint32_t offset,
572 struct anv_bo *target_bo, uint32_t delta)
573 {
574 struct drm_i915_gem_relocation_entry *entry;
575 int index;
576
577 assert(list->num_relocs < ANV_BATCH_MAX_RELOCS);
578
579 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
580 index = list->num_relocs++;
581 list->reloc_bos[index] = target_bo;
582 entry = &list->relocs[index];
583 entry->target_handle = target_bo->gem_handle;
584 entry->delta = delta;
585 entry->offset = offset;
586 entry->presumed_offset = target_bo->offset;
587 entry->read_domains = 0;
588 entry->write_domain = 0;
589
590 return target_bo->offset + delta;
591 }
592
593 void
594 anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other)
595 {
596 uint32_t size, offset;
597
598 size = other->next - other->bo.map;
599 memcpy(batch->next, other->bo.map, size);
600
601 offset = batch->next - batch->bo.map;
602 anv_reloc_list_append(&batch->cmd_relocs, &other->cmd_relocs, offset);
603
604 batch->next += size;
605 }
606
607 uint64_t
608 anv_batch_emit_reloc(struct anv_batch *batch,
609 void *location, struct anv_bo *bo, uint32_t delta)
610 {
611 return anv_reloc_list_add(&batch->cmd_relocs,
612 location - batch->bo.map, bo, delta);
613 }
614
615 VkResult anv_QueueSubmit(
616 VkQueue _queue,
617 uint32_t cmdBufferCount,
618 const VkCmdBuffer* pCmdBuffers,
619 VkFence _fence)
620 {
621 struct anv_queue *queue = (struct anv_queue *) _queue;
622 struct anv_device *device = queue->device;
623 struct anv_fence *fence = (struct anv_fence *) _fence;
624 int ret;
625
626 for (uint32_t i = 0; i < cmdBufferCount; i++) {
627 struct anv_cmd_buffer *cmd_buffer =
628 (struct anv_cmd_buffer *) pCmdBuffers[i];
629
630 if (device->dump_aub)
631 anv_cmd_buffer_dump(cmd_buffer);
632
633 if (!device->no_hw) {
634 ret = anv_gem_execbuffer(device, &cmd_buffer->execbuf);
635 if (ret != 0)
636 return vk_error(VK_ERROR_UNKNOWN);
637
638 if (fence) {
639 ret = anv_gem_execbuffer(device, &fence->execbuf);
640 if (ret != 0)
641 return vk_error(VK_ERROR_UNKNOWN);
642 }
643
644 for (uint32_t i = 0; i < cmd_buffer->bo_count; i++)
645 cmd_buffer->exec2_bos[i]->offset = cmd_buffer->exec2_objects[i].offset;
646 } else {
647 *(uint32_t *)queue->completed_serial.map = cmd_buffer->serial;
648 }
649 }
650
651 return VK_SUCCESS;
652 }
653
654 VkResult anv_QueueAddMemReferences(
655 VkQueue queue,
656 uint32_t count,
657 const VkDeviceMemory* pMems)
658 {
659 return VK_SUCCESS;
660 }
661
662 VkResult anv_QueueRemoveMemReferences(
663 VkQueue queue,
664 uint32_t count,
665 const VkDeviceMemory* pMems)
666 {
667 return VK_SUCCESS;
668 }
669
670 VkResult anv_QueueWaitIdle(
671 VkQueue _queue)
672 {
673 struct anv_queue *queue = (struct anv_queue *) _queue;
674
675 return vkDeviceWaitIdle((VkDevice) queue->device);
676 }
677
678 VkResult anv_DeviceWaitIdle(
679 VkDevice _device)
680 {
681 struct anv_device *device = (struct anv_device *) _device;
682 struct anv_state state;
683 struct anv_batch batch;
684 struct drm_i915_gem_execbuffer2 execbuf;
685 struct drm_i915_gem_exec_object2 exec2_objects[1];
686 struct anv_bo *bo = NULL;
687 VkResult result;
688 int64_t timeout;
689 int ret;
690
691 state = anv_state_pool_alloc(&device->dynamic_state_pool, 32, 32);
692 bo = &device->dynamic_state_pool.block_pool->bo;
693 batch.next = state.map;
694 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
695 anv_batch_emit(&batch, GEN8_MI_NOOP);
696
697 exec2_objects[0].handle = bo->gem_handle;
698 exec2_objects[0].relocation_count = 0;
699 exec2_objects[0].relocs_ptr = 0;
700 exec2_objects[0].alignment = 0;
701 exec2_objects[0].offset = bo->offset;
702 exec2_objects[0].flags = 0;
703 exec2_objects[0].rsvd1 = 0;
704 exec2_objects[0].rsvd2 = 0;
705
706 execbuf.buffers_ptr = (uintptr_t) exec2_objects;
707 execbuf.buffer_count = 1;
708 execbuf.batch_start_offset = state.offset;
709 execbuf.batch_len = batch.next - state.map;
710 execbuf.cliprects_ptr = 0;
711 execbuf.num_cliprects = 0;
712 execbuf.DR1 = 0;
713 execbuf.DR4 = 0;
714
715 execbuf.flags =
716 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
717 execbuf.rsvd1 = device->context_id;
718 execbuf.rsvd2 = 0;
719
720 if (!device->no_hw) {
721 ret = anv_gem_execbuffer(device, &execbuf);
722 if (ret != 0) {
723 result = vk_error(VK_ERROR_UNKNOWN);
724 goto fail;
725 }
726
727 timeout = INT64_MAX;
728 ret = anv_gem_wait(device, bo->gem_handle, &timeout);
729 if (ret != 0) {
730 result = vk_error(VK_ERROR_UNKNOWN);
731 goto fail;
732 }
733 }
734
735 anv_state_pool_free(&device->dynamic_state_pool, state);
736
737 return VK_SUCCESS;
738
739 fail:
740 anv_state_pool_free(&device->dynamic_state_pool, state);
741
742 return result;
743 }
744
745 void *
746 anv_device_alloc(struct anv_device * device,
747 size_t size,
748 size_t alignment,
749 VkSystemAllocType allocType)
750 {
751 return device->instance->pfnAlloc(device->instance->pAllocUserData,
752 size,
753 alignment,
754 allocType);
755 }
756
757 void
758 anv_device_free(struct anv_device * device,
759 void * mem)
760 {
761 return device->instance->pfnFree(device->instance->pAllocUserData,
762 mem);
763 }
764
765 VkResult
766 anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size)
767 {
768 bo->gem_handle = anv_gem_create(device, size);
769 if (!bo->gem_handle)
770 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY);
771
772 bo->map = NULL;
773 bo->index = 0;
774 bo->offset = 0;
775 bo->size = size;
776
777 return VK_SUCCESS;
778 }
779
780 VkResult anv_AllocMemory(
781 VkDevice _device,
782 const VkMemoryAllocInfo* pAllocInfo,
783 VkDeviceMemory* pMem)
784 {
785 struct anv_device *device = (struct anv_device *) _device;
786 struct anv_device_memory *mem;
787 VkResult result;
788
789 assert(pAllocInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
790
791 mem = anv_device_alloc(device, sizeof(*mem), 8,
792 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
793 if (mem == NULL)
794 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
795
796 result = anv_bo_init_new(&mem->bo, device, pAllocInfo->allocationSize);
797 if (result != VK_SUCCESS)
798 goto fail;
799
800 *pMem = (VkDeviceMemory) mem;
801
802 return VK_SUCCESS;
803
804 fail:
805 anv_device_free(device, mem);
806
807 return result;
808 }
809
810 VkResult anv_FreeMemory(
811 VkDevice _device,
812 VkDeviceMemory _mem)
813 {
814 struct anv_device *device = (struct anv_device *) _device;
815 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
816
817 if (mem->bo.map)
818 anv_gem_munmap(mem->bo.map, mem->bo.size);
819
820 if (mem->bo.gem_handle != 0)
821 anv_gem_close(device, mem->bo.gem_handle);
822
823 anv_device_free(device, mem);
824
825 return VK_SUCCESS;
826 }
827
828 VkResult anv_SetMemoryPriority(
829 VkDevice device,
830 VkDeviceMemory mem,
831 VkMemoryPriority priority)
832 {
833 return VK_SUCCESS;
834 }
835
836 VkResult anv_MapMemory(
837 VkDevice _device,
838 VkDeviceMemory _mem,
839 VkDeviceSize offset,
840 VkDeviceSize size,
841 VkMemoryMapFlags flags,
842 void** ppData)
843 {
844 struct anv_device *device = (struct anv_device *) _device;
845 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
846
847 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
848 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
849 * at a time is valid. We could just mmap up front and return an offset
850 * pointer here, but that may exhaust virtual memory on 32 bit
851 * userspace. */
852
853 mem->map = anv_gem_mmap(device, mem->bo.gem_handle, offset, size);
854 mem->map_size = size;
855
856 *ppData = mem->map;
857
858 return VK_SUCCESS;
859 }
860
861 VkResult anv_UnmapMemory(
862 VkDevice _device,
863 VkDeviceMemory _mem)
864 {
865 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
866
867 anv_gem_munmap(mem->map, mem->map_size);
868
869 return VK_SUCCESS;
870 }
871
872 VkResult anv_FlushMappedMemory(
873 VkDevice device,
874 VkDeviceMemory mem,
875 VkDeviceSize offset,
876 VkDeviceSize size)
877 {
878 /* clflush here for !llc platforms */
879
880 return VK_SUCCESS;
881 }
882
883 VkResult anv_PinSystemMemory(
884 VkDevice device,
885 const void* pSysMem,
886 size_t memSize,
887 VkDeviceMemory* pMem)
888 {
889 return VK_SUCCESS;
890 }
891
892 VkResult anv_GetMultiDeviceCompatibility(
893 VkPhysicalDevice physicalDevice0,
894 VkPhysicalDevice physicalDevice1,
895 VkPhysicalDeviceCompatibilityInfo* pInfo)
896 {
897 return VK_UNSUPPORTED;
898 }
899
900 VkResult anv_OpenSharedMemory(
901 VkDevice device,
902 const VkMemoryOpenInfo* pOpenInfo,
903 VkDeviceMemory* pMem)
904 {
905 return VK_UNSUPPORTED;
906 }
907
908 VkResult anv_OpenSharedSemaphore(
909 VkDevice device,
910 const VkSemaphoreOpenInfo* pOpenInfo,
911 VkSemaphore* pSemaphore)
912 {
913 return VK_UNSUPPORTED;
914 }
915
916 VkResult anv_OpenPeerMemory(
917 VkDevice device,
918 const VkPeerMemoryOpenInfo* pOpenInfo,
919 VkDeviceMemory* pMem)
920 {
921 return VK_UNSUPPORTED;
922 }
923
924 VkResult anv_OpenPeerImage(
925 VkDevice device,
926 const VkPeerImageOpenInfo* pOpenInfo,
927 VkImage* pImage,
928 VkDeviceMemory* pMem)
929 {
930 return VK_UNSUPPORTED;
931 }
932
933 static VkResult
934 anv_instance_destructor(struct anv_device * device,
935 VkObject object)
936 {
937 return vkDestroyInstance(object);
938 }
939
940 static VkResult
941 anv_noop_destructor(struct anv_device * device,
942 VkObject object)
943 {
944 return VK_SUCCESS;
945 }
946
947 static VkResult
948 anv_device_destructor(struct anv_device * device,
949 VkObject object)
950 {
951 return vkDestroyDevice(object);
952 }
953
954 static VkResult
955 anv_cmd_buffer_destructor(struct anv_device * device,
956 VkObject object)
957 {
958 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) object;
959
960 anv_gem_munmap(cmd_buffer->surface_bo.map, BATCH_SIZE);
961 anv_gem_close(device, cmd_buffer->surface_bo.gem_handle);
962 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
963 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
964 anv_state_stream_finish(&cmd_buffer->binding_table_state_stream);
965 anv_batch_finish(&cmd_buffer->batch, device);
966 anv_device_free(device, cmd_buffer->exec2_objects);
967 anv_device_free(device, cmd_buffer->exec2_bos);
968 anv_device_free(device, cmd_buffer);
969
970 return VK_SUCCESS;
971 }
972
973 static VkResult
974 anv_pipeline_destructor(struct anv_device * device,
975 VkObject object)
976 {
977 struct anv_pipeline *pipeline = (struct anv_pipeline *) object;
978
979 return anv_pipeline_destroy(pipeline);
980 }
981
982 static VkResult
983 anv_free_destructor(struct anv_device * device,
984 VkObject object)
985 {
986 anv_device_free(device, (void *) object);
987
988 return VK_SUCCESS;
989 }
990
991 static VkResult
992 anv_fence_destructor(struct anv_device * device,
993 VkObject object)
994 {
995 struct anv_fence *fence = (struct anv_fence *) object;
996
997 anv_gem_munmap(fence->bo.map, fence->bo.size);
998 anv_gem_close(device, fence->bo.gem_handle);
999 anv_device_free(device, fence);
1000
1001 return VK_SUCCESS;
1002 }
1003
1004 static VkResult
1005 anv_query_pool_destructor(struct anv_device * device,
1006 VkObject object)
1007 {
1008 struct anv_query_pool *pool = (struct anv_query_pool *) object;
1009
1010 anv_gem_munmap(pool->bo.map, pool->bo.size);
1011 anv_gem_close(device, pool->bo.gem_handle);
1012 anv_device_free(device, pool);
1013
1014 return VK_SUCCESS;
1015 }
1016
1017 static VkResult (*anv_object_destructors[])(struct anv_device *device,
1018 VkObject object) = {
1019 [VK_OBJECT_TYPE_INSTANCE] = anv_instance_destructor,
1020 [VK_OBJECT_TYPE_PHYSICAL_DEVICE] = anv_noop_destructor,
1021 [VK_OBJECT_TYPE_DEVICE] = anv_device_destructor,
1022 [VK_OBJECT_TYPE_QUEUE] = anv_noop_destructor,
1023 [VK_OBJECT_TYPE_COMMAND_BUFFER] = anv_cmd_buffer_destructor,
1024 [VK_OBJECT_TYPE_PIPELINE] = anv_pipeline_destructor,
1025 [VK_OBJECT_TYPE_SHADER] = anv_free_destructor,
1026 [VK_OBJECT_TYPE_BUFFER] = anv_free_destructor,
1027 [VK_OBJECT_TYPE_IMAGE] = anv_free_destructor,
1028 [VK_OBJECT_TYPE_RENDER_PASS] = anv_free_destructor,
1029 [VK_OBJECT_TYPE_FENCE] = anv_fence_destructor,
1030 [VK_OBJECT_TYPE_QUERY_POOL] = anv_query_pool_destructor
1031 };
1032
1033 VkResult anv_DestroyObject(
1034 VkDevice _device,
1035 VkObjectType objType,
1036 VkObject object)
1037 {
1038 struct anv_device *device = (struct anv_device *) _device;
1039
1040 assert(objType < ARRAY_SIZE(anv_object_destructors) &&
1041 anv_object_destructors[objType] != NULL);
1042
1043 return anv_object_destructors[objType](device, object);
1044 }
1045
1046 static void
1047 fill_memory_requirements(
1048 VkObjectType objType,
1049 VkObject object,
1050 VkMemoryRequirements * memory_requirements)
1051 {
1052 struct anv_buffer *buffer;
1053 struct anv_image *image;
1054
1055 memory_requirements->memPropsAllowed =
1056 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
1057 VK_MEMORY_PROPERTY_HOST_DEVICE_COHERENT_BIT |
1058 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1059 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT |
1060 VK_MEMORY_PROPERTY_PREFER_HOST_LOCAL |
1061 VK_MEMORY_PROPERTY_SHAREABLE_BIT;
1062
1063 memory_requirements->memPropsRequired = 0;
1064
1065 switch (objType) {
1066 case VK_OBJECT_TYPE_BUFFER:
1067 buffer = (struct anv_buffer *) object;
1068 memory_requirements->size = buffer->size;
1069 memory_requirements->alignment = 16;
1070 break;
1071 case VK_OBJECT_TYPE_IMAGE:
1072 image = (struct anv_image *) object;
1073 memory_requirements->size = image->size;
1074 memory_requirements->alignment = image->alignment;
1075 break;
1076 default:
1077 memory_requirements->size = 0;
1078 break;
1079 }
1080 }
1081
1082 static uint32_t
1083 get_allocation_count(VkObjectType objType)
1084 {
1085 switch (objType) {
1086 case VK_OBJECT_TYPE_BUFFER:
1087 case VK_OBJECT_TYPE_IMAGE:
1088 return 1;
1089 default:
1090 return 0;
1091 }
1092 }
1093
1094 VkResult anv_GetObjectInfo(
1095 VkDevice _device,
1096 VkObjectType objType,
1097 VkObject object,
1098 VkObjectInfoType infoType,
1099 size_t* pDataSize,
1100 void* pData)
1101 {
1102 VkMemoryRequirements memory_requirements;
1103 uint32_t *count;
1104
1105 switch (infoType) {
1106 case VK_OBJECT_INFO_TYPE_MEMORY_REQUIREMENTS:
1107 *pDataSize = sizeof(memory_requirements);
1108 if (pData == NULL)
1109 return VK_SUCCESS;
1110
1111 fill_memory_requirements(objType, object, pData);
1112 return VK_SUCCESS;
1113
1114 case VK_OBJECT_INFO_TYPE_MEMORY_ALLOCATION_COUNT:
1115 *pDataSize = sizeof(count);
1116 if (pData == NULL)
1117 return VK_SUCCESS;
1118
1119 count = pData;
1120 *count = get_allocation_count(objType);
1121 return VK_SUCCESS;
1122
1123 default:
1124 return VK_UNSUPPORTED;
1125 }
1126
1127 }
1128
1129 VkResult anv_QueueBindObjectMemory(
1130 VkQueue queue,
1131 VkObjectType objType,
1132 VkObject object,
1133 uint32_t allocationIdx,
1134 VkDeviceMemory _mem,
1135 VkDeviceSize memOffset)
1136 {
1137 struct anv_buffer *buffer;
1138 struct anv_image *image;
1139 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
1140
1141 switch (objType) {
1142 case VK_OBJECT_TYPE_BUFFER:
1143 buffer = (struct anv_buffer *) object;
1144 buffer->bo = &mem->bo;
1145 buffer->offset = memOffset;
1146 break;
1147 case VK_OBJECT_TYPE_IMAGE:
1148 image = (struct anv_image *) object;
1149 image->bo = &mem->bo;
1150 image->offset = memOffset;
1151 break;
1152 default:
1153 break;
1154 }
1155
1156 return VK_SUCCESS;
1157 }
1158
1159 VkResult anv_QueueBindObjectMemoryRange(
1160 VkQueue queue,
1161 VkObjectType objType,
1162 VkObject object,
1163 uint32_t allocationIdx,
1164 VkDeviceSize rangeOffset,
1165 VkDeviceSize rangeSize,
1166 VkDeviceMemory mem,
1167 VkDeviceSize memOffset)
1168 {
1169 stub_return(VK_UNSUPPORTED);
1170 }
1171
1172 VkResult anv_QueueBindImageMemoryRange(
1173 VkQueue queue,
1174 VkImage image,
1175 uint32_t allocationIdx,
1176 const VkImageMemoryBindInfo* pBindInfo,
1177 VkDeviceMemory mem,
1178 VkDeviceSize memOffset)
1179 {
1180 stub_return(VK_UNSUPPORTED);
1181 }
1182
1183 VkResult anv_CreateFence(
1184 VkDevice _device,
1185 const VkFenceCreateInfo* pCreateInfo,
1186 VkFence* pFence)
1187 {
1188 struct anv_device *device = (struct anv_device *) _device;
1189 struct anv_fence *fence;
1190 struct anv_batch batch;
1191 VkResult result;
1192
1193 const uint32_t fence_size = 128;
1194
1195 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FENCE_CREATE_INFO);
1196
1197 fence = anv_device_alloc(device, sizeof(*fence), 8,
1198 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1199 if (fence == NULL)
1200 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1201
1202 result = anv_bo_init_new(&fence->bo, device, fence_size);
1203 if (result != VK_SUCCESS)
1204 goto fail;
1205
1206 fence->bo.map =
1207 anv_gem_mmap(device, fence->bo.gem_handle, 0, fence->bo.size);
1208 batch.next = fence->bo.map;
1209 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
1210 anv_batch_emit(&batch, GEN8_MI_NOOP);
1211
1212 fence->exec2_objects[0].handle = fence->bo.gem_handle;
1213 fence->exec2_objects[0].relocation_count = 0;
1214 fence->exec2_objects[0].relocs_ptr = 0;
1215 fence->exec2_objects[0].alignment = 0;
1216 fence->exec2_objects[0].offset = fence->bo.offset;
1217 fence->exec2_objects[0].flags = 0;
1218 fence->exec2_objects[0].rsvd1 = 0;
1219 fence->exec2_objects[0].rsvd2 = 0;
1220
1221 fence->execbuf.buffers_ptr = (uintptr_t) fence->exec2_objects;
1222 fence->execbuf.buffer_count = 1;
1223 fence->execbuf.batch_start_offset = 0;
1224 fence->execbuf.batch_len = batch.next - fence->bo.map;
1225 fence->execbuf.cliprects_ptr = 0;
1226 fence->execbuf.num_cliprects = 0;
1227 fence->execbuf.DR1 = 0;
1228 fence->execbuf.DR4 = 0;
1229
1230 fence->execbuf.flags =
1231 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
1232 fence->execbuf.rsvd1 = device->context_id;
1233 fence->execbuf.rsvd2 = 0;
1234
1235 *pFence = (VkQueryPool) fence;
1236
1237 return VK_SUCCESS;
1238
1239 fail:
1240 anv_device_free(device, fence);
1241
1242 return result;
1243 }
1244
1245 VkResult anv_ResetFences(
1246 VkDevice _device,
1247 uint32_t fenceCount,
1248 VkFence* pFences)
1249 {
1250 struct anv_fence **fences = (struct anv_fence **) pFences;
1251
1252 for (uint32_t i; i < fenceCount; i++)
1253 fences[i]->ready = false;
1254
1255 return VK_SUCCESS;
1256 }
1257
1258 VkResult anv_GetFenceStatus(
1259 VkDevice _device,
1260 VkFence _fence)
1261 {
1262 struct anv_device *device = (struct anv_device *) _device;
1263 struct anv_fence *fence = (struct anv_fence *) _fence;
1264 int64_t t = 0;
1265 int ret;
1266
1267 if (fence->ready)
1268 return VK_SUCCESS;
1269
1270 ret = anv_gem_wait(device, fence->bo.gem_handle, &t);
1271 if (ret == 0) {
1272 fence->ready = true;
1273 return VK_SUCCESS;
1274 }
1275
1276 return VK_NOT_READY;
1277 }
1278
1279 VkResult anv_WaitForFences(
1280 VkDevice _device,
1281 uint32_t fenceCount,
1282 const VkFence* pFences,
1283 bool32_t waitAll,
1284 uint64_t timeout)
1285 {
1286 struct anv_device *device = (struct anv_device *) _device;
1287 struct anv_fence **fences = (struct anv_fence **) pFences;
1288 int64_t t = timeout;
1289 int ret;
1290
1291 /* FIXME: handle !waitAll */
1292
1293 for (uint32_t i = 0; i < fenceCount; i++) {
1294 ret = anv_gem_wait(device, fences[i]->bo.gem_handle, &t);
1295 if (ret == -1 && errno == ETIME)
1296 return VK_TIMEOUT;
1297 else if (ret == -1)
1298 return vk_error(VK_ERROR_UNKNOWN);
1299 }
1300
1301 return VK_SUCCESS;
1302 }
1303
1304 // Queue semaphore functions
1305
1306 VkResult anv_CreateSemaphore(
1307 VkDevice device,
1308 const VkSemaphoreCreateInfo* pCreateInfo,
1309 VkSemaphore* pSemaphore)
1310 {
1311 stub_return(VK_UNSUPPORTED);
1312 }
1313
1314 VkResult anv_QueueSignalSemaphore(
1315 VkQueue queue,
1316 VkSemaphore semaphore)
1317 {
1318 stub_return(VK_UNSUPPORTED);
1319 }
1320
1321 VkResult anv_QueueWaitSemaphore(
1322 VkQueue queue,
1323 VkSemaphore semaphore)
1324 {
1325 stub_return(VK_UNSUPPORTED);
1326 }
1327
1328 // Event functions
1329
1330 VkResult anv_CreateEvent(
1331 VkDevice device,
1332 const VkEventCreateInfo* pCreateInfo,
1333 VkEvent* pEvent)
1334 {
1335 stub_return(VK_UNSUPPORTED);
1336 }
1337
1338 VkResult anv_GetEventStatus(
1339 VkDevice device,
1340 VkEvent event)
1341 {
1342 stub_return(VK_UNSUPPORTED);
1343 }
1344
1345 VkResult anv_SetEvent(
1346 VkDevice device,
1347 VkEvent event)
1348 {
1349 stub_return(VK_UNSUPPORTED);
1350 }
1351
1352 VkResult anv_ResetEvent(
1353 VkDevice device,
1354 VkEvent event)
1355 {
1356 stub_return(VK_UNSUPPORTED);
1357 }
1358
1359 // Query functions
1360
1361 VkResult anv_CreateQueryPool(
1362 VkDevice _device,
1363 const VkQueryPoolCreateInfo* pCreateInfo,
1364 VkQueryPool* pQueryPool)
1365 {
1366 struct anv_device *device = (struct anv_device *) _device;
1367 struct anv_query_pool *pool;
1368 VkResult result;
1369 size_t size;
1370
1371 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
1372
1373 switch (pCreateInfo->queryType) {
1374 case VK_QUERY_TYPE_OCCLUSION:
1375 break;
1376 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
1377 return VK_UNSUPPORTED;
1378 default:
1379 unreachable("");
1380 }
1381
1382 pool = anv_device_alloc(device, sizeof(*pool), 8,
1383 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1384 if (pool == NULL)
1385 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1386
1387 pool->type = pCreateInfo->queryType;
1388 size = pCreateInfo->slots * sizeof(struct anv_query_pool_slot);
1389 result = anv_bo_init_new(&pool->bo, device, size);
1390 if (result != VK_SUCCESS)
1391 goto fail;
1392
1393 pool->bo.map = anv_gem_mmap(device, pool->bo.gem_handle, 0, size);
1394
1395 *pQueryPool = (VkQueryPool) pool;
1396
1397 return VK_SUCCESS;
1398
1399 fail:
1400 anv_device_free(device, pool);
1401
1402 return result;
1403 }
1404
1405 VkResult anv_GetQueryPoolResults(
1406 VkDevice _device,
1407 VkQueryPool queryPool,
1408 uint32_t startQuery,
1409 uint32_t queryCount,
1410 size_t* pDataSize,
1411 void* pData,
1412 VkQueryResultFlags flags)
1413 {
1414 struct anv_device *device = (struct anv_device *) _device;
1415 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
1416 struct anv_query_pool_slot *slot = pool->bo.map;
1417 int64_t timeout = INT64_MAX;
1418 uint32_t *dst32 = pData;
1419 uint64_t *dst64 = pData;
1420 uint64_t result;
1421 int ret;
1422
1423 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
1424 /* Where is the availabilty info supposed to go? */
1425 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
1426 return VK_UNSUPPORTED;
1427 }
1428
1429 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
1430
1431 if (flags & VK_QUERY_RESULT_64_BIT)
1432 *pDataSize = queryCount * sizeof(uint64_t);
1433 else
1434 *pDataSize = queryCount * sizeof(uint32_t);
1435
1436 if (pData == NULL)
1437 return VK_SUCCESS;
1438
1439 if (flags & VK_QUERY_RESULT_WAIT_BIT) {
1440 ret = anv_gem_wait(device, pool->bo.gem_handle, &timeout);
1441 if (ret == -1)
1442 return vk_error(VK_ERROR_UNKNOWN);
1443 }
1444
1445 for (uint32_t i = 0; i < queryCount; i++) {
1446 result = slot[startQuery + i].end - slot[startQuery + i].begin;
1447 if (flags & VK_QUERY_RESULT_64_BIT) {
1448 *dst64++ = result;
1449 } else {
1450 if (result > UINT32_MAX)
1451 result = UINT32_MAX;
1452 *dst32++ = result;
1453 }
1454 }
1455
1456 return VK_SUCCESS;
1457 }
1458
1459 // Buffer functions
1460
1461 VkResult anv_CreateBuffer(
1462 VkDevice _device,
1463 const VkBufferCreateInfo* pCreateInfo,
1464 VkBuffer* pBuffer)
1465 {
1466 struct anv_device *device = (struct anv_device *) _device;
1467 struct anv_buffer *buffer;
1468
1469 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1470
1471 buffer = anv_device_alloc(device, sizeof(*buffer), 8,
1472 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1473 if (buffer == NULL)
1474 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1475
1476 buffer->size = pCreateInfo->size;
1477 buffer->bo = NULL;
1478 buffer->offset = 0;
1479
1480 *pBuffer = (VkBuffer) buffer;
1481
1482 return VK_SUCCESS;
1483 }
1484
1485 // Buffer view functions
1486
1487 VkResult anv_CreateBufferView(
1488 VkDevice _device,
1489 const VkBufferViewCreateInfo* pCreateInfo,
1490 VkBufferView* pView)
1491 {
1492 struct anv_device *device = (struct anv_device *) _device;
1493 struct anv_buffer *buffer = (struct anv_buffer *) pCreateInfo->buffer;
1494 struct anv_surface_view *view;
1495 const struct anv_format *format;
1496
1497 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO);
1498
1499 view = anv_device_alloc(device, sizeof(*view), 8,
1500 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1501 if (view == NULL)
1502 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1503
1504 view->bo = buffer->bo;
1505 view->offset = buffer->offset + pCreateInfo->offset;
1506 view->surface_state =
1507 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1508 view->format = pCreateInfo->format;
1509
1510 format = anv_format_for_vk_format(pCreateInfo->format);
1511 /* This assumes RGBA float format. */
1512 uint32_t stride = 4;
1513 uint32_t num_elements = pCreateInfo->range / stride;
1514 struct GEN8_RENDER_SURFACE_STATE surface_state = {
1515 .SurfaceType = SURFTYPE_BUFFER,
1516 .SurfaceArray = false,
1517 .SurfaceFormat = format->format,
1518 .SurfaceVerticalAlignment = VALIGN4,
1519 .SurfaceHorizontalAlignment = HALIGN4,
1520 .TileMode = LINEAR,
1521 .VerticalLineStride = 0,
1522 .VerticalLineStrideOffset = 0,
1523 .SamplerL2BypassModeDisable = true,
1524 .RenderCacheReadWriteMode = WriteOnlyCache,
1525 .MemoryObjectControlState = 0, /* FIXME: MOCS */
1526 .BaseMipLevel = 0,
1527 .SurfaceQPitch = 0,
1528 .Height = (num_elements >> 7) & 0x3fff,
1529 .Width = num_elements & 0x7f,
1530 .Depth = (num_elements >> 21) & 0x3f,
1531 .SurfacePitch = stride - 1,
1532 .MinimumArrayElement = 0,
1533 .NumberofMultisamples = MULTISAMPLECOUNT_1,
1534 .XOffset = 0,
1535 .YOffset = 0,
1536 .SurfaceMinLOD = 0,
1537 .MIPCountLOD = 0,
1538 .AuxiliarySurfaceMode = AUX_NONE,
1539 .RedClearColor = 0,
1540 .GreenClearColor = 0,
1541 .BlueClearColor = 0,
1542 .AlphaClearColor = 0,
1543 .ShaderChannelSelectRed = SCS_RED,
1544 .ShaderChannelSelectGreen = SCS_GREEN,
1545 .ShaderChannelSelectBlue = SCS_BLUE,
1546 .ShaderChannelSelectAlpha = SCS_ALPHA,
1547 .ResourceMinLOD = 0,
1548 /* FIXME: We assume that the image must be bound at this time. */
1549 .SurfaceBaseAddress = { NULL, view->offset },
1550 };
1551
1552 GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
1553
1554 *pView = (VkImageView) view;
1555
1556 return VK_SUCCESS;
1557 }
1558
1559 // Sampler functions
1560
1561 VkResult anv_CreateSampler(
1562 VkDevice _device,
1563 const VkSamplerCreateInfo* pCreateInfo,
1564 VkSampler* pSampler)
1565 {
1566 struct anv_device *device = (struct anv_device *) _device;
1567 struct anv_sampler *sampler;
1568
1569 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
1570
1571 sampler = anv_device_alloc(device, sizeof(*sampler), 8,
1572 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1573 if (!sampler)
1574 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1575
1576 static const uint32_t vk_to_gen_tex_filter[] = {
1577 [VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
1578 [VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
1579 };
1580
1581 static const uint32_t vk_to_gen_mipmap_mode[] = {
1582 [VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
1583 [VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
1584 [VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
1585 };
1586
1587 static const uint32_t vk_to_gen_tex_address[] = {
1588 [VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
1589 [VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
1590 [VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
1591 [VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
1592 [VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
1593 };
1594
1595 static const uint32_t vk_to_gen_compare_op[] = {
1596 [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
1597 [VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
1598 [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
1599 [VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
1600 [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
1601 [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
1602 [VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
1603 [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
1604 };
1605
1606 if (pCreateInfo->maxAnisotropy > 0)
1607 anv_finishme("missing support for anisotropic filtering");
1608
1609 struct GEN8_SAMPLER_STATE sampler_state = {
1610 .SamplerDisable = false,
1611 .TextureBorderColorMode = DX10OGL,
1612 .LODPreClampMode = 0,
1613 .BaseMipLevel = 0,
1614 .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
1615 .MagModeFilter = vk_to_gen_tex_filter[pCreateInfo->magFilter],
1616 .MinModeFilter = vk_to_gen_tex_filter[pCreateInfo->minFilter],
1617 .TextureLODBias = pCreateInfo->mipLodBias * 256,
1618 .AnisotropicAlgorithm = EWAApproximation,
1619 .MinLOD = pCreateInfo->minLod * 256,
1620 .MaxLOD = pCreateInfo->maxLod * 256,
1621 .ChromaKeyEnable = 0,
1622 .ChromaKeyIndex = 0,
1623 .ChromaKeyMode = 0,
1624 .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
1625 .CubeSurfaceControlMode = 0,
1626 .IndirectStatePointer = 0,
1627 .LODClampMagnificationMode = MIPNONE,
1628 .MaximumAnisotropy = 0,
1629 .RAddressMinFilterRoundingEnable = 0,
1630 .RAddressMagFilterRoundingEnable = 0,
1631 .VAddressMinFilterRoundingEnable = 0,
1632 .VAddressMagFilterRoundingEnable = 0,
1633 .UAddressMinFilterRoundingEnable = 0,
1634 .UAddressMagFilterRoundingEnable = 0,
1635 .TrilinearFilterQuality = 0,
1636 .NonnormalizedCoordinateEnable = 0,
1637 .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
1638 .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
1639 .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
1640 };
1641
1642 GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
1643
1644 *pSampler = (VkSampler) sampler;
1645
1646 return VK_SUCCESS;
1647 }
1648
1649 // Descriptor set functions
1650
1651 VkResult anv_CreateDescriptorSetLayout(
1652 VkDevice _device,
1653 const VkDescriptorSetLayoutCreateInfo* pCreateInfo,
1654 VkDescriptorSetLayout* pSetLayout)
1655 {
1656 struct anv_device *device = (struct anv_device *) _device;
1657 struct anv_descriptor_set_layout *set_layout;
1658
1659 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO);
1660
1661 uint32_t sampler_count[VK_NUM_SHADER_STAGE] = { 0, };
1662 uint32_t surface_count[VK_NUM_SHADER_STAGE] = { 0, };
1663 uint32_t num_dynamic_buffers = 0;
1664 uint32_t count = 0;
1665 uint32_t s;
1666
1667 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1668 switch (pCreateInfo->pBinding[i].descriptorType) {
1669 case VK_DESCRIPTOR_TYPE_SAMPLER:
1670 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1671 sampler_count[s] += pCreateInfo->pBinding[i].count;
1672 break;
1673
1674 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1675 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1676 sampler_count[s] += pCreateInfo->pBinding[i].count;
1677
1678 /* fall through */
1679
1680 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1681 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1682 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1683 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1684 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1685 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1686 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1687 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1688 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1689 surface_count[s] += pCreateInfo->pBinding[i].count;
1690 break;
1691 default:
1692 break;
1693 }
1694
1695 count += pCreateInfo->pBinding[i].count;
1696 }
1697
1698 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1699 switch (pCreateInfo->pBinding[i].descriptorType) {
1700 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1701 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1702 num_dynamic_buffers++;
1703 break;
1704 default:
1705 break;
1706 }
1707 }
1708
1709 uint32_t sampler_total = 0;
1710 uint32_t surface_total = 0;
1711 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1712 sampler_total += sampler_count[s];
1713 surface_total += surface_count[s];
1714 }
1715
1716 size_t size = sizeof(*set_layout) +
1717 (sampler_total + surface_total) * sizeof(uint32_t);
1718 set_layout = anv_device_alloc(device, size, 8,
1719 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1720 if (!set_layout)
1721 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1722
1723 set_layout->num_dynamic_buffers = num_dynamic_buffers;
1724 set_layout->count = count;
1725
1726 uint32_t *p = set_layout->entries;
1727 uint32_t *sampler[VK_NUM_SHADER_STAGE];
1728 uint32_t *surface[VK_NUM_SHADER_STAGE];
1729 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1730 set_layout->stage[s].surface_count = surface_count[s];
1731 set_layout->stage[s].surface_start = surface[s] = p;
1732 p += surface_count[s];
1733 set_layout->stage[s].sampler_count = sampler_count[s];
1734 set_layout->stage[s].sampler_start = sampler[s] = p;
1735 p += sampler_count[s];
1736 }
1737
1738 uint32_t descriptor = 0;
1739 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1740 switch (pCreateInfo->pBinding[i].descriptorType) {
1741 case VK_DESCRIPTOR_TYPE_SAMPLER:
1742 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1743 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++)
1744 *(sampler[s])++ = descriptor + j;
1745 break;
1746
1747 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1748 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1749 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++)
1750 *(sampler[s])++ = descriptor + j;
1751
1752 /* fallthrough */
1753
1754 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1755 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1756 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1757 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1758 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1759 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1760 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1761 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1762 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1763 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++) {
1764 *(surface[s])++ = descriptor + j;
1765 }
1766 break;
1767 default:
1768 unreachable("");
1769 }
1770 descriptor += pCreateInfo->pBinding[i].count;
1771 }
1772
1773 *pSetLayout = (VkDescriptorSetLayout) set_layout;
1774
1775 return VK_SUCCESS;
1776 }
1777
1778 VkResult anv_BeginDescriptorPoolUpdate(
1779 VkDevice device,
1780 VkDescriptorUpdateMode updateMode)
1781 {
1782 return VK_SUCCESS;
1783 }
1784
1785 VkResult anv_EndDescriptorPoolUpdate(
1786 VkDevice device,
1787 VkCmdBuffer cmd)
1788 {
1789 return VK_SUCCESS;
1790 }
1791
1792 VkResult anv_CreateDescriptorPool(
1793 VkDevice device,
1794 VkDescriptorPoolUsage poolUsage,
1795 uint32_t maxSets,
1796 const VkDescriptorPoolCreateInfo* pCreateInfo,
1797 VkDescriptorPool* pDescriptorPool)
1798 {
1799 *pDescriptorPool = 1;
1800
1801 return VK_SUCCESS;
1802 }
1803
1804 VkResult anv_ResetDescriptorPool(
1805 VkDevice device,
1806 VkDescriptorPool descriptorPool)
1807 {
1808 return VK_SUCCESS;
1809 }
1810
1811 VkResult anv_AllocDescriptorSets(
1812 VkDevice _device,
1813 VkDescriptorPool descriptorPool,
1814 VkDescriptorSetUsage setUsage,
1815 uint32_t count,
1816 const VkDescriptorSetLayout* pSetLayouts,
1817 VkDescriptorSet* pDescriptorSets,
1818 uint32_t* pCount)
1819 {
1820 struct anv_device *device = (struct anv_device *) _device;
1821 const struct anv_descriptor_set_layout *layout;
1822 struct anv_descriptor_set *set;
1823 size_t size;
1824
1825 for (uint32_t i = 0; i < count; i++) {
1826 layout = (struct anv_descriptor_set_layout *) pSetLayouts[i];
1827 size = sizeof(*set) + layout->count * sizeof(set->descriptors[0]);
1828 set = anv_device_alloc(device, size, 8,
1829 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1830 if (!set) {
1831 *pCount = i;
1832 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1833 }
1834
1835 /* Descriptor sets may not be 100% filled out so we need to memset to
1836 * ensure that we can properly detect and handle holes.
1837 */
1838 memset(set, 0, size);
1839
1840 pDescriptorSets[i] = (VkDescriptorSet) set;
1841 }
1842
1843 *pCount = count;
1844
1845 return VK_SUCCESS;
1846 }
1847
1848 void anv_ClearDescriptorSets(
1849 VkDevice device,
1850 VkDescriptorPool descriptorPool,
1851 uint32_t count,
1852 const VkDescriptorSet* pDescriptorSets)
1853 {
1854 }
1855
1856 void anv_UpdateDescriptors(
1857 VkDevice _device,
1858 VkDescriptorSet descriptorSet,
1859 uint32_t updateCount,
1860 const void** ppUpdateArray)
1861 {
1862 struct anv_descriptor_set *set = (struct anv_descriptor_set *) descriptorSet;
1863 VkUpdateSamplers *update_samplers;
1864 VkUpdateSamplerTextures *update_sampler_textures;
1865 VkUpdateImages *update_images;
1866 VkUpdateBuffers *update_buffers;
1867 VkUpdateAsCopy *update_as_copy;
1868
1869 for (uint32_t i = 0; i < updateCount; i++) {
1870 const struct anv_common *common = ppUpdateArray[i];
1871
1872 switch (common->sType) {
1873 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS:
1874 update_samplers = (VkUpdateSamplers *) common;
1875
1876 for (uint32_t j = 0; j < update_samplers->count; j++) {
1877 set->descriptors[update_samplers->binding + j].sampler =
1878 (struct anv_sampler *) update_samplers->pSamplers[j];
1879 }
1880 break;
1881
1882 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES:
1883 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1884 update_sampler_textures = (VkUpdateSamplerTextures *) common;
1885
1886 for (uint32_t j = 0; j < update_sampler_textures->count; j++) {
1887 set->descriptors[update_sampler_textures->binding + j].view =
1888 (struct anv_surface_view *)
1889 update_sampler_textures->pSamplerImageViews[j].pImageView->view;
1890 set->descriptors[update_sampler_textures->binding + j].sampler =
1891 (struct anv_sampler *)
1892 update_sampler_textures->pSamplerImageViews[j].sampler;
1893 }
1894 break;
1895
1896 case VK_STRUCTURE_TYPE_UPDATE_IMAGES:
1897 update_images = (VkUpdateImages *) common;
1898
1899 for (uint32_t j = 0; j < update_images->count; j++) {
1900 set->descriptors[update_images->binding + j].view =
1901 (struct anv_surface_view *) update_images->pImageViews[j].view;
1902 }
1903 break;
1904
1905 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS:
1906 update_buffers = (VkUpdateBuffers *) common;
1907
1908 for (uint32_t j = 0; j < update_buffers->count; j++) {
1909 set->descriptors[update_buffers->binding + j].view =
1910 (struct anv_surface_view *) update_buffers->pBufferViews[j].view;
1911 }
1912 /* FIXME: descriptor arrays? */
1913 break;
1914
1915 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY:
1916 update_as_copy = (VkUpdateAsCopy *) common;
1917 (void) update_as_copy;
1918 break;
1919
1920 default:
1921 break;
1922 }
1923 }
1924 }
1925
1926 // State object functions
1927
1928 static inline int64_t
1929 clamp_int64(int64_t x, int64_t min, int64_t max)
1930 {
1931 if (x < min)
1932 return min;
1933 else if (x < max)
1934 return x;
1935 else
1936 return max;
1937 }
1938
1939 VkResult anv_CreateDynamicViewportState(
1940 VkDevice _device,
1941 const VkDynamicVpStateCreateInfo* pCreateInfo,
1942 VkDynamicVpState* pState)
1943 {
1944 struct anv_device *device = (struct anv_device *) _device;
1945 struct anv_dynamic_vp_state *state;
1946
1947 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO);
1948
1949 state = anv_device_alloc(device, sizeof(*state), 8,
1950 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1951 if (state == NULL)
1952 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1953
1954 unsigned count = pCreateInfo->viewportAndScissorCount;
1955 state->sf_clip_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
1956 count * 64, 64);
1957 state->cc_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
1958 count * 8, 32);
1959 state->scissor = anv_state_pool_alloc(&device->dynamic_state_pool,
1960 count * 32, 32);
1961
1962 for (uint32_t i = 0; i < pCreateInfo->viewportAndScissorCount; i++) {
1963 const VkViewport *vp = &pCreateInfo->pViewports[i];
1964 const VkRect *s = &pCreateInfo->pScissors[i];
1965
1966 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport = {
1967 .ViewportMatrixElementm00 = vp->width / 2,
1968 .ViewportMatrixElementm11 = vp->height / 2,
1969 .ViewportMatrixElementm22 = (vp->maxDepth - vp->minDepth) / 2,
1970 .ViewportMatrixElementm30 = vp->originX + vp->width / 2,
1971 .ViewportMatrixElementm31 = vp->originY + vp->height / 2,
1972 .ViewportMatrixElementm32 = (vp->maxDepth + vp->minDepth) / 2,
1973 .XMinClipGuardband = -1.0f,
1974 .XMaxClipGuardband = 1.0f,
1975 .YMinClipGuardband = -1.0f,
1976 .YMaxClipGuardband = 1.0f,
1977 .XMinViewPort = vp->originX,
1978 .XMaxViewPort = vp->originX + vp->width - 1,
1979 .YMinViewPort = vp->originY,
1980 .YMaxViewPort = vp->originY + vp->height - 1,
1981 };
1982
1983 struct GEN8_CC_VIEWPORT cc_viewport = {
1984 .MinimumDepth = vp->minDepth,
1985 .MaximumDepth = vp->maxDepth
1986 };
1987
1988 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
1989 * ymax < ymin for empty clips. In case clip x, y, width height are all
1990 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
1991 * what we want. Just special case empty clips and produce a canonical
1992 * empty clip. */
1993 static const struct GEN8_SCISSOR_RECT empty_scissor = {
1994 .ScissorRectangleYMin = 1,
1995 .ScissorRectangleXMin = 1,
1996 .ScissorRectangleYMax = 0,
1997 .ScissorRectangleXMax = 0
1998 };
1999
2000 const int max = 0xffff;
2001 struct GEN8_SCISSOR_RECT scissor = {
2002 /* Do this math using int64_t so overflow gets clamped correctly. */
2003 .ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
2004 .ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
2005 .ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
2006 .ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
2007 };
2008
2009 GEN8_SF_CLIP_VIEWPORT_pack(NULL, state->sf_clip_vp.map + i * 64, &sf_clip_viewport);
2010 GEN8_CC_VIEWPORT_pack(NULL, state->cc_vp.map + i * 32, &cc_viewport);
2011
2012 if (s->extent.width <= 0 || s->extent.height <= 0) {
2013 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &empty_scissor);
2014 } else {
2015 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &scissor);
2016 }
2017 }
2018
2019 *pState = (VkDynamicVpState) state;
2020
2021 return VK_SUCCESS;
2022 }
2023
2024 VkResult anv_CreateDynamicRasterState(
2025 VkDevice _device,
2026 const VkDynamicRsStateCreateInfo* pCreateInfo,
2027 VkDynamicRsState* pState)
2028 {
2029 struct anv_device *device = (struct anv_device *) _device;
2030 struct anv_dynamic_rs_state *state;
2031
2032 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO);
2033
2034 state = anv_device_alloc(device, sizeof(*state), 8,
2035 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2036 if (state == NULL)
2037 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2038
2039 /* Missing these:
2040 * float depthBias;
2041 * float depthBiasClamp;
2042 * float slopeScaledDepthBias;
2043 * float pointFadeThreshold;
2044 * // optional (GL45) - Size of point fade threshold
2045 */
2046
2047 struct GEN8_3DSTATE_SF sf = {
2048 GEN8_3DSTATE_SF_header,
2049 .LineWidth = pCreateInfo->lineWidth,
2050 .PointWidth = pCreateInfo->pointSize,
2051 };
2052
2053 GEN8_3DSTATE_SF_pack(NULL, state->state_sf, &sf);
2054
2055 *pState = (VkDynamicRsState) state;
2056
2057 return VK_SUCCESS;
2058 }
2059
2060 VkResult anv_CreateDynamicColorBlendState(
2061 VkDevice _device,
2062 const VkDynamicCbStateCreateInfo* pCreateInfo,
2063 VkDynamicCbState* pState)
2064 {
2065 struct anv_device *device = (struct anv_device *) _device;
2066 struct anv_dynamic_cb_state *state;
2067
2068 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO);
2069
2070 state = anv_device_alloc(device, sizeof(*state), 8,
2071 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2072 if (state == NULL)
2073 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2074
2075 *pState = (VkDynamicCbState) state;
2076
2077 return VK_SUCCESS;
2078 }
2079
2080 VkResult anv_CreateDynamicDepthStencilState(
2081 VkDevice device,
2082 const VkDynamicDsStateCreateInfo* pCreateInfo,
2083 VkDynamicDsState* pState)
2084 {
2085 stub_return(VK_UNSUPPORTED);
2086 }
2087
2088 // Command buffer functions
2089
2090 VkResult anv_CreateCommandBuffer(
2091 VkDevice _device,
2092 const VkCmdBufferCreateInfo* pCreateInfo,
2093 VkCmdBuffer* pCmdBuffer)
2094 {
2095 struct anv_device *device = (struct anv_device *) _device;
2096 struct anv_cmd_buffer *cmd_buffer;
2097 VkResult result;
2098
2099 cmd_buffer = anv_device_alloc(device, sizeof(*cmd_buffer), 8,
2100 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2101 if (cmd_buffer == NULL)
2102 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2103
2104 cmd_buffer->device = device;
2105 cmd_buffer->rs_state = NULL;
2106 cmd_buffer->vp_state = NULL;
2107 memset(&cmd_buffer->default_bindings, 0, sizeof(cmd_buffer->default_bindings));
2108 cmd_buffer->bindings = &cmd_buffer->default_bindings;
2109
2110 result = anv_batch_init(&cmd_buffer->batch, device);
2111 if (result != VK_SUCCESS)
2112 goto fail;
2113
2114 result = anv_bo_init_new(&cmd_buffer->surface_bo, device, BATCH_SIZE);
2115 if (result != VK_SUCCESS)
2116 goto fail_batch;
2117
2118 cmd_buffer->surface_bo.map =
2119 anv_gem_mmap(device, cmd_buffer->surface_bo.gem_handle, 0, BATCH_SIZE);
2120 if (cmd_buffer->surface_bo.map == NULL) {
2121 result = vk_error(VK_ERROR_MEMORY_MAP_FAILED);
2122 goto fail_surface_bo;
2123 }
2124
2125 /* Start surface_next at 1 so surface offset 0 is invalid. */
2126 cmd_buffer->surface_next = 1;
2127 cmd_buffer->surface_relocs.num_relocs = 0;
2128
2129 cmd_buffer->exec2_objects =
2130 anv_device_alloc(device, 8192 * sizeof(cmd_buffer->exec2_objects[0]), 8,
2131 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2132 if (cmd_buffer->exec2_objects == NULL) {
2133 result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2134 goto fail_surface_map;
2135 }
2136
2137 cmd_buffer->exec2_bos =
2138 anv_device_alloc(device, 8192 * sizeof(cmd_buffer->exec2_bos[0]), 8,
2139 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2140 if (cmd_buffer->exec2_bos == NULL) {
2141 result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2142 goto fail_exec2_objects;
2143 }
2144
2145 anv_state_stream_init(&cmd_buffer->binding_table_state_stream,
2146 &device->binding_table_block_pool);
2147 anv_state_stream_init(&cmd_buffer->surface_state_stream,
2148 &device->surface_state_block_pool);
2149 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
2150 &device->dynamic_state_block_pool);
2151
2152 cmd_buffer->dirty = 0;
2153 cmd_buffer->vb_dirty = 0;
2154
2155 *pCmdBuffer = (VkCmdBuffer) cmd_buffer;
2156
2157 return VK_SUCCESS;
2158
2159 fail_exec2_objects:
2160 anv_device_free(device, cmd_buffer->exec2_objects);
2161 fail_surface_map:
2162 anv_gem_munmap(cmd_buffer->surface_bo.map, BATCH_SIZE);
2163 fail_surface_bo:
2164 anv_gem_close(device, cmd_buffer->surface_bo.gem_handle);
2165 fail_batch:
2166 anv_batch_finish(&cmd_buffer->batch, device);
2167 fail:
2168 anv_device_free(device, cmd_buffer);
2169
2170 return result;
2171 }
2172
2173 VkResult anv_BeginCommandBuffer(
2174 VkCmdBuffer cmdBuffer,
2175 const VkCmdBufferBeginInfo* pBeginInfo)
2176 {
2177 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2178 struct anv_device *device = cmd_buffer->device;
2179
2180 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPELINE_SELECT,
2181 .PipelineSelection = _3D);
2182 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_SIP);
2183
2184 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_BASE_ADDRESS,
2185 .GeneralStateBaseAddress = { NULL, 0 },
2186 .GeneralStateBaseAddressModifyEnable = true,
2187 .GeneralStateBufferSize = 0xfffff,
2188 .GeneralStateBufferSizeModifyEnable = true,
2189
2190 .SurfaceStateBaseAddress = { &cmd_buffer->surface_bo, 0 },
2191 .SurfaceStateMemoryObjectControlState = 0, /* FIXME: MOCS */
2192 .SurfaceStateBaseAddressModifyEnable = true,
2193
2194 .DynamicStateBaseAddress = { &device->dynamic_state_block_pool.bo, 0 },
2195 .DynamicStateBaseAddressModifyEnable = true,
2196 .DynamicStateBufferSize = 0xfffff,
2197 .DynamicStateBufferSizeModifyEnable = true,
2198
2199 .IndirectObjectBaseAddress = { NULL, 0 },
2200 .IndirectObjectBaseAddressModifyEnable = true,
2201 .IndirectObjectBufferSize = 0xfffff,
2202 .IndirectObjectBufferSizeModifyEnable = true,
2203
2204 .InstructionBaseAddress = { &device->instruction_block_pool.bo, 0 },
2205 .InstructionBaseAddressModifyEnable = true,
2206 .InstructionBufferSize = 0xfffff,
2207 .InstructionBuffersizeModifyEnable = true);
2208
2209 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VF_STATISTICS,
2210 .StatisticsEnable = true);
2211 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_HS, .Enable = false);
2212 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_TE, .TEEnable = false);
2213 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
2214 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
2215
2216 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
2217 .ConstantBufferOffset = 0,
2218 .ConstantBufferSize = 4);
2219 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
2220 .ConstantBufferOffset = 4,
2221 .ConstantBufferSize = 4);
2222 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
2223 .ConstantBufferOffset = 8,
2224 .ConstantBufferSize = 4);
2225
2226 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_CHROMAKEY,
2227 .ChromaKeyKillEnable = false);
2228 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SBE_SWIZ);
2229 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
2230
2231 /* Hardcoded state: */
2232 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DEPTH_BUFFER,
2233 .SurfaceType = SURFTYPE_2D,
2234 .Width = 1,
2235 .Height = 1,
2236 .SurfaceFormat = D16_UNORM,
2237 .SurfaceBaseAddress = { NULL, 0 },
2238 .HierarchicalDepthBufferEnable = 0);
2239
2240 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_DEPTH_STENCIL,
2241 .DepthTestEnable = false,
2242 .DepthBufferWriteEnable = false);
2243
2244 return VK_SUCCESS;
2245 }
2246
2247 static void
2248 anv_cmd_buffer_add_bo(struct anv_cmd_buffer *cmd_buffer,
2249 struct anv_bo *bo, struct anv_reloc_list *list)
2250 {
2251 struct drm_i915_gem_exec_object2 *obj;
2252
2253 bo->index = cmd_buffer->bo_count;
2254 obj = &cmd_buffer->exec2_objects[bo->index];
2255 cmd_buffer->exec2_bos[bo->index] = bo;
2256 cmd_buffer->bo_count++;
2257
2258 obj->handle = bo->gem_handle;
2259 obj->relocation_count = 0;
2260 obj->relocs_ptr = 0;
2261 obj->alignment = 0;
2262 obj->offset = bo->offset;
2263 obj->flags = 0;
2264 obj->rsvd1 = 0;
2265 obj->rsvd2 = 0;
2266
2267 if (list) {
2268 obj->relocation_count = list->num_relocs;
2269 obj->relocs_ptr = (uintptr_t) list->relocs;
2270 }
2271 }
2272
2273 static void
2274 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer *cmd_buffer,
2275 struct anv_reloc_list *list)
2276 {
2277 struct anv_bo *bo, *batch_bo;
2278
2279 batch_bo = &cmd_buffer->batch.bo;
2280 for (size_t i = 0; i < list->num_relocs; i++) {
2281 bo = list->reloc_bos[i];
2282 /* Skip any relocations targeting the batch bo. We need to make sure
2283 * it's the last in the list so we'll add it manually later.
2284 */
2285 if (bo == batch_bo)
2286 continue;
2287 if (bo->index < cmd_buffer->bo_count && cmd_buffer->exec2_bos[bo->index] == bo)
2288 continue;
2289
2290 anv_cmd_buffer_add_bo(cmd_buffer, bo, NULL);
2291 }
2292 }
2293
2294 static void
2295 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer,
2296 struct anv_reloc_list *list)
2297 {
2298 struct anv_bo *bo;
2299
2300 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2301 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2302 * all bos haven't moved it will skip relocation processing alltogether.
2303 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2304 * value of offset so we can set it either way. For that to work we need
2305 * to make sure all relocs use the same presumed offset.
2306 */
2307
2308 for (size_t i = 0; i < list->num_relocs; i++) {
2309 bo = list->reloc_bos[i];
2310 if (bo->offset != list->relocs[i].presumed_offset)
2311 cmd_buffer->need_reloc = true;
2312
2313 list->relocs[i].target_handle = bo->index;
2314 }
2315 }
2316
2317 VkResult anv_EndCommandBuffer(
2318 VkCmdBuffer cmdBuffer)
2319 {
2320 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2321 struct anv_device *device = cmd_buffer->device;
2322 struct anv_batch *batch = &cmd_buffer->batch;
2323
2324 anv_batch_emit(batch, GEN8_MI_BATCH_BUFFER_END);
2325
2326 /* Round batch up to an even number of dwords. */
2327 if ((batch->next - batch->bo.map) & 4)
2328 anv_batch_emit(batch, GEN8_MI_NOOP);
2329
2330 cmd_buffer->bo_count = 0;
2331 cmd_buffer->need_reloc = false;
2332
2333 /* Lock for access to bo->index. */
2334 pthread_mutex_lock(&device->mutex);
2335
2336 /* Add block pool bos first so we can add them with their relocs. */
2337 anv_cmd_buffer_add_bo(cmd_buffer, &cmd_buffer->surface_bo,
2338 &cmd_buffer->surface_relocs);
2339
2340 anv_cmd_buffer_add_validate_bos(cmd_buffer, &cmd_buffer->surface_relocs);
2341 anv_cmd_buffer_add_validate_bos(cmd_buffer, &batch->cmd_relocs);
2342 anv_cmd_buffer_add_bo(cmd_buffer, &batch->bo, &batch->cmd_relocs);
2343 anv_cmd_buffer_process_relocs(cmd_buffer, &cmd_buffer->surface_relocs);
2344 anv_cmd_buffer_process_relocs(cmd_buffer, &batch->cmd_relocs);
2345
2346 cmd_buffer->execbuf.buffers_ptr = (uintptr_t) cmd_buffer->exec2_objects;
2347 cmd_buffer->execbuf.buffer_count = cmd_buffer->bo_count;
2348 cmd_buffer->execbuf.batch_start_offset = 0;
2349 cmd_buffer->execbuf.batch_len = batch->next - batch->bo.map;
2350 cmd_buffer->execbuf.cliprects_ptr = 0;
2351 cmd_buffer->execbuf.num_cliprects = 0;
2352 cmd_buffer->execbuf.DR1 = 0;
2353 cmd_buffer->execbuf.DR4 = 0;
2354
2355 cmd_buffer->execbuf.flags = I915_EXEC_HANDLE_LUT;
2356 if (!cmd_buffer->need_reloc)
2357 cmd_buffer->execbuf.flags |= I915_EXEC_NO_RELOC;
2358 cmd_buffer->execbuf.flags |= I915_EXEC_RENDER;
2359 cmd_buffer->execbuf.rsvd1 = device->context_id;
2360 cmd_buffer->execbuf.rsvd2 = 0;
2361
2362 pthread_mutex_unlock(&device->mutex);
2363
2364 return VK_SUCCESS;
2365 }
2366
2367 VkResult anv_ResetCommandBuffer(
2368 VkCmdBuffer cmdBuffer)
2369 {
2370 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2371
2372 anv_batch_reset(&cmd_buffer->batch);
2373 cmd_buffer->surface_next = 0;
2374 cmd_buffer->surface_relocs.num_relocs = 0;
2375
2376 return VK_SUCCESS;
2377 }
2378
2379 // Command buffer building functions
2380
2381 void anv_CmdBindPipeline(
2382 VkCmdBuffer cmdBuffer,
2383 VkPipelineBindPoint pipelineBindPoint,
2384 VkPipeline _pipeline)
2385 {
2386 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2387 struct anv_pipeline *pipeline = (struct anv_pipeline *) _pipeline;
2388
2389 cmd_buffer->pipeline = pipeline;
2390 cmd_buffer->vb_dirty |= pipeline->vb_used;
2391 cmd_buffer->dirty |= ANV_CMD_BUFFER_PIPELINE_DIRTY;
2392 }
2393
2394 void anv_CmdBindDynamicStateObject(
2395 VkCmdBuffer cmdBuffer,
2396 VkStateBindPoint stateBindPoint,
2397 VkDynamicStateObject dynamicState)
2398 {
2399 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2400 struct anv_dynamic_vp_state *vp_state;
2401
2402 switch (stateBindPoint) {
2403 case VK_STATE_BIND_POINT_VIEWPORT:
2404 vp_state = (struct anv_dynamic_vp_state *) dynamicState;
2405 /* We emit state immediately, but set cmd_buffer->vp_state to indicate
2406 * that vp state has been set in this command buffer. */
2407 cmd_buffer->vp_state = vp_state;
2408 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SCISSOR_STATE_POINTERS,
2409 .ScissorRectPointer = vp_state->scissor.offset);
2410 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
2411 .CCViewportPointer = vp_state->cc_vp.offset);
2412 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
2413 .SFClipViewportPointer = vp_state->sf_clip_vp.offset);
2414 break;
2415 case VK_STATE_BIND_POINT_RASTER:
2416 cmd_buffer->rs_state = (struct anv_dynamic_rs_state *) dynamicState;
2417 cmd_buffer->dirty |= ANV_CMD_BUFFER_RS_DIRTY;
2418 break;
2419 case VK_STATE_BIND_POINT_COLOR_BLEND:
2420 case VK_STATE_BIND_POINT_DEPTH_STENCIL:
2421 break;
2422 default:
2423 break;
2424 };
2425 }
2426
2427 static struct anv_state
2428 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer *cmd_buffer,
2429 uint32_t size, uint32_t alignment)
2430 {
2431 struct anv_state state;
2432
2433 state.offset = ALIGN_U32(cmd_buffer->surface_next, alignment);
2434 state.map = cmd_buffer->surface_bo.map + state.offset;
2435 state.alloc_size = size;
2436 cmd_buffer->surface_next = state.offset + size;
2437
2438 assert(state.offset + size < cmd_buffer->surface_bo.size);
2439
2440 return state;
2441 }
2442
2443 void anv_CmdBindDescriptorSets(
2444 VkCmdBuffer cmdBuffer,
2445 VkPipelineBindPoint pipelineBindPoint,
2446 uint32_t firstSet,
2447 uint32_t setCount,
2448 const VkDescriptorSet* pDescriptorSets,
2449 uint32_t dynamicOffsetCount,
2450 const uint32_t* pDynamicOffsets)
2451 {
2452 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2453 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2454 struct anv_bindings *bindings = cmd_buffer->bindings;
2455
2456 uint32_t offset = 0;
2457 for (uint32_t i = 0; i < setCount; i++) {
2458 struct anv_descriptor_set *set =
2459 (struct anv_descriptor_set *) pDescriptorSets[i];
2460 struct anv_descriptor_set_layout *set_layout = layout->set[firstSet + i].layout;
2461
2462 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2463 uint32_t *surface_to_desc = set_layout->stage[s].surface_start;
2464 uint32_t *sampler_to_desc = set_layout->stage[s].sampler_start;
2465 uint32_t bias = s == VK_SHADER_STAGE_FRAGMENT ? MAX_RTS : 0;
2466 uint32_t start;
2467
2468 start = bias + layout->set[firstSet + i].surface_start[s];
2469 for (uint32_t b = 0; b < set_layout->stage[s].surface_count; b++) {
2470 struct anv_surface_view *view = set->descriptors[surface_to_desc[b]].view;
2471 if (!view)
2472 continue;
2473
2474 struct anv_state state =
2475 anv_cmd_buffer_alloc_surface_state(cmd_buffer, 64, 64);
2476 memcpy(state.map, view->surface_state.map, 64);
2477
2478 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2479 *(uint64_t *)(state.map + 8 * 4) =
2480 anv_reloc_list_add(&cmd_buffer->surface_relocs,
2481 state.offset + 8 * 4,
2482 view->bo, view->offset);
2483
2484 bindings->descriptors[s].surfaces[start + b] = state.offset;
2485 }
2486
2487 start = layout->set[firstSet + i].sampler_start[s];
2488 for (uint32_t b = 0; b < set_layout->stage[s].sampler_count; b++) {
2489 struct anv_sampler *sampler = set->descriptors[sampler_to_desc[b]].sampler;
2490 if (!sampler)
2491 continue;
2492
2493 memcpy(&bindings->descriptors[s].samplers[start + b],
2494 sampler->state, sizeof(sampler->state));
2495 }
2496 }
2497
2498 offset += layout->set[firstSet + i].layout->num_dynamic_buffers;
2499 }
2500
2501 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
2502 }
2503
2504 void anv_CmdBindIndexBuffer(
2505 VkCmdBuffer cmdBuffer,
2506 VkBuffer _buffer,
2507 VkDeviceSize offset,
2508 VkIndexType indexType)
2509 {
2510 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2511 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2512
2513 static const uint32_t vk_to_gen_index_type[] = {
2514 [VK_INDEX_TYPE_UINT8] = INDEX_BYTE,
2515 [VK_INDEX_TYPE_UINT16] = INDEX_WORD,
2516 [VK_INDEX_TYPE_UINT32] = INDEX_DWORD,
2517 };
2518
2519 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_INDEX_BUFFER,
2520 .IndexFormat = vk_to_gen_index_type[indexType],
2521 .MemoryObjectControlState = 0,
2522 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2523 .BufferSize = buffer->size - offset);
2524 }
2525
2526 void anv_CmdBindVertexBuffers(
2527 VkCmdBuffer cmdBuffer,
2528 uint32_t startBinding,
2529 uint32_t bindingCount,
2530 const VkBuffer* pBuffers,
2531 const VkDeviceSize* pOffsets)
2532 {
2533 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2534 struct anv_bindings *bindings = cmd_buffer->bindings;
2535
2536 /* We have to defer setting up vertex buffer since we need the buffer
2537 * stride from the pipeline. */
2538
2539 for (uint32_t i = 0; i < bindingCount; i++) {
2540 bindings->vb[startBinding + i].buffer = (struct anv_buffer *) pBuffers[i];
2541 bindings->vb[startBinding + i].offset = pOffsets[i];
2542 cmd_buffer->vb_dirty |= 1 << (startBinding + i);
2543 }
2544 }
2545
2546 static void
2547 flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
2548 {
2549 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2550 struct anv_bindings *bindings = cmd_buffer->bindings;
2551 uint32_t layers = cmd_buffer->framebuffer->layers;
2552
2553 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2554 uint32_t bias;
2555
2556 if (s == VK_SHADER_STAGE_FRAGMENT) {
2557 bias = MAX_RTS;
2558 layers = cmd_buffer->framebuffer->layers;
2559 } else {
2560 bias = 0;
2561 layers = 0;
2562 }
2563
2564 /* This is a little awkward: layout can be NULL but we still have to
2565 * allocate and set a binding table for the PS stage for render
2566 * targets. */
2567 uint32_t surface_count = layout ? layout->stage[s].surface_count : 0;
2568
2569 if (layers + surface_count > 0) {
2570 struct anv_state state;
2571 uint32_t size;
2572
2573 size = (bias + surface_count) * sizeof(uint32_t);
2574 state = anv_cmd_buffer_alloc_surface_state(cmd_buffer, size, 32);
2575 memcpy(state.map, bindings->descriptors[s].surfaces, size);
2576
2577 static const uint32_t binding_table_opcodes[] = {
2578 [VK_SHADER_STAGE_VERTEX] = 38,
2579 [VK_SHADER_STAGE_TESS_CONTROL] = 39,
2580 [VK_SHADER_STAGE_TESS_EVALUATION] = 40,
2581 [VK_SHADER_STAGE_GEOMETRY] = 41,
2582 [VK_SHADER_STAGE_FRAGMENT] = 42,
2583 [VK_SHADER_STAGE_COMPUTE] = 0,
2584 };
2585
2586 anv_batch_emit(&cmd_buffer->batch,
2587 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS,
2588 ._3DCommandSubOpcode = binding_table_opcodes[s],
2589 .PointertoVSBindingTable = state.offset);
2590 }
2591
2592 if (layout && layout->stage[s].sampler_count > 0) {
2593 struct anv_state state;
2594 size_t size;
2595
2596 size = layout->stage[s].sampler_count * 16;
2597 state = anv_cmd_buffer_alloc_surface_state(cmd_buffer, size, 32);
2598 memcpy(state.map, bindings->descriptors[s].samplers, size);
2599
2600 static const uint32_t sampler_state_opcodes[] = {
2601 [VK_SHADER_STAGE_VERTEX] = 43,
2602 [VK_SHADER_STAGE_TESS_CONTROL] = 44, /* HS */
2603 [VK_SHADER_STAGE_TESS_EVALUATION] = 45, /* DS */
2604 [VK_SHADER_STAGE_GEOMETRY] = 46,
2605 [VK_SHADER_STAGE_FRAGMENT] = 47,
2606 [VK_SHADER_STAGE_COMPUTE] = 0,
2607 };
2608
2609 anv_batch_emit(&cmd_buffer->batch,
2610 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS,
2611 ._3DCommandSubOpcode = sampler_state_opcodes[s],
2612 .PointertoVSSamplerState = state.offset);
2613 }
2614 }
2615 }
2616
2617 static void
2618 anv_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer)
2619 {
2620 struct anv_pipeline *pipeline = cmd_buffer->pipeline;
2621 struct anv_bindings *bindings = cmd_buffer->bindings;
2622 uint32_t *p;
2623
2624 uint32_t vb_emit = cmd_buffer->vb_dirty & pipeline->vb_used;
2625 const uint32_t num_buffers = __builtin_popcount(vb_emit);
2626 const uint32_t num_dwords = 1 + num_buffers * 4;
2627
2628 if (vb_emit) {
2629 p = anv_batch_emitn(&cmd_buffer->batch, num_dwords,
2630 GEN8_3DSTATE_VERTEX_BUFFERS);
2631 uint32_t vb, i = 0;
2632 for_each_bit(vb, vb_emit) {
2633 struct anv_buffer *buffer = bindings->vb[vb].buffer;
2634 uint32_t offset = bindings->vb[vb].offset;
2635
2636 struct GEN8_VERTEX_BUFFER_STATE state = {
2637 .VertexBufferIndex = vb,
2638 .MemoryObjectControlState = 0,
2639 .AddressModifyEnable = true,
2640 .BufferPitch = pipeline->binding_stride[vb],
2641 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2642 .BufferSize = buffer->size - offset
2643 };
2644
2645 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer->batch, &p[1 + i * 4], &state);
2646 i++;
2647 }
2648 }
2649
2650 if (cmd_buffer->dirty & ANV_CMD_BUFFER_PIPELINE_DIRTY)
2651 anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
2652
2653 if (cmd_buffer->dirty & ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY)
2654 flush_descriptor_sets(cmd_buffer);
2655
2656 if (cmd_buffer->dirty & (ANV_CMD_BUFFER_PIPELINE_DIRTY | ANV_CMD_BUFFER_RS_DIRTY))
2657 anv_batch_emit_merge(&cmd_buffer->batch,
2658 cmd_buffer->rs_state->state_sf, pipeline->state_sf);
2659
2660 cmd_buffer->vb_dirty &= ~vb_emit;
2661 cmd_buffer->dirty = 0;
2662 }
2663
2664 void anv_CmdDraw(
2665 VkCmdBuffer cmdBuffer,
2666 uint32_t firstVertex,
2667 uint32_t vertexCount,
2668 uint32_t firstInstance,
2669 uint32_t instanceCount)
2670 {
2671 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2672
2673 anv_cmd_buffer_flush_state(cmd_buffer);
2674
2675 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2676 .VertexAccessType = SEQUENTIAL,
2677 .VertexCountPerInstance = vertexCount,
2678 .StartVertexLocation = firstVertex,
2679 .InstanceCount = instanceCount,
2680 .StartInstanceLocation = firstInstance,
2681 .BaseVertexLocation = 0);
2682 }
2683
2684 void anv_CmdDrawIndexed(
2685 VkCmdBuffer cmdBuffer,
2686 uint32_t firstIndex,
2687 uint32_t indexCount,
2688 int32_t vertexOffset,
2689 uint32_t firstInstance,
2690 uint32_t instanceCount)
2691 {
2692 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2693
2694 anv_cmd_buffer_flush_state(cmd_buffer);
2695
2696 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2697 .VertexAccessType = RANDOM,
2698 .VertexCountPerInstance = indexCount,
2699 .StartVertexLocation = firstIndex,
2700 .InstanceCount = instanceCount,
2701 .StartInstanceLocation = firstInstance,
2702 .BaseVertexLocation = 0);
2703 }
2704
2705 static void
2706 anv_batch_lrm(struct anv_batch *batch,
2707 uint32_t reg, struct anv_bo *bo, uint32_t offset)
2708 {
2709 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2710 .RegisterAddress = reg,
2711 .MemoryAddress = { bo, offset });
2712 }
2713
2714 static void
2715 anv_batch_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm)
2716 {
2717 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_IMM,
2718 .RegisterOffset = reg,
2719 .DataDWord = imm);
2720 }
2721
2722 /* Auto-Draw / Indirect Registers */
2723 #define GEN7_3DPRIM_END_OFFSET 0x2420
2724 #define GEN7_3DPRIM_START_VERTEX 0x2430
2725 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
2726 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
2727 #define GEN7_3DPRIM_START_INSTANCE 0x243C
2728 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
2729
2730 void anv_CmdDrawIndirect(
2731 VkCmdBuffer cmdBuffer,
2732 VkBuffer _buffer,
2733 VkDeviceSize offset,
2734 uint32_t count,
2735 uint32_t stride)
2736 {
2737 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2738 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2739 struct anv_bo *bo = buffer->bo;
2740 uint32_t bo_offset = buffer->offset + offset;
2741
2742 anv_cmd_buffer_flush_state(cmd_buffer);
2743
2744 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
2745 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
2746 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
2747 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 12);
2748 anv_batch_lri(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, 0);
2749
2750 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2751 .IndirectParameterEnable = true,
2752 .VertexAccessType = SEQUENTIAL);
2753 }
2754
2755 void anv_CmdDrawIndexedIndirect(
2756 VkCmdBuffer cmdBuffer,
2757 VkBuffer _buffer,
2758 VkDeviceSize offset,
2759 uint32_t count,
2760 uint32_t stride)
2761 {
2762 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2763 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2764 struct anv_bo *bo = buffer->bo;
2765 uint32_t bo_offset = buffer->offset + offset;
2766
2767 anv_cmd_buffer_flush_state(cmd_buffer);
2768
2769 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
2770 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
2771 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
2772 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, bo, bo_offset + 12);
2773 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 16);
2774
2775 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2776 .IndirectParameterEnable = true,
2777 .VertexAccessType = RANDOM);
2778 }
2779
2780 void anv_CmdDispatch(
2781 VkCmdBuffer cmdBuffer,
2782 uint32_t x,
2783 uint32_t y,
2784 uint32_t z)
2785 {
2786 stub();
2787 }
2788
2789 void anv_CmdDispatchIndirect(
2790 VkCmdBuffer cmdBuffer,
2791 VkBuffer buffer,
2792 VkDeviceSize offset)
2793 {
2794 stub();
2795 }
2796
2797 void anv_CmdSetEvent(
2798 VkCmdBuffer cmdBuffer,
2799 VkEvent event,
2800 VkPipeEvent pipeEvent)
2801 {
2802 stub();
2803 }
2804
2805 void anv_CmdResetEvent(
2806 VkCmdBuffer cmdBuffer,
2807 VkEvent event,
2808 VkPipeEvent pipeEvent)
2809 {
2810 stub();
2811 }
2812
2813 void anv_CmdWaitEvents(
2814 VkCmdBuffer cmdBuffer,
2815 VkWaitEvent waitEvent,
2816 uint32_t eventCount,
2817 const VkEvent* pEvents,
2818 uint32_t memBarrierCount,
2819 const void** ppMemBarriers)
2820 {
2821 stub();
2822 }
2823
2824 void anv_CmdPipelineBarrier(
2825 VkCmdBuffer cmdBuffer,
2826 VkWaitEvent waitEvent,
2827 uint32_t pipeEventCount,
2828 const VkPipeEvent* pPipeEvents,
2829 uint32_t memBarrierCount,
2830 const void** ppMemBarriers)
2831 {
2832 stub();
2833 }
2834
2835 static void
2836 anv_batch_emit_ps_depth_count(struct anv_batch *batch,
2837 struct anv_bo *bo, uint32_t offset)
2838 {
2839 anv_batch_emit(batch, GEN8_PIPE_CONTROL,
2840 .DestinationAddressType = DAT_PPGTT,
2841 .PostSyncOperation = WritePSDepthCount,
2842 .Address = { bo, offset }); /* FIXME: This is only lower 32 bits */
2843 }
2844
2845 void anv_CmdBeginQuery(
2846 VkCmdBuffer cmdBuffer,
2847 VkQueryPool queryPool,
2848 uint32_t slot,
2849 VkQueryControlFlags flags)
2850 {
2851 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2852 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2853
2854 switch (pool->type) {
2855 case VK_QUERY_TYPE_OCCLUSION:
2856 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
2857 slot * sizeof(struct anv_query_pool_slot));
2858 break;
2859
2860 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
2861 default:
2862 unreachable("");
2863 }
2864 }
2865
2866 void anv_CmdEndQuery(
2867 VkCmdBuffer cmdBuffer,
2868 VkQueryPool queryPool,
2869 uint32_t slot)
2870 {
2871 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2872 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2873
2874 switch (pool->type) {
2875 case VK_QUERY_TYPE_OCCLUSION:
2876 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
2877 slot * sizeof(struct anv_query_pool_slot) + 8);
2878 break;
2879
2880 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
2881 default:
2882 unreachable("");
2883 }
2884 }
2885
2886 void anv_CmdResetQueryPool(
2887 VkCmdBuffer cmdBuffer,
2888 VkQueryPool queryPool,
2889 uint32_t startQuery,
2890 uint32_t queryCount)
2891 {
2892 stub();
2893 }
2894
2895 #define TIMESTAMP 0x2358
2896
2897 void anv_CmdWriteTimestamp(
2898 VkCmdBuffer cmdBuffer,
2899 VkTimestampType timestampType,
2900 VkBuffer destBuffer,
2901 VkDeviceSize destOffset)
2902 {
2903 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2904 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
2905 struct anv_bo *bo = buffer->bo;
2906
2907 switch (timestampType) {
2908 case VK_TIMESTAMP_TYPE_TOP:
2909 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2910 .RegisterAddress = TIMESTAMP,
2911 .MemoryAddress = { bo, buffer->offset + destOffset });
2912 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2913 .RegisterAddress = TIMESTAMP + 4,
2914 .MemoryAddress = { bo, buffer->offset + destOffset + 4 });
2915 break;
2916
2917 case VK_TIMESTAMP_TYPE_BOTTOM:
2918 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
2919 .DestinationAddressType = DAT_PPGTT,
2920 .PostSyncOperation = WriteTimestamp,
2921 .Address = /* FIXME: This is only lower 32 bits */
2922 { bo, buffer->offset + destOffset });
2923 break;
2924
2925 default:
2926 break;
2927 }
2928 }
2929
2930 #define alu_opcode(v) __gen_field((v), 20, 31)
2931 #define alu_operand1(v) __gen_field((v), 10, 19)
2932 #define alu_operand2(v) __gen_field((v), 0, 9)
2933 #define alu(opcode, operand1, operand2) \
2934 alu_opcode(opcode) | alu_operand1(operand1) | alu_operand2(operand2)
2935
2936 #define OPCODE_NOOP 0x000
2937 #define OPCODE_LOAD 0x080
2938 #define OPCODE_LOADINV 0x480
2939 #define OPCODE_LOAD0 0x081
2940 #define OPCODE_LOAD1 0x481
2941 #define OPCODE_ADD 0x100
2942 #define OPCODE_SUB 0x101
2943 #define OPCODE_AND 0x102
2944 #define OPCODE_OR 0x103
2945 #define OPCODE_XOR 0x104
2946 #define OPCODE_STORE 0x180
2947 #define OPCODE_STOREINV 0x580
2948
2949 #define OPERAND_R0 0x00
2950 #define OPERAND_R1 0x01
2951 #define OPERAND_R2 0x02
2952 #define OPERAND_R3 0x03
2953 #define OPERAND_R4 0x04
2954 #define OPERAND_SRCA 0x20
2955 #define OPERAND_SRCB 0x21
2956 #define OPERAND_ACCU 0x31
2957 #define OPERAND_ZF 0x32
2958 #define OPERAND_CF 0x33
2959
2960 #define CS_GPR(n) (0x2600 + (n) * 8)
2961
2962 static void
2963 emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg,
2964 struct anv_bo *bo, uint32_t offset)
2965 {
2966 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2967 .RegisterAddress = reg,
2968 .MemoryAddress = { bo, offset });
2969 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2970 .RegisterAddress = reg + 4,
2971 .MemoryAddress = { bo, offset + 4 });
2972 }
2973
2974 void anv_CmdCopyQueryPoolResults(
2975 VkCmdBuffer cmdBuffer,
2976 VkQueryPool queryPool,
2977 uint32_t startQuery,
2978 uint32_t queryCount,
2979 VkBuffer destBuffer,
2980 VkDeviceSize destOffset,
2981 VkDeviceSize destStride,
2982 VkQueryResultFlags flags)
2983 {
2984 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2985 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2986 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
2987 uint32_t slot_offset, dst_offset;
2988
2989 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
2990 /* Where is the availabilty info supposed to go? */
2991 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
2992 return;
2993 }
2994
2995 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
2996
2997 /* FIXME: If we're not waiting, should we just do this on the CPU? */
2998 if (flags & VK_QUERY_RESULT_WAIT_BIT)
2999 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3000 .CommandStreamerStallEnable = true);
3001
3002 dst_offset = buffer->offset + destOffset;
3003 for (uint32_t i = 0; i < queryCount; i++) {
3004
3005 slot_offset = (startQuery + i) * sizeof(struct anv_query_pool_slot);
3006
3007 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(0), &pool->bo, slot_offset);
3008 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(1), &pool->bo, slot_offset + 8);
3009
3010 /* FIXME: We need to clamp the result for 32 bit. */
3011
3012 uint32_t *dw = anv_batch_emitn(&cmd_buffer->batch, 5, GEN8_MI_MATH);
3013 dw[1] = alu(OPCODE_LOAD, OPERAND_SRCA, OPERAND_R1);
3014 dw[2] = alu(OPCODE_LOAD, OPERAND_SRCB, OPERAND_R0);
3015 dw[3] = alu(OPCODE_SUB, 0, 0);
3016 dw[4] = alu(OPCODE_STORE, OPERAND_R2, OPERAND_ACCU);
3017
3018 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3019 .RegisterAddress = CS_GPR(2),
3020 /* FIXME: This is only lower 32 bits */
3021 .MemoryAddress = { buffer->bo, dst_offset });
3022
3023 if (flags & VK_QUERY_RESULT_64_BIT)
3024 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
3025 .RegisterAddress = CS_GPR(2) + 4,
3026 /* FIXME: This is only lower 32 bits */
3027 .MemoryAddress = { buffer->bo, dst_offset + 4 });
3028
3029 dst_offset += destStride;
3030 }
3031 }
3032
3033 void anv_CmdInitAtomicCounters(
3034 VkCmdBuffer cmdBuffer,
3035 VkPipelineBindPoint pipelineBindPoint,
3036 uint32_t startCounter,
3037 uint32_t counterCount,
3038 const uint32_t* pData)
3039 {
3040 stub();
3041 }
3042
3043 void anv_CmdLoadAtomicCounters(
3044 VkCmdBuffer cmdBuffer,
3045 VkPipelineBindPoint pipelineBindPoint,
3046 uint32_t startCounter,
3047 uint32_t counterCount,
3048 VkBuffer srcBuffer,
3049 VkDeviceSize srcOffset)
3050 {
3051 stub();
3052 }
3053
3054 void anv_CmdSaveAtomicCounters(
3055 VkCmdBuffer cmdBuffer,
3056 VkPipelineBindPoint pipelineBindPoint,
3057 uint32_t startCounter,
3058 uint32_t counterCount,
3059 VkBuffer destBuffer,
3060 VkDeviceSize destOffset)
3061 {
3062 stub();
3063 }
3064
3065 VkResult anv_CreateFramebuffer(
3066 VkDevice _device,
3067 const VkFramebufferCreateInfo* pCreateInfo,
3068 VkFramebuffer* pFramebuffer)
3069 {
3070 struct anv_device *device = (struct anv_device *) _device;
3071 struct anv_framebuffer *framebuffer;
3072
3073 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
3074
3075 framebuffer = anv_device_alloc(device, sizeof(*framebuffer), 8,
3076 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3077 if (framebuffer == NULL)
3078 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3079
3080 framebuffer->color_attachment_count = pCreateInfo->colorAttachmentCount;
3081 for (uint32_t i = 0; i < pCreateInfo->colorAttachmentCount; i++) {
3082 framebuffer->color_attachments[i] =
3083 (struct anv_surface_view *) pCreateInfo->pColorAttachments[i].view;
3084 }
3085
3086 if (pCreateInfo->pDepthStencilAttachment) {
3087 framebuffer->depth_stencil =
3088 (struct anv_depth_stencil_view *) pCreateInfo->pDepthStencilAttachment->view;
3089 }
3090
3091 framebuffer->sample_count = pCreateInfo->sampleCount;
3092 framebuffer->width = pCreateInfo->width;
3093 framebuffer->height = pCreateInfo->height;
3094 framebuffer->layers = pCreateInfo->layers;
3095
3096 vkCreateDynamicViewportState((VkDevice) device,
3097 &(VkDynamicVpStateCreateInfo) {
3098 .sType = VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO,
3099 .viewportAndScissorCount = 2,
3100 .pViewports = (VkViewport[]) {
3101 {
3102 .originX = 0,
3103 .originY = 0,
3104 .width = pCreateInfo->width,
3105 .height = pCreateInfo->height,
3106 .minDepth = 0,
3107 .maxDepth = 1
3108 },
3109 },
3110 .pScissors = (VkRect[]) {
3111 { { 0, 0 },
3112 { pCreateInfo->width, pCreateInfo->height } },
3113 }
3114 },
3115 &framebuffer->vp_state);
3116
3117 *pFramebuffer = (VkFramebuffer) framebuffer;
3118
3119 return VK_SUCCESS;
3120 }
3121
3122 VkResult anv_CreateRenderPass(
3123 VkDevice _device,
3124 const VkRenderPassCreateInfo* pCreateInfo,
3125 VkRenderPass* pRenderPass)
3126 {
3127 struct anv_device *device = (struct anv_device *) _device;
3128 struct anv_render_pass *pass;
3129 size_t size;
3130
3131 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO);
3132
3133 size = sizeof(*pass) +
3134 pCreateInfo->layers * sizeof(struct anv_render_pass_layer);
3135 pass = anv_device_alloc(device, size, 8,
3136 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3137 if (pass == NULL)
3138 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3139
3140 pass->render_area = pCreateInfo->renderArea;
3141
3142 pass->num_layers = pCreateInfo->layers;
3143
3144 pass->num_clear_layers = 0;
3145 for (uint32_t i = 0; i < pCreateInfo->layers; i++) {
3146 pass->layers[i].color_load_op = pCreateInfo->pColorLoadOps[i];
3147 pass->layers[i].clear_color = pCreateInfo->pColorLoadClearValues[i];
3148 if (pass->layers[i].color_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR)
3149 pass->num_clear_layers++;
3150 }
3151
3152 *pRenderPass = (VkRenderPass) pass;
3153
3154 return VK_SUCCESS;
3155 }
3156
3157 void
3158 anv_cmd_buffer_fill_render_targets(struct anv_cmd_buffer *cmd_buffer)
3159 {
3160 struct anv_framebuffer *framebuffer = cmd_buffer->framebuffer;
3161 struct anv_bindings *bindings = cmd_buffer->bindings;
3162
3163 for (uint32_t i = 0; i < framebuffer->color_attachment_count; i++) {
3164 struct anv_surface_view *view = framebuffer->color_attachments[i];
3165
3166 struct anv_state state =
3167 anv_cmd_buffer_alloc_surface_state(cmd_buffer, 64, 64);
3168 memcpy(state.map, view->surface_state.map, 64);
3169
3170 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
3171 *(uint64_t *)(state.map + 8 * 4) =
3172 anv_reloc_list_add(&cmd_buffer->surface_relocs,
3173 state.offset + 8 * 4,
3174 view->bo, view->offset);
3175
3176 bindings->descriptors[VK_SHADER_STAGE_FRAGMENT].surfaces[i] = state.offset;
3177 }
3178 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
3179 }
3180
3181 void anv_CmdBeginRenderPass(
3182 VkCmdBuffer cmdBuffer,
3183 const VkRenderPassBegin* pRenderPassBegin)
3184 {
3185 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3186 struct anv_render_pass *pass = (struct anv_render_pass *) pRenderPassBegin->renderPass;
3187 struct anv_framebuffer *framebuffer =
3188 (struct anv_framebuffer *) pRenderPassBegin->framebuffer;
3189
3190 cmd_buffer->framebuffer = framebuffer;
3191
3192 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DRAWING_RECTANGLE,
3193 .ClippedDrawingRectangleYMin = pass->render_area.offset.y,
3194 .ClippedDrawingRectangleXMin = pass->render_area.offset.x,
3195 .ClippedDrawingRectangleYMax =
3196 pass->render_area.offset.y + pass->render_area.extent.height - 1,
3197 .ClippedDrawingRectangleXMax =
3198 pass->render_area.offset.x + pass->render_area.extent.width - 1,
3199 .DrawingRectangleOriginY = 0,
3200 .DrawingRectangleOriginX = 0);
3201
3202 anv_cmd_buffer_fill_render_targets(cmd_buffer);
3203
3204 anv_cmd_buffer_clear(cmd_buffer, pass);
3205 }
3206
3207 void anv_CmdEndRenderPass(
3208 VkCmdBuffer cmdBuffer,
3209 VkRenderPass renderPass)
3210 {
3211 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3212 * hack but it ensures that render targets always actually get written.
3213 * Eventually, we should do flushing based on image format transitions
3214 * or something of that nature.
3215 */
3216 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *)cmdBuffer;
3217 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3218 .PostSyncOperation = NoWrite,
3219 .RenderTargetCacheFlushEnable = true,
3220 .InstructionCacheInvalidateEnable = true,
3221 .DepthCacheFlushEnable = true,
3222 .VFCacheInvalidationEnable = true,
3223 .TextureCacheInvalidationEnable = true,
3224 .CommandStreamerStallEnable = true);
3225 }
3226
3227 void vkCmdDbgMarkerBegin(
3228 VkCmdBuffer cmdBuffer,
3229 const char* pMarker)
3230 __attribute__ ((visibility ("default")));
3231
3232 void vkCmdDbgMarkerEnd(
3233 VkCmdBuffer cmdBuffer)
3234 __attribute__ ((visibility ("default")));
3235
3236 VkResult vkDbgSetObjectTag(
3237 VkDevice device,
3238 VkObject object,
3239 size_t tagSize,
3240 const void* pTag)
3241 __attribute__ ((visibility ("default")));
3242
3243
3244 void vkCmdDbgMarkerBegin(
3245 VkCmdBuffer cmdBuffer,
3246 const char* pMarker)
3247 {
3248 }
3249
3250 void vkCmdDbgMarkerEnd(
3251 VkCmdBuffer cmdBuffer)
3252 {
3253 }
3254
3255 VkResult vkDbgSetObjectTag(
3256 VkDevice device,
3257 VkObject object,
3258 size_t tagSize,
3259 const void* pTag)
3260 {
3261 return VK_SUCCESS;
3262 }