2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
33 anv_env_get_int(const char *name
)
35 const char *val
= getenv(name
);
40 return strtol(val
, NULL
, 0);
44 fill_physical_device(struct anv_physical_device
*device
,
45 struct anv_instance
*instance
,
50 fd
= open("/dev/dri/renderD128", O_RDWR
| O_CLOEXEC
);
52 return vk_error(VK_ERROR_UNAVAILABLE
);
54 device
->instance
= instance
;
57 device
->chipset_id
= anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device
->no_hw
= false;
59 if (device
->chipset_id
) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
63 device
->chipset_id
= anv_gem_get_param(fd
, I915_PARAM_CHIPSET_ID
);
65 if (!device
->chipset_id
)
68 device
->name
= brw_get_device_name(device
->chipset_id
);
69 device
->info
= brw_get_device_info(device
->chipset_id
, -1);
73 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_WAIT_TIMEOUT
))
76 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_EXECBUF2
))
79 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_LLC
))
82 if (!anv_gem_get_param(fd
, I915_PARAM_HAS_EXEC_CONSTANTS
))
92 return vk_error(VK_ERROR_UNAVAILABLE
);
95 static void *default_alloc(
99 VkSystemAllocType allocType
)
104 static void default_free(
111 static const VkAllocCallbacks default_alloc_callbacks
= {
113 .pfnAlloc
= default_alloc
,
114 .pfnFree
= default_free
117 VkResult
anv_CreateInstance(
118 const VkInstanceCreateInfo
* pCreateInfo
,
119 VkInstance
* pInstance
)
121 struct anv_instance
*instance
;
122 const VkAllocCallbacks
*alloc_callbacks
= &default_alloc_callbacks
;
123 void *user_data
= NULL
;
126 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
);
128 if (pCreateInfo
->pAllocCb
) {
129 alloc_callbacks
= pCreateInfo
->pAllocCb
;
130 user_data
= pCreateInfo
->pAllocCb
->pUserData
;
132 instance
= alloc_callbacks
->pfnAlloc(user_data
, sizeof(*instance
), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
137 instance
->pAllocUserData
= alloc_callbacks
->pUserData
;
138 instance
->pfnAlloc
= alloc_callbacks
->pfnAlloc
;
139 instance
->pfnFree
= alloc_callbacks
->pfnFree
;
140 instance
->apiVersion
= pCreateInfo
->pAppInfo
->apiVersion
;
142 instance
->physicalDeviceCount
= 0;
143 result
= fill_physical_device(&instance
->physicalDevice
,
144 instance
, "/dev/dri/renderD128");
146 if (result
!= VK_SUCCESS
)
149 instance
->physicalDeviceCount
++;
150 *pInstance
= (VkInstance
) instance
;
155 VkResult
anv_DestroyInstance(
156 VkInstance _instance
)
158 struct anv_instance
*instance
= (struct anv_instance
*) _instance
;
160 instance
->pfnFree(instance
->pAllocUserData
, instance
);
165 VkResult
anv_EnumeratePhysicalDevices(
166 VkInstance _instance
,
167 uint32_t* pPhysicalDeviceCount
,
168 VkPhysicalDevice
* pPhysicalDevices
)
170 struct anv_instance
*instance
= (struct anv_instance
*) _instance
;
172 if (*pPhysicalDeviceCount
>= 1)
173 pPhysicalDevices
[0] = (VkPhysicalDevice
) &instance
->physicalDevice
;
174 *pPhysicalDeviceCount
= instance
->physicalDeviceCount
;
179 VkResult
anv_GetPhysicalDeviceInfo(
180 VkPhysicalDevice physicalDevice
,
181 VkPhysicalDeviceInfoType infoType
,
185 struct anv_physical_device
*device
= (struct anv_physical_device
*) physicalDevice
;
186 VkPhysicalDeviceProperties
*properties
;
187 VkPhysicalDevicePerformance
*performance
;
188 VkPhysicalDeviceQueueProperties
*queue_properties
;
189 VkPhysicalDeviceMemoryProperties
*memory_properties
;
190 VkDisplayPropertiesWSI
*display_properties
;
191 uint64_t ns_per_tick
= 80;
193 switch ((uint32_t) infoType
) {
194 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES
:
197 *pDataSize
= sizeof(*properties
);
201 properties
->apiVersion
= 1;
202 properties
->driverVersion
= 1;
203 properties
->vendorId
= 0x8086;
204 properties
->deviceId
= device
->chipset_id
;
205 properties
->deviceType
= VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU
;
206 strcpy(properties
->deviceName
, device
->name
);
207 properties
->maxInlineMemoryUpdateSize
= 0;
208 properties
->maxBoundDescriptorSets
= MAX_SETS
;
209 properties
->maxThreadGroupSize
= 512;
210 properties
->timestampFrequency
= 1000 * 1000 * 1000 / ns_per_tick
;
211 properties
->multiColorAttachmentClears
= true;
212 properties
->maxDescriptorSets
= 8;
213 properties
->maxViewports
= 16;
214 properties
->maxColorAttachments
= 8;
217 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE
:
220 *pDataSize
= sizeof(*performance
);
224 performance
->maxDeviceClock
= 1.0;
225 performance
->aluPerClock
= 1.0;
226 performance
->texPerClock
= 1.0;
227 performance
->primsPerClock
= 1.0;
228 performance
->pixelsPerClock
= 1.0;
231 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES
:
232 queue_properties
= pData
;
234 *pDataSize
= sizeof(*queue_properties
);
238 queue_properties
->queueFlags
= 0;
239 queue_properties
->queueCount
= 1;
240 queue_properties
->maxAtomicCounters
= 0;
241 queue_properties
->supportsTimestamps
= true;
242 queue_properties
->maxMemReferences
= 256;
245 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES
:
246 memory_properties
= pData
;
248 *pDataSize
= sizeof(*memory_properties
);
252 memory_properties
->supportsMigration
= false;
253 memory_properties
->supportsPinning
= false;
256 case VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI
:
257 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_DISPLAY_PROPERTIES_WSI");
259 *pDataSize
= sizeof(*display_properties
);
263 display_properties
= pData
;
264 display_properties
->display
= 0;
265 display_properties
->physicalResolution
= (VkExtent2D
) { 0, 0 };
268 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI
:
269 anv_finishme("VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PRESENT_PROPERTIES_WSI");
274 return VK_UNSUPPORTED
;
279 void * vkGetProcAddr(
280 VkPhysicalDevice physicalDevice
,
283 return anv_lookup_entrypoint(pName
);
287 parse_debug_flags(struct anv_device
*device
)
289 const char *debug
, *p
, *end
;
291 debug
= getenv("INTEL_DEBUG");
292 device
->dump_aub
= false;
294 for (p
= debug
; *p
; p
= end
+ 1) {
295 end
= strchrnul(p
, ',');
296 if (end
- p
== 3 && memcmp(p
, "aub", 3) == 0)
297 device
->dump_aub
= true;
298 if (end
- p
== 5 && memcmp(p
, "no_hw", 5) == 0)
299 device
->no_hw
= true;
306 VkResult
anv_CreateDevice(
307 VkPhysicalDevice _physicalDevice
,
308 const VkDeviceCreateInfo
* pCreateInfo
,
311 struct anv_physical_device
*physicalDevice
=
312 (struct anv_physical_device
*) _physicalDevice
;
313 struct anv_instance
*instance
= physicalDevice
->instance
;
314 struct anv_device
*device
;
316 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO
);
318 device
= instance
->pfnAlloc(instance
->pAllocUserData
,
320 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
322 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
324 device
->no_hw
= physicalDevice
->no_hw
;
325 parse_debug_flags(device
);
327 device
->instance
= physicalDevice
->instance
;
328 device
->fd
= open("/dev/dri/renderD128", O_RDWR
| O_CLOEXEC
);
329 if (device
->fd
== -1)
332 device
->context_id
= anv_gem_create_context(device
);
333 if (device
->context_id
== -1)
336 anv_block_pool_init(&device
->dynamic_state_block_pool
, device
, 2048);
338 anv_state_pool_init(&device
->dynamic_state_pool
,
339 &device
->dynamic_state_block_pool
);
341 anv_block_pool_init(&device
->instruction_block_pool
, device
, 2048);
342 anv_block_pool_init(&device
->surface_state_block_pool
, device
, 2048);
345 /* Binding table pointers are only 16 bits so we have to make sure that
346 * they get allocated at the beginning of the surface state BO. To
347 * handle this, we create a separate block pool that works out of the
348 * first 64 KB of the surface state BO.
350 anv_block_pool_init_slave(&device
->binding_table_block_pool
,
351 &device
->surface_state_block_pool
, 32);
353 anv_state_pool_init(&device
->surface_state_pool
,
354 &device
->surface_state_block_pool
);
356 device
->compiler
= anv_compiler_create(device
->fd
);
357 device
->aub_writer
= NULL
;
359 device
->info
= *physicalDevice
->info
;
361 pthread_mutex_init(&device
->mutex
, NULL
);
363 anv_device_init_meta(device
);
365 *pDevice
= (VkDevice
) device
;
372 anv_device_free(device
, device
);
374 return vk_error(VK_ERROR_UNAVAILABLE
);
377 VkResult
anv_DestroyDevice(
380 struct anv_device
*device
= (struct anv_device
*) _device
;
382 anv_compiler_destroy(device
->compiler
);
384 anv_block_pool_finish(&device
->dynamic_state_block_pool
);
385 anv_block_pool_finish(&device
->instruction_block_pool
);
386 anv_block_pool_finish(&device
->surface_state_block_pool
);
390 if (device
->aub_writer
)
391 anv_aub_writer_destroy(device
->aub_writer
);
393 anv_device_free(device
, device
);
398 VkResult
anv_GetGlobalExtensionInfo(
399 VkExtensionInfoType infoType
,
400 uint32_t extensionIndex
,
404 static const VkExtensionProperties extensions
[] = {
406 .extName
= "VK_WSI_LunarG",
410 uint32_t count
= ARRAY_SIZE(extensions
);
413 case VK_EXTENSION_INFO_TYPE_COUNT
:
414 memcpy(pData
, &count
, sizeof(count
));
415 *pDataSize
= sizeof(count
);
418 case VK_EXTENSION_INFO_TYPE_PROPERTIES
:
419 if (extensionIndex
>= count
)
420 return vk_error(VK_ERROR_INVALID_EXTENSION
);
422 memcpy(pData
, &extensions
[extensionIndex
], sizeof(extensions
[0]));
423 *pDataSize
= sizeof(extensions
[0]);
427 return VK_UNSUPPORTED
;
431 VkResult
anv_GetPhysicalDeviceExtensionInfo(
432 VkPhysicalDevice physicalDevice
,
433 VkExtensionInfoType infoType
,
434 uint32_t extensionIndex
,
441 case VK_EXTENSION_INFO_TYPE_COUNT
:
450 case VK_EXTENSION_INFO_TYPE_PROPERTIES
:
451 return vk_error(VK_ERROR_INVALID_EXTENSION
);
454 return VK_UNSUPPORTED
;
458 VkResult
anv_EnumerateLayers(
459 VkPhysicalDevice physicalDevice
,
460 size_t maxStringSize
,
462 char* const* pOutLayers
,
470 VkResult
anv_GetDeviceQueue(
472 uint32_t queueNodeIndex
,
476 struct anv_device
*device
= (struct anv_device
*) _device
;
477 struct anv_queue
*queue
;
479 /* FIXME: Should allocate these at device create time. */
481 queue
= anv_device_alloc(device
, sizeof(*queue
), 8,
482 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
484 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
486 queue
->device
= device
;
487 queue
->pool
= &device
->surface_state_pool
;
489 queue
->completed_serial
= anv_state_pool_alloc(queue
->pool
, 4, 4);
490 *(uint32_t *)queue
->completed_serial
.map
= 0;
491 queue
->next_serial
= 1;
493 *pQueue
= (VkQueue
) queue
;
498 static const uint32_t BATCH_SIZE
= 8192;
501 anv_batch_init(struct anv_batch
*batch
, struct anv_device
*device
)
505 result
= anv_bo_init_new(&batch
->bo
, device
, BATCH_SIZE
);
506 if (result
!= VK_SUCCESS
)
510 anv_gem_mmap(device
, batch
->bo
.gem_handle
, 0, BATCH_SIZE
);
511 if (batch
->bo
.map
== NULL
) {
512 result
= vk_error(VK_ERROR_MEMORY_MAP_FAILED
);
516 batch
->cmd_relocs
.num_relocs
= 0;
517 batch
->next
= batch
->bo
.map
;
522 anv_gem_close(device
, batch
->bo
.gem_handle
);
529 anv_batch_finish(struct anv_batch
*batch
, struct anv_device
*device
)
531 anv_gem_munmap(batch
->bo
.map
, BATCH_SIZE
);
532 anv_gem_close(device
, batch
->bo
.gem_handle
);
536 anv_batch_reset(struct anv_batch
*batch
)
538 batch
->next
= batch
->bo
.map
;
539 batch
->cmd_relocs
.num_relocs
= 0;
543 anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
)
545 void *p
= batch
->next
;
547 batch
->next
+= num_dwords
* 4;
553 anv_reloc_list_append(struct anv_reloc_list
*list
,
554 struct anv_reloc_list
*other
, uint32_t offset
)
558 count
= list
->num_relocs
;
559 memcpy(&list
->relocs
[count
], &other
->relocs
[0],
560 other
->num_relocs
* sizeof(other
->relocs
[0]));
561 memcpy(&list
->reloc_bos
[count
], &other
->reloc_bos
[0],
562 other
->num_relocs
* sizeof(other
->reloc_bos
[0]));
563 for (i
= 0; i
< other
->num_relocs
; i
++)
564 list
->relocs
[i
+ count
].offset
+= offset
;
566 count
+= other
->num_relocs
;
570 anv_reloc_list_add(struct anv_reloc_list
*list
,
572 struct anv_bo
*target_bo
, uint32_t delta
)
574 struct drm_i915_gem_relocation_entry
*entry
;
577 assert(list
->num_relocs
< ANV_BATCH_MAX_RELOCS
);
579 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
580 index
= list
->num_relocs
++;
581 list
->reloc_bos
[index
] = target_bo
;
582 entry
= &list
->relocs
[index
];
583 entry
->target_handle
= target_bo
->gem_handle
;
584 entry
->delta
= delta
;
585 entry
->offset
= offset
;
586 entry
->presumed_offset
= target_bo
->offset
;
587 entry
->read_domains
= 0;
588 entry
->write_domain
= 0;
590 return target_bo
->offset
+ delta
;
594 anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
)
596 uint32_t size
, offset
;
598 size
= other
->next
- other
->bo
.map
;
599 memcpy(batch
->next
, other
->bo
.map
, size
);
601 offset
= batch
->next
- batch
->bo
.map
;
602 anv_reloc_list_append(&batch
->cmd_relocs
, &other
->cmd_relocs
, offset
);
608 anv_batch_emit_reloc(struct anv_batch
*batch
,
609 void *location
, struct anv_bo
*bo
, uint32_t delta
)
611 return anv_reloc_list_add(&batch
->cmd_relocs
,
612 location
- batch
->bo
.map
, bo
, delta
);
615 VkResult
anv_QueueSubmit(
617 uint32_t cmdBufferCount
,
618 const VkCmdBuffer
* pCmdBuffers
,
621 struct anv_queue
*queue
= (struct anv_queue
*) _queue
;
622 struct anv_device
*device
= queue
->device
;
623 struct anv_fence
*fence
= (struct anv_fence
*) _fence
;
626 for (uint32_t i
= 0; i
< cmdBufferCount
; i
++) {
627 struct anv_cmd_buffer
*cmd_buffer
=
628 (struct anv_cmd_buffer
*) pCmdBuffers
[i
];
630 if (device
->dump_aub
)
631 anv_cmd_buffer_dump(cmd_buffer
);
633 if (!device
->no_hw
) {
634 ret
= anv_gem_execbuffer(device
, &cmd_buffer
->execbuf
);
636 return vk_error(VK_ERROR_UNKNOWN
);
639 ret
= anv_gem_execbuffer(device
, &fence
->execbuf
);
641 return vk_error(VK_ERROR_UNKNOWN
);
644 for (uint32_t i
= 0; i
< cmd_buffer
->bo_count
; i
++)
645 cmd_buffer
->exec2_bos
[i
]->offset
= cmd_buffer
->exec2_objects
[i
].offset
;
647 *(uint32_t *)queue
->completed_serial
.map
= cmd_buffer
->serial
;
654 VkResult
anv_QueueAddMemReferences(
657 const VkDeviceMemory
* pMems
)
662 VkResult
anv_QueueRemoveMemReferences(
665 const VkDeviceMemory
* pMems
)
670 VkResult
anv_QueueWaitIdle(
673 struct anv_queue
*queue
= (struct anv_queue
*) _queue
;
675 return vkDeviceWaitIdle((VkDevice
) queue
->device
);
678 VkResult
anv_DeviceWaitIdle(
681 struct anv_device
*device
= (struct anv_device
*) _device
;
682 struct anv_state state
;
683 struct anv_batch batch
;
684 struct drm_i915_gem_execbuffer2 execbuf
;
685 struct drm_i915_gem_exec_object2 exec2_objects
[1];
686 struct anv_bo
*bo
= NULL
;
691 state
= anv_state_pool_alloc(&device
->dynamic_state_pool
, 32, 32);
692 bo
= &device
->dynamic_state_pool
.block_pool
->bo
;
693 batch
.next
= state
.map
;
694 anv_batch_emit(&batch
, GEN8_MI_BATCH_BUFFER_END
);
695 anv_batch_emit(&batch
, GEN8_MI_NOOP
);
697 exec2_objects
[0].handle
= bo
->gem_handle
;
698 exec2_objects
[0].relocation_count
= 0;
699 exec2_objects
[0].relocs_ptr
= 0;
700 exec2_objects
[0].alignment
= 0;
701 exec2_objects
[0].offset
= bo
->offset
;
702 exec2_objects
[0].flags
= 0;
703 exec2_objects
[0].rsvd1
= 0;
704 exec2_objects
[0].rsvd2
= 0;
706 execbuf
.buffers_ptr
= (uintptr_t) exec2_objects
;
707 execbuf
.buffer_count
= 1;
708 execbuf
.batch_start_offset
= state
.offset
;
709 execbuf
.batch_len
= batch
.next
- state
.map
;
710 execbuf
.cliprects_ptr
= 0;
711 execbuf
.num_cliprects
= 0;
716 I915_EXEC_HANDLE_LUT
| I915_EXEC_NO_RELOC
| I915_EXEC_RENDER
;
717 execbuf
.rsvd1
= device
->context_id
;
720 if (!device
->no_hw
) {
721 ret
= anv_gem_execbuffer(device
, &execbuf
);
723 result
= vk_error(VK_ERROR_UNKNOWN
);
728 ret
= anv_gem_wait(device
, bo
->gem_handle
, &timeout
);
730 result
= vk_error(VK_ERROR_UNKNOWN
);
735 anv_state_pool_free(&device
->dynamic_state_pool
, state
);
740 anv_state_pool_free(&device
->dynamic_state_pool
, state
);
746 anv_device_alloc(struct anv_device
* device
,
749 VkSystemAllocType allocType
)
751 return device
->instance
->pfnAlloc(device
->instance
->pAllocUserData
,
758 anv_device_free(struct anv_device
* device
,
761 return device
->instance
->pfnFree(device
->instance
->pAllocUserData
,
766 anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
)
768 bo
->gem_handle
= anv_gem_create(device
, size
);
770 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY
);
780 VkResult
anv_AllocMemory(
782 const VkMemoryAllocInfo
* pAllocInfo
,
783 VkDeviceMemory
* pMem
)
785 struct anv_device
*device
= (struct anv_device
*) _device
;
786 struct anv_device_memory
*mem
;
789 assert(pAllocInfo
->sType
== VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO
);
791 mem
= anv_device_alloc(device
, sizeof(*mem
), 8,
792 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
794 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
796 result
= anv_bo_init_new(&mem
->bo
, device
, pAllocInfo
->allocationSize
);
797 if (result
!= VK_SUCCESS
)
800 *pMem
= (VkDeviceMemory
) mem
;
805 anv_device_free(device
, mem
);
810 VkResult
anv_FreeMemory(
814 struct anv_device
*device
= (struct anv_device
*) _device
;
815 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
818 anv_gem_munmap(mem
->bo
.map
, mem
->bo
.size
);
820 if (mem
->bo
.gem_handle
!= 0)
821 anv_gem_close(device
, mem
->bo
.gem_handle
);
823 anv_device_free(device
, mem
);
828 VkResult
anv_SetMemoryPriority(
831 VkMemoryPriority priority
)
836 VkResult
anv_MapMemory(
841 VkMemoryMapFlags flags
,
844 struct anv_device
*device
= (struct anv_device
*) _device
;
845 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
847 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
848 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
849 * at a time is valid. We could just mmap up front and return an offset
850 * pointer here, but that may exhaust virtual memory on 32 bit
853 mem
->map
= anv_gem_mmap(device
, mem
->bo
.gem_handle
, offset
, size
);
854 mem
->map_size
= size
;
861 VkResult
anv_UnmapMemory(
865 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
867 anv_gem_munmap(mem
->map
, mem
->map_size
);
872 VkResult
anv_FlushMappedMemory(
878 /* clflush here for !llc platforms */
883 VkResult
anv_PinSystemMemory(
887 VkDeviceMemory
* pMem
)
892 VkResult
anv_GetMultiDeviceCompatibility(
893 VkPhysicalDevice physicalDevice0
,
894 VkPhysicalDevice physicalDevice1
,
895 VkPhysicalDeviceCompatibilityInfo
* pInfo
)
897 return VK_UNSUPPORTED
;
900 VkResult
anv_OpenSharedMemory(
902 const VkMemoryOpenInfo
* pOpenInfo
,
903 VkDeviceMemory
* pMem
)
905 return VK_UNSUPPORTED
;
908 VkResult
anv_OpenSharedSemaphore(
910 const VkSemaphoreOpenInfo
* pOpenInfo
,
911 VkSemaphore
* pSemaphore
)
913 return VK_UNSUPPORTED
;
916 VkResult
anv_OpenPeerMemory(
918 const VkPeerMemoryOpenInfo
* pOpenInfo
,
919 VkDeviceMemory
* pMem
)
921 return VK_UNSUPPORTED
;
924 VkResult
anv_OpenPeerImage(
926 const VkPeerImageOpenInfo
* pOpenInfo
,
928 VkDeviceMemory
* pMem
)
930 return VK_UNSUPPORTED
;
933 VkResult
anv_DestroyObject(
935 VkObjectType objType
,
938 struct anv_device
*device
= (struct anv_device
*) _device
;
939 struct anv_object
*object
= (struct anv_object
*) _object
;
942 case VK_OBJECT_TYPE_INSTANCE
:
943 return anv_DestroyInstance((VkInstance
) _object
);
945 case VK_OBJECT_TYPE_PHYSICAL_DEVICE
:
946 /* We don't want to actually destroy physical devices */
949 case VK_OBJECT_TYPE_DEVICE
:
950 assert(_device
== (VkDevice
) _object
);
951 return anv_DestroyDevice((VkDevice
) _object
);
953 case VK_OBJECT_TYPE_QUEUE
:
957 case VK_OBJECT_TYPE_DEVICE_MEMORY
:
958 return anv_FreeMemory(_device
, (VkDeviceMemory
) _object
);
960 case VK_OBJECT_TYPE_DESCRIPTOR_POOL
:
961 /* These are just dummys anyway, so we don't need to destroy them */
964 case VK_OBJECT_TYPE_BUFFER
:
965 case VK_OBJECT_TYPE_BUFFER_VIEW
:
966 case VK_OBJECT_TYPE_IMAGE
:
967 case VK_OBJECT_TYPE_IMAGE_VIEW
:
968 case VK_OBJECT_TYPE_COLOR_ATTACHMENT_VIEW
:
969 case VK_OBJECT_TYPE_DEPTH_STENCIL_VIEW
:
970 case VK_OBJECT_TYPE_SHADER
:
971 case VK_OBJECT_TYPE_PIPELINE_LAYOUT
:
972 case VK_OBJECT_TYPE_SAMPLER
:
973 case VK_OBJECT_TYPE_DESCRIPTOR_SET
:
974 case VK_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT
:
975 case VK_OBJECT_TYPE_DYNAMIC_RS_STATE
:
976 case VK_OBJECT_TYPE_DYNAMIC_CB_STATE
:
977 case VK_OBJECT_TYPE_DYNAMIC_DS_STATE
:
978 case VK_OBJECT_TYPE_RENDER_PASS
:
979 /* These are trivially destroyable */
980 anv_device_free(device
, (void *) _object
);
983 case VK_OBJECT_TYPE_COMMAND_BUFFER
:
984 case VK_OBJECT_TYPE_PIPELINE
:
985 case VK_OBJECT_TYPE_DYNAMIC_VP_STATE
:
986 case VK_OBJECT_TYPE_FENCE
:
987 case VK_OBJECT_TYPE_QUERY_POOL
:
988 case VK_OBJECT_TYPE_FRAMEBUFFER
:
989 (object
->destructor
)(device
, object
, objType
);
992 case VK_OBJECT_TYPE_SEMAPHORE
:
993 case VK_OBJECT_TYPE_EVENT
:
994 stub_return(VK_UNSUPPORTED
);
997 unreachable("Invalid object type");
1002 fill_memory_requirements(
1003 VkObjectType objType
,
1005 VkMemoryRequirements
* memory_requirements
)
1007 struct anv_buffer
*buffer
;
1008 struct anv_image
*image
;
1010 memory_requirements
->memPropsAllowed
=
1011 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT
|
1012 VK_MEMORY_PROPERTY_HOST_DEVICE_COHERENT_BIT
|
1013 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1014 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT
|
1015 VK_MEMORY_PROPERTY_PREFER_HOST_LOCAL
|
1016 VK_MEMORY_PROPERTY_SHAREABLE_BIT
;
1018 memory_requirements
->memPropsRequired
= 0;
1021 case VK_OBJECT_TYPE_BUFFER
:
1022 buffer
= (struct anv_buffer
*) object
;
1023 memory_requirements
->size
= buffer
->size
;
1024 memory_requirements
->alignment
= 16;
1026 case VK_OBJECT_TYPE_IMAGE
:
1027 image
= (struct anv_image
*) object
;
1028 memory_requirements
->size
= image
->size
;
1029 memory_requirements
->alignment
= image
->alignment
;
1032 memory_requirements
->size
= 0;
1038 get_allocation_count(VkObjectType objType
)
1041 case VK_OBJECT_TYPE_BUFFER
:
1042 case VK_OBJECT_TYPE_IMAGE
:
1049 VkResult
anv_GetObjectInfo(
1051 VkObjectType objType
,
1053 VkObjectInfoType infoType
,
1057 VkMemoryRequirements memory_requirements
;
1061 case VK_OBJECT_INFO_TYPE_MEMORY_REQUIREMENTS
:
1062 *pDataSize
= sizeof(memory_requirements
);
1066 fill_memory_requirements(objType
, object
, pData
);
1069 case VK_OBJECT_INFO_TYPE_MEMORY_ALLOCATION_COUNT
:
1070 *pDataSize
= sizeof(count
);
1075 *count
= get_allocation_count(objType
);
1079 return VK_UNSUPPORTED
;
1084 VkResult
anv_QueueBindObjectMemory(
1086 VkObjectType objType
,
1088 uint32_t allocationIdx
,
1089 VkDeviceMemory _mem
,
1090 VkDeviceSize memOffset
)
1092 struct anv_buffer
*buffer
;
1093 struct anv_image
*image
;
1094 struct anv_device_memory
*mem
= (struct anv_device_memory
*) _mem
;
1097 case VK_OBJECT_TYPE_BUFFER
:
1098 buffer
= (struct anv_buffer
*) object
;
1099 buffer
->bo
= &mem
->bo
;
1100 buffer
->offset
= memOffset
;
1102 case VK_OBJECT_TYPE_IMAGE
:
1103 image
= (struct anv_image
*) object
;
1104 image
->bo
= &mem
->bo
;
1105 image
->offset
= memOffset
;
1114 VkResult
anv_QueueBindObjectMemoryRange(
1116 VkObjectType objType
,
1118 uint32_t allocationIdx
,
1119 VkDeviceSize rangeOffset
,
1120 VkDeviceSize rangeSize
,
1122 VkDeviceSize memOffset
)
1124 stub_return(VK_UNSUPPORTED
);
1127 VkResult
anv_QueueBindImageMemoryRange(
1130 uint32_t allocationIdx
,
1131 const VkImageMemoryBindInfo
* pBindInfo
,
1133 VkDeviceSize memOffset
)
1135 stub_return(VK_UNSUPPORTED
);
1139 anv_fence_destroy(struct anv_device
*device
,
1140 struct anv_object
*object
,
1141 VkObjectType obj_type
)
1143 struct anv_fence
*fence
= (struct anv_fence
*) object
;
1145 assert(obj_type
== VK_OBJECT_TYPE_FENCE
);
1147 anv_gem_munmap(fence
->bo
.map
, fence
->bo
.size
);
1148 anv_gem_close(device
, fence
->bo
.gem_handle
);
1149 anv_device_free(device
, fence
);
1152 VkResult
anv_CreateFence(
1154 const VkFenceCreateInfo
* pCreateInfo
,
1157 struct anv_device
*device
= (struct anv_device
*) _device
;
1158 struct anv_fence
*fence
;
1159 struct anv_batch batch
;
1162 const uint32_t fence_size
= 128;
1164 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FENCE_CREATE_INFO
);
1166 fence
= anv_device_alloc(device
, sizeof(*fence
), 8,
1167 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1169 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1171 result
= anv_bo_init_new(&fence
->bo
, device
, fence_size
);
1172 if (result
!= VK_SUCCESS
)
1175 fence
->base
.destructor
= anv_fence_destroy
;
1178 anv_gem_mmap(device
, fence
->bo
.gem_handle
, 0, fence
->bo
.size
);
1179 batch
.next
= fence
->bo
.map
;
1180 anv_batch_emit(&batch
, GEN8_MI_BATCH_BUFFER_END
);
1181 anv_batch_emit(&batch
, GEN8_MI_NOOP
);
1183 fence
->exec2_objects
[0].handle
= fence
->bo
.gem_handle
;
1184 fence
->exec2_objects
[0].relocation_count
= 0;
1185 fence
->exec2_objects
[0].relocs_ptr
= 0;
1186 fence
->exec2_objects
[0].alignment
= 0;
1187 fence
->exec2_objects
[0].offset
= fence
->bo
.offset
;
1188 fence
->exec2_objects
[0].flags
= 0;
1189 fence
->exec2_objects
[0].rsvd1
= 0;
1190 fence
->exec2_objects
[0].rsvd2
= 0;
1192 fence
->execbuf
.buffers_ptr
= (uintptr_t) fence
->exec2_objects
;
1193 fence
->execbuf
.buffer_count
= 1;
1194 fence
->execbuf
.batch_start_offset
= 0;
1195 fence
->execbuf
.batch_len
= batch
.next
- fence
->bo
.map
;
1196 fence
->execbuf
.cliprects_ptr
= 0;
1197 fence
->execbuf
.num_cliprects
= 0;
1198 fence
->execbuf
.DR1
= 0;
1199 fence
->execbuf
.DR4
= 0;
1201 fence
->execbuf
.flags
=
1202 I915_EXEC_HANDLE_LUT
| I915_EXEC_NO_RELOC
| I915_EXEC_RENDER
;
1203 fence
->execbuf
.rsvd1
= device
->context_id
;
1204 fence
->execbuf
.rsvd2
= 0;
1206 *pFence
= (VkQueryPool
) fence
;
1211 anv_device_free(device
, fence
);
1216 VkResult
anv_ResetFences(
1218 uint32_t fenceCount
,
1221 struct anv_fence
**fences
= (struct anv_fence
**) pFences
;
1223 for (uint32_t i
; i
< fenceCount
; i
++)
1224 fences
[i
]->ready
= false;
1229 VkResult
anv_GetFenceStatus(
1233 struct anv_device
*device
= (struct anv_device
*) _device
;
1234 struct anv_fence
*fence
= (struct anv_fence
*) _fence
;
1241 ret
= anv_gem_wait(device
, fence
->bo
.gem_handle
, &t
);
1243 fence
->ready
= true;
1247 return VK_NOT_READY
;
1250 VkResult
anv_WaitForFences(
1252 uint32_t fenceCount
,
1253 const VkFence
* pFences
,
1257 struct anv_device
*device
= (struct anv_device
*) _device
;
1258 struct anv_fence
**fences
= (struct anv_fence
**) pFences
;
1259 int64_t t
= timeout
;
1262 /* FIXME: handle !waitAll */
1264 for (uint32_t i
= 0; i
< fenceCount
; i
++) {
1265 ret
= anv_gem_wait(device
, fences
[i
]->bo
.gem_handle
, &t
);
1266 if (ret
== -1 && errno
== ETIME
)
1269 return vk_error(VK_ERROR_UNKNOWN
);
1275 // Queue semaphore functions
1277 VkResult
anv_CreateSemaphore(
1279 const VkSemaphoreCreateInfo
* pCreateInfo
,
1280 VkSemaphore
* pSemaphore
)
1282 stub_return(VK_UNSUPPORTED
);
1285 VkResult
anv_QueueSignalSemaphore(
1287 VkSemaphore semaphore
)
1289 stub_return(VK_UNSUPPORTED
);
1292 VkResult
anv_QueueWaitSemaphore(
1294 VkSemaphore semaphore
)
1296 stub_return(VK_UNSUPPORTED
);
1301 VkResult
anv_CreateEvent(
1303 const VkEventCreateInfo
* pCreateInfo
,
1306 stub_return(VK_UNSUPPORTED
);
1309 VkResult
anv_GetEventStatus(
1313 stub_return(VK_UNSUPPORTED
);
1316 VkResult
anv_SetEvent(
1320 stub_return(VK_UNSUPPORTED
);
1323 VkResult
anv_ResetEvent(
1327 stub_return(VK_UNSUPPORTED
);
1333 anv_query_pool_destroy(struct anv_device
*device
,
1334 struct anv_object
*object
,
1335 VkObjectType obj_type
)
1337 struct anv_query_pool
*pool
= (struct anv_query_pool
*) object
;
1339 assert(obj_type
== VK_OBJECT_TYPE_QUERY_POOL
);
1341 anv_gem_munmap(pool
->bo
.map
, pool
->bo
.size
);
1342 anv_gem_close(device
, pool
->bo
.gem_handle
);
1343 anv_device_free(device
, pool
);
1346 VkResult
anv_CreateQueryPool(
1348 const VkQueryPoolCreateInfo
* pCreateInfo
,
1349 VkQueryPool
* pQueryPool
)
1351 struct anv_device
*device
= (struct anv_device
*) _device
;
1352 struct anv_query_pool
*pool
;
1356 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO
);
1358 switch (pCreateInfo
->queryType
) {
1359 case VK_QUERY_TYPE_OCCLUSION
:
1361 case VK_QUERY_TYPE_PIPELINE_STATISTICS
:
1362 return VK_UNSUPPORTED
;
1367 pool
= anv_device_alloc(device
, sizeof(*pool
), 8,
1368 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1370 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1372 pool
->base
.destructor
= anv_query_pool_destroy
;
1374 pool
->type
= pCreateInfo
->queryType
;
1375 size
= pCreateInfo
->slots
* sizeof(struct anv_query_pool_slot
);
1376 result
= anv_bo_init_new(&pool
->bo
, device
, size
);
1377 if (result
!= VK_SUCCESS
)
1380 pool
->bo
.map
= anv_gem_mmap(device
, pool
->bo
.gem_handle
, 0, size
);
1382 *pQueryPool
= (VkQueryPool
) pool
;
1387 anv_device_free(device
, pool
);
1392 VkResult
anv_GetQueryPoolResults(
1394 VkQueryPool queryPool
,
1395 uint32_t startQuery
,
1396 uint32_t queryCount
,
1399 VkQueryResultFlags flags
)
1401 struct anv_device
*device
= (struct anv_device
*) _device
;
1402 struct anv_query_pool
*pool
= (struct anv_query_pool
*) queryPool
;
1403 struct anv_query_pool_slot
*slot
= pool
->bo
.map
;
1404 int64_t timeout
= INT64_MAX
;
1405 uint32_t *dst32
= pData
;
1406 uint64_t *dst64
= pData
;
1410 if (flags
& VK_QUERY_RESULT_WITH_AVAILABILITY_BIT
) {
1411 /* Where is the availabilty info supposed to go? */
1412 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
1413 return VK_UNSUPPORTED
;
1416 assert(pool
->type
== VK_QUERY_TYPE_OCCLUSION
);
1418 if (flags
& VK_QUERY_RESULT_64_BIT
)
1419 *pDataSize
= queryCount
* sizeof(uint64_t);
1421 *pDataSize
= queryCount
* sizeof(uint32_t);
1426 if (flags
& VK_QUERY_RESULT_WAIT_BIT
) {
1427 ret
= anv_gem_wait(device
, pool
->bo
.gem_handle
, &timeout
);
1429 return vk_error(VK_ERROR_UNKNOWN
);
1432 for (uint32_t i
= 0; i
< queryCount
; i
++) {
1433 result
= slot
[startQuery
+ i
].end
- slot
[startQuery
+ i
].begin
;
1434 if (flags
& VK_QUERY_RESULT_64_BIT
) {
1437 if (result
> UINT32_MAX
)
1438 result
= UINT32_MAX
;
1448 VkResult
anv_CreateBuffer(
1450 const VkBufferCreateInfo
* pCreateInfo
,
1453 struct anv_device
*device
= (struct anv_device
*) _device
;
1454 struct anv_buffer
*buffer
;
1456 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO
);
1458 buffer
= anv_device_alloc(device
, sizeof(*buffer
), 8,
1459 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1461 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1463 buffer
->size
= pCreateInfo
->size
;
1467 *pBuffer
= (VkBuffer
) buffer
;
1472 // Buffer view functions
1474 VkResult
anv_CreateBufferView(
1476 const VkBufferViewCreateInfo
* pCreateInfo
,
1477 VkBufferView
* pView
)
1479 struct anv_device
*device
= (struct anv_device
*) _device
;
1480 struct anv_buffer
*buffer
= (struct anv_buffer
*) pCreateInfo
->buffer
;
1481 struct anv_surface_view
*view
;
1482 const struct anv_format
*format
;
1484 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO
);
1486 view
= anv_device_alloc(device
, sizeof(*view
), 8,
1487 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1489 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1491 view
->bo
= buffer
->bo
;
1492 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
1493 view
->surface_state
=
1494 anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1495 view
->format
= pCreateInfo
->format
;
1497 format
= anv_format_for_vk_format(pCreateInfo
->format
);
1498 /* This assumes RGBA float format. */
1499 uint32_t stride
= 4;
1500 uint32_t num_elements
= pCreateInfo
->range
/ stride
;
1501 struct GEN8_RENDER_SURFACE_STATE surface_state
= {
1502 .SurfaceType
= SURFTYPE_BUFFER
,
1503 .SurfaceArray
= false,
1504 .SurfaceFormat
= format
->format
,
1505 .SurfaceVerticalAlignment
= VALIGN4
,
1506 .SurfaceHorizontalAlignment
= HALIGN4
,
1508 .VerticalLineStride
= 0,
1509 .VerticalLineStrideOffset
= 0,
1510 .SamplerL2BypassModeDisable
= true,
1511 .RenderCacheReadWriteMode
= WriteOnlyCache
,
1512 .MemoryObjectControlState
= GEN8_MOCS
,
1515 .Height
= (num_elements
>> 7) & 0x3fff,
1516 .Width
= num_elements
& 0x7f,
1517 .Depth
= (num_elements
>> 21) & 0x3f,
1518 .SurfacePitch
= stride
- 1,
1519 .MinimumArrayElement
= 0,
1520 .NumberofMultisamples
= MULTISAMPLECOUNT_1
,
1525 .AuxiliarySurfaceMode
= AUX_NONE
,
1527 .GreenClearColor
= 0,
1528 .BlueClearColor
= 0,
1529 .AlphaClearColor
= 0,
1530 .ShaderChannelSelectRed
= SCS_RED
,
1531 .ShaderChannelSelectGreen
= SCS_GREEN
,
1532 .ShaderChannelSelectBlue
= SCS_BLUE
,
1533 .ShaderChannelSelectAlpha
= SCS_ALPHA
,
1534 .ResourceMinLOD
= 0,
1535 /* FIXME: We assume that the image must be bound at this time. */
1536 .SurfaceBaseAddress
= { NULL
, view
->offset
},
1539 GEN8_RENDER_SURFACE_STATE_pack(NULL
, view
->surface_state
.map
, &surface_state
);
1541 *pView
= (VkImageView
) view
;
1546 // Sampler functions
1548 VkResult
anv_CreateSampler(
1550 const VkSamplerCreateInfo
* pCreateInfo
,
1551 VkSampler
* pSampler
)
1553 struct anv_device
*device
= (struct anv_device
*) _device
;
1554 struct anv_sampler
*sampler
;
1556 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO
);
1558 sampler
= anv_device_alloc(device
, sizeof(*sampler
), 8,
1559 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1561 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1563 static const uint32_t vk_to_gen_tex_filter
[] = {
1564 [VK_TEX_FILTER_NEAREST
] = MAPFILTER_NEAREST
,
1565 [VK_TEX_FILTER_LINEAR
] = MAPFILTER_LINEAR
1568 static const uint32_t vk_to_gen_mipmap_mode
[] = {
1569 [VK_TEX_MIPMAP_MODE_BASE
] = MIPFILTER_NONE
,
1570 [VK_TEX_MIPMAP_MODE_NEAREST
] = MIPFILTER_NEAREST
,
1571 [VK_TEX_MIPMAP_MODE_LINEAR
] = MIPFILTER_LINEAR
1574 static const uint32_t vk_to_gen_tex_address
[] = {
1575 [VK_TEX_ADDRESS_WRAP
] = TCM_WRAP
,
1576 [VK_TEX_ADDRESS_MIRROR
] = TCM_MIRROR
,
1577 [VK_TEX_ADDRESS_CLAMP
] = TCM_CLAMP
,
1578 [VK_TEX_ADDRESS_MIRROR_ONCE
] = TCM_MIRROR_ONCE
,
1579 [VK_TEX_ADDRESS_CLAMP_BORDER
] = TCM_CLAMP_BORDER
,
1582 static const uint32_t vk_to_gen_compare_op
[] = {
1583 [VK_COMPARE_OP_NEVER
] = PREFILTEROPNEVER
,
1584 [VK_COMPARE_OP_LESS
] = PREFILTEROPLESS
,
1585 [VK_COMPARE_OP_EQUAL
] = PREFILTEROPEQUAL
,
1586 [VK_COMPARE_OP_LESS_EQUAL
] = PREFILTEROPLEQUAL
,
1587 [VK_COMPARE_OP_GREATER
] = PREFILTEROPGREATER
,
1588 [VK_COMPARE_OP_NOT_EQUAL
] = PREFILTEROPNOTEQUAL
,
1589 [VK_COMPARE_OP_GREATER_EQUAL
] = PREFILTEROPGEQUAL
,
1590 [VK_COMPARE_OP_ALWAYS
] = PREFILTEROPALWAYS
,
1593 if (pCreateInfo
->maxAnisotropy
> 0)
1594 anv_finishme("missing support for anisotropic filtering");
1596 struct GEN8_SAMPLER_STATE sampler_state
= {
1597 .SamplerDisable
= false,
1598 .TextureBorderColorMode
= DX10OGL
,
1599 .LODPreClampMode
= 0,
1601 .MipModeFilter
= vk_to_gen_mipmap_mode
[pCreateInfo
->mipMode
],
1602 .MagModeFilter
= vk_to_gen_tex_filter
[pCreateInfo
->magFilter
],
1603 .MinModeFilter
= vk_to_gen_tex_filter
[pCreateInfo
->minFilter
],
1604 .TextureLODBias
= pCreateInfo
->mipLodBias
* 256,
1605 .AnisotropicAlgorithm
= EWAApproximation
,
1606 .MinLOD
= pCreateInfo
->minLod
* 256,
1607 .MaxLOD
= pCreateInfo
->maxLod
* 256,
1608 .ChromaKeyEnable
= 0,
1609 .ChromaKeyIndex
= 0,
1611 .ShadowFunction
= vk_to_gen_compare_op
[pCreateInfo
->compareOp
],
1612 .CubeSurfaceControlMode
= 0,
1613 .IndirectStatePointer
= 0,
1614 .LODClampMagnificationMode
= MIPNONE
,
1615 .MaximumAnisotropy
= 0,
1616 .RAddressMinFilterRoundingEnable
= 0,
1617 .RAddressMagFilterRoundingEnable
= 0,
1618 .VAddressMinFilterRoundingEnable
= 0,
1619 .VAddressMagFilterRoundingEnable
= 0,
1620 .UAddressMinFilterRoundingEnable
= 0,
1621 .UAddressMagFilterRoundingEnable
= 0,
1622 .TrilinearFilterQuality
= 0,
1623 .NonnormalizedCoordinateEnable
= 0,
1624 .TCXAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressU
],
1625 .TCYAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressV
],
1626 .TCZAddressControlMode
= vk_to_gen_tex_address
[pCreateInfo
->addressW
],
1629 GEN8_SAMPLER_STATE_pack(NULL
, sampler
->state
, &sampler_state
);
1631 *pSampler
= (VkSampler
) sampler
;
1636 // Descriptor set functions
1638 VkResult
anv_CreateDescriptorSetLayout(
1640 const VkDescriptorSetLayoutCreateInfo
* pCreateInfo
,
1641 VkDescriptorSetLayout
* pSetLayout
)
1643 struct anv_device
*device
= (struct anv_device
*) _device
;
1644 struct anv_descriptor_set_layout
*set_layout
;
1646 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO
);
1648 uint32_t sampler_count
[VK_NUM_SHADER_STAGE
] = { 0, };
1649 uint32_t surface_count
[VK_NUM_SHADER_STAGE
] = { 0, };
1650 uint32_t num_dynamic_buffers
= 0;
1654 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1655 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1656 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1657 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1658 sampler_count
[s
] += pCreateInfo
->pBinding
[i
].count
;
1661 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1662 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1663 sampler_count
[s
] += pCreateInfo
->pBinding
[i
].count
;
1667 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1668 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1669 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1670 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1671 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1672 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1673 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1674 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1675 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1676 surface_count
[s
] += pCreateInfo
->pBinding
[i
].count
;
1682 count
+= pCreateInfo
->pBinding
[i
].count
;
1685 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1686 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1687 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1688 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1689 num_dynamic_buffers
++;
1696 uint32_t sampler_total
= 0;
1697 uint32_t surface_total
= 0;
1698 for (uint32_t s
= 0; s
< VK_NUM_SHADER_STAGE
; s
++) {
1699 sampler_total
+= sampler_count
[s
];
1700 surface_total
+= surface_count
[s
];
1703 size_t size
= sizeof(*set_layout
) +
1704 (sampler_total
+ surface_total
) * sizeof(uint32_t);
1705 set_layout
= anv_device_alloc(device
, size
, 8,
1706 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1708 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1710 set_layout
->num_dynamic_buffers
= num_dynamic_buffers
;
1711 set_layout
->count
= count
;
1713 uint32_t *p
= set_layout
->entries
;
1714 uint32_t *sampler
[VK_NUM_SHADER_STAGE
];
1715 uint32_t *surface
[VK_NUM_SHADER_STAGE
];
1716 for (uint32_t s
= 0; s
< VK_NUM_SHADER_STAGE
; s
++) {
1717 set_layout
->stage
[s
].surface_count
= surface_count
[s
];
1718 set_layout
->stage
[s
].surface_start
= surface
[s
] = p
;
1719 p
+= surface_count
[s
];
1720 set_layout
->stage
[s
].sampler_count
= sampler_count
[s
];
1721 set_layout
->stage
[s
].sampler_start
= sampler
[s
] = p
;
1722 p
+= sampler_count
[s
];
1725 uint32_t descriptor
= 0;
1726 for (uint32_t i
= 0; i
< pCreateInfo
->count
; i
++) {
1727 switch (pCreateInfo
->pBinding
[i
].descriptorType
) {
1728 case VK_DESCRIPTOR_TYPE_SAMPLER
:
1729 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1730 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].count
; j
++)
1731 *(sampler
[s
])++ = descriptor
+ j
;
1734 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
1735 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1736 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].count
; j
++)
1737 *(sampler
[s
])++ = descriptor
+ j
;
1741 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
1742 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
1743 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
1744 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
1745 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
1746 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
1747 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
1748 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
1749 for_each_bit(s
, pCreateInfo
->pBinding
[i
].stageFlags
)
1750 for (uint32_t j
= 0; j
< pCreateInfo
->pBinding
[i
].count
; j
++) {
1751 *(surface
[s
])++ = descriptor
+ j
;
1757 descriptor
+= pCreateInfo
->pBinding
[i
].count
;
1760 *pSetLayout
= (VkDescriptorSetLayout
) set_layout
;
1765 VkResult
anv_BeginDescriptorPoolUpdate(
1767 VkDescriptorUpdateMode updateMode
)
1772 VkResult
anv_EndDescriptorPoolUpdate(
1779 VkResult
anv_CreateDescriptorPool(
1781 VkDescriptorPoolUsage poolUsage
,
1783 const VkDescriptorPoolCreateInfo
* pCreateInfo
,
1784 VkDescriptorPool
* pDescriptorPool
)
1786 *pDescriptorPool
= 1;
1791 VkResult
anv_ResetDescriptorPool(
1793 VkDescriptorPool descriptorPool
)
1798 VkResult
anv_AllocDescriptorSets(
1800 VkDescriptorPool descriptorPool
,
1801 VkDescriptorSetUsage setUsage
,
1803 const VkDescriptorSetLayout
* pSetLayouts
,
1804 VkDescriptorSet
* pDescriptorSets
,
1807 struct anv_device
*device
= (struct anv_device
*) _device
;
1808 const struct anv_descriptor_set_layout
*layout
;
1809 struct anv_descriptor_set
*set
;
1812 for (uint32_t i
= 0; i
< count
; i
++) {
1813 layout
= (struct anv_descriptor_set_layout
*) pSetLayouts
[i
];
1814 size
= sizeof(*set
) + layout
->count
* sizeof(set
->descriptors
[0]);
1815 set
= anv_device_alloc(device
, size
, 8,
1816 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1819 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1822 /* Descriptor sets may not be 100% filled out so we need to memset to
1823 * ensure that we can properly detect and handle holes.
1825 memset(set
, 0, size
);
1827 pDescriptorSets
[i
] = (VkDescriptorSet
) set
;
1835 void anv_ClearDescriptorSets(
1837 VkDescriptorPool descriptorPool
,
1839 const VkDescriptorSet
* pDescriptorSets
)
1843 void anv_UpdateDescriptors(
1845 VkDescriptorSet descriptorSet
,
1846 uint32_t updateCount
,
1847 const void** ppUpdateArray
)
1849 struct anv_descriptor_set
*set
= (struct anv_descriptor_set
*) descriptorSet
;
1850 VkUpdateSamplers
*update_samplers
;
1851 VkUpdateSamplerTextures
*update_sampler_textures
;
1852 VkUpdateImages
*update_images
;
1853 VkUpdateBuffers
*update_buffers
;
1854 VkUpdateAsCopy
*update_as_copy
;
1856 for (uint32_t i
= 0; i
< updateCount
; i
++) {
1857 const struct anv_common
*common
= ppUpdateArray
[i
];
1859 switch (common
->sType
) {
1860 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS
:
1861 update_samplers
= (VkUpdateSamplers
*) common
;
1863 for (uint32_t j
= 0; j
< update_samplers
->count
; j
++) {
1864 set
->descriptors
[update_samplers
->binding
+ j
].sampler
=
1865 (struct anv_sampler
*) update_samplers
->pSamplers
[j
];
1869 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES
:
1870 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1871 update_sampler_textures
= (VkUpdateSamplerTextures
*) common
;
1873 for (uint32_t j
= 0; j
< update_sampler_textures
->count
; j
++) {
1874 set
->descriptors
[update_sampler_textures
->binding
+ j
].view
=
1875 (struct anv_surface_view
*)
1876 update_sampler_textures
->pSamplerImageViews
[j
].pImageView
->view
;
1877 set
->descriptors
[update_sampler_textures
->binding
+ j
].sampler
=
1878 (struct anv_sampler
*)
1879 update_sampler_textures
->pSamplerImageViews
[j
].sampler
;
1883 case VK_STRUCTURE_TYPE_UPDATE_IMAGES
:
1884 update_images
= (VkUpdateImages
*) common
;
1886 for (uint32_t j
= 0; j
< update_images
->count
; j
++) {
1887 set
->descriptors
[update_images
->binding
+ j
].view
=
1888 (struct anv_surface_view
*) update_images
->pImageViews
[j
].view
;
1892 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS
:
1893 update_buffers
= (VkUpdateBuffers
*) common
;
1895 for (uint32_t j
= 0; j
< update_buffers
->count
; j
++) {
1896 set
->descriptors
[update_buffers
->binding
+ j
].view
=
1897 (struct anv_surface_view
*) update_buffers
->pBufferViews
[j
].view
;
1899 /* FIXME: descriptor arrays? */
1902 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY
:
1903 update_as_copy
= (VkUpdateAsCopy
*) common
;
1904 (void) update_as_copy
;
1913 // State object functions
1915 static inline int64_t
1916 clamp_int64(int64_t x
, int64_t min
, int64_t max
)
1927 anv_dynamic_vp_state_destroy(struct anv_device
*device
,
1928 struct anv_object
*object
,
1929 VkObjectType obj_type
)
1931 struct anv_dynamic_vp_state
*state
= (void *)object
;
1933 assert(obj_type
== VK_OBJECT_TYPE_DYNAMIC_VP_STATE
);
1935 anv_state_pool_free(&device
->dynamic_state_pool
, state
->sf_clip_vp
);
1936 anv_state_pool_free(&device
->dynamic_state_pool
, state
->cc_vp
);
1937 anv_state_pool_free(&device
->dynamic_state_pool
, state
->scissor
);
1939 anv_device_free(device
, state
);
1942 VkResult
anv_CreateDynamicViewportState(
1944 const VkDynamicVpStateCreateInfo
* pCreateInfo
,
1945 VkDynamicVpState
* pState
)
1947 struct anv_device
*device
= (struct anv_device
*) _device
;
1948 struct anv_dynamic_vp_state
*state
;
1950 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO
);
1952 state
= anv_device_alloc(device
, sizeof(*state
), 8,
1953 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
1955 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1957 state
->base
.destructor
= anv_dynamic_vp_state_destroy
;
1959 unsigned count
= pCreateInfo
->viewportAndScissorCount
;
1960 state
->sf_clip_vp
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1962 state
->cc_vp
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1964 state
->scissor
= anv_state_pool_alloc(&device
->dynamic_state_pool
,
1967 for (uint32_t i
= 0; i
< pCreateInfo
->viewportAndScissorCount
; i
++) {
1968 const VkViewport
*vp
= &pCreateInfo
->pViewports
[i
];
1969 const VkRect
*s
= &pCreateInfo
->pScissors
[i
];
1971 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport
= {
1972 .ViewportMatrixElementm00
= vp
->width
/ 2,
1973 .ViewportMatrixElementm11
= vp
->height
/ 2,
1974 .ViewportMatrixElementm22
= (vp
->maxDepth
- vp
->minDepth
) / 2,
1975 .ViewportMatrixElementm30
= vp
->originX
+ vp
->width
/ 2,
1976 .ViewportMatrixElementm31
= vp
->originY
+ vp
->height
/ 2,
1977 .ViewportMatrixElementm32
= (vp
->maxDepth
+ vp
->minDepth
) / 2,
1978 .XMinClipGuardband
= -1.0f
,
1979 .XMaxClipGuardband
= 1.0f
,
1980 .YMinClipGuardband
= -1.0f
,
1981 .YMaxClipGuardband
= 1.0f
,
1982 .XMinViewPort
= vp
->originX
,
1983 .XMaxViewPort
= vp
->originX
+ vp
->width
- 1,
1984 .YMinViewPort
= vp
->originY
,
1985 .YMaxViewPort
= vp
->originY
+ vp
->height
- 1,
1988 struct GEN8_CC_VIEWPORT cc_viewport
= {
1989 .MinimumDepth
= vp
->minDepth
,
1990 .MaximumDepth
= vp
->maxDepth
1993 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
1994 * ymax < ymin for empty clips. In case clip x, y, width height are all
1995 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
1996 * what we want. Just special case empty clips and produce a canonical
1998 static const struct GEN8_SCISSOR_RECT empty_scissor
= {
1999 .ScissorRectangleYMin
= 1,
2000 .ScissorRectangleXMin
= 1,
2001 .ScissorRectangleYMax
= 0,
2002 .ScissorRectangleXMax
= 0
2005 const int max
= 0xffff;
2006 struct GEN8_SCISSOR_RECT scissor
= {
2007 /* Do this math using int64_t so overflow gets clamped correctly. */
2008 .ScissorRectangleYMin
= clamp_int64(s
->offset
.y
, 0, max
),
2009 .ScissorRectangleXMin
= clamp_int64(s
->offset
.x
, 0, max
),
2010 .ScissorRectangleYMax
= clamp_int64((uint64_t) s
->offset
.y
+ s
->extent
.height
- 1, 0, max
),
2011 .ScissorRectangleXMax
= clamp_int64((uint64_t) s
->offset
.x
+ s
->extent
.width
- 1, 0, max
)
2014 GEN8_SF_CLIP_VIEWPORT_pack(NULL
, state
->sf_clip_vp
.map
+ i
* 64, &sf_clip_viewport
);
2015 GEN8_CC_VIEWPORT_pack(NULL
, state
->cc_vp
.map
+ i
* 32, &cc_viewport
);
2017 if (s
->extent
.width
<= 0 || s
->extent
.height
<= 0) {
2018 GEN8_SCISSOR_RECT_pack(NULL
, state
->scissor
.map
+ i
* 32, &empty_scissor
);
2020 GEN8_SCISSOR_RECT_pack(NULL
, state
->scissor
.map
+ i
* 32, &scissor
);
2024 *pState
= (VkDynamicVpState
) state
;
2029 VkResult
anv_CreateDynamicRasterState(
2031 const VkDynamicRsStateCreateInfo
* pCreateInfo
,
2032 VkDynamicRsState
* pState
)
2034 struct anv_device
*device
= (struct anv_device
*) _device
;
2035 struct anv_dynamic_rs_state
*state
;
2037 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO
);
2039 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2040 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2042 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2046 * float depthBiasClamp;
2047 * float slopeScaledDepthBias;
2048 * float pointFadeThreshold;
2049 * // optional (GL45) - Size of point fade threshold
2052 struct GEN8_3DSTATE_SF sf
= {
2053 GEN8_3DSTATE_SF_header
,
2054 .LineWidth
= pCreateInfo
->lineWidth
,
2055 .PointWidth
= pCreateInfo
->pointSize
,
2058 GEN8_3DSTATE_SF_pack(NULL
, state
->state_sf
, &sf
);
2060 *pState
= (VkDynamicRsState
) state
;
2065 VkResult
anv_CreateDynamicColorBlendState(
2067 const VkDynamicCbStateCreateInfo
* pCreateInfo
,
2068 VkDynamicCbState
* pState
)
2070 struct anv_device
*device
= (struct anv_device
*) _device
;
2071 struct anv_dynamic_cb_state
*state
;
2073 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO
);
2075 state
= anv_device_alloc(device
, sizeof(*state
), 8,
2076 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2078 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2080 *pState
= (VkDynamicCbState
) state
;
2085 VkResult
anv_CreateDynamicDepthStencilState(
2087 const VkDynamicDsStateCreateInfo
* pCreateInfo
,
2088 VkDynamicDsState
* pState
)
2090 stub_return(VK_UNSUPPORTED
);
2093 // Command buffer functions
2096 anv_cmd_buffer_destroy(struct anv_device
*device
,
2097 struct anv_object
*object
,
2098 VkObjectType obj_type
)
2100 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) object
;
2102 assert(obj_type
== VK_OBJECT_TYPE_COMMAND_BUFFER
);
2104 anv_gem_munmap(cmd_buffer
->surface_bo
.map
, BATCH_SIZE
);
2105 anv_gem_close(device
, cmd_buffer
->surface_bo
.gem_handle
);
2106 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
2107 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
2108 anv_state_stream_finish(&cmd_buffer
->binding_table_state_stream
);
2109 anv_batch_finish(&cmd_buffer
->batch
, device
);
2110 anv_device_free(device
, cmd_buffer
->exec2_objects
);
2111 anv_device_free(device
, cmd_buffer
->exec2_bos
);
2112 anv_device_free(device
, cmd_buffer
);
2115 VkResult
anv_CreateCommandBuffer(
2117 const VkCmdBufferCreateInfo
* pCreateInfo
,
2118 VkCmdBuffer
* pCmdBuffer
)
2120 struct anv_device
*device
= (struct anv_device
*) _device
;
2121 struct anv_cmd_buffer
*cmd_buffer
;
2124 cmd_buffer
= anv_device_alloc(device
, sizeof(*cmd_buffer
), 8,
2125 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2126 if (cmd_buffer
== NULL
)
2127 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2129 cmd_buffer
->base
.destructor
= anv_cmd_buffer_destroy
;
2131 cmd_buffer
->device
= device
;
2132 cmd_buffer
->rs_state
= NULL
;
2133 cmd_buffer
->vp_state
= NULL
;
2134 memset(&cmd_buffer
->default_bindings
, 0, sizeof(cmd_buffer
->default_bindings
));
2135 cmd_buffer
->bindings
= &cmd_buffer
->default_bindings
;
2137 result
= anv_batch_init(&cmd_buffer
->batch
, device
);
2138 if (result
!= VK_SUCCESS
)
2141 result
= anv_bo_init_new(&cmd_buffer
->surface_bo
, device
, BATCH_SIZE
);
2142 if (result
!= VK_SUCCESS
)
2145 cmd_buffer
->surface_bo
.map
=
2146 anv_gem_mmap(device
, cmd_buffer
->surface_bo
.gem_handle
, 0, BATCH_SIZE
);
2147 if (cmd_buffer
->surface_bo
.map
== NULL
) {
2148 result
= vk_error(VK_ERROR_MEMORY_MAP_FAILED
);
2149 goto fail_surface_bo
;
2152 /* Start surface_next at 1 so surface offset 0 is invalid. */
2153 cmd_buffer
->surface_next
= 1;
2154 cmd_buffer
->surface_relocs
.num_relocs
= 0;
2156 cmd_buffer
->exec2_objects
=
2157 anv_device_alloc(device
, 8192 * sizeof(cmd_buffer
->exec2_objects
[0]), 8,
2158 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2159 if (cmd_buffer
->exec2_objects
== NULL
) {
2160 result
= vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2161 goto fail_surface_map
;
2164 cmd_buffer
->exec2_bos
=
2165 anv_device_alloc(device
, 8192 * sizeof(cmd_buffer
->exec2_bos
[0]), 8,
2166 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
2167 if (cmd_buffer
->exec2_bos
== NULL
) {
2168 result
= vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2169 goto fail_exec2_objects
;
2172 anv_state_stream_init(&cmd_buffer
->binding_table_state_stream
,
2173 &device
->binding_table_block_pool
);
2174 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
2175 &device
->surface_state_block_pool
);
2176 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
2177 &device
->dynamic_state_block_pool
);
2179 cmd_buffer
->dirty
= 0;
2180 cmd_buffer
->vb_dirty
= 0;
2181 cmd_buffer
->pipeline
= NULL
;
2183 *pCmdBuffer
= (VkCmdBuffer
) cmd_buffer
;
2188 anv_device_free(device
, cmd_buffer
->exec2_objects
);
2190 anv_gem_munmap(cmd_buffer
->surface_bo
.map
, BATCH_SIZE
);
2192 anv_gem_close(device
, cmd_buffer
->surface_bo
.gem_handle
);
2194 anv_batch_finish(&cmd_buffer
->batch
, device
);
2196 anv_device_free(device
, cmd_buffer
);
2201 VkResult
anv_BeginCommandBuffer(
2202 VkCmdBuffer cmdBuffer
,
2203 const VkCmdBufferBeginInfo
* pBeginInfo
)
2205 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2206 struct anv_device
*device
= cmd_buffer
->device
;
2208 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPELINE_SELECT
,
2209 .PipelineSelection
= _3D
);
2210 anv_batch_emit(&cmd_buffer
->batch
, GEN8_STATE_SIP
);
2212 anv_batch_emit(&cmd_buffer
->batch
, GEN8_STATE_BASE_ADDRESS
,
2213 .GeneralStateBaseAddress
= { NULL
, 0 },
2214 .GeneralStateMemoryObjectControlState
= GEN8_MOCS
,
2215 .GeneralStateBaseAddressModifyEnable
= true,
2216 .GeneralStateBufferSize
= 0xfffff,
2217 .GeneralStateBufferSizeModifyEnable
= true,
2219 .SurfaceStateBaseAddress
= { &cmd_buffer
->surface_bo
, 0 },
2220 .SurfaceStateMemoryObjectControlState
= GEN8_MOCS
,
2221 .SurfaceStateBaseAddressModifyEnable
= true,
2223 .DynamicStateBaseAddress
= { &device
->dynamic_state_block_pool
.bo
, 0 },
2224 .DynamicStateMemoryObjectControlState
= GEN8_MOCS
,
2225 .DynamicStateBaseAddressModifyEnable
= true,
2226 .DynamicStateBufferSize
= 0xfffff,
2227 .DynamicStateBufferSizeModifyEnable
= true,
2229 .IndirectObjectBaseAddress
= { NULL
, 0 },
2230 .IndirectObjectMemoryObjectControlState
= GEN8_MOCS
,
2231 .IndirectObjectBaseAddressModifyEnable
= true,
2232 .IndirectObjectBufferSize
= 0xfffff,
2233 .IndirectObjectBufferSizeModifyEnable
= true,
2235 .InstructionBaseAddress
= { &device
->instruction_block_pool
.bo
, 0 },
2236 .InstructionMemoryObjectControlState
= GEN8_MOCS
,
2237 .InstructionBaseAddressModifyEnable
= true,
2238 .InstructionBufferSize
= 0xfffff,
2239 .InstructionBuffersizeModifyEnable
= true);
2241 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VF_STATISTICS
,
2242 .StatisticsEnable
= true);
2243 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_HS
, .Enable
= false);
2244 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_TE
, .TEEnable
= false);
2245 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DS
, .FunctionEnable
= false);
2246 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_STREAMOUT
, .SOFunctionEnable
= false);
2248 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS
,
2249 .ConstantBufferOffset
= 0,
2250 .ConstantBufferSize
= 4);
2251 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS
,
2252 .ConstantBufferOffset
= 4,
2253 .ConstantBufferSize
= 4);
2254 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS
,
2255 .ConstantBufferOffset
= 8,
2256 .ConstantBufferSize
= 4);
2258 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_WM_CHROMAKEY
,
2259 .ChromaKeyKillEnable
= false);
2260 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_SBE_SWIZ
);
2261 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_AA_LINE_PARAMETERS
);
2263 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_WM_DEPTH_STENCIL
,
2264 .DepthTestEnable
= false,
2265 .DepthBufferWriteEnable
= false);
2271 anv_cmd_buffer_add_bo(struct anv_cmd_buffer
*cmd_buffer
,
2272 struct anv_bo
*bo
, struct anv_reloc_list
*list
)
2274 struct drm_i915_gem_exec_object2
*obj
;
2276 bo
->index
= cmd_buffer
->bo_count
;
2277 obj
= &cmd_buffer
->exec2_objects
[bo
->index
];
2278 cmd_buffer
->exec2_bos
[bo
->index
] = bo
;
2279 cmd_buffer
->bo_count
++;
2281 obj
->handle
= bo
->gem_handle
;
2282 obj
->relocation_count
= 0;
2283 obj
->relocs_ptr
= 0;
2285 obj
->offset
= bo
->offset
;
2291 obj
->relocation_count
= list
->num_relocs
;
2292 obj
->relocs_ptr
= (uintptr_t) list
->relocs
;
2297 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer
*cmd_buffer
,
2298 struct anv_reloc_list
*list
)
2300 struct anv_bo
*bo
, *batch_bo
;
2302 batch_bo
= &cmd_buffer
->batch
.bo
;
2303 for (size_t i
= 0; i
< list
->num_relocs
; i
++) {
2304 bo
= list
->reloc_bos
[i
];
2305 /* Skip any relocations targeting the batch bo. We need to make sure
2306 * it's the last in the list so we'll add it manually later.
2310 if (bo
->index
< cmd_buffer
->bo_count
&& cmd_buffer
->exec2_bos
[bo
->index
] == bo
)
2313 anv_cmd_buffer_add_bo(cmd_buffer
, bo
, NULL
);
2318 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer
*cmd_buffer
,
2319 struct anv_reloc_list
*list
)
2323 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2324 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2325 * all bos haven't moved it will skip relocation processing alltogether.
2326 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2327 * value of offset so we can set it either way. For that to work we need
2328 * to make sure all relocs use the same presumed offset.
2331 for (size_t i
= 0; i
< list
->num_relocs
; i
++) {
2332 bo
= list
->reloc_bos
[i
];
2333 if (bo
->offset
!= list
->relocs
[i
].presumed_offset
)
2334 cmd_buffer
->need_reloc
= true;
2336 list
->relocs
[i
].target_handle
= bo
->index
;
2340 VkResult
anv_EndCommandBuffer(
2341 VkCmdBuffer cmdBuffer
)
2343 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2344 struct anv_device
*device
= cmd_buffer
->device
;
2345 struct anv_batch
*batch
= &cmd_buffer
->batch
;
2347 anv_batch_emit(batch
, GEN8_MI_BATCH_BUFFER_END
);
2349 /* Round batch up to an even number of dwords. */
2350 if ((batch
->next
- batch
->bo
.map
) & 4)
2351 anv_batch_emit(batch
, GEN8_MI_NOOP
);
2353 cmd_buffer
->bo_count
= 0;
2354 cmd_buffer
->need_reloc
= false;
2356 /* Lock for access to bo->index. */
2357 pthread_mutex_lock(&device
->mutex
);
2359 /* Add block pool bos first so we can add them with their relocs. */
2360 anv_cmd_buffer_add_bo(cmd_buffer
, &cmd_buffer
->surface_bo
,
2361 &cmd_buffer
->surface_relocs
);
2363 anv_cmd_buffer_add_validate_bos(cmd_buffer
, &cmd_buffer
->surface_relocs
);
2364 anv_cmd_buffer_add_validate_bos(cmd_buffer
, &batch
->cmd_relocs
);
2365 anv_cmd_buffer_add_bo(cmd_buffer
, &batch
->bo
, &batch
->cmd_relocs
);
2366 anv_cmd_buffer_process_relocs(cmd_buffer
, &cmd_buffer
->surface_relocs
);
2367 anv_cmd_buffer_process_relocs(cmd_buffer
, &batch
->cmd_relocs
);
2369 cmd_buffer
->execbuf
.buffers_ptr
= (uintptr_t) cmd_buffer
->exec2_objects
;
2370 cmd_buffer
->execbuf
.buffer_count
= cmd_buffer
->bo_count
;
2371 cmd_buffer
->execbuf
.batch_start_offset
= 0;
2372 cmd_buffer
->execbuf
.batch_len
= batch
->next
- batch
->bo
.map
;
2373 cmd_buffer
->execbuf
.cliprects_ptr
= 0;
2374 cmd_buffer
->execbuf
.num_cliprects
= 0;
2375 cmd_buffer
->execbuf
.DR1
= 0;
2376 cmd_buffer
->execbuf
.DR4
= 0;
2378 cmd_buffer
->execbuf
.flags
= I915_EXEC_HANDLE_LUT
;
2379 if (!cmd_buffer
->need_reloc
)
2380 cmd_buffer
->execbuf
.flags
|= I915_EXEC_NO_RELOC
;
2381 cmd_buffer
->execbuf
.flags
|= I915_EXEC_RENDER
;
2382 cmd_buffer
->execbuf
.rsvd1
= device
->context_id
;
2383 cmd_buffer
->execbuf
.rsvd2
= 0;
2385 pthread_mutex_unlock(&device
->mutex
);
2390 VkResult
anv_ResetCommandBuffer(
2391 VkCmdBuffer cmdBuffer
)
2393 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2395 anv_batch_reset(&cmd_buffer
->batch
);
2396 cmd_buffer
->surface_next
= 0;
2397 cmd_buffer
->surface_relocs
.num_relocs
= 0;
2402 // Command buffer building functions
2404 void anv_CmdBindPipeline(
2405 VkCmdBuffer cmdBuffer
,
2406 VkPipelineBindPoint pipelineBindPoint
,
2407 VkPipeline _pipeline
)
2409 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2410 struct anv_pipeline
*pipeline
= (struct anv_pipeline
*) _pipeline
;
2412 cmd_buffer
->pipeline
= pipeline
;
2413 cmd_buffer
->vb_dirty
|= pipeline
->vb_used
;
2414 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_PIPELINE_DIRTY
;
2417 void anv_CmdBindDynamicStateObject(
2418 VkCmdBuffer cmdBuffer
,
2419 VkStateBindPoint stateBindPoint
,
2420 VkDynamicStateObject dynamicState
)
2422 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2423 struct anv_dynamic_vp_state
*vp_state
;
2425 switch (stateBindPoint
) {
2426 case VK_STATE_BIND_POINT_VIEWPORT
:
2427 vp_state
= (struct anv_dynamic_vp_state
*) dynamicState
;
2428 /* We emit state immediately, but set cmd_buffer->vp_state to indicate
2429 * that vp state has been set in this command buffer. */
2430 cmd_buffer
->vp_state
= vp_state
;
2431 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_SCISSOR_STATE_POINTERS
,
2432 .ScissorRectPointer
= vp_state
->scissor
.offset
);
2433 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC
,
2434 .CCViewportPointer
= vp_state
->cc_vp
.offset
);
2435 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
,
2436 .SFClipViewportPointer
= vp_state
->sf_clip_vp
.offset
);
2438 case VK_STATE_BIND_POINT_RASTER
:
2439 cmd_buffer
->rs_state
= (struct anv_dynamic_rs_state
*) dynamicState
;
2440 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_RS_DIRTY
;
2442 case VK_STATE_BIND_POINT_COLOR_BLEND
:
2443 case VK_STATE_BIND_POINT_DEPTH_STENCIL
:
2450 static struct anv_state
2451 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
,
2452 uint32_t size
, uint32_t alignment
)
2454 struct anv_state state
;
2456 state
.offset
= ALIGN_U32(cmd_buffer
->surface_next
, alignment
);
2457 state
.map
= cmd_buffer
->surface_bo
.map
+ state
.offset
;
2458 state
.alloc_size
= size
;
2459 cmd_buffer
->surface_next
= state
.offset
+ size
;
2461 assert(state
.offset
+ size
< cmd_buffer
->surface_bo
.size
);
2466 void anv_CmdBindDescriptorSets(
2467 VkCmdBuffer cmdBuffer
,
2468 VkPipelineBindPoint pipelineBindPoint
,
2471 const VkDescriptorSet
* pDescriptorSets
,
2472 uint32_t dynamicOffsetCount
,
2473 const uint32_t* pDynamicOffsets
)
2475 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2476 struct anv_pipeline_layout
*layout
= cmd_buffer
->pipeline
->layout
;
2477 struct anv_bindings
*bindings
= cmd_buffer
->bindings
;
2479 uint32_t offset
= 0;
2480 for (uint32_t i
= 0; i
< setCount
; i
++) {
2481 struct anv_descriptor_set
*set
=
2482 (struct anv_descriptor_set
*) pDescriptorSets
[i
];
2483 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[firstSet
+ i
].layout
;
2485 for (uint32_t s
= 0; s
< VK_NUM_SHADER_STAGE
; s
++) {
2486 uint32_t *surface_to_desc
= set_layout
->stage
[s
].surface_start
;
2487 uint32_t *sampler_to_desc
= set_layout
->stage
[s
].sampler_start
;
2488 uint32_t bias
= s
== VK_SHADER_STAGE_FRAGMENT
? MAX_RTS
: 0;
2491 start
= bias
+ layout
->set
[firstSet
+ i
].surface_start
[s
];
2492 for (uint32_t b
= 0; b
< set_layout
->stage
[s
].surface_count
; b
++) {
2493 struct anv_surface_view
*view
= set
->descriptors
[surface_to_desc
[b
]].view
;
2497 struct anv_state state
=
2498 anv_cmd_buffer_alloc_surface_state(cmd_buffer
, 64, 64);
2499 memcpy(state
.map
, view
->surface_state
.map
, 64);
2501 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
2502 *(uint64_t *)(state
.map
+ 8 * 4) =
2503 anv_reloc_list_add(&cmd_buffer
->surface_relocs
,
2504 state
.offset
+ 8 * 4,
2505 view
->bo
, view
->offset
);
2507 bindings
->descriptors
[s
].surfaces
[start
+ b
] = state
.offset
;
2510 start
= layout
->set
[firstSet
+ i
].sampler_start
[s
];
2511 for (uint32_t b
= 0; b
< set_layout
->stage
[s
].sampler_count
; b
++) {
2512 struct anv_sampler
*sampler
= set
->descriptors
[sampler_to_desc
[b
]].sampler
;
2516 memcpy(&bindings
->descriptors
[s
].samplers
[start
+ b
],
2517 sampler
->state
, sizeof(sampler
->state
));
2521 offset
+= layout
->set
[firstSet
+ i
].layout
->num_dynamic_buffers
;
2524 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY
;
2527 void anv_CmdBindIndexBuffer(
2528 VkCmdBuffer cmdBuffer
,
2530 VkDeviceSize offset
,
2531 VkIndexType indexType
)
2533 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2534 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
2536 static const uint32_t vk_to_gen_index_type
[] = {
2537 [VK_INDEX_TYPE_UINT8
] = INDEX_BYTE
,
2538 [VK_INDEX_TYPE_UINT16
] = INDEX_WORD
,
2539 [VK_INDEX_TYPE_UINT32
] = INDEX_DWORD
,
2542 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_INDEX_BUFFER
,
2543 .IndexFormat
= vk_to_gen_index_type
[indexType
],
2544 .MemoryObjectControlState
= GEN8_MOCS
,
2545 .BufferStartingAddress
= { buffer
->bo
, buffer
->offset
+ offset
},
2546 .BufferSize
= buffer
->size
- offset
);
2549 void anv_CmdBindVertexBuffers(
2550 VkCmdBuffer cmdBuffer
,
2551 uint32_t startBinding
,
2552 uint32_t bindingCount
,
2553 const VkBuffer
* pBuffers
,
2554 const VkDeviceSize
* pOffsets
)
2556 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2557 struct anv_bindings
*bindings
= cmd_buffer
->bindings
;
2559 /* We have to defer setting up vertex buffer since we need the buffer
2560 * stride from the pipeline. */
2562 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
2563 bindings
->vb
[startBinding
+ i
].buffer
= (struct anv_buffer
*) pBuffers
[i
];
2564 bindings
->vb
[startBinding
+ i
].offset
= pOffsets
[i
];
2565 cmd_buffer
->vb_dirty
|= 1 << (startBinding
+ i
);
2570 flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
)
2572 struct anv_pipeline_layout
*layout
= cmd_buffer
->pipeline
->layout
;
2573 struct anv_bindings
*bindings
= cmd_buffer
->bindings
;
2574 uint32_t layers
= cmd_buffer
->framebuffer
->layers
;
2576 for (uint32_t s
= 0; s
< VK_NUM_SHADER_STAGE
; s
++) {
2579 if (s
== VK_SHADER_STAGE_FRAGMENT
) {
2581 layers
= cmd_buffer
->framebuffer
->layers
;
2587 /* This is a little awkward: layout can be NULL but we still have to
2588 * allocate and set a binding table for the PS stage for render
2590 uint32_t surface_count
= layout
? layout
->stage
[s
].surface_count
: 0;
2592 if (layers
+ surface_count
> 0) {
2593 struct anv_state state
;
2596 size
= (bias
+ surface_count
) * sizeof(uint32_t);
2597 state
= anv_cmd_buffer_alloc_surface_state(cmd_buffer
, size
, 32);
2598 memcpy(state
.map
, bindings
->descriptors
[s
].surfaces
, size
);
2600 static const uint32_t binding_table_opcodes
[] = {
2601 [VK_SHADER_STAGE_VERTEX
] = 38,
2602 [VK_SHADER_STAGE_TESS_CONTROL
] = 39,
2603 [VK_SHADER_STAGE_TESS_EVALUATION
] = 40,
2604 [VK_SHADER_STAGE_GEOMETRY
] = 41,
2605 [VK_SHADER_STAGE_FRAGMENT
] = 42,
2606 [VK_SHADER_STAGE_COMPUTE
] = 0,
2609 anv_batch_emit(&cmd_buffer
->batch
,
2610 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS
,
2611 ._3DCommandSubOpcode
= binding_table_opcodes
[s
],
2612 .PointertoVSBindingTable
= state
.offset
);
2615 if (layout
&& layout
->stage
[s
].sampler_count
> 0) {
2616 struct anv_state state
;
2619 size
= layout
->stage
[s
].sampler_count
* 16;
2620 state
= anv_cmd_buffer_alloc_surface_state(cmd_buffer
, size
, 32);
2621 memcpy(state
.map
, bindings
->descriptors
[s
].samplers
, size
);
2623 static const uint32_t sampler_state_opcodes
[] = {
2624 [VK_SHADER_STAGE_VERTEX
] = 43,
2625 [VK_SHADER_STAGE_TESS_CONTROL
] = 44, /* HS */
2626 [VK_SHADER_STAGE_TESS_EVALUATION
] = 45, /* DS */
2627 [VK_SHADER_STAGE_GEOMETRY
] = 46,
2628 [VK_SHADER_STAGE_FRAGMENT
] = 47,
2629 [VK_SHADER_STAGE_COMPUTE
] = 0,
2632 anv_batch_emit(&cmd_buffer
->batch
,
2633 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS
,
2634 ._3DCommandSubOpcode
= sampler_state_opcodes
[s
],
2635 .PointertoVSSamplerState
= state
.offset
);
2641 anv_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
)
2643 struct anv_pipeline
*pipeline
= cmd_buffer
->pipeline
;
2644 struct anv_bindings
*bindings
= cmd_buffer
->bindings
;
2647 uint32_t vb_emit
= cmd_buffer
->vb_dirty
& pipeline
->vb_used
;
2648 const uint32_t num_buffers
= __builtin_popcount(vb_emit
);
2649 const uint32_t num_dwords
= 1 + num_buffers
* 4;
2652 p
= anv_batch_emitn(&cmd_buffer
->batch
, num_dwords
,
2653 GEN8_3DSTATE_VERTEX_BUFFERS
);
2655 for_each_bit(vb
, vb_emit
) {
2656 struct anv_buffer
*buffer
= bindings
->vb
[vb
].buffer
;
2657 uint32_t offset
= bindings
->vb
[vb
].offset
;
2659 struct GEN8_VERTEX_BUFFER_STATE state
= {
2660 .VertexBufferIndex
= vb
,
2661 .MemoryObjectControlState
= GEN8_MOCS
,
2662 .AddressModifyEnable
= true,
2663 .BufferPitch
= pipeline
->binding_stride
[vb
],
2664 .BufferStartingAddress
= { buffer
->bo
, buffer
->offset
+ offset
},
2665 .BufferSize
= buffer
->size
- offset
2668 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer
->batch
, &p
[1 + i
* 4], &state
);
2673 if (cmd_buffer
->dirty
& ANV_CMD_BUFFER_PIPELINE_DIRTY
)
2674 anv_batch_emit_batch(&cmd_buffer
->batch
, &pipeline
->batch
);
2676 if (cmd_buffer
->dirty
& ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY
)
2677 flush_descriptor_sets(cmd_buffer
);
2679 if (cmd_buffer
->dirty
& (ANV_CMD_BUFFER_PIPELINE_DIRTY
| ANV_CMD_BUFFER_RS_DIRTY
))
2680 anv_batch_emit_merge(&cmd_buffer
->batch
,
2681 cmd_buffer
->rs_state
->state_sf
, pipeline
->state_sf
);
2683 cmd_buffer
->vb_dirty
&= ~vb_emit
;
2684 cmd_buffer
->dirty
= 0;
2688 VkCmdBuffer cmdBuffer
,
2689 uint32_t firstVertex
,
2690 uint32_t vertexCount
,
2691 uint32_t firstInstance
,
2692 uint32_t instanceCount
)
2694 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2696 anv_cmd_buffer_flush_state(cmd_buffer
);
2698 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
2699 .VertexAccessType
= SEQUENTIAL
,
2700 .VertexCountPerInstance
= vertexCount
,
2701 .StartVertexLocation
= firstVertex
,
2702 .InstanceCount
= instanceCount
,
2703 .StartInstanceLocation
= firstInstance
,
2704 .BaseVertexLocation
= 0);
2707 void anv_CmdDrawIndexed(
2708 VkCmdBuffer cmdBuffer
,
2709 uint32_t firstIndex
,
2710 uint32_t indexCount
,
2711 int32_t vertexOffset
,
2712 uint32_t firstInstance
,
2713 uint32_t instanceCount
)
2715 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2717 anv_cmd_buffer_flush_state(cmd_buffer
);
2719 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
2720 .VertexAccessType
= RANDOM
,
2721 .VertexCountPerInstance
= indexCount
,
2722 .StartVertexLocation
= firstIndex
,
2723 .InstanceCount
= instanceCount
,
2724 .StartInstanceLocation
= firstInstance
,
2725 .BaseVertexLocation
= 0);
2729 anv_batch_lrm(struct anv_batch
*batch
,
2730 uint32_t reg
, struct anv_bo
*bo
, uint32_t offset
)
2732 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_MEM
,
2733 .RegisterAddress
= reg
,
2734 .MemoryAddress
= { bo
, offset
});
2738 anv_batch_lri(struct anv_batch
*batch
, uint32_t reg
, uint32_t imm
)
2740 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_IMM
,
2741 .RegisterOffset
= reg
,
2745 /* Auto-Draw / Indirect Registers */
2746 #define GEN7_3DPRIM_END_OFFSET 0x2420
2747 #define GEN7_3DPRIM_START_VERTEX 0x2430
2748 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
2749 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
2750 #define GEN7_3DPRIM_START_INSTANCE 0x243C
2751 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
2753 void anv_CmdDrawIndirect(
2754 VkCmdBuffer cmdBuffer
,
2756 VkDeviceSize offset
,
2760 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2761 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
2762 struct anv_bo
*bo
= buffer
->bo
;
2763 uint32_t bo_offset
= buffer
->offset
+ offset
;
2765 anv_cmd_buffer_flush_state(cmd_buffer
);
2767 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_VERTEX_COUNT
, bo
, bo_offset
);
2768 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_INSTANCE_COUNT
, bo
, bo_offset
+ 4);
2769 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_VERTEX
, bo
, bo_offset
+ 8);
2770 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_INSTANCE
, bo
, bo_offset
+ 12);
2771 anv_batch_lri(&cmd_buffer
->batch
, GEN7_3DPRIM_BASE_VERTEX
, 0);
2773 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
2774 .IndirectParameterEnable
= true,
2775 .VertexAccessType
= SEQUENTIAL
);
2778 void anv_CmdDrawIndexedIndirect(
2779 VkCmdBuffer cmdBuffer
,
2781 VkDeviceSize offset
,
2785 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2786 struct anv_buffer
*buffer
= (struct anv_buffer
*) _buffer
;
2787 struct anv_bo
*bo
= buffer
->bo
;
2788 uint32_t bo_offset
= buffer
->offset
+ offset
;
2790 anv_cmd_buffer_flush_state(cmd_buffer
);
2792 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_VERTEX_COUNT
, bo
, bo_offset
);
2793 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_INSTANCE_COUNT
, bo
, bo_offset
+ 4);
2794 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_VERTEX
, bo
, bo_offset
+ 8);
2795 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_BASE_VERTEX
, bo
, bo_offset
+ 12);
2796 anv_batch_lrm(&cmd_buffer
->batch
, GEN7_3DPRIM_START_INSTANCE
, bo
, bo_offset
+ 16);
2798 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DPRIMITIVE
,
2799 .IndirectParameterEnable
= true,
2800 .VertexAccessType
= RANDOM
);
2803 void anv_CmdDispatch(
2804 VkCmdBuffer cmdBuffer
,
2812 void anv_CmdDispatchIndirect(
2813 VkCmdBuffer cmdBuffer
,
2815 VkDeviceSize offset
)
2820 void anv_CmdSetEvent(
2821 VkCmdBuffer cmdBuffer
,
2823 VkPipeEvent pipeEvent
)
2828 void anv_CmdResetEvent(
2829 VkCmdBuffer cmdBuffer
,
2831 VkPipeEvent pipeEvent
)
2836 void anv_CmdWaitEvents(
2837 VkCmdBuffer cmdBuffer
,
2838 VkWaitEvent waitEvent
,
2839 uint32_t eventCount
,
2840 const VkEvent
* pEvents
,
2841 uint32_t memBarrierCount
,
2842 const void** ppMemBarriers
)
2847 void anv_CmdPipelineBarrier(
2848 VkCmdBuffer cmdBuffer
,
2849 VkWaitEvent waitEvent
,
2850 uint32_t pipeEventCount
,
2851 const VkPipeEvent
* pPipeEvents
,
2852 uint32_t memBarrierCount
,
2853 const void** ppMemBarriers
)
2859 anv_batch_emit_ps_depth_count(struct anv_batch
*batch
,
2860 struct anv_bo
*bo
, uint32_t offset
)
2862 anv_batch_emit(batch
, GEN8_PIPE_CONTROL
,
2863 .DestinationAddressType
= DAT_PPGTT
,
2864 .PostSyncOperation
= WritePSDepthCount
,
2865 .Address
= { bo
, offset
}); /* FIXME: This is only lower 32 bits */
2868 void anv_CmdBeginQuery(
2869 VkCmdBuffer cmdBuffer
,
2870 VkQueryPool queryPool
,
2872 VkQueryControlFlags flags
)
2874 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2875 struct anv_query_pool
*pool
= (struct anv_query_pool
*) queryPool
;
2877 switch (pool
->type
) {
2878 case VK_QUERY_TYPE_OCCLUSION
:
2879 anv_batch_emit_ps_depth_count(&cmd_buffer
->batch
, &pool
->bo
,
2880 slot
* sizeof(struct anv_query_pool_slot
));
2883 case VK_QUERY_TYPE_PIPELINE_STATISTICS
:
2889 void anv_CmdEndQuery(
2890 VkCmdBuffer cmdBuffer
,
2891 VkQueryPool queryPool
,
2894 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2895 struct anv_query_pool
*pool
= (struct anv_query_pool
*) queryPool
;
2897 switch (pool
->type
) {
2898 case VK_QUERY_TYPE_OCCLUSION
:
2899 anv_batch_emit_ps_depth_count(&cmd_buffer
->batch
, &pool
->bo
,
2900 slot
* sizeof(struct anv_query_pool_slot
) + 8);
2903 case VK_QUERY_TYPE_PIPELINE_STATISTICS
:
2909 void anv_CmdResetQueryPool(
2910 VkCmdBuffer cmdBuffer
,
2911 VkQueryPool queryPool
,
2912 uint32_t startQuery
,
2913 uint32_t queryCount
)
2918 #define TIMESTAMP 0x2358
2920 void anv_CmdWriteTimestamp(
2921 VkCmdBuffer cmdBuffer
,
2922 VkTimestampType timestampType
,
2923 VkBuffer destBuffer
,
2924 VkDeviceSize destOffset
)
2926 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
2927 struct anv_buffer
*buffer
= (struct anv_buffer
*) destBuffer
;
2928 struct anv_bo
*bo
= buffer
->bo
;
2930 switch (timestampType
) {
2931 case VK_TIMESTAMP_TYPE_TOP
:
2932 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MI_STORE_REGISTER_MEM
,
2933 .RegisterAddress
= TIMESTAMP
,
2934 .MemoryAddress
= { bo
, buffer
->offset
+ destOffset
});
2935 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MI_STORE_REGISTER_MEM
,
2936 .RegisterAddress
= TIMESTAMP
+ 4,
2937 .MemoryAddress
= { bo
, buffer
->offset
+ destOffset
+ 4 });
2940 case VK_TIMESTAMP_TYPE_BOTTOM
:
2941 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
2942 .DestinationAddressType
= DAT_PPGTT
,
2943 .PostSyncOperation
= WriteTimestamp
,
2944 .Address
= /* FIXME: This is only lower 32 bits */
2945 { bo
, buffer
->offset
+ destOffset
});
2953 #define alu_opcode(v) __gen_field((v), 20, 31)
2954 #define alu_operand1(v) __gen_field((v), 10, 19)
2955 #define alu_operand2(v) __gen_field((v), 0, 9)
2956 #define alu(opcode, operand1, operand2) \
2957 alu_opcode(opcode) | alu_operand1(operand1) | alu_operand2(operand2)
2959 #define OPCODE_NOOP 0x000
2960 #define OPCODE_LOAD 0x080
2961 #define OPCODE_LOADINV 0x480
2962 #define OPCODE_LOAD0 0x081
2963 #define OPCODE_LOAD1 0x481
2964 #define OPCODE_ADD 0x100
2965 #define OPCODE_SUB 0x101
2966 #define OPCODE_AND 0x102
2967 #define OPCODE_OR 0x103
2968 #define OPCODE_XOR 0x104
2969 #define OPCODE_STORE 0x180
2970 #define OPCODE_STOREINV 0x580
2972 #define OPERAND_R0 0x00
2973 #define OPERAND_R1 0x01
2974 #define OPERAND_R2 0x02
2975 #define OPERAND_R3 0x03
2976 #define OPERAND_R4 0x04
2977 #define OPERAND_SRCA 0x20
2978 #define OPERAND_SRCB 0x21
2979 #define OPERAND_ACCU 0x31
2980 #define OPERAND_ZF 0x32
2981 #define OPERAND_CF 0x33
2983 #define CS_GPR(n) (0x2600 + (n) * 8)
2986 emit_load_alu_reg_u64(struct anv_batch
*batch
, uint32_t reg
,
2987 struct anv_bo
*bo
, uint32_t offset
)
2989 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_MEM
,
2990 .RegisterAddress
= reg
,
2991 .MemoryAddress
= { bo
, offset
});
2992 anv_batch_emit(batch
, GEN8_MI_LOAD_REGISTER_MEM
,
2993 .RegisterAddress
= reg
+ 4,
2994 .MemoryAddress
= { bo
, offset
+ 4 });
2997 void anv_CmdCopyQueryPoolResults(
2998 VkCmdBuffer cmdBuffer
,
2999 VkQueryPool queryPool
,
3000 uint32_t startQuery
,
3001 uint32_t queryCount
,
3002 VkBuffer destBuffer
,
3003 VkDeviceSize destOffset
,
3004 VkDeviceSize destStride
,
3005 VkQueryResultFlags flags
)
3007 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3008 struct anv_query_pool
*pool
= (struct anv_query_pool
*) queryPool
;
3009 struct anv_buffer
*buffer
= (struct anv_buffer
*) destBuffer
;
3010 uint32_t slot_offset
, dst_offset
;
3012 if (flags
& VK_QUERY_RESULT_WITH_AVAILABILITY_BIT
) {
3013 /* Where is the availabilty info supposed to go? */
3014 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
3018 assert(pool
->type
== VK_QUERY_TYPE_OCCLUSION
);
3020 /* FIXME: If we're not waiting, should we just do this on the CPU? */
3021 if (flags
& VK_QUERY_RESULT_WAIT_BIT
)
3022 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
3023 .CommandStreamerStallEnable
= true);
3025 dst_offset
= buffer
->offset
+ destOffset
;
3026 for (uint32_t i
= 0; i
< queryCount
; i
++) {
3028 slot_offset
= (startQuery
+ i
) * sizeof(struct anv_query_pool_slot
);
3030 emit_load_alu_reg_u64(&cmd_buffer
->batch
, CS_GPR(0), &pool
->bo
, slot_offset
);
3031 emit_load_alu_reg_u64(&cmd_buffer
->batch
, CS_GPR(1), &pool
->bo
, slot_offset
+ 8);
3033 /* FIXME: We need to clamp the result for 32 bit. */
3035 uint32_t *dw
= anv_batch_emitn(&cmd_buffer
->batch
, 5, GEN8_MI_MATH
);
3036 dw
[1] = alu(OPCODE_LOAD
, OPERAND_SRCA
, OPERAND_R1
);
3037 dw
[2] = alu(OPCODE_LOAD
, OPERAND_SRCB
, OPERAND_R0
);
3038 dw
[3] = alu(OPCODE_SUB
, 0, 0);
3039 dw
[4] = alu(OPCODE_STORE
, OPERAND_R2
, OPERAND_ACCU
);
3041 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MI_STORE_REGISTER_MEM
,
3042 .RegisterAddress
= CS_GPR(2),
3043 /* FIXME: This is only lower 32 bits */
3044 .MemoryAddress
= { buffer
->bo
, dst_offset
});
3046 if (flags
& VK_QUERY_RESULT_64_BIT
)
3047 anv_batch_emit(&cmd_buffer
->batch
, GEN8_MI_STORE_REGISTER_MEM
,
3048 .RegisterAddress
= CS_GPR(2) + 4,
3049 /* FIXME: This is only lower 32 bits */
3050 .MemoryAddress
= { buffer
->bo
, dst_offset
+ 4 });
3052 dst_offset
+= destStride
;
3056 void anv_CmdInitAtomicCounters(
3057 VkCmdBuffer cmdBuffer
,
3058 VkPipelineBindPoint pipelineBindPoint
,
3059 uint32_t startCounter
,
3060 uint32_t counterCount
,
3061 const uint32_t* pData
)
3066 void anv_CmdLoadAtomicCounters(
3067 VkCmdBuffer cmdBuffer
,
3068 VkPipelineBindPoint pipelineBindPoint
,
3069 uint32_t startCounter
,
3070 uint32_t counterCount
,
3072 VkDeviceSize srcOffset
)
3077 void anv_CmdSaveAtomicCounters(
3078 VkCmdBuffer cmdBuffer
,
3079 VkPipelineBindPoint pipelineBindPoint
,
3080 uint32_t startCounter
,
3081 uint32_t counterCount
,
3082 VkBuffer destBuffer
,
3083 VkDeviceSize destOffset
)
3089 anv_framebuffer_destroy(struct anv_device
*device
,
3090 struct anv_object
*object
,
3091 VkObjectType obj_type
)
3093 struct anv_framebuffer
*fb
= (struct anv_framebuffer
*)object
;
3095 assert(obj_type
== VK_OBJECT_TYPE_FRAMEBUFFER
);
3097 anv_DestroyObject((VkDevice
) device
,
3098 VK_OBJECT_TYPE_DYNAMIC_VP_STATE
,
3101 anv_device_free(device
, fb
);
3104 VkResult
anv_CreateFramebuffer(
3106 const VkFramebufferCreateInfo
* pCreateInfo
,
3107 VkFramebuffer
* pFramebuffer
)
3109 struct anv_device
*device
= (struct anv_device
*) _device
;
3110 struct anv_framebuffer
*framebuffer
;
3112 static const struct anv_depth_stencil_view null_view
=
3113 { .depth_format
= D16_UNORM
, .depth_stride
= 0, .stencil_stride
= 0 };
3115 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO
);
3117 framebuffer
= anv_device_alloc(device
, sizeof(*framebuffer
), 8,
3118 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
3119 if (framebuffer
== NULL
)
3120 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
3122 framebuffer
->base
.destructor
= anv_framebuffer_destroy
;
3124 framebuffer
->color_attachment_count
= pCreateInfo
->colorAttachmentCount
;
3125 for (uint32_t i
= 0; i
< pCreateInfo
->colorAttachmentCount
; i
++) {
3126 framebuffer
->color_attachments
[i
] =
3127 (struct anv_surface_view
*) pCreateInfo
->pColorAttachments
[i
].view
;
3130 if (pCreateInfo
->pDepthStencilAttachment
) {
3131 framebuffer
->depth_stencil
=
3132 (struct anv_depth_stencil_view
*) pCreateInfo
->pDepthStencilAttachment
->view
;
3134 framebuffer
->depth_stencil
= &null_view
;
3137 framebuffer
->sample_count
= pCreateInfo
->sampleCount
;
3138 framebuffer
->width
= pCreateInfo
->width
;
3139 framebuffer
->height
= pCreateInfo
->height
;
3140 framebuffer
->layers
= pCreateInfo
->layers
;
3142 vkCreateDynamicViewportState((VkDevice
) device
,
3143 &(VkDynamicVpStateCreateInfo
) {
3144 .sType
= VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO
,
3145 .viewportAndScissorCount
= 1,
3146 .pViewports
= (VkViewport
[]) {
3150 .width
= pCreateInfo
->width
,
3151 .height
= pCreateInfo
->height
,
3156 .pScissors
= (VkRect
[]) {
3158 { pCreateInfo
->width
, pCreateInfo
->height
} },
3161 &framebuffer
->vp_state
);
3163 *pFramebuffer
= (VkFramebuffer
) framebuffer
;
3168 VkResult
anv_CreateRenderPass(
3170 const VkRenderPassCreateInfo
* pCreateInfo
,
3171 VkRenderPass
* pRenderPass
)
3173 struct anv_device
*device
= (struct anv_device
*) _device
;
3174 struct anv_render_pass
*pass
;
3177 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO
);
3179 size
= sizeof(*pass
) +
3180 pCreateInfo
->layers
* sizeof(struct anv_render_pass_layer
);
3181 pass
= anv_device_alloc(device
, size
, 8,
3182 VK_SYSTEM_ALLOC_TYPE_API_OBJECT
);
3184 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
3186 pass
->render_area
= pCreateInfo
->renderArea
;
3188 pass
->num_layers
= pCreateInfo
->layers
;
3190 pass
->num_clear_layers
= 0;
3191 for (uint32_t i
= 0; i
< pCreateInfo
->layers
; i
++) {
3192 pass
->layers
[i
].color_load_op
= pCreateInfo
->pColorLoadOps
[i
];
3193 pass
->layers
[i
].clear_color
= pCreateInfo
->pColorLoadClearValues
[i
];
3194 if (pass
->layers
[i
].color_load_op
== VK_ATTACHMENT_LOAD_OP_CLEAR
)
3195 pass
->num_clear_layers
++;
3198 *pRenderPass
= (VkRenderPass
) pass
;
3204 anv_cmd_buffer_fill_render_targets(struct anv_cmd_buffer
*cmd_buffer
)
3206 struct anv_framebuffer
*framebuffer
= cmd_buffer
->framebuffer
;
3207 struct anv_bindings
*bindings
= cmd_buffer
->bindings
;
3209 for (uint32_t i
= 0; i
< framebuffer
->color_attachment_count
; i
++) {
3210 const struct anv_surface_view
*view
= framebuffer
->color_attachments
[i
];
3212 struct anv_state state
=
3213 anv_cmd_buffer_alloc_surface_state(cmd_buffer
, 64, 64);
3214 memcpy(state
.map
, view
->surface_state
.map
, 64);
3216 /* The address goes in dwords 8 and 9 of the SURFACE_STATE */
3217 *(uint64_t *)(state
.map
+ 8 * 4) =
3218 anv_reloc_list_add(&cmd_buffer
->surface_relocs
,
3219 state
.offset
+ 8 * 4,
3220 view
->bo
, view
->offset
);
3222 bindings
->descriptors
[VK_SHADER_STAGE_FRAGMENT
].surfaces
[i
] = state
.offset
;
3224 cmd_buffer
->dirty
|= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY
;
3228 anv_cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer
*cmd_buffer
,
3229 struct anv_render_pass
*pass
)
3231 const struct anv_depth_stencil_view
*view
=
3232 cmd_buffer
->framebuffer
->depth_stencil
;
3234 /* FIXME: Implement the PMA stall W/A */
3236 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DEPTH_BUFFER
,
3237 .SurfaceType
= SURFTYPE_2D
,
3238 .DepthWriteEnable
= view
->depth_stride
> 0,
3239 .StencilWriteEnable
= view
->stencil_stride
> 0,
3240 .HierarchicalDepthBufferEnable
= false,
3241 .SurfaceFormat
= view
->depth_format
,
3242 .SurfacePitch
= view
->depth_stride
> 0 ? view
->depth_stride
- 1 : 0,
3243 .SurfaceBaseAddress
= { view
->bo
, view
->depth_offset
},
3244 .Height
= pass
->render_area
.extent
.height
- 1,
3245 .Width
= pass
->render_area
.extent
.width
- 1,
3248 .MinimumArrayElement
= 0,
3249 .DepthBufferObjectControlState
= GEN8_MOCS
,
3250 .RenderTargetViewExtent
= 1 - 1,
3251 .SurfaceQPitch
= 0);
3253 /* Disable hierarchial depth buffers. */
3254 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_HIER_DEPTH_BUFFER
);
3256 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_STENCIL_BUFFER
,
3257 .StencilBufferEnable
= view
->stencil_stride
> 0,
3258 .StencilBufferObjectControlState
= GEN8_MOCS
,
3259 .SurfacePitch
= view
->stencil_stride
> 0 ? view
->stencil_stride
- 1 : 0,
3260 .SurfaceBaseAddress
= { view
->bo
, view
->stencil_offset
},
3261 .SurfaceQPitch
= 0);
3263 /* Clear the clear params. */
3264 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_CLEAR_PARAMS
);
3267 void anv_CmdBeginRenderPass(
3268 VkCmdBuffer cmdBuffer
,
3269 const VkRenderPassBegin
* pRenderPassBegin
)
3271 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*) cmdBuffer
;
3272 struct anv_render_pass
*pass
= (struct anv_render_pass
*) pRenderPassBegin
->renderPass
;
3273 struct anv_framebuffer
*framebuffer
=
3274 (struct anv_framebuffer
*) pRenderPassBegin
->framebuffer
;
3276 cmd_buffer
->framebuffer
= framebuffer
;
3278 anv_batch_emit(&cmd_buffer
->batch
, GEN8_3DSTATE_DRAWING_RECTANGLE
,
3279 .ClippedDrawingRectangleYMin
= pass
->render_area
.offset
.y
,
3280 .ClippedDrawingRectangleXMin
= pass
->render_area
.offset
.x
,
3281 .ClippedDrawingRectangleYMax
=
3282 pass
->render_area
.offset
.y
+ pass
->render_area
.extent
.height
- 1,
3283 .ClippedDrawingRectangleXMax
=
3284 pass
->render_area
.offset
.x
+ pass
->render_area
.extent
.width
- 1,
3285 .DrawingRectangleOriginY
= 0,
3286 .DrawingRectangleOriginX
= 0);
3288 anv_cmd_buffer_fill_render_targets(cmd_buffer
);
3290 anv_cmd_buffer_emit_depth_stencil(cmd_buffer
, pass
);
3292 anv_cmd_buffer_clear(cmd_buffer
, pass
);
3295 void anv_CmdEndRenderPass(
3296 VkCmdBuffer cmdBuffer
,
3297 VkRenderPass renderPass
)
3299 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3300 * hack but it ensures that render targets always actually get written.
3301 * Eventually, we should do flushing based on image format transitions
3302 * or something of that nature.
3304 struct anv_cmd_buffer
*cmd_buffer
= (struct anv_cmd_buffer
*)cmdBuffer
;
3305 anv_batch_emit(&cmd_buffer
->batch
, GEN8_PIPE_CONTROL
,
3306 .PostSyncOperation
= NoWrite
,
3307 .RenderTargetCacheFlushEnable
= true,
3308 .InstructionCacheInvalidateEnable
= true,
3309 .DepthCacheFlushEnable
= true,
3310 .VFCacheInvalidationEnable
= true,
3311 .TextureCacheInvalidationEnable
= true,
3312 .CommandStreamerStallEnable
= true);
3315 void vkCmdDbgMarkerBegin(
3316 VkCmdBuffer cmdBuffer
,
3317 const char* pMarker
)
3318 __attribute__ ((visibility ("default")));
3320 void vkCmdDbgMarkerEnd(
3321 VkCmdBuffer cmdBuffer
)
3322 __attribute__ ((visibility ("default")));
3324 VkResult
vkDbgSetObjectTag(
3329 __attribute__ ((visibility ("default")));
3332 void vkCmdDbgMarkerBegin(
3333 VkCmdBuffer cmdBuffer
,
3334 const char* pMarker
)
3338 void vkCmdDbgMarkerEnd(
3339 VkCmdBuffer cmdBuffer
)
3343 VkResult
vkDbgSetObjectTag(