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vk: Make occlusion query work, both copy and get functions
[mesa.git] / src / vulkan / device.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "private.h"
31
32 static int
33 anv_env_get_int(const char *name)
34 {
35 const char *val = getenv(name);
36
37 if (!val)
38 return 0;
39
40 return strtol(val, NULL, 0);
41 }
42
43 static VkResult
44 fill_physical_device(struct anv_physical_device *device,
45 struct anv_instance *instance,
46 const char *path)
47 {
48 int fd;
49
50 fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
51 if (fd < 0)
52 return vk_error(VK_ERROR_UNAVAILABLE);
53
54 device->instance = instance;
55 device->path = path;
56
57 device->chipset_id = anv_env_get_int("INTEL_DEVID_OVERRIDE");
58 device->no_hw = false;
59 if (device->chipset_id) {
60 /* INTEL_DEVID_OVERRIDE implies INTEL_NO_HW. */
61 device->no_hw = true;
62 } else {
63 device->chipset_id = anv_gem_get_param(fd, I915_PARAM_CHIPSET_ID);
64 }
65 if (!device->chipset_id)
66 goto fail;
67
68 device->name = brw_get_device_name(device->chipset_id);
69 device->info = brw_get_device_info(device->chipset_id, -1);
70 if (!device->info)
71 goto fail;
72
73 if (!anv_gem_get_param(fd, I915_PARAM_HAS_WAIT_TIMEOUT))
74 goto fail;
75
76 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXECBUF2))
77 goto fail;
78
79 if (!anv_gem_get_param(fd, I915_PARAM_HAS_LLC))
80 goto fail;
81
82 if (!anv_gem_get_param(fd, I915_PARAM_HAS_EXEC_CONSTANTS))
83 goto fail;
84
85 close(fd);
86
87 return VK_SUCCESS;
88
89 fail:
90 close(fd);
91
92 return vk_error(VK_ERROR_UNAVAILABLE);
93 }
94
95 static void *default_alloc(
96 void* pUserData,
97 size_t size,
98 size_t alignment,
99 VkSystemAllocType allocType)
100 {
101 return malloc(size);
102 }
103
104 static void default_free(
105 void* pUserData,
106 void* pMem)
107 {
108 free(pMem);
109 }
110
111 static const VkAllocCallbacks default_alloc_callbacks = {
112 .pUserData = NULL,
113 .pfnAlloc = default_alloc,
114 .pfnFree = default_free
115 };
116
117 VkResult anv_CreateInstance(
118 const VkInstanceCreateInfo* pCreateInfo,
119 VkInstance* pInstance)
120 {
121 struct anv_instance *instance;
122 const VkAllocCallbacks *alloc_callbacks = &default_alloc_callbacks;
123 void *user_data = NULL;
124 VkResult result;
125
126 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO);
127
128 if (pCreateInfo->pAllocCb) {
129 alloc_callbacks = pCreateInfo->pAllocCb;
130 user_data = pCreateInfo->pAllocCb->pUserData;
131 }
132 instance = alloc_callbacks->pfnAlloc(user_data, sizeof(*instance), 8,
133 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
134 if (!instance)
135 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
136
137 instance->pAllocUserData = alloc_callbacks->pUserData;
138 instance->pfnAlloc = alloc_callbacks->pfnAlloc;
139 instance->pfnFree = alloc_callbacks->pfnFree;
140 instance->apiVersion = pCreateInfo->pAppInfo->apiVersion;
141
142 instance->physicalDeviceCount = 0;
143 result = fill_physical_device(&instance->physicalDevice,
144 instance, "/dev/dri/renderD128");
145 if (result == VK_SUCCESS)
146 instance->physicalDeviceCount++;
147
148 *pInstance = (VkInstance) instance;
149
150 return VK_SUCCESS;
151 }
152
153 VkResult anv_DestroyInstance(
154 VkInstance _instance)
155 {
156 struct anv_instance *instance = (struct anv_instance *) _instance;
157
158 instance->pfnFree(instance->pAllocUserData, instance);
159
160 return VK_SUCCESS;
161 }
162
163 VkResult anv_EnumeratePhysicalDevices(
164 VkInstance _instance,
165 uint32_t* pPhysicalDeviceCount,
166 VkPhysicalDevice* pPhysicalDevices)
167 {
168 struct anv_instance *instance = (struct anv_instance *) _instance;
169
170 if (*pPhysicalDeviceCount >= 1)
171 pPhysicalDevices[0] = (VkPhysicalDevice) &instance->physicalDevice;
172 *pPhysicalDeviceCount = instance->physicalDeviceCount;
173
174 return VK_SUCCESS;
175 }
176
177 VkResult anv_GetPhysicalDeviceInfo(
178 VkPhysicalDevice physicalDevice,
179 VkPhysicalDeviceInfoType infoType,
180 size_t* pDataSize,
181 void* pData)
182 {
183 struct anv_physical_device *device = (struct anv_physical_device *) physicalDevice;
184 VkPhysicalDeviceProperties *properties;
185 VkPhysicalDevicePerformance *performance;
186 VkPhysicalDeviceQueueProperties *queue_properties;
187 VkPhysicalDeviceMemoryProperties *memory_properties;
188 uint64_t ns_per_tick = 80;
189
190 switch (infoType) {
191 case VK_PHYSICAL_DEVICE_INFO_TYPE_PROPERTIES:
192 properties = pData;
193
194 *pDataSize = sizeof(*properties);
195 if (pData == NULL)
196 return VK_SUCCESS;
197
198 properties->apiVersion = 1;
199 properties->driverVersion = 1;
200 properties->vendorId = 0x8086;
201 properties->deviceId = device->chipset_id;
202 properties->deviceType = VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU;
203 strcpy(properties->deviceName, device->name);
204 properties->maxInlineMemoryUpdateSize = 0;
205 properties->maxBoundDescriptorSets = MAX_SETS;
206 properties->maxThreadGroupSize = 512;
207 properties->timestampFrequency = 1000 * 1000 * 1000 / ns_per_tick;
208 properties->multiColorAttachmentClears = true;
209 properties->maxDescriptorSets = 8;
210 properties->maxViewports = 16;
211 properties->maxColorAttachments = 8;
212 return VK_SUCCESS;
213
214 case VK_PHYSICAL_DEVICE_INFO_TYPE_PERFORMANCE:
215 performance = pData;
216
217 *pDataSize = sizeof(*performance);
218 if (pData == NULL)
219 return VK_SUCCESS;
220
221 performance->maxDeviceClock = 1.0;
222 performance->aluPerClock = 1.0;
223 performance->texPerClock = 1.0;
224 performance->primsPerClock = 1.0;
225 performance->pixelsPerClock = 1.0;
226 return VK_SUCCESS;
227
228 case VK_PHYSICAL_DEVICE_INFO_TYPE_QUEUE_PROPERTIES:
229 queue_properties = pData;
230
231 *pDataSize = sizeof(*queue_properties);
232 if (pData == NULL)
233 return VK_SUCCESS;
234
235 queue_properties->queueFlags = 0;
236 queue_properties->queueCount = 1;
237 queue_properties->maxAtomicCounters = 0;
238 queue_properties->supportsTimestamps = true;
239 queue_properties->maxMemReferences = 256;
240 return VK_SUCCESS;
241
242 case VK_PHYSICAL_DEVICE_INFO_TYPE_MEMORY_PROPERTIES:
243 memory_properties = pData;
244
245 *pDataSize = sizeof(*memory_properties);
246 if (pData == NULL)
247 return VK_SUCCESS;
248
249 memory_properties->supportsMigration = false;
250 memory_properties->supportsPinning = false;
251 return VK_SUCCESS;
252
253 default:
254 return VK_UNSUPPORTED;
255 }
256
257 }
258
259 void * vkGetProcAddr(
260 VkPhysicalDevice physicalDevice,
261 const char* pName)
262 {
263 return anv_lookup_entrypoint(pName);
264 }
265
266 static void
267 parse_debug_flags(struct anv_device *device)
268 {
269 const char *debug, *p, *end;
270
271 debug = getenv("INTEL_DEBUG");
272 device->dump_aub = false;
273 if (debug) {
274 for (p = debug; *p; p = end + 1) {
275 end = strchrnul(p, ',');
276 if (end - p == 3 && memcmp(p, "aub", 3) == 0)
277 device->dump_aub = true;
278 if (end - p == 5 && memcmp(p, "no_hw", 5) == 0)
279 device->no_hw = true;
280 if (*end == '\0')
281 break;
282 }
283 }
284 }
285
286 VkResult anv_CreateDevice(
287 VkPhysicalDevice _physicalDevice,
288 const VkDeviceCreateInfo* pCreateInfo,
289 VkDevice* pDevice)
290 {
291 struct anv_physical_device *physicalDevice =
292 (struct anv_physical_device *) _physicalDevice;
293 struct anv_instance *instance = physicalDevice->instance;
294 struct anv_device *device;
295
296 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO);
297
298 device = instance->pfnAlloc(instance->pAllocUserData,
299 sizeof(*device), 8,
300 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
301 if (!device)
302 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
303
304 device->no_hw = physicalDevice->no_hw;
305 parse_debug_flags(device);
306
307 device->instance = physicalDevice->instance;
308 device->fd = open("/dev/dri/renderD128", O_RDWR | O_CLOEXEC);
309 if (device->fd == -1)
310 goto fail_device;
311
312 device->context_id = anv_gem_create_context(device);
313 if (device->context_id == -1)
314 goto fail_fd;
315
316 anv_block_pool_init(&device->dynamic_state_block_pool, device, 2048);
317
318 anv_state_pool_init(&device->dynamic_state_pool,
319 &device->dynamic_state_block_pool);
320
321 anv_block_pool_init(&device->instruction_block_pool, device, 2048);
322 anv_block_pool_init(&device->surface_state_block_pool, device, 2048);
323
324 anv_state_pool_init(&device->surface_state_pool,
325 &device->surface_state_block_pool);
326
327 device->compiler = anv_compiler_create(device->fd);
328 device->aub_writer = NULL;
329
330 device->info = *physicalDevice->info;
331
332 pthread_mutex_init(&device->mutex, NULL);
333
334 anv_device_init_meta(device);
335
336 *pDevice = (VkDevice) device;
337
338 return VK_SUCCESS;
339
340 fail_fd:
341 close(device->fd);
342 fail_device:
343 anv_device_free(device, device);
344
345 return vk_error(VK_ERROR_UNAVAILABLE);
346 }
347
348 VkResult anv_DestroyDevice(
349 VkDevice _device)
350 {
351 struct anv_device *device = (struct anv_device *) _device;
352
353 anv_compiler_destroy(device->compiler);
354
355 anv_block_pool_finish(&device->dynamic_state_block_pool);
356 anv_block_pool_finish(&device->instruction_block_pool);
357 anv_block_pool_finish(&device->surface_state_block_pool);
358
359 close(device->fd);
360
361 if (device->aub_writer)
362 anv_aub_writer_destroy(device->aub_writer);
363
364 anv_device_free(device, device);
365
366 return VK_SUCCESS;
367 }
368
369 VkResult anv_GetGlobalExtensionInfo(
370 VkExtensionInfoType infoType,
371 uint32_t extensionIndex,
372 size_t* pDataSize,
373 void* pData)
374 {
375 uint32_t *count;
376
377 switch (infoType) {
378 case VK_EXTENSION_INFO_TYPE_COUNT:
379 count = pData;
380 assert(*pDataSize == 4);
381 *count = 0;
382 return VK_SUCCESS;
383
384 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
385 return vk_error(VK_ERROR_INVALID_EXTENSION);
386
387 default:
388 return VK_UNSUPPORTED;
389 }
390 }
391
392 VkResult anv_GetPhysicalDeviceExtensionInfo(
393 VkPhysicalDevice physicalDevice,
394 VkExtensionInfoType infoType,
395 uint32_t extensionIndex,
396 size_t* pDataSize,
397 void* pData)
398 {
399 uint32_t *count;
400
401 switch (infoType) {
402 case VK_EXTENSION_INFO_TYPE_COUNT:
403 *pDataSize = 4;
404 if (pData == NULL)
405 return VK_SUCCESS;
406
407 count = pData;
408 *count = 0;
409 return VK_SUCCESS;
410
411 case VK_EXTENSION_INFO_TYPE_PROPERTIES:
412 return vk_error(VK_ERROR_INVALID_EXTENSION);
413
414 default:
415 return VK_UNSUPPORTED;
416 }
417 }
418
419 VkResult anv_EnumerateLayers(
420 VkPhysicalDevice physicalDevice,
421 size_t maxStringSize,
422 size_t* pLayerCount,
423 char* const* pOutLayers,
424 void* pReserved)
425 {
426 *pLayerCount = 0;
427
428 return VK_SUCCESS;
429 }
430
431 VkResult anv_GetDeviceQueue(
432 VkDevice _device,
433 uint32_t queueNodeIndex,
434 uint32_t queueIndex,
435 VkQueue* pQueue)
436 {
437 struct anv_device *device = (struct anv_device *) _device;
438 struct anv_queue *queue;
439
440 /* FIXME: Should allocate these at device create time. */
441
442 queue = anv_device_alloc(device, sizeof(*queue), 8,
443 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
444 if (queue == NULL)
445 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
446
447 queue->device = device;
448 queue->pool = &device->surface_state_pool;
449
450 queue->completed_serial = anv_state_pool_alloc(queue->pool, 4, 4);
451 *(uint32_t *)queue->completed_serial.map = 0;
452 queue->next_serial = 1;
453
454 *pQueue = (VkQueue) queue;
455
456 return VK_SUCCESS;
457 }
458
459 static const uint32_t BATCH_SIZE = 8192;
460
461 VkResult
462 anv_batch_init(struct anv_batch *batch, struct anv_device *device)
463 {
464 VkResult result;
465
466 result = anv_bo_init_new(&batch->bo, device, BATCH_SIZE);
467 if (result != VK_SUCCESS)
468 return result;
469
470 batch->bo.map =
471 anv_gem_mmap(device, batch->bo.gem_handle, 0, BATCH_SIZE);
472 if (batch->bo.map == NULL) {
473 anv_gem_close(device, batch->bo.gem_handle);
474 return vk_error(VK_ERROR_MEMORY_MAP_FAILED);
475 }
476
477 batch->cmd_relocs.num_relocs = 0;
478 batch->surf_relocs.num_relocs = 0;
479 batch->next = batch->bo.map;
480
481 return VK_SUCCESS;
482 }
483
484 void
485 anv_batch_finish(struct anv_batch *batch, struct anv_device *device)
486 {
487 anv_gem_munmap(batch->bo.map, BATCH_SIZE);
488 anv_gem_close(device, batch->bo.gem_handle);
489 }
490
491 void
492 anv_batch_reset(struct anv_batch *batch)
493 {
494 batch->next = batch->bo.map;
495 batch->cmd_relocs.num_relocs = 0;
496 batch->surf_relocs.num_relocs = 0;
497 }
498
499 void *
500 anv_batch_emit_dwords(struct anv_batch *batch, int num_dwords)
501 {
502 void *p = batch->next;
503
504 batch->next += num_dwords * 4;
505
506 return p;
507 }
508
509 static void
510 anv_reloc_list_append(struct anv_reloc_list *list,
511 struct anv_reloc_list *other, uint32_t offset)
512 {
513 uint32_t i, count;
514
515 count = list->num_relocs;
516 memcpy(&list->relocs[count], &other->relocs[0],
517 other->num_relocs * sizeof(other->relocs[0]));
518 memcpy(&list->reloc_bos[count], &other->reloc_bos[0],
519 other->num_relocs * sizeof(other->reloc_bos[0]));
520 for (i = 0; i < other->num_relocs; i++)
521 list->relocs[i + count].offset += offset;
522
523 count += other->num_relocs;
524 }
525
526 static uint64_t
527 anv_reloc_list_add(struct anv_reloc_list *list,
528 uint32_t offset,
529 struct anv_bo *target_bo, uint32_t delta)
530 {
531 struct drm_i915_gem_relocation_entry *entry;
532 int index;
533
534 assert(list->num_relocs < ANV_BATCH_MAX_RELOCS);
535
536 /* XXX: Can we use I915_EXEC_HANDLE_LUT? */
537 index = list->num_relocs++;
538 list->reloc_bos[index] = target_bo;
539 entry = &list->relocs[index];
540 entry->target_handle = target_bo->gem_handle;
541 entry->delta = delta;
542 entry->offset = offset;
543 entry->presumed_offset = target_bo->offset;
544 entry->read_domains = 0;
545 entry->write_domain = 0;
546
547 return target_bo->offset + delta;
548 }
549
550 void
551 anv_batch_emit_batch(struct anv_batch *batch, struct anv_batch *other)
552 {
553 uint32_t size, offset;
554
555 size = other->next - other->bo.map;
556 memcpy(batch->next, other->bo.map, size);
557
558 offset = batch->next - batch->bo.map;
559 anv_reloc_list_append(&batch->cmd_relocs, &other->cmd_relocs, offset);
560 anv_reloc_list_append(&batch->surf_relocs, &other->surf_relocs, offset);
561
562 batch->next += size;
563 }
564
565 uint64_t
566 anv_batch_emit_reloc(struct anv_batch *batch,
567 void *location, struct anv_bo *bo, uint32_t delta)
568 {
569 return anv_reloc_list_add(&batch->cmd_relocs,
570 location - batch->bo.map, bo, delta);
571 }
572
573 VkResult anv_QueueSubmit(
574 VkQueue _queue,
575 uint32_t cmdBufferCount,
576 const VkCmdBuffer* pCmdBuffers,
577 VkFence _fence)
578 {
579 struct anv_queue *queue = (struct anv_queue *) _queue;
580 struct anv_device *device = queue->device;
581 struct anv_fence *fence = (struct anv_fence *) _fence;
582 int ret;
583
584 for (uint32_t i = 0; i < cmdBufferCount; i++) {
585 struct anv_cmd_buffer *cmd_buffer =
586 (struct anv_cmd_buffer *) pCmdBuffers[i];
587
588 if (device->dump_aub)
589 anv_cmd_buffer_dump(cmd_buffer);
590
591 if (!device->no_hw) {
592 ret = anv_gem_execbuffer(device, &cmd_buffer->execbuf);
593 if (ret != 0)
594 return vk_error(VK_ERROR_UNKNOWN);
595
596 if (fence) {
597 ret = anv_gem_execbuffer(device, &fence->execbuf);
598 if (ret != 0)
599 return vk_error(VK_ERROR_UNKNOWN);
600 }
601
602 for (uint32_t i = 0; i < cmd_buffer->bo_count; i++)
603 cmd_buffer->exec2_bos[i]->offset = cmd_buffer->exec2_objects[i].offset;
604 } else {
605 *(uint32_t *)queue->completed_serial.map = cmd_buffer->serial;
606 }
607 }
608
609 return VK_SUCCESS;
610 }
611
612 VkResult anv_QueueAddMemReferences(
613 VkQueue queue,
614 uint32_t count,
615 const VkDeviceMemory* pMems)
616 {
617 return VK_SUCCESS;
618 }
619
620 VkResult anv_QueueRemoveMemReferences(
621 VkQueue queue,
622 uint32_t count,
623 const VkDeviceMemory* pMems)
624 {
625 return VK_SUCCESS;
626 }
627
628 VkResult anv_QueueWaitIdle(
629 VkQueue _queue)
630 {
631 struct anv_queue *queue = (struct anv_queue *) _queue;
632
633 return vkDeviceWaitIdle((VkDevice) queue->device);
634 }
635
636 VkResult anv_DeviceWaitIdle(
637 VkDevice _device)
638 {
639 struct anv_device *device = (struct anv_device *) _device;
640 struct anv_state state;
641 struct anv_batch batch;
642 struct drm_i915_gem_execbuffer2 execbuf;
643 struct drm_i915_gem_exec_object2 exec2_objects[1];
644 struct anv_bo *bo = NULL;
645 VkResult result;
646 int64_t timeout;
647 int ret;
648
649 state = anv_state_pool_alloc(&device->dynamic_state_pool, 32, 32);
650 bo = &device->dynamic_state_pool.block_pool->bo;
651 batch.next = state.map;
652 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
653 anv_batch_emit(&batch, GEN8_MI_NOOP);
654
655 exec2_objects[0].handle = bo->gem_handle;
656 exec2_objects[0].relocation_count = 0;
657 exec2_objects[0].relocs_ptr = 0;
658 exec2_objects[0].alignment = 0;
659 exec2_objects[0].offset = bo->offset;
660 exec2_objects[0].flags = 0;
661 exec2_objects[0].rsvd1 = 0;
662 exec2_objects[0].rsvd2 = 0;
663
664 execbuf.buffers_ptr = (uintptr_t) exec2_objects;
665 execbuf.buffer_count = 1;
666 execbuf.batch_start_offset = state.offset;
667 execbuf.batch_len = batch.next - state.map;
668 execbuf.cliprects_ptr = 0;
669 execbuf.num_cliprects = 0;
670 execbuf.DR1 = 0;
671 execbuf.DR4 = 0;
672
673 execbuf.flags =
674 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
675 execbuf.rsvd1 = device->context_id;
676 execbuf.rsvd2 = 0;
677
678 if (!device->no_hw) {
679 ret = anv_gem_execbuffer(device, &execbuf);
680 if (ret != 0) {
681 result = vk_error(VK_ERROR_UNKNOWN);
682 goto fail;
683 }
684
685 timeout = INT64_MAX;
686 ret = anv_gem_wait(device, bo->gem_handle, &timeout);
687 if (ret != 0) {
688 result = vk_error(VK_ERROR_UNKNOWN);
689 goto fail;
690 }
691 }
692
693 anv_state_pool_free(&device->dynamic_state_pool, state);
694
695 return VK_SUCCESS;
696
697 fail:
698 anv_state_pool_free(&device->dynamic_state_pool, state);
699
700 return result;
701 }
702
703 void *
704 anv_device_alloc(struct anv_device * device,
705 size_t size,
706 size_t alignment,
707 VkSystemAllocType allocType)
708 {
709 return device->instance->pfnAlloc(device->instance->pAllocUserData,
710 size,
711 alignment,
712 allocType);
713 }
714
715 void
716 anv_device_free(struct anv_device * device,
717 void * mem)
718 {
719 return device->instance->pfnFree(device->instance->pAllocUserData,
720 mem);
721 }
722
723 VkResult
724 anv_bo_init_new(struct anv_bo *bo, struct anv_device *device, uint64_t size)
725 {
726 bo->gem_handle = anv_gem_create(device, size);
727 if (!bo->gem_handle)
728 return vk_error(VK_ERROR_OUT_OF_DEVICE_MEMORY);
729
730 bo->map = NULL;
731 bo->index = 0;
732 bo->offset = 0;
733 bo->size = size;
734
735 return VK_SUCCESS;
736 }
737
738 VkResult anv_AllocMemory(
739 VkDevice _device,
740 const VkMemoryAllocInfo* pAllocInfo,
741 VkDeviceMemory* pMem)
742 {
743 struct anv_device *device = (struct anv_device *) _device;
744 struct anv_device_memory *mem;
745 VkResult result;
746
747 assert(pAllocInfo->sType == VK_STRUCTURE_TYPE_MEMORY_ALLOC_INFO);
748
749 mem = anv_device_alloc(device, sizeof(*mem), 8,
750 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
751 if (mem == NULL)
752 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
753
754 result = anv_bo_init_new(&mem->bo, device, pAllocInfo->allocationSize);
755 if (result != VK_SUCCESS)
756 goto fail;
757
758 *pMem = (VkDeviceMemory) mem;
759
760 return VK_SUCCESS;
761
762 fail:
763 anv_device_free(device, mem);
764
765 return result;
766 }
767
768 VkResult anv_FreeMemory(
769 VkDevice _device,
770 VkDeviceMemory _mem)
771 {
772 struct anv_device *device = (struct anv_device *) _device;
773 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
774
775 if (mem->bo.map)
776 anv_gem_munmap(mem->bo.map, mem->bo.size);
777
778 if (mem->bo.gem_handle != 0)
779 anv_gem_close(device, mem->bo.gem_handle);
780
781 anv_device_free(device, mem);
782
783 return VK_SUCCESS;
784 }
785
786 VkResult anv_SetMemoryPriority(
787 VkDevice device,
788 VkDeviceMemory mem,
789 VkMemoryPriority priority)
790 {
791 return VK_SUCCESS;
792 }
793
794 VkResult anv_MapMemory(
795 VkDevice _device,
796 VkDeviceMemory _mem,
797 VkDeviceSize offset,
798 VkDeviceSize size,
799 VkMemoryMapFlags flags,
800 void** ppData)
801 {
802 struct anv_device *device = (struct anv_device *) _device;
803 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
804
805 /* FIXME: Is this supposed to be thread safe? Since vkUnmapMemory() only
806 * takes a VkDeviceMemory pointer, it seems like only one map of the memory
807 * at a time is valid. We could just mmap up front and return an offset
808 * pointer here, but that may exhaust virtual memory on 32 bit
809 * userspace. */
810
811 mem->map = anv_gem_mmap(device, mem->bo.gem_handle, offset, size);
812 mem->map_size = size;
813
814 *ppData = mem->map;
815
816 return VK_SUCCESS;
817 }
818
819 VkResult anv_UnmapMemory(
820 VkDevice _device,
821 VkDeviceMemory _mem)
822 {
823 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
824
825 anv_gem_munmap(mem->map, mem->map_size);
826
827 return VK_SUCCESS;
828 }
829
830 VkResult anv_FlushMappedMemory(
831 VkDevice device,
832 VkDeviceMemory mem,
833 VkDeviceSize offset,
834 VkDeviceSize size)
835 {
836 /* clflush here for !llc platforms */
837
838 return VK_SUCCESS;
839 }
840
841 VkResult anv_PinSystemMemory(
842 VkDevice device,
843 const void* pSysMem,
844 size_t memSize,
845 VkDeviceMemory* pMem)
846 {
847 return VK_SUCCESS;
848 }
849
850 VkResult anv_GetMultiDeviceCompatibility(
851 VkPhysicalDevice physicalDevice0,
852 VkPhysicalDevice physicalDevice1,
853 VkPhysicalDeviceCompatibilityInfo* pInfo)
854 {
855 return VK_UNSUPPORTED;
856 }
857
858 VkResult anv_OpenSharedMemory(
859 VkDevice device,
860 const VkMemoryOpenInfo* pOpenInfo,
861 VkDeviceMemory* pMem)
862 {
863 return VK_UNSUPPORTED;
864 }
865
866 VkResult anv_OpenSharedSemaphore(
867 VkDevice device,
868 const VkSemaphoreOpenInfo* pOpenInfo,
869 VkSemaphore* pSemaphore)
870 {
871 return VK_UNSUPPORTED;
872 }
873
874 VkResult anv_OpenPeerMemory(
875 VkDevice device,
876 const VkPeerMemoryOpenInfo* pOpenInfo,
877 VkDeviceMemory* pMem)
878 {
879 return VK_UNSUPPORTED;
880 }
881
882 VkResult anv_OpenPeerImage(
883 VkDevice device,
884 const VkPeerImageOpenInfo* pOpenInfo,
885 VkImage* pImage,
886 VkDeviceMemory* pMem)
887 {
888 return VK_UNSUPPORTED;
889 }
890
891 static VkResult
892 anv_instance_destructor(struct anv_device * device,
893 VkObject object)
894 {
895 return vkDestroyInstance(object);
896 }
897
898 static VkResult
899 anv_noop_destructor(struct anv_device * device,
900 VkObject object)
901 {
902 return VK_SUCCESS;
903 }
904
905 static VkResult
906 anv_device_destructor(struct anv_device * device,
907 VkObject object)
908 {
909 return vkDestroyDevice(object);
910 }
911
912 static VkResult
913 anv_cmd_buffer_destructor(struct anv_device * device,
914 VkObject object)
915 {
916 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) object;
917
918 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
919 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
920 anv_batch_finish(&cmd_buffer->batch, device);
921 anv_device_free(device, cmd_buffer->exec2_objects);
922 anv_device_free(device, cmd_buffer->exec2_bos);
923 anv_device_free(device, cmd_buffer);
924
925 return VK_SUCCESS;
926 }
927
928 static VkResult
929 anv_pipeline_destructor(struct anv_device * device,
930 VkObject object)
931 {
932 struct anv_pipeline *pipeline = (struct anv_pipeline *) object;
933
934 return anv_pipeline_destroy(pipeline);
935 }
936
937 static VkResult
938 anv_free_destructor(struct anv_device * device,
939 VkObject object)
940 {
941 anv_device_free(device, (void *) object);
942
943 return VK_SUCCESS;
944 }
945
946 static VkResult
947 anv_fence_destructor(struct anv_device * device,
948 VkObject object)
949 {
950 struct anv_fence *fence = (struct anv_fence *) object;
951
952 anv_gem_munmap(fence->bo.map, fence->bo.size);
953 anv_gem_close(device, fence->bo.gem_handle);
954 anv_device_free(device, fence);
955
956 return VK_SUCCESS;
957 }
958
959 static VkResult
960 anv_query_pool_destructor(struct anv_device * device,
961 VkObject object)
962 {
963 struct anv_query_pool *pool = (struct anv_query_pool *) object;
964
965 anv_gem_munmap(pool->bo.map, pool->bo.size);
966 anv_gem_close(device, pool->bo.gem_handle);
967 anv_device_free(device, pool);
968
969 return VK_SUCCESS;
970 }
971
972 static VkResult (*anv_object_destructors[])(struct anv_device *device,
973 VkObject object) = {
974 [VK_OBJECT_TYPE_INSTANCE] = anv_instance_destructor,
975 [VK_OBJECT_TYPE_PHYSICAL_DEVICE] = anv_noop_destructor,
976 [VK_OBJECT_TYPE_DEVICE] = anv_device_destructor,
977 [VK_OBJECT_TYPE_QUEUE] = anv_noop_destructor,
978 [VK_OBJECT_TYPE_COMMAND_BUFFER] = anv_cmd_buffer_destructor,
979 [VK_OBJECT_TYPE_PIPELINE] = anv_pipeline_destructor,
980 [VK_OBJECT_TYPE_SHADER] = anv_free_destructor,
981 [VK_OBJECT_TYPE_BUFFER] = anv_free_destructor,
982 [VK_OBJECT_TYPE_IMAGE] = anv_free_destructor,
983 [VK_OBJECT_TYPE_RENDER_PASS] = anv_free_destructor,
984 [VK_OBJECT_TYPE_FENCE] = anv_fence_destructor,
985 [VK_OBJECT_TYPE_QUERY_POOL] = anv_query_pool_destructor
986 };
987
988 VkResult anv_DestroyObject(
989 VkDevice _device,
990 VkObjectType objType,
991 VkObject object)
992 {
993 struct anv_device *device = (struct anv_device *) _device;
994
995 assert(objType < ARRAY_SIZE(anv_object_destructors) &&
996 anv_object_destructors[objType] != NULL);
997
998 return anv_object_destructors[objType](device, object);
999 }
1000
1001 static void
1002 fill_memory_requirements(
1003 VkObjectType objType,
1004 VkObject object,
1005 VkMemoryRequirements * memory_requirements)
1006 {
1007 struct anv_buffer *buffer;
1008 struct anv_image *image;
1009
1010 memory_requirements->memPropsAllowed =
1011 VK_MEMORY_PROPERTY_HOST_VISIBLE_BIT |
1012 VK_MEMORY_PROPERTY_HOST_DEVICE_COHERENT_BIT |
1013 /* VK_MEMORY_PROPERTY_HOST_UNCACHED_BIT | */
1014 VK_MEMORY_PROPERTY_HOST_WRITE_COMBINED_BIT |
1015 VK_MEMORY_PROPERTY_PREFER_HOST_LOCAL |
1016 VK_MEMORY_PROPERTY_SHAREABLE_BIT;
1017
1018 memory_requirements->memPropsRequired = 0;
1019
1020 switch (objType) {
1021 case VK_OBJECT_TYPE_BUFFER:
1022 buffer = (struct anv_buffer *) object;
1023 memory_requirements->size = buffer->size;
1024 memory_requirements->alignment = 16;
1025 break;
1026 case VK_OBJECT_TYPE_IMAGE:
1027 image = (struct anv_image *) object;
1028 memory_requirements->size = image->size;
1029 memory_requirements->alignment = image->alignment;
1030 break;
1031 default:
1032 memory_requirements->size = 0;
1033 break;
1034 }
1035 }
1036
1037 static uint32_t
1038 get_allocation_count(VkObjectType objType)
1039 {
1040 switch (objType) {
1041 case VK_OBJECT_TYPE_BUFFER:
1042 case VK_OBJECT_TYPE_IMAGE:
1043 return 1;
1044 default:
1045 return 0;
1046 }
1047 }
1048
1049 VkResult anv_GetObjectInfo(
1050 VkDevice _device,
1051 VkObjectType objType,
1052 VkObject object,
1053 VkObjectInfoType infoType,
1054 size_t* pDataSize,
1055 void* pData)
1056 {
1057 VkMemoryRequirements memory_requirements;
1058 uint32_t *count;
1059
1060 switch (infoType) {
1061 case VK_OBJECT_INFO_TYPE_MEMORY_REQUIREMENTS:
1062 *pDataSize = sizeof(memory_requirements);
1063 if (pData == NULL)
1064 return VK_SUCCESS;
1065
1066 fill_memory_requirements(objType, object, pData);
1067 return VK_SUCCESS;
1068
1069 case VK_OBJECT_INFO_TYPE_MEMORY_ALLOCATION_COUNT:
1070 *pDataSize = sizeof(count);
1071 if (pData == NULL)
1072 return VK_SUCCESS;
1073
1074 count = pData;
1075 *count = get_allocation_count(objType);
1076 return VK_SUCCESS;
1077
1078 default:
1079 return VK_UNSUPPORTED;
1080 }
1081
1082 }
1083
1084 VkResult anv_QueueBindObjectMemory(
1085 VkQueue queue,
1086 VkObjectType objType,
1087 VkObject object,
1088 uint32_t allocationIdx,
1089 VkDeviceMemory _mem,
1090 VkDeviceSize memOffset)
1091 {
1092 struct anv_buffer *buffer;
1093 struct anv_image *image;
1094 struct anv_device_memory *mem = (struct anv_device_memory *) _mem;
1095
1096 switch (objType) {
1097 case VK_OBJECT_TYPE_BUFFER:
1098 buffer = (struct anv_buffer *) object;
1099 buffer->bo = &mem->bo;
1100 buffer->offset = memOffset;
1101 break;
1102 case VK_OBJECT_TYPE_IMAGE:
1103 image = (struct anv_image *) object;
1104 image->bo = &mem->bo;
1105 image->offset = memOffset;
1106 break;
1107 default:
1108 break;
1109 }
1110
1111 return VK_SUCCESS;
1112 }
1113
1114 VkResult anv_QueueBindObjectMemoryRange(
1115 VkQueue queue,
1116 VkObjectType objType,
1117 VkObject object,
1118 uint32_t allocationIdx,
1119 VkDeviceSize rangeOffset,
1120 VkDeviceSize rangeSize,
1121 VkDeviceMemory mem,
1122 VkDeviceSize memOffset)
1123 {
1124 stub_return(VK_UNSUPPORTED);
1125 }
1126
1127 VkResult anv_QueueBindImageMemoryRange(
1128 VkQueue queue,
1129 VkImage image,
1130 uint32_t allocationIdx,
1131 const VkImageMemoryBindInfo* pBindInfo,
1132 VkDeviceMemory mem,
1133 VkDeviceSize memOffset)
1134 {
1135 stub_return(VK_UNSUPPORTED);
1136 }
1137
1138 VkResult anv_CreateFence(
1139 VkDevice _device,
1140 const VkFenceCreateInfo* pCreateInfo,
1141 VkFence* pFence)
1142 {
1143 struct anv_device *device = (struct anv_device *) _device;
1144 struct anv_fence *fence;
1145 struct anv_batch batch;
1146 VkResult result;
1147
1148 const uint32_t fence_size = 128;
1149
1150 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FENCE_CREATE_INFO);
1151
1152 fence = anv_device_alloc(device, sizeof(*fence), 8,
1153 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1154 if (fence == NULL)
1155 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1156
1157 result = anv_bo_init_new(&fence->bo, device, fence_size);
1158 if (result != VK_SUCCESS)
1159 goto fail;
1160
1161 fence->bo.map =
1162 anv_gem_mmap(device, fence->bo.gem_handle, 0, fence->bo.size);
1163 batch.next = fence->bo.map;
1164 anv_batch_emit(&batch, GEN8_MI_BATCH_BUFFER_END);
1165 anv_batch_emit(&batch, GEN8_MI_NOOP);
1166
1167 fence->exec2_objects[0].handle = fence->bo.gem_handle;
1168 fence->exec2_objects[0].relocation_count = 0;
1169 fence->exec2_objects[0].relocs_ptr = 0;
1170 fence->exec2_objects[0].alignment = 0;
1171 fence->exec2_objects[0].offset = fence->bo.offset;
1172 fence->exec2_objects[0].flags = 0;
1173 fence->exec2_objects[0].rsvd1 = 0;
1174 fence->exec2_objects[0].rsvd2 = 0;
1175
1176 fence->execbuf.buffers_ptr = (uintptr_t) fence->exec2_objects;
1177 fence->execbuf.buffer_count = 1;
1178 fence->execbuf.batch_start_offset = 0;
1179 fence->execbuf.batch_len = batch.next - fence->bo.map;
1180 fence->execbuf.cliprects_ptr = 0;
1181 fence->execbuf.num_cliprects = 0;
1182 fence->execbuf.DR1 = 0;
1183 fence->execbuf.DR4 = 0;
1184
1185 fence->execbuf.flags =
1186 I915_EXEC_HANDLE_LUT | I915_EXEC_NO_RELOC | I915_EXEC_RENDER;
1187 fence->execbuf.rsvd1 = device->context_id;
1188 fence->execbuf.rsvd2 = 0;
1189
1190 *pFence = (VkQueryPool) fence;
1191
1192 return VK_SUCCESS;
1193
1194 fail:
1195 anv_device_free(device, fence);
1196
1197 return result;
1198 }
1199
1200 VkResult anv_ResetFences(
1201 VkDevice _device,
1202 uint32_t fenceCount,
1203 VkFence* pFences)
1204 {
1205 struct anv_fence **fences = (struct anv_fence **) pFences;
1206
1207 for (uint32_t i; i < fenceCount; i++)
1208 fences[i]->ready = false;
1209
1210 return VK_SUCCESS;
1211 }
1212
1213 VkResult anv_GetFenceStatus(
1214 VkDevice _device,
1215 VkFence _fence)
1216 {
1217 struct anv_device *device = (struct anv_device *) _device;
1218 struct anv_fence *fence = (struct anv_fence *) _fence;
1219 int64_t t = 0;
1220 int ret;
1221
1222 if (fence->ready)
1223 return VK_SUCCESS;
1224
1225 ret = anv_gem_wait(device, fence->bo.gem_handle, &t);
1226 if (ret == 0) {
1227 fence->ready = true;
1228 return VK_SUCCESS;
1229 }
1230
1231 return VK_NOT_READY;
1232 }
1233
1234 VkResult anv_WaitForFences(
1235 VkDevice _device,
1236 uint32_t fenceCount,
1237 const VkFence* pFences,
1238 bool32_t waitAll,
1239 uint64_t timeout)
1240 {
1241 struct anv_device *device = (struct anv_device *) _device;
1242 struct anv_fence **fences = (struct anv_fence **) pFences;
1243 int64_t t = timeout;
1244 int ret;
1245
1246 /* FIXME: handle !waitAll */
1247
1248 for (uint32_t i = 0; i < fenceCount; i++) {
1249 ret = anv_gem_wait(device, fences[i]->bo.gem_handle, &t);
1250 if (ret == -1 && errno == ETIME)
1251 return VK_TIMEOUT;
1252 else if (ret == -1)
1253 return vk_error(VK_ERROR_UNKNOWN);
1254 }
1255
1256 return VK_SUCCESS;
1257 }
1258
1259 // Queue semaphore functions
1260
1261 VkResult anv_CreateSemaphore(
1262 VkDevice device,
1263 const VkSemaphoreCreateInfo* pCreateInfo,
1264 VkSemaphore* pSemaphore)
1265 {
1266 stub_return(VK_UNSUPPORTED);
1267 }
1268
1269 VkResult anv_QueueSignalSemaphore(
1270 VkQueue queue,
1271 VkSemaphore semaphore)
1272 {
1273 stub_return(VK_UNSUPPORTED);
1274 }
1275
1276 VkResult anv_QueueWaitSemaphore(
1277 VkQueue queue,
1278 VkSemaphore semaphore)
1279 {
1280 stub_return(VK_UNSUPPORTED);
1281 }
1282
1283 // Event functions
1284
1285 VkResult anv_CreateEvent(
1286 VkDevice device,
1287 const VkEventCreateInfo* pCreateInfo,
1288 VkEvent* pEvent)
1289 {
1290 stub_return(VK_UNSUPPORTED);
1291 }
1292
1293 VkResult anv_GetEventStatus(
1294 VkDevice device,
1295 VkEvent event)
1296 {
1297 stub_return(VK_UNSUPPORTED);
1298 }
1299
1300 VkResult anv_SetEvent(
1301 VkDevice device,
1302 VkEvent event)
1303 {
1304 stub_return(VK_UNSUPPORTED);
1305 }
1306
1307 VkResult anv_ResetEvent(
1308 VkDevice device,
1309 VkEvent event)
1310 {
1311 stub_return(VK_UNSUPPORTED);
1312 }
1313
1314 // Query functions
1315
1316 VkResult anv_CreateQueryPool(
1317 VkDevice _device,
1318 const VkQueryPoolCreateInfo* pCreateInfo,
1319 VkQueryPool* pQueryPool)
1320 {
1321 struct anv_device *device = (struct anv_device *) _device;
1322 struct anv_query_pool *pool;
1323 VkResult result;
1324 size_t size;
1325
1326 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO);
1327
1328 switch (pCreateInfo->queryType) {
1329 case VK_QUERY_TYPE_OCCLUSION:
1330 break;
1331 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
1332 return VK_UNSUPPORTED;
1333 default:
1334 unreachable("");
1335 }
1336
1337 pool = anv_device_alloc(device, sizeof(*pool), 8,
1338 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1339 if (pool == NULL)
1340 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1341
1342 pool->type = pCreateInfo->queryType;
1343 size = pCreateInfo->slots * sizeof(struct anv_query_pool_slot);
1344 result = anv_bo_init_new(&pool->bo, device, size);
1345 if (result != VK_SUCCESS)
1346 goto fail;
1347
1348 pool->bo.map = anv_gem_mmap(device, pool->bo.gem_handle, 0, size);
1349
1350 *pQueryPool = (VkQueryPool) pool;
1351
1352 return VK_SUCCESS;
1353
1354 fail:
1355 anv_device_free(device, pool);
1356
1357 return result;
1358 }
1359
1360 VkResult anv_GetQueryPoolResults(
1361 VkDevice _device,
1362 VkQueryPool queryPool,
1363 uint32_t startQuery,
1364 uint32_t queryCount,
1365 size_t* pDataSize,
1366 void* pData,
1367 VkQueryResultFlags flags)
1368 {
1369 struct anv_device *device = (struct anv_device *) _device;
1370 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
1371 struct anv_query_pool_slot *slot = pool->bo.map;
1372 int64_t timeout = INT64_MAX;
1373 uint32_t *dst32 = pData;
1374 uint64_t *dst64 = pData;
1375 uint64_t result;
1376 int ret;
1377
1378 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
1379 /* Where is the availabilty info supposed to go? */
1380 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
1381 return VK_UNSUPPORTED;
1382 }
1383
1384 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
1385
1386 if (flags & VK_QUERY_RESULT_64_BIT)
1387 *pDataSize = queryCount * sizeof(uint64_t);
1388 else
1389 *pDataSize = queryCount * sizeof(uint32_t);
1390
1391 if (pData == NULL)
1392 return VK_SUCCESS;
1393
1394 if (flags & VK_QUERY_RESULT_WAIT_BIT) {
1395 ret = anv_gem_wait(device, pool->bo.gem_handle, &timeout);
1396 if (ret == -1)
1397 return vk_error(VK_ERROR_UNKNOWN);
1398 }
1399
1400 for (uint32_t i = 0; i < queryCount; i++) {
1401 result = slot[startQuery + i].end - slot[startQuery + i].begin;
1402 if (flags & VK_QUERY_RESULT_64_BIT) {
1403 *dst64++ = result;
1404 } else {
1405 if (result > UINT32_MAX)
1406 result = UINT32_MAX;
1407 *dst32++ = result;
1408 }
1409 }
1410
1411 return VK_SUCCESS;
1412 }
1413
1414 // Buffer functions
1415
1416 VkResult anv_CreateBuffer(
1417 VkDevice _device,
1418 const VkBufferCreateInfo* pCreateInfo,
1419 VkBuffer* pBuffer)
1420 {
1421 struct anv_device *device = (struct anv_device *) _device;
1422 struct anv_buffer *buffer;
1423
1424 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_CREATE_INFO);
1425
1426 buffer = anv_device_alloc(device, sizeof(*buffer), 8,
1427 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1428 if (buffer == NULL)
1429 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1430
1431 buffer->size = pCreateInfo->size;
1432 buffer->bo = NULL;
1433 buffer->offset = 0;
1434
1435 *pBuffer = (VkBuffer) buffer;
1436
1437 return VK_SUCCESS;
1438 }
1439
1440 // Buffer view functions
1441
1442 VkResult anv_CreateBufferView(
1443 VkDevice _device,
1444 const VkBufferViewCreateInfo* pCreateInfo,
1445 VkBufferView* pView)
1446 {
1447 struct anv_device *device = (struct anv_device *) _device;
1448 struct anv_buffer *buffer = (struct anv_buffer *) pCreateInfo->buffer;
1449 struct anv_surface_view *view;
1450 const struct anv_format *format;
1451
1452 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_BUFFER_VIEW_CREATE_INFO);
1453
1454 view = anv_device_alloc(device, sizeof(*view), 8,
1455 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1456 if (view == NULL)
1457 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1458
1459 view->bo = buffer->bo;
1460 view->offset = buffer->offset + pCreateInfo->offset;
1461 view->surface_state =
1462 anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1463 view->format = pCreateInfo->format;
1464
1465 format = anv_format_for_vk_format(pCreateInfo->format);
1466 /* This assumes RGBA float format. */
1467 uint32_t stride = 4;
1468 uint32_t num_elements = pCreateInfo->range / stride;
1469 struct GEN8_RENDER_SURFACE_STATE surface_state = {
1470 .SurfaceType = SURFTYPE_BUFFER,
1471 .SurfaceArray = false,
1472 .SurfaceFormat = format->format,
1473 .SurfaceVerticalAlignment = VALIGN4,
1474 .SurfaceHorizontalAlignment = HALIGN4,
1475 .TileMode = LINEAR,
1476 .VerticalLineStride = 0,
1477 .VerticalLineStrideOffset = 0,
1478 .SamplerL2BypassModeDisable = true,
1479 .RenderCacheReadWriteMode = WriteOnlyCache,
1480 .MemoryObjectControlState = 0, /* FIXME: MOCS */
1481 .BaseMipLevel = 0,
1482 .SurfaceQPitch = 0,
1483 .Height = (num_elements >> 7) & 0x3fff,
1484 .Width = num_elements & 0x7f,
1485 .Depth = (num_elements >> 21) & 0x3f,
1486 .SurfacePitch = stride - 1,
1487 .MinimumArrayElement = 0,
1488 .NumberofMultisamples = MULTISAMPLECOUNT_1,
1489 .XOffset = 0,
1490 .YOffset = 0,
1491 .SurfaceMinLOD = 0,
1492 .MIPCountLOD = 0,
1493 .AuxiliarySurfaceMode = AUX_NONE,
1494 .RedClearColor = 0,
1495 .GreenClearColor = 0,
1496 .BlueClearColor = 0,
1497 .AlphaClearColor = 0,
1498 .ShaderChannelSelectRed = SCS_RED,
1499 .ShaderChannelSelectGreen = SCS_GREEN,
1500 .ShaderChannelSelectBlue = SCS_BLUE,
1501 .ShaderChannelSelectAlpha = SCS_ALPHA,
1502 .ResourceMinLOD = 0,
1503 /* FIXME: We assume that the image must be bound at this time. */
1504 .SurfaceBaseAddress = { NULL, view->offset },
1505 };
1506
1507 GEN8_RENDER_SURFACE_STATE_pack(NULL, view->surface_state.map, &surface_state);
1508
1509 *pView = (VkImageView) view;
1510
1511 return VK_SUCCESS;
1512 }
1513
1514 // Sampler functions
1515
1516 VkResult anv_CreateSampler(
1517 VkDevice _device,
1518 const VkSamplerCreateInfo* pCreateInfo,
1519 VkSampler* pSampler)
1520 {
1521 struct anv_device *device = (struct anv_device *) _device;
1522 struct anv_sampler *sampler;
1523
1524 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
1525
1526 sampler = anv_device_alloc(device, sizeof(*sampler), 8,
1527 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1528 if (!sampler)
1529 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1530
1531 static const uint32_t vk_to_gen_tex_filter[] = {
1532 [VK_TEX_FILTER_NEAREST] = MAPFILTER_NEAREST,
1533 [VK_TEX_FILTER_LINEAR] = MAPFILTER_LINEAR
1534 };
1535
1536 static const uint32_t vk_to_gen_mipmap_mode[] = {
1537 [VK_TEX_MIPMAP_MODE_BASE] = MIPFILTER_NONE,
1538 [VK_TEX_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
1539 [VK_TEX_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
1540 };
1541
1542 static const uint32_t vk_to_gen_tex_address[] = {
1543 [VK_TEX_ADDRESS_WRAP] = TCM_WRAP,
1544 [VK_TEX_ADDRESS_MIRROR] = TCM_MIRROR,
1545 [VK_TEX_ADDRESS_CLAMP] = TCM_CLAMP,
1546 [VK_TEX_ADDRESS_MIRROR_ONCE] = TCM_MIRROR_ONCE,
1547 [VK_TEX_ADDRESS_CLAMP_BORDER] = TCM_CLAMP_BORDER,
1548 };
1549
1550 static const uint32_t vk_to_gen_compare_op[] = {
1551 [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
1552 [VK_COMPARE_OP_LESS] = PREFILTEROPLESS,
1553 [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
1554 [VK_COMPARE_OP_LESS_EQUAL] = PREFILTEROPLEQUAL,
1555 [VK_COMPARE_OP_GREATER] = PREFILTEROPGREATER,
1556 [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
1557 [VK_COMPARE_OP_GREATER_EQUAL] = PREFILTEROPGEQUAL,
1558 [VK_COMPARE_OP_ALWAYS] = PREFILTEROPALWAYS,
1559 };
1560
1561 if (pCreateInfo->maxAnisotropy > 0)
1562 anv_finishme("missing support for anisotropic filtering");
1563
1564 struct GEN8_SAMPLER_STATE sampler_state = {
1565 .SamplerDisable = false,
1566 .TextureBorderColorMode = DX10OGL,
1567 .LODPreClampMode = 0,
1568 .BaseMipLevel = 0,
1569 .MipModeFilter = vk_to_gen_mipmap_mode[pCreateInfo->mipMode],
1570 .MagModeFilter = vk_to_gen_tex_filter[pCreateInfo->magFilter],
1571 .MinModeFilter = vk_to_gen_tex_filter[pCreateInfo->minFilter],
1572 .TextureLODBias = pCreateInfo->mipLodBias * 256,
1573 .AnisotropicAlgorithm = EWAApproximation,
1574 .MinLOD = pCreateInfo->minLod * 256,
1575 .MaxLOD = pCreateInfo->maxLod * 256,
1576 .ChromaKeyEnable = 0,
1577 .ChromaKeyIndex = 0,
1578 .ChromaKeyMode = 0,
1579 .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
1580 .CubeSurfaceControlMode = 0,
1581 .IndirectStatePointer = 0,
1582 .LODClampMagnificationMode = MIPNONE,
1583 .MaximumAnisotropy = 0,
1584 .RAddressMinFilterRoundingEnable = 0,
1585 .RAddressMagFilterRoundingEnable = 0,
1586 .VAddressMinFilterRoundingEnable = 0,
1587 .VAddressMagFilterRoundingEnable = 0,
1588 .UAddressMinFilterRoundingEnable = 0,
1589 .UAddressMagFilterRoundingEnable = 0,
1590 .TrilinearFilterQuality = 0,
1591 .NonnormalizedCoordinateEnable = 0,
1592 .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressU],
1593 .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressV],
1594 .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressW],
1595 };
1596
1597 GEN8_SAMPLER_STATE_pack(NULL, sampler->state, &sampler_state);
1598
1599 *pSampler = (VkSampler) sampler;
1600
1601 return VK_SUCCESS;
1602 }
1603
1604 // Descriptor set functions
1605
1606 VkResult anv_CreateDescriptorSetLayout(
1607 VkDevice _device,
1608 const VkDescriptorSetLayoutCreateInfo* pCreateInfo,
1609 VkDescriptorSetLayout* pSetLayout)
1610 {
1611 struct anv_device *device = (struct anv_device *) _device;
1612 struct anv_descriptor_set_layout *set_layout;
1613
1614 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO);
1615
1616 uint32_t sampler_count[VK_NUM_SHADER_STAGE] = { 0, };
1617 uint32_t surface_count[VK_NUM_SHADER_STAGE] = { 0, };
1618 uint32_t num_dynamic_buffers = 0;
1619 uint32_t count = 0;
1620 uint32_t s;
1621
1622 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1623 switch (pCreateInfo->pBinding[i].descriptorType) {
1624 case VK_DESCRIPTOR_TYPE_SAMPLER:
1625 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1626 sampler_count[s] += pCreateInfo->pBinding[i].count;
1627 break;
1628
1629 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1630 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1631 sampler_count[s] += pCreateInfo->pBinding[i].count;
1632
1633 /* fall through */
1634
1635 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1636 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1637 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1638 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1639 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1640 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1641 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1642 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1643 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1644 surface_count[s] += pCreateInfo->pBinding[i].count;
1645 break;
1646 default:
1647 break;
1648 }
1649
1650 count += pCreateInfo->pBinding[i].count;
1651 }
1652
1653 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1654 switch (pCreateInfo->pBinding[i].descriptorType) {
1655 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1656 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1657 num_dynamic_buffers++;
1658 break;
1659 default:
1660 break;
1661 }
1662 }
1663
1664 uint32_t sampler_total = 0;
1665 uint32_t surface_total = 0;
1666 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1667 sampler_total += sampler_count[s];
1668 surface_total += surface_count[s];
1669 }
1670
1671 size_t size = sizeof(*set_layout) +
1672 (sampler_total + surface_total) * sizeof(uint32_t);
1673 set_layout = anv_device_alloc(device, size, 8,
1674 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1675 if (!set_layout)
1676 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1677
1678 set_layout->num_dynamic_buffers = num_dynamic_buffers;
1679 set_layout->count = count;
1680
1681 uint32_t *p = set_layout->entries;
1682 uint32_t *sampler[VK_NUM_SHADER_STAGE];
1683 uint32_t *surface[VK_NUM_SHADER_STAGE];
1684 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
1685 set_layout->stage[s].surface_count = surface_count[s];
1686 set_layout->stage[s].surface_start = surface[s] = p;
1687 p += surface_count[s];
1688 set_layout->stage[s].sampler_count = sampler_count[s];
1689 set_layout->stage[s].sampler_start = sampler[s] = p;
1690 p += sampler_count[s];
1691 }
1692
1693 uint32_t descriptor = 0;
1694 for (uint32_t i = 0; i < pCreateInfo->count; i++) {
1695 switch (pCreateInfo->pBinding[i].descriptorType) {
1696 case VK_DESCRIPTOR_TYPE_SAMPLER:
1697 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1698 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++)
1699 *(sampler[s])++ = descriptor + j;
1700 break;
1701
1702 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1703 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1704 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++)
1705 *(sampler[s])++ = descriptor + j;
1706
1707 /* fallthrough */
1708
1709 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1710 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1711 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1712 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1713 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1714 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1715 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1716 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1717 for_each_bit(s, pCreateInfo->pBinding[i].stageFlags)
1718 for (uint32_t j = 0; j < pCreateInfo->pBinding[i].count; j++) {
1719 *(surface[s])++ = descriptor + j;
1720 }
1721 break;
1722 default:
1723 unreachable("");
1724 }
1725 descriptor += pCreateInfo->pBinding[i].count;
1726 }
1727
1728 *pSetLayout = (VkDescriptorSetLayout) set_layout;
1729
1730 return VK_SUCCESS;
1731 }
1732
1733 VkResult anv_BeginDescriptorPoolUpdate(
1734 VkDevice device,
1735 VkDescriptorUpdateMode updateMode)
1736 {
1737 return VK_SUCCESS;
1738 }
1739
1740 VkResult anv_EndDescriptorPoolUpdate(
1741 VkDevice device,
1742 VkCmdBuffer cmd)
1743 {
1744 return VK_SUCCESS;
1745 }
1746
1747 VkResult anv_CreateDescriptorPool(
1748 VkDevice device,
1749 VkDescriptorPoolUsage poolUsage,
1750 uint32_t maxSets,
1751 const VkDescriptorPoolCreateInfo* pCreateInfo,
1752 VkDescriptorPool* pDescriptorPool)
1753 {
1754 *pDescriptorPool = 1;
1755
1756 return VK_SUCCESS;
1757 }
1758
1759 VkResult anv_ResetDescriptorPool(
1760 VkDevice device,
1761 VkDescriptorPool descriptorPool)
1762 {
1763 return VK_SUCCESS;
1764 }
1765
1766 VkResult anv_AllocDescriptorSets(
1767 VkDevice _device,
1768 VkDescriptorPool descriptorPool,
1769 VkDescriptorSetUsage setUsage,
1770 uint32_t count,
1771 const VkDescriptorSetLayout* pSetLayouts,
1772 VkDescriptorSet* pDescriptorSets,
1773 uint32_t* pCount)
1774 {
1775 struct anv_device *device = (struct anv_device *) _device;
1776 const struct anv_descriptor_set_layout *layout;
1777 struct anv_descriptor_set *set;
1778 size_t size;
1779
1780 for (uint32_t i = 0; i < count; i++) {
1781 layout = (struct anv_descriptor_set_layout *) pSetLayouts[i];
1782 size = sizeof(*set) + layout->count * sizeof(set->descriptors[0]);
1783 set = anv_device_alloc(device, size, 8,
1784 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1785 if (!set) {
1786 *pCount = i;
1787 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1788 }
1789
1790 pDescriptorSets[i] = (VkDescriptorSet) set;
1791 }
1792
1793 *pCount = count;
1794
1795 return VK_SUCCESS;
1796 }
1797
1798 void anv_ClearDescriptorSets(
1799 VkDevice device,
1800 VkDescriptorPool descriptorPool,
1801 uint32_t count,
1802 const VkDescriptorSet* pDescriptorSets)
1803 {
1804 }
1805
1806 void anv_UpdateDescriptors(
1807 VkDevice _device,
1808 VkDescriptorSet descriptorSet,
1809 uint32_t updateCount,
1810 const void** ppUpdateArray)
1811 {
1812 struct anv_descriptor_set *set = (struct anv_descriptor_set *) descriptorSet;
1813 VkUpdateSamplers *update_samplers;
1814 VkUpdateSamplerTextures *update_sampler_textures;
1815 VkUpdateImages *update_images;
1816 VkUpdateBuffers *update_buffers;
1817 VkUpdateAsCopy *update_as_copy;
1818
1819 for (uint32_t i = 0; i < updateCount; i++) {
1820 const struct anv_common *common = ppUpdateArray[i];
1821
1822 switch (common->sType) {
1823 case VK_STRUCTURE_TYPE_UPDATE_SAMPLERS:
1824 update_samplers = (VkUpdateSamplers *) common;
1825
1826 for (uint32_t j = 0; j < update_samplers->count; j++) {
1827 set->descriptors[update_samplers->binding + j].sampler =
1828 (struct anv_sampler *) update_samplers->pSamplers[j];
1829 }
1830 break;
1831
1832 case VK_STRUCTURE_TYPE_UPDATE_SAMPLER_TEXTURES:
1833 /* FIXME: Shouldn't this be *_UPDATE_SAMPLER_IMAGES? */
1834 update_sampler_textures = (VkUpdateSamplerTextures *) common;
1835
1836 for (uint32_t j = 0; j < update_sampler_textures->count; j++) {
1837 set->descriptors[update_sampler_textures->binding + j].view =
1838 (struct anv_surface_view *)
1839 update_sampler_textures->pSamplerImageViews[j].pImageView->view;
1840 set->descriptors[update_sampler_textures->binding + j].sampler =
1841 (struct anv_sampler *)
1842 update_sampler_textures->pSamplerImageViews[j].sampler;
1843 }
1844 break;
1845
1846 case VK_STRUCTURE_TYPE_UPDATE_IMAGES:
1847 update_images = (VkUpdateImages *) common;
1848
1849 for (uint32_t j = 0; j < update_images->count; j++) {
1850 set->descriptors[update_images->binding + j].view =
1851 (struct anv_surface_view *) update_images->pImageViews[j].view;
1852 }
1853 break;
1854
1855 case VK_STRUCTURE_TYPE_UPDATE_BUFFERS:
1856 update_buffers = (VkUpdateBuffers *) common;
1857
1858 for (uint32_t j = 0; j < update_buffers->count; j++) {
1859 set->descriptors[update_buffers->binding + j].view =
1860 (struct anv_surface_view *) update_buffers->pBufferViews[j].view;
1861 }
1862 /* FIXME: descriptor arrays? */
1863 break;
1864
1865 case VK_STRUCTURE_TYPE_UPDATE_AS_COPY:
1866 update_as_copy = (VkUpdateAsCopy *) common;
1867 (void) update_as_copy;
1868 break;
1869
1870 default:
1871 break;
1872 }
1873 }
1874 }
1875
1876 // State object functions
1877
1878 static inline int64_t
1879 clamp_int64(int64_t x, int64_t min, int64_t max)
1880 {
1881 if (x < min)
1882 return min;
1883 else if (x < max)
1884 return x;
1885 else
1886 return max;
1887 }
1888
1889 VkResult anv_CreateDynamicViewportState(
1890 VkDevice _device,
1891 const VkDynamicVpStateCreateInfo* pCreateInfo,
1892 VkDynamicVpState* pState)
1893 {
1894 struct anv_device *device = (struct anv_device *) _device;
1895 struct anv_dynamic_vp_state *state;
1896
1897 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO);
1898
1899 state = anv_device_alloc(device, sizeof(*state), 8,
1900 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1901 if (state == NULL)
1902 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1903
1904 unsigned count = pCreateInfo->viewportAndScissorCount;
1905 state->sf_clip_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
1906 count * 64, 64);
1907 state->cc_vp = anv_state_pool_alloc(&device->dynamic_state_pool,
1908 count * 8, 32);
1909 state->scissor = anv_state_pool_alloc(&device->dynamic_state_pool,
1910 count * 32, 32);
1911
1912 for (uint32_t i = 0; i < pCreateInfo->viewportAndScissorCount; i++) {
1913 const VkViewport *vp = &pCreateInfo->pViewports[i];
1914 const VkRect *s = &pCreateInfo->pScissors[i];
1915
1916 struct GEN8_SF_CLIP_VIEWPORT sf_clip_viewport = {
1917 .ViewportMatrixElementm00 = vp->width / 2,
1918 .ViewportMatrixElementm11 = vp->height / 2,
1919 .ViewportMatrixElementm22 = (vp->maxDepth - vp->minDepth) / 2,
1920 .ViewportMatrixElementm30 = vp->originX + vp->width / 2,
1921 .ViewportMatrixElementm31 = vp->originY + vp->height / 2,
1922 .ViewportMatrixElementm32 = (vp->maxDepth + vp->minDepth) / 2,
1923 .XMinClipGuardband = -1.0f,
1924 .XMaxClipGuardband = 1.0f,
1925 .YMinClipGuardband = -1.0f,
1926 .YMaxClipGuardband = 1.0f,
1927 .XMinViewPort = vp->originX,
1928 .XMaxViewPort = vp->originX + vp->width - 1,
1929 .YMinViewPort = vp->originY,
1930 .YMaxViewPort = vp->originY + vp->height - 1,
1931 };
1932
1933 struct GEN8_CC_VIEWPORT cc_viewport = {
1934 .MinimumDepth = vp->minDepth,
1935 .MaximumDepth = vp->maxDepth
1936 };
1937
1938 /* Since xmax and ymax are inclusive, we have to have xmax < xmin or
1939 * ymax < ymin for empty clips. In case clip x, y, width height are all
1940 * 0, the clamps below produce 0 for xmin, ymin, xmax, ymax, which isn't
1941 * what we want. Just special case empty clips and produce a canonical
1942 * empty clip. */
1943 static const struct GEN8_SCISSOR_RECT empty_scissor = {
1944 .ScissorRectangleYMin = 1,
1945 .ScissorRectangleXMin = 1,
1946 .ScissorRectangleYMax = 0,
1947 .ScissorRectangleXMax = 0
1948 };
1949
1950 const int max = 0xffff;
1951 struct GEN8_SCISSOR_RECT scissor = {
1952 /* Do this math using int64_t so overflow gets clamped correctly. */
1953 .ScissorRectangleYMin = clamp_int64(s->offset.y, 0, max),
1954 .ScissorRectangleXMin = clamp_int64(s->offset.x, 0, max),
1955 .ScissorRectangleYMax = clamp_int64((uint64_t) s->offset.y + s->extent.height - 1, 0, max),
1956 .ScissorRectangleXMax = clamp_int64((uint64_t) s->offset.x + s->extent.width - 1, 0, max)
1957 };
1958
1959 GEN8_SF_CLIP_VIEWPORT_pack(NULL, state->sf_clip_vp.map + i * 64, &sf_clip_viewport);
1960 GEN8_CC_VIEWPORT_pack(NULL, state->cc_vp.map + i * 32, &cc_viewport);
1961
1962 if (s->extent.width <= 0 || s->extent.height <= 0) {
1963 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &empty_scissor);
1964 } else {
1965 GEN8_SCISSOR_RECT_pack(NULL, state->scissor.map + i * 32, &scissor);
1966 }
1967 }
1968
1969 *pState = (VkDynamicVpState) state;
1970
1971 return VK_SUCCESS;
1972 }
1973
1974 VkResult anv_CreateDynamicRasterState(
1975 VkDevice _device,
1976 const VkDynamicRsStateCreateInfo* pCreateInfo,
1977 VkDynamicRsState* pState)
1978 {
1979 struct anv_device *device = (struct anv_device *) _device;
1980 struct anv_dynamic_rs_state *state;
1981
1982 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_RS_STATE_CREATE_INFO);
1983
1984 state = anv_device_alloc(device, sizeof(*state), 8,
1985 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
1986 if (state == NULL)
1987 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1988
1989 /* Missing these:
1990 * float depthBias;
1991 * float depthBiasClamp;
1992 * float slopeScaledDepthBias;
1993 * float pointFadeThreshold;
1994 * // optional (GL45) - Size of point fade threshold
1995 */
1996
1997 struct GEN8_3DSTATE_SF sf = {
1998 GEN8_3DSTATE_SF_header,
1999 .LineWidth = pCreateInfo->lineWidth,
2000 .PointWidth = pCreateInfo->pointSize,
2001 };
2002
2003 GEN8_3DSTATE_SF_pack(NULL, state->state_sf, &sf);
2004
2005 *pState = (VkDynamicRsState) state;
2006
2007 return VK_SUCCESS;
2008 }
2009
2010 VkResult anv_CreateDynamicColorBlendState(
2011 VkDevice _device,
2012 const VkDynamicCbStateCreateInfo* pCreateInfo,
2013 VkDynamicCbState* pState)
2014 {
2015 struct anv_device *device = (struct anv_device *) _device;
2016 struct anv_dynamic_cb_state *state;
2017
2018 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_DYNAMIC_CB_STATE_CREATE_INFO);
2019
2020 state = anv_device_alloc(device, sizeof(*state), 8,
2021 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2022 if (state == NULL)
2023 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2024
2025 *pState = (VkDynamicCbState) state;
2026
2027 return VK_SUCCESS;
2028 }
2029
2030 VkResult anv_CreateDynamicDepthStencilState(
2031 VkDevice device,
2032 const VkDynamicDsStateCreateInfo* pCreateInfo,
2033 VkDynamicDsState* pState)
2034 {
2035 stub_return(VK_UNSUPPORTED);
2036 }
2037
2038 // Command buffer functions
2039
2040 VkResult anv_CreateCommandBuffer(
2041 VkDevice _device,
2042 const VkCmdBufferCreateInfo* pCreateInfo,
2043 VkCmdBuffer* pCmdBuffer)
2044 {
2045 struct anv_device *device = (struct anv_device *) _device;
2046 struct anv_cmd_buffer *cmd_buffer;
2047 VkResult result;
2048
2049 cmd_buffer = anv_device_alloc(device, sizeof(*cmd_buffer), 8,
2050 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2051 if (cmd_buffer == NULL)
2052 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2053
2054 cmd_buffer->device = device;
2055 cmd_buffer->rs_state = NULL;
2056 cmd_buffer->vp_state = NULL;
2057 memset(&cmd_buffer->default_bindings, 0, sizeof(cmd_buffer->default_bindings));
2058 cmd_buffer->bindings = &cmd_buffer->default_bindings;
2059
2060 result = anv_batch_init(&cmd_buffer->batch, device);
2061 if (result != VK_SUCCESS)
2062 goto fail;
2063
2064 cmd_buffer->exec2_objects =
2065 anv_device_alloc(device, 8192 * sizeof(cmd_buffer->exec2_objects[0]), 8,
2066 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2067 if (cmd_buffer->exec2_objects == NULL) {
2068 result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2069 goto fail_batch;
2070 }
2071
2072 cmd_buffer->exec2_bos =
2073 anv_device_alloc(device, 8192 * sizeof(cmd_buffer->exec2_bos[0]), 8,
2074 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2075 if (cmd_buffer->exec2_bos == NULL) {
2076 result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2077 goto fail_exec2_objects;
2078 }
2079
2080 anv_state_stream_init(&cmd_buffer->surface_state_stream,
2081 &device->surface_state_block_pool);
2082 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
2083 &device->dynamic_state_block_pool);
2084
2085 cmd_buffer->dirty = 0;
2086 cmd_buffer->vb_dirty = 0;
2087
2088 *pCmdBuffer = (VkCmdBuffer) cmd_buffer;
2089
2090 return VK_SUCCESS;
2091
2092 fail_exec2_objects:
2093 anv_device_free(device, cmd_buffer->exec2_objects);
2094 fail_batch:
2095 anv_batch_finish(&cmd_buffer->batch, device);
2096 fail:
2097 anv_device_free(device, cmd_buffer);
2098
2099 return result;
2100 }
2101
2102 VkResult anv_BeginCommandBuffer(
2103 VkCmdBuffer cmdBuffer,
2104 const VkCmdBufferBeginInfo* pBeginInfo)
2105 {
2106 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2107 struct anv_device *device = cmd_buffer->device;
2108
2109 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPELINE_SELECT,
2110 .PipelineSelection = _3D);
2111 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_SIP);
2112
2113 anv_batch_emit(&cmd_buffer->batch, GEN8_STATE_BASE_ADDRESS,
2114 .GeneralStateBaseAddress = { NULL, 0 },
2115 .GeneralStateBaseAddressModifyEnable = true,
2116 .GeneralStateBufferSize = 0xfffff,
2117 .GeneralStateBufferSizeModifyEnable = true,
2118
2119 .SurfaceStateBaseAddress = { &device->surface_state_block_pool.bo, 0 },
2120 .SurfaceStateMemoryObjectControlState = 0, /* FIXME: MOCS */
2121 .SurfaceStateBaseAddressModifyEnable = true,
2122
2123 .DynamicStateBaseAddress = { &device->dynamic_state_block_pool.bo, 0 },
2124 .DynamicStateBaseAddressModifyEnable = true,
2125 .DynamicStateBufferSize = 0xfffff,
2126 .DynamicStateBufferSizeModifyEnable = true,
2127
2128 .IndirectObjectBaseAddress = { NULL, 0 },
2129 .IndirectObjectBaseAddressModifyEnable = true,
2130 .IndirectObjectBufferSize = 0xfffff,
2131 .IndirectObjectBufferSizeModifyEnable = true,
2132
2133 .InstructionBaseAddress = { &device->instruction_block_pool.bo, 0 },
2134 .InstructionBaseAddressModifyEnable = true,
2135 .InstructionBufferSize = 0xfffff,
2136 .InstructionBuffersizeModifyEnable = true);
2137
2138 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VF_STATISTICS,
2139 .StatisticsEnable = true);
2140 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_HS, .Enable = false);
2141 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_TE, .TEEnable = false);
2142 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DS, .FunctionEnable = false);
2143 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_STREAMOUT, .SOFunctionEnable = false);
2144
2145 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_VS,
2146 .ConstantBufferOffset = 0,
2147 .ConstantBufferSize = 4);
2148 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_GS,
2149 .ConstantBufferOffset = 4,
2150 .ConstantBufferSize = 4);
2151 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_PUSH_CONSTANT_ALLOC_PS,
2152 .ConstantBufferOffset = 8,
2153 .ConstantBufferSize = 4);
2154
2155 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_CHROMAKEY,
2156 .ChromaKeyKillEnable = false);
2157 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SBE_SWIZ);
2158 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_AA_LINE_PARAMETERS);
2159
2160 /* Hardcoded state: */
2161 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DEPTH_BUFFER,
2162 .SurfaceType = SURFTYPE_2D,
2163 .Width = 1,
2164 .Height = 1,
2165 .SurfaceFormat = D16_UNORM,
2166 .SurfaceBaseAddress = { NULL, 0 },
2167 .HierarchicalDepthBufferEnable = 0);
2168
2169 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_WM_DEPTH_STENCIL,
2170 .DepthTestEnable = false,
2171 .DepthBufferWriteEnable = false);
2172
2173 return VK_SUCCESS;
2174 }
2175
2176 static void
2177 anv_cmd_buffer_add_bo(struct anv_cmd_buffer *cmd_buffer,
2178 struct anv_bo *bo, struct anv_reloc_list *list)
2179 {
2180 struct drm_i915_gem_exec_object2 *obj;
2181
2182 bo->index = cmd_buffer->bo_count;
2183 obj = &cmd_buffer->exec2_objects[bo->index];
2184 cmd_buffer->exec2_bos[bo->index] = bo;
2185 cmd_buffer->bo_count++;
2186
2187 obj->handle = bo->gem_handle;
2188 obj->relocation_count = 0;
2189 obj->relocs_ptr = 0;
2190 obj->alignment = 0;
2191 obj->offset = bo->offset;
2192 obj->flags = 0;
2193 obj->rsvd1 = 0;
2194 obj->rsvd2 = 0;
2195
2196 if (list) {
2197 obj->relocation_count = list->num_relocs;
2198 obj->relocs_ptr = (uintptr_t) list->relocs;
2199 }
2200 }
2201
2202 static void
2203 anv_cmd_buffer_add_validate_bos(struct anv_cmd_buffer *cmd_buffer,
2204 struct anv_reloc_list *list)
2205 {
2206 struct anv_bo *bo, *batch_bo;
2207
2208 batch_bo = &cmd_buffer->batch.bo;
2209 for (size_t i = 0; i < list->num_relocs; i++) {
2210 bo = list->reloc_bos[i];
2211 /* Skip any relocations targeting the batch bo. We need to make sure
2212 * it's the last in the list so we'll add it manually later.
2213 */
2214 if (bo == batch_bo)
2215 continue;
2216 if (bo->index < cmd_buffer->bo_count && cmd_buffer->exec2_bos[bo->index] == bo)
2217 continue;
2218
2219 anv_cmd_buffer_add_bo(cmd_buffer, bo, NULL);
2220 }
2221 }
2222
2223 static void
2224 anv_cmd_buffer_process_relocs(struct anv_cmd_buffer *cmd_buffer,
2225 struct anv_reloc_list *list)
2226 {
2227 struct anv_bo *bo;
2228
2229 /* If the kernel supports I915_EXEC_NO_RELOC, it will compare offset in
2230 * struct drm_i915_gem_exec_object2 against the bos current offset and if
2231 * all bos haven't moved it will skip relocation processing alltogether.
2232 * If I915_EXEC_NO_RELOC is not supported, the kernel ignores the incoming
2233 * value of offset so we can set it either way. For that to work we need
2234 * to make sure all relocs use the same presumed offset.
2235 */
2236
2237 for (size_t i = 0; i < list->num_relocs; i++) {
2238 bo = list->reloc_bos[i];
2239 if (bo->offset != list->relocs[i].presumed_offset)
2240 cmd_buffer->need_reloc = true;
2241
2242 list->relocs[i].target_handle = bo->index;
2243 }
2244 }
2245
2246 VkResult anv_EndCommandBuffer(
2247 VkCmdBuffer cmdBuffer)
2248 {
2249 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2250 struct anv_device *device = cmd_buffer->device;
2251 struct anv_batch *batch = &cmd_buffer->batch;
2252
2253 anv_batch_emit(batch, GEN8_MI_BATCH_BUFFER_END);
2254
2255 /* Round batch up to an even number of dwords. */
2256 if ((batch->next - batch->bo.map) & 4)
2257 anv_batch_emit(batch, GEN8_MI_NOOP);
2258
2259 cmd_buffer->bo_count = 0;
2260 cmd_buffer->need_reloc = false;
2261
2262 /* Lock for access to bo->index. */
2263 pthread_mutex_lock(&device->mutex);
2264
2265 /* Add block pool bos first so we can add them with their relocs. */
2266 anv_cmd_buffer_add_bo(cmd_buffer, &device->surface_state_block_pool.bo,
2267 &batch->surf_relocs);
2268
2269 anv_cmd_buffer_add_validate_bos(cmd_buffer, &batch->surf_relocs);
2270 anv_cmd_buffer_add_validate_bos(cmd_buffer, &batch->cmd_relocs);
2271 anv_cmd_buffer_add_bo(cmd_buffer, &batch->bo, &batch->cmd_relocs);
2272 anv_cmd_buffer_process_relocs(cmd_buffer, &batch->surf_relocs);
2273 anv_cmd_buffer_process_relocs(cmd_buffer, &batch->cmd_relocs);
2274
2275 cmd_buffer->execbuf.buffers_ptr = (uintptr_t) cmd_buffer->exec2_objects;
2276 cmd_buffer->execbuf.buffer_count = cmd_buffer->bo_count;
2277 cmd_buffer->execbuf.batch_start_offset = 0;
2278 cmd_buffer->execbuf.batch_len = batch->next - batch->bo.map;
2279 cmd_buffer->execbuf.cliprects_ptr = 0;
2280 cmd_buffer->execbuf.num_cliprects = 0;
2281 cmd_buffer->execbuf.DR1 = 0;
2282 cmd_buffer->execbuf.DR4 = 0;
2283
2284 cmd_buffer->execbuf.flags = I915_EXEC_HANDLE_LUT;
2285 if (!cmd_buffer->need_reloc)
2286 cmd_buffer->execbuf.flags |= I915_EXEC_NO_RELOC;
2287 cmd_buffer->execbuf.flags |= I915_EXEC_RENDER;
2288 cmd_buffer->execbuf.rsvd1 = device->context_id;
2289 cmd_buffer->execbuf.rsvd2 = 0;
2290
2291 pthread_mutex_unlock(&device->mutex);
2292
2293 return VK_SUCCESS;
2294 }
2295
2296 VkResult anv_ResetCommandBuffer(
2297 VkCmdBuffer cmdBuffer)
2298 {
2299 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2300
2301 anv_batch_reset(&cmd_buffer->batch);
2302
2303 return VK_SUCCESS;
2304 }
2305
2306 // Command buffer building functions
2307
2308 void anv_CmdBindPipeline(
2309 VkCmdBuffer cmdBuffer,
2310 VkPipelineBindPoint pipelineBindPoint,
2311 VkPipeline _pipeline)
2312 {
2313 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2314
2315 cmd_buffer->pipeline = (struct anv_pipeline *) _pipeline;
2316 cmd_buffer->dirty |= ANV_CMD_BUFFER_PIPELINE_DIRTY;
2317 }
2318
2319 void anv_CmdBindDynamicStateObject(
2320 VkCmdBuffer cmdBuffer,
2321 VkStateBindPoint stateBindPoint,
2322 VkDynamicStateObject dynamicState)
2323 {
2324 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2325 struct anv_dynamic_vp_state *vp_state;
2326
2327 switch (stateBindPoint) {
2328 case VK_STATE_BIND_POINT_VIEWPORT:
2329 vp_state = (struct anv_dynamic_vp_state *) dynamicState;
2330 /* We emit state immediately, but set cmd_buffer->vp_state to indicate
2331 * that vp state has been set in this command buffer. */
2332 cmd_buffer->vp_state = vp_state;
2333 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_SCISSOR_STATE_POINTERS,
2334 .ScissorRectPointer = vp_state->scissor.offset);
2335 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
2336 .CCViewportPointer = vp_state->cc_vp.offset);
2337 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
2338 .SFClipViewportPointer = vp_state->sf_clip_vp.offset);
2339 break;
2340 case VK_STATE_BIND_POINT_RASTER:
2341 cmd_buffer->rs_state = (struct anv_dynamic_rs_state *) dynamicState;
2342 cmd_buffer->dirty |= ANV_CMD_BUFFER_RS_DIRTY;
2343 break;
2344 case VK_STATE_BIND_POINT_COLOR_BLEND:
2345 case VK_STATE_BIND_POINT_DEPTH_STENCIL:
2346 break;
2347 default:
2348 break;
2349 };
2350 }
2351
2352 void anv_CmdBindDescriptorSets(
2353 VkCmdBuffer cmdBuffer,
2354 VkPipelineBindPoint pipelineBindPoint,
2355 uint32_t firstSet,
2356 uint32_t setCount,
2357 const VkDescriptorSet* pDescriptorSets,
2358 uint32_t dynamicOffsetCount,
2359 const uint32_t* pDynamicOffsets)
2360 {
2361 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2362 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2363 struct anv_bindings *bindings = cmd_buffer->bindings;
2364
2365 uint32_t offset = 0;
2366 for (uint32_t i = 0; i < setCount; i++) {
2367 struct anv_descriptor_set *set =
2368 (struct anv_descriptor_set *) pDescriptorSets[i];
2369 struct anv_descriptor_set_layout *set_layout = layout->set[firstSet + i].layout;
2370
2371 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2372 uint32_t *surface_to_desc = set_layout->stage[s].surface_start;
2373 uint32_t *sampler_to_desc = set_layout->stage[s].sampler_start;
2374 uint32_t bias = s == VK_SHADER_STAGE_FRAGMENT ? MAX_RTS : 0;
2375 uint32_t start;
2376
2377 start = bias + layout->set[firstSet + i].surface_start[s];
2378 for (uint32_t b = 0; b < set_layout->stage[s].surface_count; b++) {
2379 struct anv_surface_view *view = set->descriptors[surface_to_desc[b]].view;
2380
2381 bindings->descriptors[s].surfaces[start + b] =
2382 view->surface_state.offset;
2383 bindings->descriptors[s].relocs[start + b].bo = view->bo;
2384 bindings->descriptors[s].relocs[start + b].offset = view->offset;
2385 }
2386
2387 start = layout->set[firstSet + i].sampler_start[s];
2388 for (uint32_t b = 0; b < set_layout->stage[s].sampler_count; b++) {
2389 struct anv_sampler *sampler = set->descriptors[sampler_to_desc[b]].sampler;
2390
2391 memcpy(&bindings->descriptors[s].samplers[start + b],
2392 sampler->state, sizeof(sampler->state));
2393 }
2394 }
2395
2396 offset += layout->set[firstSet + i].layout->num_dynamic_buffers;
2397 }
2398
2399 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
2400 }
2401
2402 void anv_CmdBindIndexBuffer(
2403 VkCmdBuffer cmdBuffer,
2404 VkBuffer _buffer,
2405 VkDeviceSize offset,
2406 VkIndexType indexType)
2407 {
2408 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2409 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2410
2411 static const uint32_t vk_to_gen_index_type[] = {
2412 [VK_INDEX_TYPE_UINT8] = INDEX_BYTE,
2413 [VK_INDEX_TYPE_UINT16] = INDEX_WORD,
2414 [VK_INDEX_TYPE_UINT32] = INDEX_DWORD,
2415 };
2416
2417 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_INDEX_BUFFER,
2418 .IndexFormat = vk_to_gen_index_type[indexType],
2419 .MemoryObjectControlState = 0,
2420 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2421 .BufferSize = buffer->size - offset);
2422 }
2423
2424 void anv_CmdBindVertexBuffers(
2425 VkCmdBuffer cmdBuffer,
2426 uint32_t startBinding,
2427 uint32_t bindingCount,
2428 const VkBuffer* pBuffers,
2429 const VkDeviceSize* pOffsets)
2430 {
2431 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2432 struct anv_bindings *bindings = cmd_buffer->bindings;
2433
2434 /* We have to defer setting up vertex buffer since we need the buffer
2435 * stride from the pipeline. */
2436
2437 for (uint32_t i = 0; i < bindingCount; i++) {
2438 bindings->vb[startBinding + i].buffer = (struct anv_buffer *) pBuffers[i];
2439 bindings->vb[startBinding + i].offset = pOffsets[i];
2440 cmd_buffer->vb_dirty |= 1 << (startBinding + i);
2441 }
2442 }
2443
2444 static void
2445 flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
2446 {
2447 struct anv_pipeline_layout *layout = cmd_buffer->pipeline->layout;
2448 struct anv_bindings *bindings = cmd_buffer->bindings;
2449 uint32_t layers = cmd_buffer->framebuffer->layers;
2450
2451 for (uint32_t s = 0; s < VK_NUM_SHADER_STAGE; s++) {
2452 uint32_t bias;
2453
2454 if (s == VK_SHADER_STAGE_FRAGMENT) {
2455 bias = MAX_RTS;
2456 layers = cmd_buffer->framebuffer->layers;
2457 } else {
2458 bias = 0;
2459 layers = 0;
2460 }
2461
2462 /* This is a little awkward: layout can be NULL but we still have to
2463 * allocate and set a binding table for the PS stage for render
2464 * targets. */
2465 uint32_t surface_count = layout ? layout->stage[s].surface_count : 0;
2466
2467 if (layers + surface_count > 0) {
2468 struct anv_state state;
2469 uint32_t size;
2470
2471 size = (bias + surface_count) * sizeof(uint32_t);
2472 state = anv_state_stream_alloc(&cmd_buffer->surface_state_stream, size, 32);
2473 memcpy(state.map, bindings->descriptors[s].surfaces, size);
2474
2475 for (uint32_t i = 0; i < layers; i++)
2476 anv_reloc_list_add(&cmd_buffer->batch.surf_relocs,
2477 bindings->descriptors[s].surfaces[i] + 8 * sizeof(int32_t),
2478 bindings->descriptors[s].relocs[i].bo,
2479 bindings->descriptors[s].relocs[i].offset);
2480
2481 for (uint32_t i = 0; i < surface_count; i++)
2482 anv_reloc_list_add(&cmd_buffer->batch.surf_relocs,
2483 bindings->descriptors[s].surfaces[bias + i] + 8 * sizeof(int32_t),
2484 bindings->descriptors[s].relocs[bias + i].bo,
2485 bindings->descriptors[s].relocs[bias + i].offset);
2486
2487 static const uint32_t binding_table_opcodes[] = {
2488 [VK_SHADER_STAGE_VERTEX] = 38,
2489 [VK_SHADER_STAGE_TESS_CONTROL] = 39,
2490 [VK_SHADER_STAGE_TESS_EVALUATION] = 40,
2491 [VK_SHADER_STAGE_GEOMETRY] = 41,
2492 [VK_SHADER_STAGE_FRAGMENT] = 42,
2493 [VK_SHADER_STAGE_COMPUTE] = 0,
2494 };
2495
2496 anv_batch_emit(&cmd_buffer->batch,
2497 GEN8_3DSTATE_BINDING_TABLE_POINTERS_VS,
2498 ._3DCommandSubOpcode = binding_table_opcodes[s],
2499 .PointertoVSBindingTable = state.offset);
2500 }
2501
2502 if (layout && layout->stage[s].sampler_count > 0) {
2503 struct anv_state state;
2504 size_t size;
2505
2506 size = layout->stage[s].sampler_count * 16;
2507 state = anv_state_stream_alloc(&cmd_buffer->dynamic_state_stream, size, 32);
2508 memcpy(state.map, bindings->descriptors[s].samplers, size);
2509
2510 static const uint32_t sampler_state_opcodes[] = {
2511 [VK_SHADER_STAGE_VERTEX] = 43,
2512 [VK_SHADER_STAGE_TESS_CONTROL] = 44, /* HS */
2513 [VK_SHADER_STAGE_TESS_EVALUATION] = 45, /* DS */
2514 [VK_SHADER_STAGE_GEOMETRY] = 46,
2515 [VK_SHADER_STAGE_FRAGMENT] = 47,
2516 [VK_SHADER_STAGE_COMPUTE] = 0,
2517 };
2518
2519 anv_batch_emit(&cmd_buffer->batch,
2520 GEN8_3DSTATE_SAMPLER_STATE_POINTERS_VS,
2521 ._3DCommandSubOpcode = sampler_state_opcodes[s],
2522 .PointertoVSSamplerState = state.offset);
2523 }
2524 }
2525 }
2526
2527 static void
2528 anv_cmd_buffer_flush_state(struct anv_cmd_buffer *cmd_buffer)
2529 {
2530 struct anv_pipeline *pipeline = cmd_buffer->pipeline;
2531 struct anv_bindings *bindings = cmd_buffer->bindings;
2532 const uint32_t num_buffers = __builtin_popcount(cmd_buffer->vb_dirty);
2533 const uint32_t num_dwords = 1 + num_buffers * 4;
2534 uint32_t *p;
2535
2536 if (cmd_buffer->vb_dirty) {
2537 p = anv_batch_emitn(&cmd_buffer->batch, num_dwords,
2538 GEN8_3DSTATE_VERTEX_BUFFERS);
2539 uint32_t vb, i = 0;
2540 for_each_bit(vb, cmd_buffer->vb_dirty) {
2541 struct anv_buffer *buffer = bindings->vb[vb].buffer;
2542 uint32_t offset = bindings->vb[vb].offset;
2543
2544 struct GEN8_VERTEX_BUFFER_STATE state = {
2545 .VertexBufferIndex = vb,
2546 .MemoryObjectControlState = 0,
2547 .AddressModifyEnable = true,
2548 .BufferPitch = pipeline->binding_stride[vb],
2549 .BufferStartingAddress = { buffer->bo, buffer->offset + offset },
2550 .BufferSize = buffer->size - offset
2551 };
2552
2553 GEN8_VERTEX_BUFFER_STATE_pack(&cmd_buffer->batch, &p[1 + i * 4], &state);
2554 i++;
2555 }
2556 }
2557
2558 if (cmd_buffer->dirty & ANV_CMD_BUFFER_PIPELINE_DIRTY)
2559 anv_batch_emit_batch(&cmd_buffer->batch, &pipeline->batch);
2560
2561 if (cmd_buffer->dirty & ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY)
2562 flush_descriptor_sets(cmd_buffer);
2563
2564 if (cmd_buffer->dirty & (ANV_CMD_BUFFER_PIPELINE_DIRTY | ANV_CMD_BUFFER_RS_DIRTY))
2565 anv_batch_emit_merge(&cmd_buffer->batch,
2566 cmd_buffer->rs_state->state_sf, pipeline->state_sf);
2567
2568 cmd_buffer->vb_dirty = 0;
2569 cmd_buffer->dirty = 0;
2570 }
2571
2572 void anv_CmdDraw(
2573 VkCmdBuffer cmdBuffer,
2574 uint32_t firstVertex,
2575 uint32_t vertexCount,
2576 uint32_t firstInstance,
2577 uint32_t instanceCount)
2578 {
2579 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2580
2581 anv_cmd_buffer_flush_state(cmd_buffer);
2582
2583 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2584 .VertexAccessType = SEQUENTIAL,
2585 .VertexCountPerInstance = vertexCount,
2586 .StartVertexLocation = firstVertex,
2587 .InstanceCount = instanceCount,
2588 .StartInstanceLocation = firstInstance,
2589 .BaseVertexLocation = 0);
2590 }
2591
2592 void anv_CmdDrawIndexed(
2593 VkCmdBuffer cmdBuffer,
2594 uint32_t firstIndex,
2595 uint32_t indexCount,
2596 int32_t vertexOffset,
2597 uint32_t firstInstance,
2598 uint32_t instanceCount)
2599 {
2600 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2601
2602 anv_cmd_buffer_flush_state(cmd_buffer);
2603
2604 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2605 .VertexAccessType = RANDOM,
2606 .VertexCountPerInstance = indexCount,
2607 .StartVertexLocation = firstIndex,
2608 .InstanceCount = instanceCount,
2609 .StartInstanceLocation = firstInstance,
2610 .BaseVertexLocation = 0);
2611 }
2612
2613 static void
2614 anv_batch_lrm(struct anv_batch *batch,
2615 uint32_t reg, struct anv_bo *bo, uint32_t offset)
2616 {
2617 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2618 .RegisterAddress = reg,
2619 .MemoryAddress = { bo, offset });
2620 }
2621
2622 static void
2623 anv_batch_lri(struct anv_batch *batch, uint32_t reg, uint32_t imm)
2624 {
2625 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_IMM,
2626 .RegisterOffset = reg,
2627 .DataDWord = imm);
2628 }
2629
2630 /* Auto-Draw / Indirect Registers */
2631 #define GEN7_3DPRIM_END_OFFSET 0x2420
2632 #define GEN7_3DPRIM_START_VERTEX 0x2430
2633 #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
2634 #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
2635 #define GEN7_3DPRIM_START_INSTANCE 0x243C
2636 #define GEN7_3DPRIM_BASE_VERTEX 0x2440
2637
2638 void anv_CmdDrawIndirect(
2639 VkCmdBuffer cmdBuffer,
2640 VkBuffer _buffer,
2641 VkDeviceSize offset,
2642 uint32_t count,
2643 uint32_t stride)
2644 {
2645 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2646 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2647 struct anv_bo *bo = buffer->bo;
2648 uint32_t bo_offset = buffer->offset + offset;
2649
2650 anv_cmd_buffer_flush_state(cmd_buffer);
2651
2652 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
2653 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
2654 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
2655 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 12);
2656 anv_batch_lri(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, 0);
2657
2658 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2659 .IndirectParameterEnable = true,
2660 .VertexAccessType = SEQUENTIAL);
2661 }
2662
2663 void anv_CmdDrawIndexedIndirect(
2664 VkCmdBuffer cmdBuffer,
2665 VkBuffer _buffer,
2666 VkDeviceSize offset,
2667 uint32_t count,
2668 uint32_t stride)
2669 {
2670 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2671 struct anv_buffer *buffer = (struct anv_buffer *) _buffer;
2672 struct anv_bo *bo = buffer->bo;
2673 uint32_t bo_offset = buffer->offset + offset;
2674
2675 anv_cmd_buffer_flush_state(cmd_buffer);
2676
2677 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_VERTEX_COUNT, bo, bo_offset);
2678 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_INSTANCE_COUNT, bo, bo_offset + 4);
2679 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_VERTEX, bo, bo_offset + 8);
2680 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_BASE_VERTEX, bo, bo_offset + 12);
2681 anv_batch_lrm(&cmd_buffer->batch, GEN7_3DPRIM_START_INSTANCE, bo, bo_offset + 16);
2682
2683 anv_batch_emit(&cmd_buffer->batch, GEN8_3DPRIMITIVE,
2684 .IndirectParameterEnable = true,
2685 .VertexAccessType = RANDOM);
2686 }
2687
2688 void anv_CmdDispatch(
2689 VkCmdBuffer cmdBuffer,
2690 uint32_t x,
2691 uint32_t y,
2692 uint32_t z)
2693 {
2694 stub();
2695 }
2696
2697 void anv_CmdDispatchIndirect(
2698 VkCmdBuffer cmdBuffer,
2699 VkBuffer buffer,
2700 VkDeviceSize offset)
2701 {
2702 stub();
2703 }
2704
2705 void anv_CmdSetEvent(
2706 VkCmdBuffer cmdBuffer,
2707 VkEvent event,
2708 VkPipeEvent pipeEvent)
2709 {
2710 stub();
2711 }
2712
2713 void anv_CmdResetEvent(
2714 VkCmdBuffer cmdBuffer,
2715 VkEvent event,
2716 VkPipeEvent pipeEvent)
2717 {
2718 stub();
2719 }
2720
2721 void anv_CmdWaitEvents(
2722 VkCmdBuffer cmdBuffer,
2723 VkWaitEvent waitEvent,
2724 uint32_t eventCount,
2725 const VkEvent* pEvents,
2726 uint32_t memBarrierCount,
2727 const void** ppMemBarriers)
2728 {
2729 stub();
2730 }
2731
2732 void anv_CmdPipelineBarrier(
2733 VkCmdBuffer cmdBuffer,
2734 VkWaitEvent waitEvent,
2735 uint32_t pipeEventCount,
2736 const VkPipeEvent* pPipeEvents,
2737 uint32_t memBarrierCount,
2738 const void** ppMemBarriers)
2739 {
2740 stub();
2741 }
2742
2743 static void
2744 anv_batch_emit_ps_depth_count(struct anv_batch *batch,
2745 struct anv_bo *bo, uint32_t offset)
2746 {
2747 anv_batch_emit(batch, GEN8_PIPE_CONTROL,
2748 .DestinationAddressType = DAT_PPGTT,
2749 .PostSyncOperation = WritePSDepthCount,
2750 .Address = { bo, offset }); /* FIXME: This is only lower 32 bits */
2751 }
2752
2753 void anv_CmdBeginQuery(
2754 VkCmdBuffer cmdBuffer,
2755 VkQueryPool queryPool,
2756 uint32_t slot,
2757 VkQueryControlFlags flags)
2758 {
2759 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2760 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2761
2762 switch (pool->type) {
2763 case VK_QUERY_TYPE_OCCLUSION:
2764 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
2765 slot * sizeof(struct anv_query_pool_slot));
2766 break;
2767
2768 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
2769 default:
2770 unreachable("");
2771 }
2772 }
2773
2774 void anv_CmdEndQuery(
2775 VkCmdBuffer cmdBuffer,
2776 VkQueryPool queryPool,
2777 uint32_t slot)
2778 {
2779 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2780 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2781
2782 switch (pool->type) {
2783 case VK_QUERY_TYPE_OCCLUSION:
2784 anv_batch_emit_ps_depth_count(&cmd_buffer->batch, &pool->bo,
2785 slot * sizeof(struct anv_query_pool_slot) + 8);
2786 break;
2787
2788 case VK_QUERY_TYPE_PIPELINE_STATISTICS:
2789 default:
2790 unreachable("");
2791 }
2792 }
2793
2794 void anv_CmdResetQueryPool(
2795 VkCmdBuffer cmdBuffer,
2796 VkQueryPool queryPool,
2797 uint32_t startQuery,
2798 uint32_t queryCount)
2799 {
2800 stub();
2801 }
2802
2803 #define TIMESTAMP 0x44070
2804
2805 void anv_CmdWriteTimestamp(
2806 VkCmdBuffer cmdBuffer,
2807 VkTimestampType timestampType,
2808 VkBuffer destBuffer,
2809 VkDeviceSize destOffset)
2810 {
2811 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2812 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
2813 struct anv_bo *bo = buffer->bo;
2814
2815 switch (timestampType) {
2816 case VK_TIMESTAMP_TYPE_TOP:
2817 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2818 .RegisterAddress = TIMESTAMP,
2819 .MemoryAddress = { bo, buffer->offset + destOffset });
2820 break;
2821
2822 case VK_TIMESTAMP_TYPE_BOTTOM:
2823 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
2824 .DestinationAddressType = DAT_PPGTT,
2825 .PostSyncOperation = WriteTimestamp,
2826 .Address = /* FIXME: This is only lower 32 bits */
2827 { bo, buffer->offset + destOffset });
2828 break;
2829
2830 default:
2831 break;
2832 }
2833 }
2834
2835 #define alu_opcode(v) __gen_field((v), 20, 31)
2836 #define alu_operand1(v) __gen_field((v), 10, 19)
2837 #define alu_operand2(v) __gen_field((v), 0, 9)
2838 #define alu(opcode, operand1, operand2) \
2839 alu_opcode(opcode) | alu_operand1(operand1) | alu_operand2(operand2)
2840
2841 #define OPCODE_NOOP 0x000
2842 #define OPCODE_LOAD 0x080
2843 #define OPCODE_LOADINV 0x480
2844 #define OPCODE_LOAD0 0x081
2845 #define OPCODE_LOAD1 0x481
2846 #define OPCODE_ADD 0x100
2847 #define OPCODE_SUB 0x101
2848 #define OPCODE_AND 0x102
2849 #define OPCODE_OR 0x103
2850 #define OPCODE_XOR 0x104
2851 #define OPCODE_STORE 0x180
2852 #define OPCODE_STOREINV 0x580
2853
2854 #define OPERAND_R0 0x00
2855 #define OPERAND_R1 0x01
2856 #define OPERAND_R2 0x02
2857 #define OPERAND_R3 0x03
2858 #define OPERAND_R4 0x04
2859 #define OPERAND_SRCA 0x20
2860 #define OPERAND_SRCB 0x21
2861 #define OPERAND_ACCU 0x31
2862 #define OPERAND_ZF 0x32
2863 #define OPERAND_CF 0x33
2864
2865 #define CS_GPR(n) (0x2600 + (n) * 8)
2866
2867 static void
2868 emit_load_alu_reg_u64(struct anv_batch *batch, uint32_t reg,
2869 struct anv_bo *bo, uint32_t offset)
2870 {
2871 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2872 .RegisterAddress = reg,
2873 .MemoryAddress = { bo, offset });
2874 anv_batch_emit(batch, GEN8_MI_LOAD_REGISTER_MEM,
2875 .RegisterAddress = reg + 4,
2876 .MemoryAddress = { bo, offset + 4 });
2877 }
2878
2879 void anv_CmdCopyQueryPoolResults(
2880 VkCmdBuffer cmdBuffer,
2881 VkQueryPool queryPool,
2882 uint32_t startQuery,
2883 uint32_t queryCount,
2884 VkBuffer destBuffer,
2885 VkDeviceSize destOffset,
2886 VkDeviceSize destStride,
2887 VkQueryResultFlags flags)
2888 {
2889 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
2890 struct anv_query_pool *pool = (struct anv_query_pool *) queryPool;
2891 struct anv_buffer *buffer = (struct anv_buffer *) destBuffer;
2892 uint32_t slot_offset, dst_offset;
2893
2894 if (flags & VK_QUERY_RESULT_WITH_AVAILABILITY_BIT) {
2895 /* Where is the availabilty info supposed to go? */
2896 anv_finishme("VK_QUERY_RESULT_WITH_AVAILABILITY_BIT");
2897 return;
2898 }
2899
2900 assert(pool->type == VK_QUERY_TYPE_OCCLUSION);
2901
2902 /* FIXME: If we're not waiting, should we just do this on the CPU? */
2903 if (flags & VK_QUERY_RESULT_WAIT_BIT)
2904 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
2905 .CommandStreamerStallEnable = true);
2906
2907 dst_offset = buffer->offset + destOffset;
2908 for (uint32_t i = 0; i < queryCount; i++) {
2909
2910 slot_offset = (startQuery + i) * sizeof(struct anv_query_pool_slot);
2911
2912 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(0), &pool->bo, slot_offset);
2913 emit_load_alu_reg_u64(&cmd_buffer->batch, CS_GPR(1), &pool->bo, slot_offset + 8);
2914
2915 /* FIXME: We need to clamp the result for 32 bit. */
2916
2917 uint32_t *dw = anv_batch_emitn(&cmd_buffer->batch, 5, GEN8_MI_MATH);
2918 dw[1] = alu(OPCODE_LOAD, OPERAND_SRCA, OPERAND_R1);
2919 dw[2] = alu(OPCODE_LOAD, OPERAND_SRCB, OPERAND_R0);
2920 dw[3] = alu(OPCODE_SUB, 0, 0);
2921 dw[4] = alu(OPCODE_STORE, OPERAND_R2, OPERAND_ACCU);
2922
2923 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2924 .RegisterAddress = CS_GPR(2),
2925 /* FIXME: This is only lower 32 bits */
2926 .MemoryAddress = { buffer->bo, dst_offset });
2927
2928 if (flags & VK_QUERY_RESULT_64_BIT)
2929 anv_batch_emit(&cmd_buffer->batch, GEN8_MI_STORE_REGISTER_MEM,
2930 .RegisterAddress = CS_GPR(2) + 4,
2931 /* FIXME: This is only lower 32 bits */
2932 .MemoryAddress = { buffer->bo, dst_offset + 4 });
2933
2934 dst_offset += destStride;
2935 }
2936 }
2937
2938 void anv_CmdInitAtomicCounters(
2939 VkCmdBuffer cmdBuffer,
2940 VkPipelineBindPoint pipelineBindPoint,
2941 uint32_t startCounter,
2942 uint32_t counterCount,
2943 const uint32_t* pData)
2944 {
2945 stub();
2946 }
2947
2948 void anv_CmdLoadAtomicCounters(
2949 VkCmdBuffer cmdBuffer,
2950 VkPipelineBindPoint pipelineBindPoint,
2951 uint32_t startCounter,
2952 uint32_t counterCount,
2953 VkBuffer srcBuffer,
2954 VkDeviceSize srcOffset)
2955 {
2956 stub();
2957 }
2958
2959 void anv_CmdSaveAtomicCounters(
2960 VkCmdBuffer cmdBuffer,
2961 VkPipelineBindPoint pipelineBindPoint,
2962 uint32_t startCounter,
2963 uint32_t counterCount,
2964 VkBuffer destBuffer,
2965 VkDeviceSize destOffset)
2966 {
2967 stub();
2968 }
2969
2970 VkResult anv_CreateFramebuffer(
2971 VkDevice _device,
2972 const VkFramebufferCreateInfo* pCreateInfo,
2973 VkFramebuffer* pFramebuffer)
2974 {
2975 struct anv_device *device = (struct anv_device *) _device;
2976 struct anv_framebuffer *framebuffer;
2977
2978 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO);
2979
2980 framebuffer = anv_device_alloc(device, sizeof(*framebuffer), 8,
2981 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
2982 if (framebuffer == NULL)
2983 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2984
2985 framebuffer->color_attachment_count = pCreateInfo->colorAttachmentCount;
2986 for (uint32_t i = 0; i < pCreateInfo->colorAttachmentCount; i++) {
2987 framebuffer->color_attachments[i] =
2988 (struct anv_surface_view *) pCreateInfo->pColorAttachments[i].view;
2989 }
2990
2991 if (pCreateInfo->pDepthStencilAttachment) {
2992 framebuffer->depth_stencil =
2993 (struct anv_depth_stencil_view *) pCreateInfo->pDepthStencilAttachment->view;
2994 }
2995
2996 framebuffer->sample_count = pCreateInfo->sampleCount;
2997 framebuffer->width = pCreateInfo->width;
2998 framebuffer->height = pCreateInfo->height;
2999 framebuffer->layers = pCreateInfo->layers;
3000
3001 vkCreateDynamicViewportState((VkDevice) device,
3002 &(VkDynamicVpStateCreateInfo) {
3003 .sType = VK_STRUCTURE_TYPE_DYNAMIC_VP_STATE_CREATE_INFO,
3004 .viewportAndScissorCount = 2,
3005 .pViewports = (VkViewport[]) {
3006 {
3007 .originX = 0,
3008 .originY = 0,
3009 .width = pCreateInfo->width,
3010 .height = pCreateInfo->height,
3011 .minDepth = 0,
3012 .maxDepth = 1
3013 },
3014 },
3015 .pScissors = (VkRect[]) {
3016 { { 0, 0 },
3017 { pCreateInfo->width, pCreateInfo->height } },
3018 }
3019 },
3020 &framebuffer->vp_state);
3021
3022 *pFramebuffer = (VkFramebuffer) framebuffer;
3023
3024 return VK_SUCCESS;
3025 }
3026
3027 VkResult anv_CreateRenderPass(
3028 VkDevice _device,
3029 const VkRenderPassCreateInfo* pCreateInfo,
3030 VkRenderPass* pRenderPass)
3031 {
3032 struct anv_device *device = (struct anv_device *) _device;
3033 struct anv_render_pass *pass;
3034 size_t size;
3035
3036 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO);
3037
3038 size = sizeof(*pass) +
3039 pCreateInfo->layers * sizeof(struct anv_render_pass_layer);
3040 pass = anv_device_alloc(device, size, 8,
3041 VK_SYSTEM_ALLOC_TYPE_API_OBJECT);
3042 if (pass == NULL)
3043 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
3044
3045 pass->render_area = pCreateInfo->renderArea;
3046
3047 pass->num_layers = pCreateInfo->layers;
3048
3049 pass->num_clear_layers = 0;
3050 for (uint32_t i = 0; i < pCreateInfo->layers; i++) {
3051 pass->layers[i].color_load_op = pCreateInfo->pColorLoadOps[i];
3052 pass->layers[i].clear_color = pCreateInfo->pColorLoadClearValues[i];
3053 if (pass->layers[i].color_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR)
3054 pass->num_clear_layers++;
3055 }
3056
3057 *pRenderPass = (VkRenderPass) pass;
3058
3059 return VK_SUCCESS;
3060 }
3061
3062 void
3063 anv_cmd_buffer_fill_render_targets(struct anv_cmd_buffer *cmd_buffer)
3064 {
3065 struct anv_framebuffer *framebuffer = cmd_buffer->framebuffer;
3066 struct anv_bindings *bindings = cmd_buffer->bindings;
3067
3068 for (uint32_t i = 0; i < framebuffer->color_attachment_count; i++) {
3069 struct anv_surface_view *view = framebuffer->color_attachments[i];
3070
3071 bindings->descriptors[VK_SHADER_STAGE_FRAGMENT].surfaces[i] = view->surface_state.offset;
3072 bindings->descriptors[VK_SHADER_STAGE_FRAGMENT].relocs[i].bo = view->bo;
3073 bindings->descriptors[VK_SHADER_STAGE_FRAGMENT].relocs[i].offset = view->offset;
3074 }
3075 cmd_buffer->dirty |= ANV_CMD_BUFFER_DESCRIPTOR_SET_DIRTY;
3076 }
3077
3078 void anv_CmdBeginRenderPass(
3079 VkCmdBuffer cmdBuffer,
3080 const VkRenderPassBegin* pRenderPassBegin)
3081 {
3082 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *) cmdBuffer;
3083 struct anv_render_pass *pass = (struct anv_render_pass *) pRenderPassBegin->renderPass;
3084 struct anv_framebuffer *framebuffer =
3085 (struct anv_framebuffer *) pRenderPassBegin->framebuffer;
3086
3087 cmd_buffer->framebuffer = framebuffer;
3088
3089 anv_batch_emit(&cmd_buffer->batch, GEN8_3DSTATE_DRAWING_RECTANGLE,
3090 .ClippedDrawingRectangleYMin = pass->render_area.offset.y,
3091 .ClippedDrawingRectangleXMin = pass->render_area.offset.x,
3092 .ClippedDrawingRectangleYMax =
3093 pass->render_area.offset.y + pass->render_area.extent.height - 1,
3094 .ClippedDrawingRectangleXMax =
3095 pass->render_area.offset.x + pass->render_area.extent.width - 1,
3096 .DrawingRectangleOriginY = 0,
3097 .DrawingRectangleOriginX = 0);
3098
3099 anv_cmd_buffer_fill_render_targets(cmd_buffer);
3100
3101 anv_cmd_buffer_clear(cmd_buffer, pass);
3102 }
3103
3104 void anv_CmdEndRenderPass(
3105 VkCmdBuffer cmdBuffer,
3106 VkRenderPass renderPass)
3107 {
3108 /* Emit a flushing pipe control at the end of a pass. This is kind of a
3109 * hack but it ensures that render targets always actually get written.
3110 * Eventually, we should do flushing based on image format transitions
3111 * or something of that nature.
3112 */
3113 struct anv_cmd_buffer *cmd_buffer = (struct anv_cmd_buffer *)cmdBuffer;
3114 anv_batch_emit(&cmd_buffer->batch, GEN8_PIPE_CONTROL,
3115 .PostSyncOperation = NoWrite,
3116 .RenderTargetCacheFlushEnable = true,
3117 .InstructionCacheInvalidateEnable = true,
3118 .DepthCacheFlushEnable = true,
3119 .VFCacheInvalidationEnable = true,
3120 .TextureCacheInvalidationEnable = true,
3121 .CommandStreamerStallEnable = true);
3122
3123 stub();
3124 }